Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux...
[deliverable/linux.git] / lib / swiotlb.c
CommitLineData
1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
563aaf06 4 * This implementation is a fallback for platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
1da177e4
LT
17 */
18
19#include <linux/cache.h>
17e5ad6c 20#include <linux/dma-mapping.h>
1da177e4
LT
21#include <linux/mm.h>
22#include <linux/module.h>
1da177e4
LT
23#include <linux/spinlock.h>
24#include <linux/string.h>
25#include <linux/types.h>
26#include <linux/ctype.h>
27
28#include <asm/io.h>
1da177e4 29#include <asm/dma.h>
17e5ad6c 30#include <asm/scatterlist.h>
1da177e4
LT
31
32#include <linux/init.h>
33#include <linux/bootmem.h>
34
35#define OFFSET(val,align) ((unsigned long) \
36 ( (val) & ( (align) - 1)))
37
f9527f12 38#define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
93fbff63 39#define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
1da177e4
LT
40
41/*
42 * Maximum allowable number of contiguous slabs to map,
43 * must be a power of 2. What is the appropriate value ?
44 * The complexity of {map,unmap}_single is linearly dependent on this value.
45 */
46#define IO_TLB_SEGSIZE 128
47
48/*
49 * log of the size of each IO TLB slab. The number of slabs is command line
50 * controllable.
51 */
52#define IO_TLB_SHIFT 11
53
0b9afede
AW
54#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
55
56/*
57 * Minimum IO TLB size to bother booting with. Systems with mainly
58 * 64bit capable cards will only lightly use the swiotlb. If we can't
59 * allocate a contiguous 1MB, we're probably in trouble anyway.
60 */
61#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
62
de69e0f0
JL
63/*
64 * Enumeration for sync targets
65 */
66enum dma_sync_target {
67 SYNC_FOR_CPU = 0,
68 SYNC_FOR_DEVICE = 1,
69};
70
1da177e4
LT
71int swiotlb_force;
72
73/*
74 * Used to do a quick range check in swiotlb_unmap_single and
75 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
76 * API.
77 */
78static char *io_tlb_start, *io_tlb_end;
79
80/*
81 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
82 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
83 */
84static unsigned long io_tlb_nslabs;
85
86/*
87 * When the IOMMU overflows we return a fallback buffer. This sets the size.
88 */
89static unsigned long io_tlb_overflow = 32*1024;
90
91void *io_tlb_overflow_buffer;
92
93/*
94 * This is a free list describing the number of free entries available from
95 * each index
96 */
97static unsigned int *io_tlb_list;
98static unsigned int io_tlb_index;
99
100/*
101 * We need to save away the original address corresponding to a mapped entry
102 * for the sync operations.
103 */
25667d67 104static unsigned char **io_tlb_orig_addr;
1da177e4
LT
105
106/*
107 * Protect the above data structures in the map and unmap calls
108 */
109static DEFINE_SPINLOCK(io_tlb_lock);
110
111static int __init
112setup_io_tlb_npages(char *str)
113{
114 if (isdigit(*str)) {
e8579e72 115 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
116 /* avoid tail segment of size < IO_TLB_SEGSIZE */
117 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
118 }
119 if (*str == ',')
120 ++str;
121 if (!strcmp(str, "force"))
122 swiotlb_force = 1;
123 return 1;
124}
125__setup("swiotlb=", setup_io_tlb_npages);
126/* make io_tlb_overflow tunable too? */
127
128/*
129 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 130 * structures for the software IO TLB used to implement the DMA API.
1da177e4 131 */
563aaf06
JB
132void __init
133swiotlb_init_with_default_size(size_t default_size)
1da177e4 134{
563aaf06 135 unsigned long i, bytes;
1da177e4
LT
136
137 if (!io_tlb_nslabs) {
e8579e72 138 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
139 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
140 }
141
563aaf06
JB
142 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
143
1da177e4
LT
144 /*
145 * Get IO TLB memory from the low pages
146 */
563aaf06 147 io_tlb_start = alloc_bootmem_low_pages(bytes);
1da177e4
LT
148 if (!io_tlb_start)
149 panic("Cannot allocate SWIOTLB buffer");
563aaf06 150 io_tlb_end = io_tlb_start + bytes;
1da177e4
LT
151
152 /*
153 * Allocate and initialize the free list array. This array is used
154 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
155 * between io_tlb_start and io_tlb_end.
156 */
157 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
25667d67 158 for (i = 0; i < io_tlb_nslabs; i++)
1da177e4
LT
159 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
160 io_tlb_index = 0;
25667d67 161 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
1da177e4
LT
162
163 /*
164 * Get the overflow emergency buffer
165 */
166 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
563aaf06
JB
167 if (!io_tlb_overflow_buffer)
168 panic("Cannot allocate SWIOTLB overflow buffer!\n");
169
25667d67
TL
170 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
171 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
1da177e4
LT
172}
173
563aaf06
JB
174void __init
175swiotlb_init(void)
1da177e4 176{
25667d67 177 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
1da177e4
LT
178}
179
0b9afede
AW
180/*
181 * Systems with larger DMA zones (those that don't support ISA) can
182 * initialize the swiotlb later using the slab allocator if needed.
183 * This should be just like above, but with some error catching.
184 */
185int
563aaf06 186swiotlb_late_init_with_default_size(size_t default_size)
0b9afede 187{
563aaf06 188 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
0b9afede
AW
189 unsigned int order;
190
191 if (!io_tlb_nslabs) {
192 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
193 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
194 }
195
196 /*
197 * Get IO TLB memory from the low pages
198 */
563aaf06 199 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
0b9afede 200 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 201 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede
AW
202
203 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
204 io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
205 order);
206 if (io_tlb_start)
207 break;
208 order--;
209 }
210
211 if (!io_tlb_start)
212 goto cleanup1;
213
563aaf06 214 if (order != get_order(bytes)) {
0b9afede
AW
215 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
216 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
217 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 218 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede 219 }
563aaf06
JB
220 io_tlb_end = io_tlb_start + bytes;
221 memset(io_tlb_start, 0, bytes);
0b9afede
AW
222
223 /*
224 * Allocate and initialize the free list array. This array is used
225 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
226 * between io_tlb_start and io_tlb_end.
227 */
228 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
229 get_order(io_tlb_nslabs * sizeof(int)));
230 if (!io_tlb_list)
231 goto cleanup2;
232
233 for (i = 0; i < io_tlb_nslabs; i++)
234 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
235 io_tlb_index = 0;
236
25667d67
TL
237 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
238 get_order(io_tlb_nslabs * sizeof(char *)));
0b9afede
AW
239 if (!io_tlb_orig_addr)
240 goto cleanup3;
241
25667d67 242 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
0b9afede
AW
243
244 /*
245 * Get the overflow emergency buffer
246 */
247 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
248 get_order(io_tlb_overflow));
249 if (!io_tlb_overflow_buffer)
250 goto cleanup4;
251
25667d67
TL
252 printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
253 "0x%lx\n", bytes >> 20,
254 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
0b9afede
AW
255
256 return 0;
257
258cleanup4:
25667d67
TL
259 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
260 sizeof(char *)));
0b9afede
AW
261 io_tlb_orig_addr = NULL;
262cleanup3:
25667d67
TL
263 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
264 sizeof(int)));
0b9afede 265 io_tlb_list = NULL;
0b9afede 266cleanup2:
563aaf06 267 io_tlb_end = NULL;
0b9afede
AW
268 free_pages((unsigned long)io_tlb_start, order);
269 io_tlb_start = NULL;
270cleanup1:
271 io_tlb_nslabs = req_nslabs;
272 return -ENOMEM;
273}
274
be6b0267 275static int
1da177e4
LT
276address_needs_mapping(struct device *hwdev, dma_addr_t addr)
277{
278 dma_addr_t mask = 0xffffffff;
279 /* If the device has a mask, use it, otherwise default to 32 bits */
280 if (hwdev && hwdev->dma_mask)
281 mask = *hwdev->dma_mask;
282 return (addr & ~mask) != 0;
283}
284
681cc5cd
FT
285static inline unsigned int is_span_boundary(unsigned int index,
286 unsigned int nslots,
287 unsigned long offset_slots,
288 unsigned long max_slots)
289{
290 unsigned long offset = (offset_slots + index) & (max_slots - 1);
291 return offset + nslots > max_slots;
292}
293
1da177e4
LT
294/*
295 * Allocates bounce buffer and returns its kernel virtual address.
296 */
297static void *
25667d67 298map_single(struct device *hwdev, char *buffer, size_t size, int dir)
1da177e4
LT
299{
300 unsigned long flags;
301 char *dma_addr;
302 unsigned int nslots, stride, index, wrap;
303 int i;
681cc5cd
FT
304 unsigned long start_dma_addr;
305 unsigned long mask;
306 unsigned long offset_slots;
307 unsigned long max_slots;
308
309 mask = dma_get_seg_boundary(hwdev);
310 start_dma_addr = virt_to_bus(io_tlb_start) & mask;
311
312 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
313 max_slots = ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
1da177e4
LT
314
315 /*
316 * For mappings greater than a page, we limit the stride (and
317 * hence alignment) to a page size.
318 */
319 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
320 if (size > PAGE_SIZE)
321 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
322 else
323 stride = 1;
324
34814545 325 BUG_ON(!nslots);
1da177e4
LT
326
327 /*
328 * Find suitable number of IO TLB entries size that will fit this
329 * request and allocate a buffer from that IO TLB pool.
330 */
331 spin_lock_irqsave(&io_tlb_lock, flags);
332 {
681cc5cd 333 index = ALIGN(io_tlb_index, stride);
1da177e4 334 if (index >= io_tlb_nslabs)
681cc5cd
FT
335 index = 0;
336
337 while (is_span_boundary(index, nslots, offset_slots,
338 max_slots)) {
339 index += stride;
340 if (index >= io_tlb_nslabs)
341 index = 0;
342 }
343 wrap = index;
1da177e4
LT
344
345 do {
346 /*
347 * If we find a slot that indicates we have 'nslots'
348 * number of contiguous buffers, we allocate the
349 * buffers from that slot and mark the entries as '0'
350 * indicating unavailable.
351 */
352 if (io_tlb_list[index] >= nslots) {
353 int count = 0;
354
355 for (i = index; i < (int) (index + nslots); i++)
356 io_tlb_list[i] = 0;
357 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
358 io_tlb_list[i] = ++count;
359 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
360
361 /*
362 * Update the indices to avoid searching in
363 * the next round.
364 */
365 io_tlb_index = ((index + nslots) < io_tlb_nslabs
366 ? (index + nslots) : 0);
367
368 goto found;
369 }
681cc5cd
FT
370 do {
371 index += stride;
372 if (index >= io_tlb_nslabs)
373 index = 0;
374 } while (is_span_boundary(index, nslots, offset_slots,
375 max_slots));
1da177e4
LT
376 } while (index != wrap);
377
378 spin_unlock_irqrestore(&io_tlb_lock, flags);
379 return NULL;
380 }
381 found:
382 spin_unlock_irqrestore(&io_tlb_lock, flags);
383
384 /*
385 * Save away the mapping from the original address to the DMA address.
386 * This is needed when we sync the memory. Then we sync the buffer if
387 * needed.
388 */
df336d1c
KF
389 for (i = 0; i < nslots; i++)
390 io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
1da177e4 391 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
25667d67 392 memcpy(dma_addr, buffer, size);
1da177e4
LT
393
394 return dma_addr;
395}
396
397/*
398 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
399 */
400static void
401unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
402{
403 unsigned long flags;
404 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
405 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
25667d67 406 char *buffer = io_tlb_orig_addr[index];
1da177e4
LT
407
408 /*
409 * First, sync the memory before unmapping the entry
410 */
25667d67 411 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
1da177e4
LT
412 /*
413 * bounce... copy the data back into the original buffer * and
414 * delete the bounce buffer.
415 */
25667d67 416 memcpy(buffer, dma_addr, size);
1da177e4
LT
417
418 /*
419 * Return the buffer to the free list by setting the corresponding
420 * entries to indicate the number of contigous entries available.
421 * While returning the entries to the free list, we merge the entries
422 * with slots below and above the pool being returned.
423 */
424 spin_lock_irqsave(&io_tlb_lock, flags);
425 {
426 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
427 io_tlb_list[index + nslots] : 0);
428 /*
429 * Step 1: return the slots to the free list, merging the
430 * slots with superceeding slots
431 */
432 for (i = index + nslots - 1; i >= index; i--)
433 io_tlb_list[i] = ++count;
434 /*
435 * Step 2: merge the returned slots with the preceding slots,
436 * if available (non zero)
437 */
438 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
439 io_tlb_list[i] = ++count;
440 }
441 spin_unlock_irqrestore(&io_tlb_lock, flags);
442}
443
444static void
de69e0f0
JL
445sync_single(struct device *hwdev, char *dma_addr, size_t size,
446 int dir, int target)
1da177e4
LT
447{
448 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
25667d67 449 char *buffer = io_tlb_orig_addr[index];
1da177e4 450
df336d1c
KF
451 buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
452
de69e0f0
JL
453 switch (target) {
454 case SYNC_FOR_CPU:
455 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
25667d67 456 memcpy(buffer, dma_addr, size);
34814545
ES
457 else
458 BUG_ON(dir != DMA_TO_DEVICE);
de69e0f0
JL
459 break;
460 case SYNC_FOR_DEVICE:
461 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
25667d67 462 memcpy(dma_addr, buffer, size);
34814545
ES
463 else
464 BUG_ON(dir != DMA_FROM_DEVICE);
de69e0f0
JL
465 break;
466 default:
1da177e4 467 BUG();
de69e0f0 468 }
1da177e4
LT
469}
470
471void *
472swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 473 dma_addr_t *dma_handle, gfp_t flags)
1da177e4 474{
563aaf06 475 dma_addr_t dev_addr;
1da177e4
LT
476 void *ret;
477 int order = get_order(size);
478
479 /*
480 * XXX fix me: the DMA API should pass us an explicit DMA mask
481 * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
482 * bit range instead of a 16MB one).
483 */
484 flags |= GFP_DMA;
485
25667d67 486 ret = (void *)__get_free_pages(flags, order);
93fbff63 487 if (ret && address_needs_mapping(hwdev, virt_to_bus(ret))) {
1da177e4
LT
488 /*
489 * The allocated memory isn't reachable by the device.
490 * Fall back on swiotlb_map_single().
491 */
492 free_pages((unsigned long) ret, order);
493 ret = NULL;
494 }
495 if (!ret) {
496 /*
497 * We are either out of memory or the device can't DMA
498 * to GFP_DMA memory; fall back on
499 * swiotlb_map_single(), which will grab memory from
500 * the lowest available address range.
501 */
502 dma_addr_t handle;
503 handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
17a941d8 504 if (swiotlb_dma_mapping_error(handle))
1da177e4
LT
505 return NULL;
506
93fbff63 507 ret = bus_to_virt(handle);
1da177e4
LT
508 }
509
510 memset(ret, 0, size);
93fbff63 511 dev_addr = virt_to_bus(ret);
1da177e4
LT
512
513 /* Confirm address can be DMA'd by device */
514 if (address_needs_mapping(hwdev, dev_addr)) {
563aaf06
JB
515 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
516 (unsigned long long)*hwdev->dma_mask,
517 (unsigned long long)dev_addr);
1da177e4
LT
518 panic("swiotlb_alloc_coherent: allocated memory is out of "
519 "range for device");
520 }
521 *dma_handle = dev_addr;
522 return ret;
523}
524
525void
526swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
527 dma_addr_t dma_handle)
528{
aa24886e 529 WARN_ON(irqs_disabled());
1da177e4
LT
530 if (!(vaddr >= (void *)io_tlb_start
531 && vaddr < (void *)io_tlb_end))
532 free_pages((unsigned long) vaddr, get_order(size));
533 else
534 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
535 swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
536}
537
538static void
539swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
540{
541 /*
542 * Ran out of IOMMU space for this operation. This is very bad.
543 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 544 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
545 * When the mapping is small enough return a static buffer to limit
546 * the damage, or panic when the transfer is too big.
547 */
563aaf06 548 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
1da177e4
LT
549 "device %s\n", size, dev ? dev->bus_id : "?");
550
551 if (size > io_tlb_overflow && do_panic) {
17e5ad6c
TL
552 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
553 panic("DMA: Memory would be corrupted\n");
554 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
555 panic("DMA: Random memory would be DMAed\n");
1da177e4
LT
556 }
557}
558
559/*
560 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 561 * physical address to use is returned.
1da177e4
LT
562 *
563 * Once the device is given the dma address, the device owns this memory until
564 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
565 */
566dma_addr_t
567swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
568{
563aaf06 569 dma_addr_t dev_addr = virt_to_bus(ptr);
1da177e4
LT
570 void *map;
571
34814545 572 BUG_ON(dir == DMA_NONE);
1da177e4
LT
573 /*
574 * If the pointer passed in happens to be in the device's DMA window,
575 * we can safely return the device addr and not worry about bounce
576 * buffering it.
577 */
25667d67 578 if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
1da177e4
LT
579 return dev_addr;
580
581 /*
582 * Oh well, have to allocate and map a bounce buffer.
583 */
25667d67 584 map = map_single(hwdev, ptr, size, dir);
1da177e4
LT
585 if (!map) {
586 swiotlb_full(hwdev, size, dir, 1);
587 map = io_tlb_overflow_buffer;
588 }
589
93fbff63 590 dev_addr = virt_to_bus(map);
1da177e4
LT
591
592 /*
593 * Ensure that the address returned is DMA'ble
594 */
595 if (address_needs_mapping(hwdev, dev_addr))
596 panic("map_single: bounce buffer is not DMA'ble");
597
598 return dev_addr;
599}
600
1da177e4
LT
601/*
602 * Unmap a single streaming mode DMA translation. The dma_addr and size must
603 * match what was provided for in a previous swiotlb_map_single call. All
604 * other usages are undefined.
605 *
606 * After this call, reads by the cpu to the buffer are guaranteed to see
607 * whatever the device wrote there.
608 */
609void
610swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
611 int dir)
612{
93fbff63 613 char *dma_addr = bus_to_virt(dev_addr);
1da177e4 614
34814545 615 BUG_ON(dir == DMA_NONE);
1da177e4
LT
616 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
617 unmap_single(hwdev, dma_addr, size, dir);
618 else if (dir == DMA_FROM_DEVICE)
cde14bbf 619 dma_mark_clean(dma_addr, size);
1da177e4
LT
620}
621
622/*
623 * Make physical memory consistent for a single streaming mode DMA translation
624 * after a transfer.
625 *
626 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
17e5ad6c
TL
627 * using the cpu, yet do not wish to teardown the dma mapping, you must
628 * call this function before doing so. At the next point you give the dma
1da177e4
LT
629 * address back to the card, you must first perform a
630 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
631 */
be6b0267 632static void
8270f3f1 633swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 634 size_t size, int dir, int target)
1da177e4 635{
93fbff63 636 char *dma_addr = bus_to_virt(dev_addr);
1da177e4 637
34814545 638 BUG_ON(dir == DMA_NONE);
1da177e4 639 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
de69e0f0 640 sync_single(hwdev, dma_addr, size, dir, target);
1da177e4 641 else if (dir == DMA_FROM_DEVICE)
cde14bbf 642 dma_mark_clean(dma_addr, size);
1da177e4
LT
643}
644
8270f3f1
JL
645void
646swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
647 size_t size, int dir)
648{
de69e0f0 649 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
8270f3f1
JL
650}
651
1da177e4
LT
652void
653swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
654 size_t size, int dir)
655{
de69e0f0 656 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
1da177e4
LT
657}
658
878a97cf
JL
659/*
660 * Same as above, but for a sub-range of the mapping.
661 */
be6b0267 662static void
878a97cf 663swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0
JL
664 unsigned long offset, size_t size,
665 int dir, int target)
878a97cf 666{
93fbff63 667 char *dma_addr = bus_to_virt(dev_addr) + offset;
878a97cf 668
34814545 669 BUG_ON(dir == DMA_NONE);
878a97cf 670 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
de69e0f0 671 sync_single(hwdev, dma_addr, size, dir, target);
878a97cf 672 else if (dir == DMA_FROM_DEVICE)
cde14bbf 673 dma_mark_clean(dma_addr, size);
878a97cf
JL
674}
675
676void
677swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
678 unsigned long offset, size_t size, int dir)
679{
de69e0f0
JL
680 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
681 SYNC_FOR_CPU);
878a97cf
JL
682}
683
684void
685swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
686 unsigned long offset, size_t size, int dir)
687{
de69e0f0
JL
688 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
689 SYNC_FOR_DEVICE);
878a97cf
JL
690}
691
1da177e4
LT
692/*
693 * Map a set of buffers described by scatterlist in streaming mode for DMA.
694 * This is the scatter-gather version of the above swiotlb_map_single
695 * interface. Here the scatter gather list elements are each tagged with the
696 * appropriate dma address and length. They are obtained via
697 * sg_dma_{address,length}(SG).
698 *
699 * NOTE: An implementation may be able to use a smaller number of
700 * DMA address/length pairs than there are SG table elements.
701 * (for example via virtual mapping capabilities)
702 * The routine returns the number of addr/length pairs actually
703 * used, at most nents.
704 *
705 * Device ownership issues as mentioned above for swiotlb_map_single are the
706 * same here.
707 */
708int
dbfd49fe 709swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
1da177e4
LT
710 int dir)
711{
dbfd49fe 712 struct scatterlist *sg;
25667d67 713 void *addr;
563aaf06 714 dma_addr_t dev_addr;
1da177e4
LT
715 int i;
716
34814545 717 BUG_ON(dir == DMA_NONE);
1da177e4 718
dbfd49fe 719 for_each_sg(sgl, sg, nelems, i) {
25667d67
TL
720 addr = SG_ENT_VIRT_ADDRESS(sg);
721 dev_addr = virt_to_bus(addr);
722 if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
723 void *map = map_single(hwdev, addr, sg->length, dir);
7e870233 724 if (!map) {
1da177e4
LT
725 /* Don't panic here, we expect map_sg users
726 to do proper error handling. */
727 swiotlb_full(hwdev, sg->length, dir, 0);
9e91fdb3 728 swiotlb_unmap_sg(hwdev, sgl, i, dir);
dbfd49fe 729 sgl[0].dma_length = 0;
1da177e4
LT
730 return 0;
731 }
cde14bbf 732 sg->dma_address = virt_to_bus(map);
1da177e4
LT
733 } else
734 sg->dma_address = dev_addr;
735 sg->dma_length = sg->length;
736 }
737 return nelems;
738}
739
740/*
741 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
742 * concerning calls here are the same as for swiotlb_unmap_single() above.
743 */
744void
dbfd49fe 745swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
1da177e4
LT
746 int dir)
747{
dbfd49fe 748 struct scatterlist *sg;
1da177e4
LT
749 int i;
750
34814545 751 BUG_ON(dir == DMA_NONE);
1da177e4 752
dbfd49fe 753 for_each_sg(sgl, sg, nelems, i) {
1da177e4 754 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
93fbff63
JB
755 unmap_single(hwdev, bus_to_virt(sg->dma_address),
756 sg->dma_length, dir);
1da177e4 757 else if (dir == DMA_FROM_DEVICE)
cde14bbf 758 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
dbfd49fe 759 }
1da177e4
LT
760}
761
762/*
763 * Make physical memory consistent for a set of streaming mode DMA translations
764 * after a transfer.
765 *
766 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
767 * and usage.
768 */
be6b0267 769static void
dbfd49fe 770swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
de69e0f0 771 int nelems, int dir, int target)
1da177e4 772{
dbfd49fe 773 struct scatterlist *sg;
1da177e4
LT
774 int i;
775
34814545 776 BUG_ON(dir == DMA_NONE);
1da177e4 777
dbfd49fe 778 for_each_sg(sgl, sg, nelems, i) {
1da177e4 779 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
93fbff63 780 sync_single(hwdev, bus_to_virt(sg->dma_address),
de69e0f0 781 sg->dma_length, dir, target);
cde14bbf
JB
782 else if (dir == DMA_FROM_DEVICE)
783 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
dbfd49fe 784 }
1da177e4
LT
785}
786
8270f3f1
JL
787void
788swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
789 int nelems, int dir)
790{
de69e0f0 791 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
8270f3f1
JL
792}
793
1da177e4
LT
794void
795swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
796 int nelems, int dir)
797{
de69e0f0 798 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1da177e4
LT
799}
800
801int
802swiotlb_dma_mapping_error(dma_addr_t dma_addr)
803{
93fbff63 804 return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
1da177e4
LT
805}
806
807/*
17e5ad6c 808 * Return whether the given device DMA address mask can be supported
1da177e4 809 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 810 * during bus mastering, then you would pass 0x00ffffff as the mask to
1da177e4
LT
811 * this function.
812 */
813int
563aaf06 814swiotlb_dma_supported(struct device *hwdev, u64 mask)
1da177e4 815{
25667d67 816 return virt_to_bus(io_tlb_end - 1) <= mask;
1da177e4
LT
817}
818
1da177e4
LT
819EXPORT_SYMBOL(swiotlb_map_single);
820EXPORT_SYMBOL(swiotlb_unmap_single);
821EXPORT_SYMBOL(swiotlb_map_sg);
822EXPORT_SYMBOL(swiotlb_unmap_sg);
823EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
824EXPORT_SYMBOL(swiotlb_sync_single_for_device);
878a97cf
JL
825EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
826EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
1da177e4
LT
827EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
828EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
829EXPORT_SYMBOL(swiotlb_dma_mapping_error);
25667d67
TL
830EXPORT_SYMBOL(swiotlb_alloc_coherent);
831EXPORT_SYMBOL(swiotlb_free_coherent);
1da177e4 832EXPORT_SYMBOL(swiotlb_dma_supported);
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