[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2008-03-13  Alan Modra  <amodra@bigpond.net.au>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* configure: Regenerate.

2008-03-07  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c (powerpc_opcodes): Order and format.

2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	* i386-tbl.h: Regenerated.

2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	x86-64.
	* i386-tbl.h: Regenerated.

2008-02-21  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	and Fword for far indirect jmp. Allow Reg16 and Word for near
	indirect jmp on x86-64. Disallow Fword for lcall.
	* i386-tbl.h: Re-generate.

2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>

	* cr16-opc.c  (cr16_num_optab): Defined

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	* i386-init.h: Regenerated.

2008-02-14  Nick Clifton  <nickc@redhat.com>

	PR binutils/5524
	* configure.in (SHARED_LIBADD): Select the correct host specific
	file extension for shared libraries.
	* configure: Regenerate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-02-11  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	* i386-tbl.h: Re-generate.

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>

	* mips-dis.c: Update copyright.
	(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.

2008-01-29  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c: Support optional L form mtmsr.

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.

2008-01-23  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (Byte): Fix a typo.

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (set_bitfield): Use fail () on error.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (lineno): New.
	(filename): Likewise.
	(set_bitfield): Report filename and line numer on error.
	(process_i386_opcodes): Set filename and update lineno.
	(process_i386_registers): Likewise.

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax 
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c: Update copyright to 2008.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.

2008-01-02  Mark Kettenis  <kettenis@gnu.org>

	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	From Miod Vallat.

For older changes see ChangeLog-2007
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
50e7d84b AM	1	2008-03-13 Alan Modra <amodra@bigpond.net.au>
	2
	3	* Makefile.am: Run "make dep-am".
	4	* Makefile.in: Regenerate.
	5	* configure: Regenerate.
	6
de866fcc AM	7	2008-03-07 Alan Modra <amodra@bigpond.net.au>
	8
	9	* ppc-opc.c (powerpc_opcodes): Order and format.
	10
28dbc079 L	11	2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
	12
	13	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	14	* i386-tbl.h: Regenerated.
	15
849830bd L	16	2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
	17
	18	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	19	x86-64.
	20	* i386-tbl.h: Regenerated.
	21
743ddb6b JB	22	2008-02-21 Jan Beulich <jbeulich@novell.com>
	23
	24	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	25	and Fword for far indirect jmp. Allow Reg16 and Word for near
	26	indirect jmp on x86-64. Disallow Fword for lcall.
	27	* i386-tbl.h: Re-generate.
	28
796d5313 NC	29	2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
	30
	31	* cr16-opc.c (cr16_num_optab): Defined
	32
65da13b5 L	33	2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
	34
	35	* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	36	* i386-init.h: Regenerated.
	37
0e336180 NC	38	2008-02-14 Nick Clifton <nickc@redhat.com>
	39
	40	PR binutils/5524
	41	* configure.in (SHARED_LIBADD): Select the correct host specific
	42	file extension for shared libraries.
	43	* configure: Regenerate.
	44
b7240065 JB	45	2008-02-13 Jan Beulich <jbeulich@novell.com>
	46
	47	* i386-opc.h (RegFlat): New.
	48	* i386-reg.tbl (flat): Add.
	49	* i386-tbl.h: Re-generate.
	50
34b772a6 JB	51	2008-02-13 Jan Beulich <jbeulich@novell.com>
	52
	53	* i386-dis.c (a_mode): New.
	54	(cond_jump_mode): Adjust.
	55	(Ma): Change to a_mode.
	56	(intel_operand_size): Handle a_mode.
	57	* i386-opc.tbl: Allow Dword and Qword for bound.
	58	* i386-tbl.h: Re-generate.
	59
a60de03c JB	60	2008-02-13 Jan Beulich <jbeulich@novell.com>
	61
	62	* i386-gen.c (process_i386_registers): Process new fields.
	63	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	64	unsigned char. Add dw2_regnum and Dw2Inval.
	65	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	66	register names.
	67	* i386-tbl.h: Re-generate.
	68
f03fe4c1 L	69	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
f03fe4c1 L	70
4b6bc8eb	71	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
f03fe4c1 L	72	* i386-init.h: Updated.
f03fe4c1 L	73
475a2301 L	74	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
	75
	76	* i386-gen.c (cpu_flags): Add CpuXsave.
	77
	78	* i386-opc.h (CpuXsave): New.
4b6bc8eb	79	(CpuLM): Updated.
475a2301 L	80	(i386_cpu_flags): Add cpuxsave.
	81
	82	* i386-dis.c (MOD_0FAE_REG_4): New.
	83	(RM_0F01_REG_2): Likewise.
	84	(MOD_0FAE_REG_5): Updated.
	85	(RM_0F01_REG_3): Likewise.
	86	(reg_table): Use MOD_0FAE_REG_4.
	87	(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
	88	for xrstor.
	89	(rm_table): Add RM_0F01_REG_2.
	90
	91	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	92	* i386-init.h: Regenerated.
	93	* i386-tbl.h: Likewise.
	94
595785c6	95	2008-02-11 Jan Beulich <jbeulich@novell.com>
041179fc	96
595785c6 JB	97	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	98	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	99	* i386-tbl.h: Re-generate.
	100
bb8541b9 L	101	2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
	102
	103	PR 5715
	104	* configure: Regenerated.
	105
57b592a3 AN	106	2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
	107
	108	* mips-dis.c: Update copyright.
	109	(mips_arch_choices): Add Octeon.
	110	* mips-opc.c: Update copyright.
	111	(IOCT): New macro.
	112	(mips_builtin_opcodes): Add Octeon instruction synciobdma.
	113
930bb4cf AM	114	2008-01-29 Alan Modra <amodra@bigpond.net.au>
	115
	116	* ppc-opc.c: Support optional L form mtmsr.
	117
82c18208 L	118	2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
	119
	120	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
	121
599121aa L	122	2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
	123
	124	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	125	* i386-init.h: Regenerated.
	126
80098f51 TG	127	2008-01-23 Tristan Gingold <gingold@adacore.com>
	128
	129	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	130	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
	131
115c7c25 L	132	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	133
	134	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	135	(cpu_flags): Likewise.
	136
	137	* i386-opc.h (CpuMMX2): Removed.
	138	(CpuSSE): Updated.
	139
	140	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE\|Cpu3dnowA.
	141	* i386-init.h: Regenerated.
	142	* i386-tbl.h: Likewise.
	143
6305a203 L	144	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	145
	146	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	147	CPU_SMX_FLAGS.
	148	* i386-init.h: Regenerated.
	149
fd07a1c8 L	150	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	151
	152	* i386-opc.tbl: Use Qword on movddup.
	153	* i386-tbl.h: Regenerated.
	154
321fd21e L	155	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	156
	157	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	158	* i386-tbl.h: Regenerated.
	159
4ee52178 L	160	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	161
	162	* i386-dis.c (Mx): New.
	163	(PREFIX_0FC3): Likewise.
	164	(PREFIX_0FC7_REG_6): Updated.
	165	(dis386_twobyte): Use PREFIX_0FC3.
	166	(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
	167	Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
	168	movntss.
	169
5c07affc L	170	2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
	171
	172	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	173	(operand_types): Add Mem.
	174
	175	* i386-opc.h (IntelSyntax): New.
	176	* i386-opc.h (Mem): New.
	177	(Byte): Updated.
	178	(Opcode_Modifier_Max): Updated.
	179	(i386_opcode_modifier): Add intelsyntax.
	180	(i386_operand_type): Add mem.
	181
	182	* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
	183	instructions.
	184
	185	* i386-reg.tbl: Add size for accumulator.
	186
	187	* i386-init.h: Regenerated.
	188	* i386-tbl.h: Likewise.
	189
0d6a2f58 L	190	2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
	191
	192	* i386-opc.h (Byte): Fix a typo.
	193
7d5e4556 L	194	2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
	195
	196	PR gas/5534
	197	* i386-gen.c (operand_type_init): Add Dword to
	198	OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
	199	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	200	Qword and Xmmword.
	201	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	202	Xmmword, Unspecified and Anysize.
	203	(set_bitfield): Make Mmword an alias of Qword. Make Oword
	204	an alias of Xmmword.
	205
	206	* i386-opc.h (CheckSize): Removed.
	207	(Byte): Updated.
	208	(Word): Likewise.
	209	(Dword): Likewise.
	210	(Qword): Likewise.
	211	(Xmmword): Likewise.
	212	(FWait): Updated.
	213	(OTMax): Likewise.
	214	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	215	qword and xmmword.
	216	(Fword): New.
	217	(TBYTE): Likewise.
	218	(Unspecified): Likewise.
	219	(Anysize): Likewise.
	220	(i386_operand_type): Add byte, word, dword, fword, qword,
	221	tbyte xmmword, unspecified and anysize.
	222
	223	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	224	Tbyte, Xmmword, Unspecified and Anysize.
	225
	226	* i386-reg.tbl: Add size for accumulator.
	227
	228	* i386-init.h: Regenerated.
	229	* i386-tbl.h: Likewise.
	230
b5b1fc4f L	231	2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
	232
	233	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	234	(REG_0F18): Updated.
	235	(reg_table): Updated.
	236	(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
	237	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
	238
50e8458f L	239	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	240
	241	* i386-gen.c (set_bitfield): Use fail () on error.
	242
3d4d5afa L	243	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	244
	245	* i386-gen.c (lineno): New.
	246	(filename): Likewise.
	247	(set_bitfield): Report filename and line numer on error.
	248	(process_i386_opcodes): Set filename and update lineno.
	249	(process_i386_registers): Likewise.
	250
e1d4d893 L	251	2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
	252
	253	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	254	ATTSyntax.
	255
	256	* i386-opc.h (IntelMnemonic): Renamed to ..
	257	(ATTSyntax): This
	258	(Opcode_Modifier_Max): Updated.
	259	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	260	and intelsyntax.
	261
	262	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	263	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	264	* i386-tbl.h: Regenerated.
	265
6f143e4d L	266	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	267
	268	* i386-gen.c: Update copyright to 2008.
	269	* i386-opc.h: Likewise.
	270	* i386-opc.tbl: Likewise.
	271
	272	* i386-init.h: Regenerated.
	273	* i386-tbl.h: Likewise.
	274
c6add537 L	275	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	276
	277	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	278	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	279	* i386-tbl.h: Regenerated.
	280
3629bb00 L	281	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	282
	283	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	284	CpuSSE4_2_Or_ABM.
	285	(cpu_flags): Likewise.
	286
	287	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	288	(CpuSSE4_2_Or_ABM): Likewise.
	289	(CpuLM): Updated.
	290	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
	291
	292	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	293	Cpu686\|CpuPadLock with CpuSSE4_1\|CpuSSE5, CpuABM\|CpuSSE4_2
	294	and CpuPadLock, respectively.
	295	* i386-init.h: Regenerated.
	296	* i386-tbl.h: Likewise.
	297
24995bd6 L	298	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	299
	300	* i386-gen.c (opcode_modifiers): Remove No_xSuf.
	301
	302	* i386-opc.h (No_xSuf): Removed.
	303	(CheckSize): Updated.
	304
	305	* i386-tbl.h: Regenerated.
	306
e0329a22 L	307	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	308
	309	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	310	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	311	CPU_SSE5_FLAGS.
	312	(cpu_flags): Add CpuSSE4_2_Or_ABM.
	313
	314	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	315	(CpuLM): Updated.
	316	(i386_cpu_flags): Add cpusse4_2_or_abm.
	317
	318	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	319	CpuABM\|CpuSSE4_2 on popcnt.
	320	* i386-init.h: Regenerated.
	321	* i386-tbl.h: Likewise.
	322
f2a9c676 L	323	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	324
	325	* i386-opc.h: Update comments.
	326
d978b5be L	327	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	328
	329	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	330	* i386-opc.h: Likewise.
	331	* i386-opc.tbl: Likewise.
	332
582d5edd L	333	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	334
	335	PR gas/5534
	336	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	337	Byte, Word, Dword, QWord and Xmmword.
	338
	339	* i386-opc.h (No_xSuf): New.
	340	(CheckSize): Likewise.
	341	(Byte): Likewise.
	342	(Word): Likewise.
	343	(Dword): Likewise.
	344	(QWord): Likewise.
	345	(Xmmword): Likewise.
	346	(FWait): Updated.
	347	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	348	Dword, QWord and Xmmword.
	349
	350	* i386-opc.tbl: Add CheckSize\|QWord to movq if IgnoreSize is
	351	used.
	352	* i386-tbl.h: Regenerated.
	353
3fe15143 MK	354	2008-01-02 Mark Kettenis <kettenis@gnu.org>
	355
	356	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	357	From Miod Vallat.
	358
6c7ac64e	359	For older changes see ChangeLog-2007
252b5132 RH	360	\f
252b5132 RH	361	Local Variables:
2f6d2f85 NC	362	mode: change-log
	363	left-margin: 8
	364	fill-column: 74
252b5132 RH	365	version-control: never
252b5132 RH	366	End: