[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2012-05-11  Daniel Richard G.  <skunk@iskunk.org>

	PR binutils/14028
	* configure.in: Invoke ACX_HEADER_STRING.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	string.h and strings.h.

2012-05-11  Nick Clifton  <nickc@redhat.com>

	PR binutils/14006
	* arm-dis.c (print_insn): Fix detection of instruction mode in
	files containing multiple executable sections.

2012-05-03  Sean Keys  <skeys@ipdatasys.com>

	* Makefile.in, configure: regenerate
	* disassemble.c (disassembler): Recognize ARCH_XGATE.
	* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
	New functions.
	* configure.in: Recognize xgate.
	* xgate-dis.c, xgate-opc.c: New files for support of xgate
	* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
	and opcode generation for xgate.

2012-04-30  DJ Delorie  <dj@redhat.com>

	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	already the maximum bit size.
	* rx-decode.c: Regenerate.

2012-04-27  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.

	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.

	* sparc-opc.c (CBCOND): New define.
	(CBCOND_XCC): Likewise.
	(cbcond): New helper macro.
	(sparc_opcodes): Add compare-and-branch instructions.

	* sparc-dis.c (print_insn_sparc): Handle ')'.
	* sparc-opc.c (sparc_opcodes): Add crypto instructions.

	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.

2012-04-12  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (X_DISP10): Define.
	(print_insn_sparc): Handle '='.

2012-04-01  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	sprintf call and the '*' field width.

2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>

	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.

2012-03-16  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	(powerpc_opcd_indices): Bump array size.
	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	corresponding to unused opcodes to following entry.
	(lookup_powerpc): New function, extracted and optimised from..
	(print_insn_powerpc): ..here.

2012-03-15  Alan Modra  <amodra@gmail.com>
	    James Lemke  <jwlemke@codesourcery.com>

	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	* ppc-dis.c (private): New var.
	(powerpc_init_dialect): Don't return calloc failure, instead use
	private.
	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	(powerpc_opcd_indices): New array.
	(disassemble_init_powerpc): New function.
	(print_insn_big_powerpc): Don't init dialect here.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Start search using powerpc_opcd_indices.

2012-03-10  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	(PPCVEC2, PPCTMR, E6500): New short names.
	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	optional operands on sync instruction for E6500 target.

2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* mt-dis.c: Regenerate.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	is the inverse of corresponding insert function.
	(extract_d22, extract_u9, extract_r4): Likewise.
	(extract_d9): Correct sign extension.
	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	rely on implementation defined behaviour for shift right of
	signed types.
	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	(extract_d23): Likewise, and correct mask.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (print_arg): Mask constant to 32 bits.
	* crx-opc.c (cst4_map): Use int array.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	(FIELDD): Sign extend with xor,sub.

2012-02-25  Walter Lee  <walt@tilera.com>

	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	TILEPRO_OPC_LW_TLS_SN.

2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (HLEPrefixNone): New.
	(HLEPrefixLock): Likewise.
	(HLEPrefixAny): Likewise.
	(HLEPrefixRelease): Likewise.

2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (HLE_Fixup1): New.
	(HLE_Fixup2): Likewise.
	(HLE_Fixup3): Likewise.
	(Ebh1): Likewise.
	(Evh1): Likewise.
	(Ebh2): Likewise.
	(Evh2): Likewise.
	(Ebh3): Likewise.
	(Evh3): Likewise.
	(MOD_C6_REG_7): Likewise.
	(MOD_C7_REG_7): Likewise.
	(RM_C6_REG_7): Likewise.
	(RM_C7_REG_7): Likewise.
	(XACQUIRE_PREFIX): Likewise.
	(XRELEASE_PREFIX): Likewise.
	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
	MOD_C6_REG_7 and MOD_C7_REG_7.
	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
	xtest.
	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.

	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	CPU_RTM_FLAGS.
	(cpu_flags): Add CpuHLE and CpuRTM.
	(opcode_modifiers): Add HLEPrefixOk.

	* i386-opc.h (CpuHLE): New.
	(CpuRTM): Likewise.
	(HLEPrefixOk): Likewise.
	(i386_cpu_flags): Add cpuhle and cpurtm.
	(i386_opcode_modifier): Add hleprefixok.

	* i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
	operand.  Add xacquire, xrelease, xabort, xbegin, xend and
	xtest.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2012-01-24  DJ Delorie  <dj@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	* rl78-decode.c: Regenerate.

2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>

	PR binutils/10173
	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.

2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>

	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	register and move them after pmove with PSR/PCSR register.

2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Add vmfunc.

	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	(cpu_flags): CpuVMFUNC.

	* i386-opc.h (CpuVMFUNC): New.
	(i386_cpu_flags): Add cpuvmfunc.

	* i386-opc.tbl: Add vmfunc.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

For older changes see ChangeLog-2011
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
208a4923 NC	1	2012-05-11 Daniel Richard G. <skunk@iskunk.org>
	2
	3	PR binutils/14028
	4	* configure.in: Invoke ACX_HEADER_STRING.
	5	* configure: Regenerate.
	6	* config.in: Regenerate.
	7	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	8	string.h and strings.h.
	9
6750a3a7 NC	10	2012-05-11 Nick Clifton <nickc@redhat.com>
	11
	12	PR binutils/14006
	13	* arm-dis.c (print_insn): Fix detection of instruction mode in
	14	files containing multiple executable sections.
	15
f6c1a2d5 NC	16	2012-05-03 Sean Keys <skeys@ipdatasys.com>
	17
	18	* Makefile.in, configure: regenerate
	19	* disassemble.c (disassembler): Recognize ARCH_XGATE.
	20	* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
	21	New functions.
	22	* configure.in: Recognize xgate.
	23	* xgate-dis.c, xgate-opc.c: New files for support of xgate
	24	* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
	25	and opcode generation for xgate.
	26
78e98aab DD	27	2012-04-30 DJ Delorie <dj@redhat.com>
	28
	29	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	30	already the maximum bit size.
	31	* rx-decode.c: Regenerate.
	32
ec668d69 DM	33	2012-04-27 David S. Miller <davem@davemloft.net>
ec668d69 DM	34
2e52845b DM	35	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	36	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
	37
58004e23 DM	38	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	39	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
	40
698544e1 DM	41	* sparc-opc.c (CBCOND): New define.
	42	(CBCOND_XCC): Likewise.
	43	(cbcond): New helper macro.
	44	(sparc_opcodes): Add compare-and-branch instructions.
	45
6cda1326 DM	46	* sparc-dis.c (print_insn_sparc): Handle ')'.
	47	* sparc-opc.c (sparc_opcodes): Add crypto instructions.
	48
ec668d69 DM	49	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	50	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
	51
2615994e DM	52	2012-04-12 David S. Miller <davem@davemloft.net>
	53
	54	* sparc-dis.c (X_DISP10): Define.
	55	(print_insn_sparc): Handle '='.
	56
5de10af0 MF	57	2012-04-01 Mike Frysinger <vapier@gentoo.org>
	58
	59	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	60	sprintf call and the '*' field width.
	61
55a36193 MK	62	2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
	63
	64	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
	65
d6688282 AM	66	2012-03-16 Alan Modra <amodra@gmail.com>
	67
	68	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	69	(powerpc_opcd_indices): Bump array size.
	70	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	71	corresponding to unused opcodes to following entry.
	72	(lookup_powerpc): New function, extracted and optimised from..
	73	(print_insn_powerpc): ..here.
	74
b240011a AM	75	2012-03-15 Alan Modra <amodra@gmail.com>
	76	James Lemke <jwlemke@codesourcery.com>
	77
	78	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	79	* ppc-dis.c (private): New var.
	80	(powerpc_init_dialect): Don't return calloc failure, instead use
	81	private.
	82	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	83	(powerpc_opcd_indices): New array.
	84	(disassemble_init_powerpc): New function.
	85	(print_insn_big_powerpc): Don't init dialect here.
	86	(print_insn_little_powerpc): Likewise.
	87	(print_insn_powerpc): Start search using powerpc_opcd_indices.
	88
aea77599 AM	89	2012-03-10 Edmar Wienskoski <edmar@freescale.com>
	90
	91	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	92	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	93	(PPCVEC2, PPCTMR, E6500): New short names.
	94	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	95	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	96	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	97	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	98	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	99	optional operands on sync instruction for E6500 target.
	100
5333187a AK	101	2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
	102
	103	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
	104
a597d2d3 AM	105	2012-02-27 Alan Modra <amodra@gmail.com>
	106
	107	* mt-dis.c: Regenerate.
	108
3f26eb3a AM	109	2012-02-27 Alan Modra <amodra@gmail.com>
	110
	111	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	112	is the inverse of corresponding insert function.
	113	(extract_d22, extract_u9, extract_r4): Likewise.
	114	(extract_d9): Correct sign extension.
	115	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	116	rely on implementation defined behaviour for shift right of
	117	signed types.
	118	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	119	(extract_d23): Likewise, and correct mask.
	120
1f42f8b3 AM	121	2012-02-27 Alan Modra <amodra@gmail.com>
	122
	123	* crx-dis.c (print_arg): Mask constant to 32 bits.
	124	* crx-opc.c (cst4_map): Use int array.
	125
cdb06235 AM	126	2012-02-27 Alan Modra <amodra@gmail.com>
	127
	128	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	129	(FIELDD): Sign extend with xor,sub.
	130
6f7be959 WL	131	2012-02-25 Walter Lee <walt@tilera.com>
	132
	133	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	134	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	135	TILEPRO_OPC_LW_TLS_SN.
	136
82c2def5 L	137	2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
	138
	139	* i386-opc.h (HLEPrefixNone): New.
	140	(HLEPrefixLock): Likewise.
	141	(HLEPrefixAny): Likewise.
	142	(HLEPrefixRelease): Likewise.
	143
42164a71 L	144	2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
	145
	146	* i386-dis.c (HLE_Fixup1): New.
	147	(HLE_Fixup2): Likewise.
	148	(HLE_Fixup3): Likewise.
	149	(Ebh1): Likewise.
	150	(Evh1): Likewise.
	151	(Ebh2): Likewise.
	152	(Evh2): Likewise.
	153	(Ebh3): Likewise.
	154	(Evh3): Likewise.
	155	(MOD_C6_REG_7): Likewise.
	156	(MOD_C7_REG_7): Likewise.
	157	(RM_C6_REG_7): Likewise.
	158	(RM_C7_REG_7): Likewise.
	159	(XACQUIRE_PREFIX): Likewise.
	160	(XRELEASE_PREFIX): Likewise.
	161	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	162	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	163	Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
	164	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	165	not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
	166	MOD_C6_REG_7 and MOD_C7_REG_7.
	167	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	168	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
	169	xtest.
	170	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	171	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
	172
	173	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	174	CPU_RTM_FLAGS.
	175	(cpu_flags): Add CpuHLE and CpuRTM.
	176	(opcode_modifiers): Add HLEPrefixOk.
	177
	178	* i386-opc.h (CpuHLE): New.
	179	(CpuRTM): Likewise.
	180	(HLEPrefixOk): Likewise.
	181	(i386_cpu_flags): Add cpuhle and cpurtm.
	182	(i386_opcode_modifier): Add hleprefixok.
	183
	184	* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
	185	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	186	sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
	187	operand. Add xacquire, xrelease, xabort, xbegin, xend and
	188	xtest.
	189	* i386-init.h: Regenerated.
	190	* i386-tbl.h: Likewise.
	191
21abe33a DD	192	2012-01-24 DJ Delorie <dj@redhat.com>
	193
	194	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	195	* rl78-decode.c: Regenerate.
	196
e20cc039 AM	197	2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
	198
	199	PR binutils/10173
	200	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.
	201
e143d25c AS	202	2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
	203
	204	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	205	register and move them after pmove with PSR/PCSR register.
	206
8729a6f6 L	207	2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
	208
	209	* i386-dis.c (mod_table): Add vmfunc.
	210
	211	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	212	(cpu_flags): CpuVMFUNC.
	213
	214	* i386-opc.h (CpuVMFUNC): New.
	215	(i386_cpu_flags): Add cpuvmfunc.
	216
	217	* i386-opc.tbl: Add vmfunc.
	218	* i386-init.h: Regenerated.
	219	* i386-tbl.h: Likewise.
5011093d	220
23e1d329	221	For older changes see ChangeLog-2011
252b5132 RH	222	\f
252b5132 RH	223	Local Variables:
2f6d2f85 NC	224	mode: change-log
	225	left-margin: 8
	226	fill-column: 74
252b5132 RH	227	version-control: never
252b5132 RH	228	End: