[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-gen.c (VERIFIER): Define.
	* aarch64-opc.c (VERIFIER): Define.
	(verify_ldpsw): Use static linkage.
	* aarch64-opc.h (verify_ldpsw): Remove.
	* aarch64-tbl.h: Use VERIFIER for verifiers.

2016-04-28  Nick Clifton  <nickc@redhat.com>

	PR target/19722
	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
20f55f38 SN	1	2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
	2
	3	* aarch64-gen.c (VERIFIER): Define.
	4	* aarch64-opc.c (VERIFIER): Define.
	5	(verify_ldpsw): Use static linkage.
	6	* aarch64-opc.h (verify_ldpsw): Remove.
	7	* aarch64-tbl.h: Use VERIFIER for verifiers.
	8
4bd13cde NC	9	2016-04-28 Nick Clifton <nickc@redhat.com>
	10
	11	PR target/19722
	12	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	13	* aarch64-opc.c (verify_ldpsw): New function.
	14	* aarch64-opc.h (verify_ldpsw): New prototype.
	15	* aarch64-tbl.h: Add initialiser for verifier field.
	16	(LDPSW): Set verifier to verify_ldpsw.
	17
c0f92bf9 L	18	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	19
	20	PR binutils/19983
	21	PR binutils/19984
	22	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	23	smaller than address size.
	24
e6c7cdec TS	25	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	26
	27	* alpha-dis.c: Regenerate.
	28	* crx-dis.c: Likewise.
	29	* disassemble.c: Likewise.
	30	* epiphany-opc.c: Likewise.
	31	* fr30-opc.c: Likewise.
	32	* frv-opc.c: Likewise.
	33	* ip2k-opc.c: Likewise.
	34	* iq2000-opc.c: Likewise.
	35	* lm32-opc.c: Likewise.
	36	* lm32-opinst.c: Likewise.
	37	* m32c-opc.c: Likewise.
	38	* m32r-opc.c: Likewise.
	39	* m32r-opinst.c: Likewise.
	40	* mep-opc.c: Likewise.
	41	* mt-opc.c: Likewise.
	42	* or1k-opc.c: Likewise.
	43	* or1k-opinst.c: Likewise.
	44	* tic80-opc.c: Likewise.
	45	* xc16x-opc.c: Likewise.
	46	* xstormy16-opc.c: Likewise.
	47
537aefaf AB	48	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	49
	50	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	51	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	52	calcsd, and calcxd instructions.
	53	* arc-opc.c (insert_nps_bitop_size): Delete.
	54	(extract_nps_bitop_size): Delete.
	55	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	56	(extract_nps_qcmp_m3): Define.
	57	(extract_nps_qcmp_m2): Define.
	58	(extract_nps_qcmp_m1): Define.
	59	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	60	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	61	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	62	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	63	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	64	NPS_QCMP_M3.
	65
c8f785f2 AB	66	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	67
	68	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	69
6fd8e7c2 L	70	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	71
	72	* Makefile.in: Regenerated with automake 1.11.6.
	73	* aclocal.m4: Likewise.
	74
4b0c052e AB	75	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	76
	77	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	78	instructions.
	79	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	80	(extract_nps_cmem_uimm16): New function.
	81	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	82
cb040366 AB	83	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	84
	85	* arc-dis.c (arc_insn_length): New function.
	86	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	87	(find_format): Change insnLen parameter to unsigned.
	88
accc0180 NC	89	2016-04-13 Nick Clifton <nickc@redhat.com>
	90
	91	PR target/19937
	92	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	93	the LD.B and LD.BU instructions.
	94
f36e33da CZ	95	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	96
	97	* arc-dis.c (find_format): Check for extension flags.
	98	(print_flags): New function.
	99	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	100	.extAuxRegister.
	101	* arc-ext.c (arcExtMap_coreRegName): Use
	102	LAST_EXTENSION_CORE_REGISTER.
	103	(arcExtMap_coreReadWrite): Likewise.
	104	(dump_ARC_extmap): Update printing.
	105	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	106	(arc_aux_regs): Add cpu field.
	107	* arc-regs.h: Add cpu field, lower case name aux registers.
	108
1c2e355e CZ	109	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	110
	111	* arc-tbl.h: Add rtsc, sleep with no arguments.
	112
b99747ae CZ	113	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	114
	115	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	116	Initialize.
	117	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	118	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	119	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	120	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	121	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	122	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	123	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	124	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	125	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	126	(arc_opcode arc_opcodes): Null terminate the array.
	127	(arc_num_opcodes): Remove.
	128	* arc-ext.h (INSERT_XOP): Define.
	129	(extInstruction_t): Likewise.
	130	(arcExtMap_instName): Delete.
	131	(arcExtMap_insn): New function.
	132	(arcExtMap_genOpcode): Likewise.
	133	* arc-ext.c (ExtInstruction): Remove.
	134	(create_map): Zero initialize instruction fields.
	135	(arcExtMap_instName): Remove.
	136	(arcExtMap_insn): New function.
	137	(dump_ARC_extmap): More info while debuging.
	138	(arcExtMap_genOpcode): New function.
	139	* arc-dis.c (find_format): New function.
	140	(print_insn_arc): Use find_format.
	141	(arc_get_disassembler): Enable dump_ARC_extmap only when
	142	debugging.
	143
92708cec MR	144	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	145
	146	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	147	instruction bits out.
	148
a42a4f84 AB	149	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	150
	151	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	152	* arc-opc.c (arc_flag_operands): Add new flags.
	153	(arc_flag_classes): Add new classes.
	154
1328504b AB	155	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	156
	157	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	158
820f03ff AB	159	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	160
	161	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	162	encode1, rflt, crc16, and crc32 instructions.
	163	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	164	(arc_flag_classes): Add C_NPS_R.
	165	(insert_nps_bitop_size_2b): New function.
	166	(extract_nps_bitop_size_2b): Likewise.
	167	(insert_nps_bitop_uimm8): Likewise.
	168	(extract_nps_bitop_uimm8): Likewise.
	169	(arc_operands): Add new operand entries.
	170
8ddf6b2a CZ	171	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	172
b99747ae CZ	173	* arc-regs.h: Add a new subclass field. Add double assist
	174	accumulator register values.
	175	* arc-tbl.h: Use DPA subclass to mark the double assist
	176	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	177	* arc-opc.c (RSP): Define instead of SP.
	178	(arc_aux_regs): Add the subclass field.
8ddf6b2a	179
589a7d88 JW	180	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	181
	182	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	183
0a191de9	184	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	185
	186	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	187	NPS_R_SRC1.
	188
0a106562 AB	189	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	190
	191	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	192	issues. No functional changes.
	193
bd05ac5f CZ	194	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	195
b99747ae CZ	196	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	197	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	198	(RTT): Remove duplicate.
	199	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	200	(PCT_CONFIG*): Remove.
	201	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	202
9885948f CZ	203	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	204
b99747ae	205	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	206
f2dd8838 CZ	207	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	208
b99747ae CZ	209	* arc-tbl.h (invld07): Remove.
	210	* arc-ext-tbl.h: New file.
	211	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	212	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	213
0d2f91fe JK	214	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	215
	216	Fix -Wstack-usage warnings.
	217	* aarch64-dis.c (print_operands): Substitute size.
	218	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	219
a6b71f42 JM	220	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	221
	222	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	223	to get a proper diagnostic when an invalid ASR register is used.
	224
9780e045 NC	225	2016-03-22 Nick Clifton <nickc@redhat.com>
	226
	227	* configure: Regenerate.
	228
e23e8ebe AB	229	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	230
	231	* arc-nps400-tbl.h: New file.
	232	* arc-opc.c: Add top level comment.
	233	(insert_nps_3bit_dst): New function.
	234	(extract_nps_3bit_dst): New function.
	235	(insert_nps_3bit_src2): New function.
	236	(extract_nps_3bit_src2): New function.
	237	(insert_nps_bitop_size): New function.
	238	(extract_nps_bitop_size): New function.
	239	(arc_flag_operands): Add nps400 entries.
	240	(arc_flag_classes): Add nps400 entries.
	241	(arc_operands): Add nps400 entries.
	242	(arc_opcodes): Add nps400 include.
	243
1ae8ab47 AB	244	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	245
	246	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	247	the new class enum values.
	248
8699fc3e AB	249	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	250
	251	* arc-dis.c (print_insn_arc): Handle nps400.
	252
24740d83 AB	253	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	254
	255	* arc-opc.c (BASE): Delete.
	256
8678914f NC	257	2016-03-18 Nick Clifton <nickc@redhat.com>
	258
	259	PR target/19721
	260	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	261	of MOV insn that aliases an ORR insn.
	262
cc933301 JW	263	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	264
	265	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	266
f86f5863 TS	267	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	268
	269	* mcore-opc.h: Add const qualifiers.
	270	* microblaze-opc.h (struct op_code_struct): Likewise.
	271	* sh-opc.h: Likewise.
	272	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	273	(tic4x_print_op): Likewise.
	274
62de1c63 AM	275	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	276
d11698cd	277	* or1k-desc.h: Regenerate.
62de1c63	278	* fr30-ibld.c: Regenerate.
c697cf0b	279	* rl78-decode.c: Regenerate.
62de1c63	280
020efce5 NC	281	2016-03-01 Nick Clifton <nickc@redhat.com>
	282
	283	PR target/19747
	284	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	285
b0c11777 RL	286	2016-02-24 Renlin Li <renlin.li@arm.com>
	287
	288	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	289	(print_insn_coprocessor): Support fp16 instructions.
	290
3e309328 RL	291	2016-02-24 Renlin Li <renlin.li@arm.com>
	292
	293	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	294	vminnm, vrint(mpna).
	295
8afc7bea RL	296	2016-02-24 Renlin Li <renlin.li@arm.com>
	297
	298	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	299	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	300
4fd7268a L	301	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	302
	303	* i386-dis.c (print_insn): Parenthesize expression to prevent
	304	truncated addresses.
	305	(OP_J): Likewise.
	306
4670103e CZ	307	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	308	Janek van Oirschot <jvanoirs@synopsys.com>
	309
b99747ae CZ	310	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	311	variable.
4670103e	312
c1d9289f NC	313	2016-02-04 Nick Clifton <nickc@redhat.com>
	314
	315	PR target/19561
	316	* msp430-dis.c (print_insn_msp430): Add a special case for
	317	decoding an RRC instruction with the ZC bit set in the extension
	318	word.
	319
a143b004 AB	320	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	321
	322	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	323	* epiphany-ibld.c: Regenerate.
	324	* fr30-ibld.c: Regenerate.
	325	* frv-ibld.c: Regenerate.
	326	* ip2k-ibld.c: Regenerate.
	327	* iq2000-ibld.c: Regenerate.
	328	* lm32-ibld.c: Regenerate.
	329	* m32c-ibld.c: Regenerate.
	330	* m32r-ibld.c: Regenerate.
	331	* mep-ibld.c: Regenerate.
	332	* mt-ibld.c: Regenerate.
	333	* or1k-ibld.c: Regenerate.
	334	* xc16x-ibld.c: Regenerate.
	335	* xstormy16-ibld.c: Regenerate.
	336
b89807c6 AB	337	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	338
	339	* epiphany-dis.c: Regenerated from latest cpu files.
	340
d8c823c8 MM	341	2016-02-01 Michael McConville <mmcco@mykolab.com>
	342
	343	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	344	test bit.
	345
5bc5ae88 RL	346	2016-01-25 Renlin Li <renlin.li@arm.com>
	347
	348	* arm-dis.c (mapping_symbol_for_insn): New function.
	349	(find_ifthen_state): Call mapping_symbol_for_insn().
	350
0bff6e2d MW	351	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	352
	353	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	354	of MSR UAO immediate operand.
	355
100b4f2e MR	356	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	357
	358	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	359	instruction support.
	360
5c14705f AM	361	2016-01-17 Alan Modra <amodra@gmail.com>
	362
	363	* configure: Regenerate.
	364
4d82fe66 NC	365	2016-01-14 Nick Clifton <nickc@redhat.com>
	366
	367	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	368	instructions that can support stack pointer operations.
	369	* rl78-decode.c: Regenerate.
	370	* rl78-dis.c: Fix display of stack pointer in MOVW based
	371	instructions.
	372
651657fa MW	373	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	374
	375	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	376	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	377	erxtatus_el1 and erxaddr_el1.
	378
105bde57 MW	379	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	380
	381	* arm-dis.c (arm_opcodes): Add "esb".
	382	(thumb_opcodes): Likewise.
	383
afa8d405 PB	384	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	385
	386	* ppc-opc.c <xscmpnedp>: Delete.
	387	<xvcmpnedp>: Likewise.
	388	<xvcmpnedp.>: Likewise.
	389	<xvcmpnesp>: Likewise.
	390	<xvcmpnesp.>: Likewise.
	391
83c3256e AS	392	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	393
	394	PR gas/13050
	395	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	396	addition to ISA_A.
	397
6f2750fe AM	398	2016-01-01 Alan Modra <amodra@gmail.com>
	399
	400	Update year range in copyright notice of all files.
	401
3499769a AM	402	For older changes see ChangeLog-2015
	403	\f
	404	Copyright (C) 2016 Free Software Foundation, Inc.
	405
	406	Copying and distribution of this file, with or without modification,
	407	are permitted in any medium without royalty provided the copyright
	408	notice and this notice are preserved.
	409
	410	Local Variables:
	411	mode: change-log
	412	left-margin: 8
	413	fill-column: 74
	414	version-control: never
	415	End: