[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2008-03-07  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c (powerpc_opcodes): Order and format.

2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	* i386-tbl.h: Regenerated.

2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	x86-64.
	* i386-tbl.h: Regenerated.

2008-02-21  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	and Fword for far indirect jmp. Allow Reg16 and Word for near
	indirect jmp on x86-64. Disallow Fword for lcall.
	* i386-tbl.h: Re-generate.

2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>

	* cr16-opc.c  (cr16_num_optab): Defined

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	* i386-init.h: Regenerated.

2008-02-14  Nick Clifton  <nickc@redhat.com>

	PR binutils/5524
	* configure.in (SHARED_LIBADD): Select the correct host specific
	file extension for shared libraries.
	* configure: Regenerate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-02-11  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	* i386-tbl.h: Re-generate.

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>

	* mips-dis.c: Update copyright.
	(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.

2008-01-29  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c: Support optional L form mtmsr.

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.

2008-01-23  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (Byte): Fix a typo.

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (set_bitfield): Use fail () on error.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (lineno): New.
	(filename): Likewise.
	(set_bitfield): Report filename and line numer on error.
	(process_i386_opcodes): Set filename and update lineno.
	(process_i386_registers): Likewise.

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax 
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c: Update copyright to 2008.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.

2008-01-02  Mark Kettenis  <kettenis@gnu.org>

	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	From Miod Vallat.

For older changes see ChangeLog-2007
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
de866fcc AM	1	2008-03-07 Alan Modra <amodra@bigpond.net.au>
	2
	3	* ppc-opc.c (powerpc_opcodes): Order and format.
	4
28dbc079 L	5	2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
	6
	7	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	8	* i386-tbl.h: Regenerated.
	9
849830bd L	10	2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
	11
	12	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	13	x86-64.
	14	* i386-tbl.h: Regenerated.
	15
743ddb6b JB	16	2008-02-21 Jan Beulich <jbeulich@novell.com>
	17
	18	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	19	and Fword for far indirect jmp. Allow Reg16 and Word for near
	20	indirect jmp on x86-64. Disallow Fword for lcall.
	21	* i386-tbl.h: Re-generate.
	22
796d5313 NC	23	2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
	24
	25	* cr16-opc.c (cr16_num_optab): Defined
	26
65da13b5 L	27	2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
	28
	29	* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	30	* i386-init.h: Regenerated.
	31
0e336180 NC	32	2008-02-14 Nick Clifton <nickc@redhat.com>
	33
	34	PR binutils/5524
	35	* configure.in (SHARED_LIBADD): Select the correct host specific
	36	file extension for shared libraries.
	37	* configure: Regenerate.
	38
b7240065 JB	39	2008-02-13 Jan Beulich <jbeulich@novell.com>
	40
	41	* i386-opc.h (RegFlat): New.
	42	* i386-reg.tbl (flat): Add.
	43	* i386-tbl.h: Re-generate.
	44
34b772a6 JB	45	2008-02-13 Jan Beulich <jbeulich@novell.com>
	46
	47	* i386-dis.c (a_mode): New.
	48	(cond_jump_mode): Adjust.
	49	(Ma): Change to a_mode.
	50	(intel_operand_size): Handle a_mode.
	51	* i386-opc.tbl: Allow Dword and Qword for bound.
	52	* i386-tbl.h: Re-generate.
	53
a60de03c JB	54	2008-02-13 Jan Beulich <jbeulich@novell.com>
	55
	56	* i386-gen.c (process_i386_registers): Process new fields.
	57	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	58	unsigned char. Add dw2_regnum and Dw2Inval.
	59	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	60	register names.
	61	* i386-tbl.h: Re-generate.
	62
f03fe4c1 L	63	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
f03fe4c1 L	64
4b6bc8eb	65	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
f03fe4c1 L	66	* i386-init.h: Updated.
f03fe4c1 L	67
475a2301 L	68	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
	69
	70	* i386-gen.c (cpu_flags): Add CpuXsave.
	71
	72	* i386-opc.h (CpuXsave): New.
4b6bc8eb	73	(CpuLM): Updated.
475a2301 L	74	(i386_cpu_flags): Add cpuxsave.
	75
	76	* i386-dis.c (MOD_0FAE_REG_4): New.
	77	(RM_0F01_REG_2): Likewise.
	78	(MOD_0FAE_REG_5): Updated.
	79	(RM_0F01_REG_3): Likewise.
	80	(reg_table): Use MOD_0FAE_REG_4.
	81	(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
	82	for xrstor.
	83	(rm_table): Add RM_0F01_REG_2.
	84
	85	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	86	* i386-init.h: Regenerated.
	87	* i386-tbl.h: Likewise.
	88
595785c6	89	2008-02-11 Jan Beulich <jbeulich@novell.com>
041179fc	90
595785c6 JB	91	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	92	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	93	* i386-tbl.h: Re-generate.
	94
bb8541b9 L	95	2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
	96
	97	PR 5715
	98	* configure: Regenerated.
	99
57b592a3 AN	100	2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
	101
	102	* mips-dis.c: Update copyright.
	103	(mips_arch_choices): Add Octeon.
	104	* mips-opc.c: Update copyright.
	105	(IOCT): New macro.
	106	(mips_builtin_opcodes): Add Octeon instruction synciobdma.
	107
930bb4cf AM	108	2008-01-29 Alan Modra <amodra@bigpond.net.au>
	109
	110	* ppc-opc.c: Support optional L form mtmsr.
	111
82c18208 L	112	2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
	113
	114	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
	115
599121aa L	116	2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
	117
	118	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	119	* i386-init.h: Regenerated.
	120
80098f51 TG	121	2008-01-23 Tristan Gingold <gingold@adacore.com>
	122
	123	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	124	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
	125
115c7c25 L	126	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	127
	128	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	129	(cpu_flags): Likewise.
	130
	131	* i386-opc.h (CpuMMX2): Removed.
	132	(CpuSSE): Updated.
	133
	134	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE\|Cpu3dnowA.
	135	* i386-init.h: Regenerated.
	136	* i386-tbl.h: Likewise.
	137
6305a203 L	138	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	139
	140	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	141	CPU_SMX_FLAGS.
	142	* i386-init.h: Regenerated.
	143
fd07a1c8 L	144	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	145
	146	* i386-opc.tbl: Use Qword on movddup.
	147	* i386-tbl.h: Regenerated.
	148
321fd21e L	149	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	150
	151	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	152	* i386-tbl.h: Regenerated.
	153
4ee52178 L	154	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	155
	156	* i386-dis.c (Mx): New.
	157	(PREFIX_0FC3): Likewise.
	158	(PREFIX_0FC7_REG_6): Updated.
	159	(dis386_twobyte): Use PREFIX_0FC3.
	160	(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
	161	Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
	162	movntss.
	163
5c07affc L	164	2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
	165
	166	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	167	(operand_types): Add Mem.
	168
	169	* i386-opc.h (IntelSyntax): New.
	170	* i386-opc.h (Mem): New.
	171	(Byte): Updated.
	172	(Opcode_Modifier_Max): Updated.
	173	(i386_opcode_modifier): Add intelsyntax.
	174	(i386_operand_type): Add mem.
	175
	176	* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
	177	instructions.
	178
	179	* i386-reg.tbl: Add size for accumulator.
	180
	181	* i386-init.h: Regenerated.
	182	* i386-tbl.h: Likewise.
	183
0d6a2f58 L	184	2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
	185
	186	* i386-opc.h (Byte): Fix a typo.
	187
7d5e4556 L	188	2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
	189
	190	PR gas/5534
	191	* i386-gen.c (operand_type_init): Add Dword to
	192	OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
	193	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	194	Qword and Xmmword.
	195	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	196	Xmmword, Unspecified and Anysize.
	197	(set_bitfield): Make Mmword an alias of Qword. Make Oword
	198	an alias of Xmmword.
	199
	200	* i386-opc.h (CheckSize): Removed.
	201	(Byte): Updated.
	202	(Word): Likewise.
	203	(Dword): Likewise.
	204	(Qword): Likewise.
	205	(Xmmword): Likewise.
	206	(FWait): Updated.
	207	(OTMax): Likewise.
	208	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	209	qword and xmmword.
	210	(Fword): New.
	211	(TBYTE): Likewise.
	212	(Unspecified): Likewise.
	213	(Anysize): Likewise.
	214	(i386_operand_type): Add byte, word, dword, fword, qword,
	215	tbyte xmmword, unspecified and anysize.
	216
	217	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	218	Tbyte, Xmmword, Unspecified and Anysize.
	219
	220	* i386-reg.tbl: Add size for accumulator.
	221
	222	* i386-init.h: Regenerated.
	223	* i386-tbl.h: Likewise.
	224
b5b1fc4f L	225	2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
	226
	227	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	228	(REG_0F18): Updated.
	229	(reg_table): Updated.
	230	(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
	231	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
	232
50e8458f L	233	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	234
	235	* i386-gen.c (set_bitfield): Use fail () on error.
	236
3d4d5afa L	237	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	238
	239	* i386-gen.c (lineno): New.
	240	(filename): Likewise.
	241	(set_bitfield): Report filename and line numer on error.
	242	(process_i386_opcodes): Set filename and update lineno.
	243	(process_i386_registers): Likewise.
	244
e1d4d893 L	245	2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
	246
	247	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	248	ATTSyntax.
	249
	250	* i386-opc.h (IntelMnemonic): Renamed to ..
	251	(ATTSyntax): This
	252	(Opcode_Modifier_Max): Updated.
	253	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	254	and intelsyntax.
	255
	256	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	257	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	258	* i386-tbl.h: Regenerated.
	259
6f143e4d L	260	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	261
	262	* i386-gen.c: Update copyright to 2008.
	263	* i386-opc.h: Likewise.
	264	* i386-opc.tbl: Likewise.
	265
	266	* i386-init.h: Regenerated.
	267	* i386-tbl.h: Likewise.
	268
c6add537 L	269	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	270
	271	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	272	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	273	* i386-tbl.h: Regenerated.
	274
3629bb00 L	275	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	276
	277	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	278	CpuSSE4_2_Or_ABM.
	279	(cpu_flags): Likewise.
	280
	281	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	282	(CpuSSE4_2_Or_ABM): Likewise.
	283	(CpuLM): Updated.
	284	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
	285
	286	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	287	Cpu686\|CpuPadLock with CpuSSE4_1\|CpuSSE5, CpuABM\|CpuSSE4_2
	288	and CpuPadLock, respectively.
	289	* i386-init.h: Regenerated.
	290	* i386-tbl.h: Likewise.
	291
24995bd6 L	292	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	293
	294	* i386-gen.c (opcode_modifiers): Remove No_xSuf.
	295
	296	* i386-opc.h (No_xSuf): Removed.
	297	(CheckSize): Updated.
	298
	299	* i386-tbl.h: Regenerated.
	300
e0329a22 L	301	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	302
	303	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	304	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	305	CPU_SSE5_FLAGS.
	306	(cpu_flags): Add CpuSSE4_2_Or_ABM.
	307
	308	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	309	(CpuLM): Updated.
	310	(i386_cpu_flags): Add cpusse4_2_or_abm.
	311
	312	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	313	CpuABM\|CpuSSE4_2 on popcnt.
	314	* i386-init.h: Regenerated.
	315	* i386-tbl.h: Likewise.
	316
f2a9c676 L	317	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	318
	319	* i386-opc.h: Update comments.
	320
d978b5be L	321	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	322
	323	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	324	* i386-opc.h: Likewise.
	325	* i386-opc.tbl: Likewise.
	326
582d5edd L	327	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	328
	329	PR gas/5534
	330	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	331	Byte, Word, Dword, QWord and Xmmword.
	332
	333	* i386-opc.h (No_xSuf): New.
	334	(CheckSize): Likewise.
	335	(Byte): Likewise.
	336	(Word): Likewise.
	337	(Dword): Likewise.
	338	(QWord): Likewise.
	339	(Xmmword): Likewise.
	340	(FWait): Updated.
	341	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	342	Dword, QWord and Xmmword.
	343
	344	* i386-opc.tbl: Add CheckSize\|QWord to movq if IgnoreSize is
	345	used.
	346	* i386-tbl.h: Regenerated.
	347
3fe15143 MK	348	2008-01-02 Mark Kettenis <kettenis@gnu.org>
	349
	350	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	351	From Miod Vallat.
	352
6c7ac64e	353	For older changes see ChangeLog-2007
252b5132 RH	354	\f
252b5132 RH	355	Local Variables:
2f6d2f85 NC	356	mode: change-log
	357	left-margin: 8
	358	fill-column: 74
252b5132 RH	359	version-control: never
252b5132 RH	360	End: