[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	* i386-tbl.h: Regenerated.

2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	x86-64.
	* i386-tbl.h: Regenerated.

2008-02-21  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	and Fword for far indirect jmp. Allow Reg16 and Word for near
	indirect jmp on x86-64. Disallow Fword for lcall.
	* i386-tbl.h: Re-generate.

2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>

	* cr16-opc.c  (cr16_num_optab): Defined

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	* i386-init.h: Regenerated.

2008-02-14  Nick Clifton  <nickc@redhat.com>

	PR binutils/5524
	* configure.in (SHARED_LIBADD): Select the correct host specific
	file extension for shared libraries.
	* configure: Regenerate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-02-11  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	* i386-tbl.h: Re-generate.

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>

	* mips-dis.c: Update copyright.
	(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.

2008-01-29  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c: Support optional L form mtmsr.

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.

2008-01-23  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (Byte): Fix a typo.

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (set_bitfield): Use fail () on error.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (lineno): New.
	(filename): Likewise.
	(set_bitfield): Report filename and line numer on error.
	(process_i386_opcodes): Set filename and update lineno.
	(process_i386_registers): Likewise.

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax 
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c: Update copyright to 2008.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.

2008-01-02  Mark Kettenis  <kettenis@gnu.org>

	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	From Miod Vallat.

For older changes see ChangeLog-2007
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
28dbc079 L	1	2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
	2
	3	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	4	* i386-tbl.h: Regenerated.
	5
849830bd L	6	2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
	7
	8	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	9	x86-64.
	10	* i386-tbl.h: Regenerated.
	11
743ddb6b JB	12	2008-02-21 Jan Beulich <jbeulich@novell.com>
	13
	14	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	15	and Fword for far indirect jmp. Allow Reg16 and Word for near
	16	indirect jmp on x86-64. Disallow Fword for lcall.
	17	* i386-tbl.h: Re-generate.
	18
796d5313 NC	19	2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
	20
	21	* cr16-opc.c (cr16_num_optab): Defined
	22
65da13b5 L	23	2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
	24
	25	* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	26	* i386-init.h: Regenerated.
	27
0e336180 NC	28	2008-02-14 Nick Clifton <nickc@redhat.com>
	29
	30	PR binutils/5524
	31	* configure.in (SHARED_LIBADD): Select the correct host specific
	32	file extension for shared libraries.
	33	* configure: Regenerate.
	34
b7240065 JB	35	2008-02-13 Jan Beulich <jbeulich@novell.com>
	36
	37	* i386-opc.h (RegFlat): New.
	38	* i386-reg.tbl (flat): Add.
	39	* i386-tbl.h: Re-generate.
	40
34b772a6 JB	41	2008-02-13 Jan Beulich <jbeulich@novell.com>
	42
	43	* i386-dis.c (a_mode): New.
	44	(cond_jump_mode): Adjust.
	45	(Ma): Change to a_mode.
	46	(intel_operand_size): Handle a_mode.
	47	* i386-opc.tbl: Allow Dword and Qword for bound.
	48	* i386-tbl.h: Re-generate.
	49
a60de03c JB	50	2008-02-13 Jan Beulich <jbeulich@novell.com>
	51
	52	* i386-gen.c (process_i386_registers): Process new fields.
	53	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	54	unsigned char. Add dw2_regnum and Dw2Inval.
	55	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	56	register names.
	57	* i386-tbl.h: Re-generate.
	58
f03fe4c1 L	59	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
f03fe4c1 L	60
4b6bc8eb	61	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
f03fe4c1 L	62	* i386-init.h: Updated.
f03fe4c1 L	63
475a2301 L	64	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
	65
	66	* i386-gen.c (cpu_flags): Add CpuXsave.
	67
	68	* i386-opc.h (CpuXsave): New.
4b6bc8eb	69	(CpuLM): Updated.
475a2301 L	70	(i386_cpu_flags): Add cpuxsave.
	71
	72	* i386-dis.c (MOD_0FAE_REG_4): New.
	73	(RM_0F01_REG_2): Likewise.
	74	(MOD_0FAE_REG_5): Updated.
	75	(RM_0F01_REG_3): Likewise.
	76	(reg_table): Use MOD_0FAE_REG_4.
	77	(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
	78	for xrstor.
	79	(rm_table): Add RM_0F01_REG_2.
	80
	81	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	82	* i386-init.h: Regenerated.
	83	* i386-tbl.h: Likewise.
	84
595785c6	85	2008-02-11 Jan Beulich <jbeulich@novell.com>
041179fc	86
595785c6 JB	87	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	88	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	89	* i386-tbl.h: Re-generate.
	90
bb8541b9 L	91	2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
	92
	93	PR 5715
	94	* configure: Regenerated.
	95
57b592a3 AN	96	2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
	97
	98	* mips-dis.c: Update copyright.
	99	(mips_arch_choices): Add Octeon.
	100	* mips-opc.c: Update copyright.
	101	(IOCT): New macro.
	102	(mips_builtin_opcodes): Add Octeon instruction synciobdma.
	103
930bb4cf AM	104	2008-01-29 Alan Modra <amodra@bigpond.net.au>
	105
	106	* ppc-opc.c: Support optional L form mtmsr.
	107
82c18208 L	108	2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
	109
	110	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
	111
599121aa L	112	2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
	113
	114	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	115	* i386-init.h: Regenerated.
	116
80098f51 TG	117	2008-01-23 Tristan Gingold <gingold@adacore.com>
	118
	119	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	120	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
	121
115c7c25 L	122	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	123
	124	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	125	(cpu_flags): Likewise.
	126
	127	* i386-opc.h (CpuMMX2): Removed.
	128	(CpuSSE): Updated.
	129
	130	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE\|Cpu3dnowA.
	131	* i386-init.h: Regenerated.
	132	* i386-tbl.h: Likewise.
	133
6305a203 L	134	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	135
	136	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	137	CPU_SMX_FLAGS.
	138	* i386-init.h: Regenerated.
	139
fd07a1c8 L	140	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	141
	142	* i386-opc.tbl: Use Qword on movddup.
	143	* i386-tbl.h: Regenerated.
	144
321fd21e L	145	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	146
	147	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	148	* i386-tbl.h: Regenerated.
	149
4ee52178 L	150	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	151
	152	* i386-dis.c (Mx): New.
	153	(PREFIX_0FC3): Likewise.
	154	(PREFIX_0FC7_REG_6): Updated.
	155	(dis386_twobyte): Use PREFIX_0FC3.
	156	(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
	157	Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
	158	movntss.
	159
5c07affc L	160	2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
	161
	162	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	163	(operand_types): Add Mem.
	164
	165	* i386-opc.h (IntelSyntax): New.
	166	* i386-opc.h (Mem): New.
	167	(Byte): Updated.
	168	(Opcode_Modifier_Max): Updated.
	169	(i386_opcode_modifier): Add intelsyntax.
	170	(i386_operand_type): Add mem.
	171
	172	* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
	173	instructions.
	174
	175	* i386-reg.tbl: Add size for accumulator.
	176
	177	* i386-init.h: Regenerated.
	178	* i386-tbl.h: Likewise.
	179
0d6a2f58 L	180	2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
	181
	182	* i386-opc.h (Byte): Fix a typo.
	183
7d5e4556 L	184	2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
	185
	186	PR gas/5534
	187	* i386-gen.c (operand_type_init): Add Dword to
	188	OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
	189	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	190	Qword and Xmmword.
	191	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	192	Xmmword, Unspecified and Anysize.
	193	(set_bitfield): Make Mmword an alias of Qword. Make Oword
	194	an alias of Xmmword.
	195
	196	* i386-opc.h (CheckSize): Removed.
	197	(Byte): Updated.
	198	(Word): Likewise.
	199	(Dword): Likewise.
	200	(Qword): Likewise.
	201	(Xmmword): Likewise.
	202	(FWait): Updated.
	203	(OTMax): Likewise.
	204	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	205	qword and xmmword.
	206	(Fword): New.
	207	(TBYTE): Likewise.
	208	(Unspecified): Likewise.
	209	(Anysize): Likewise.
	210	(i386_operand_type): Add byte, word, dword, fword, qword,
	211	tbyte xmmword, unspecified and anysize.
	212
	213	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	214	Tbyte, Xmmword, Unspecified and Anysize.
	215
	216	* i386-reg.tbl: Add size for accumulator.
	217
	218	* i386-init.h: Regenerated.
	219	* i386-tbl.h: Likewise.
	220
b5b1fc4f L	221	2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
	222
	223	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	224	(REG_0F18): Updated.
	225	(reg_table): Updated.
	226	(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
	227	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
	228
50e8458f L	229	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	230
	231	* i386-gen.c (set_bitfield): Use fail () on error.
	232
3d4d5afa L	233	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	234
	235	* i386-gen.c (lineno): New.
	236	(filename): Likewise.
	237	(set_bitfield): Report filename and line numer on error.
	238	(process_i386_opcodes): Set filename and update lineno.
	239	(process_i386_registers): Likewise.
	240
e1d4d893 L	241	2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
	242
	243	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	244	ATTSyntax.
	245
	246	* i386-opc.h (IntelMnemonic): Renamed to ..
	247	(ATTSyntax): This
	248	(Opcode_Modifier_Max): Updated.
	249	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	250	and intelsyntax.
	251
	252	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	253	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	254	* i386-tbl.h: Regenerated.
	255
6f143e4d L	256	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	257
	258	* i386-gen.c: Update copyright to 2008.
	259	* i386-opc.h: Likewise.
	260	* i386-opc.tbl: Likewise.
	261
	262	* i386-init.h: Regenerated.
	263	* i386-tbl.h: Likewise.
	264
c6add537 L	265	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	266
	267	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	268	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	269	* i386-tbl.h: Regenerated.
	270
3629bb00 L	271	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	272
	273	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	274	CpuSSE4_2_Or_ABM.
	275	(cpu_flags): Likewise.
	276
	277	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	278	(CpuSSE4_2_Or_ABM): Likewise.
	279	(CpuLM): Updated.
	280	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
	281
	282	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	283	Cpu686\|CpuPadLock with CpuSSE4_1\|CpuSSE5, CpuABM\|CpuSSE4_2
	284	and CpuPadLock, respectively.
	285	* i386-init.h: Regenerated.
	286	* i386-tbl.h: Likewise.
	287
24995bd6 L	288	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	289
	290	* i386-gen.c (opcode_modifiers): Remove No_xSuf.
	291
	292	* i386-opc.h (No_xSuf): Removed.
	293	(CheckSize): Updated.
	294
	295	* i386-tbl.h: Regenerated.
	296
e0329a22 L	297	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	298
	299	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	300	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	301	CPU_SSE5_FLAGS.
	302	(cpu_flags): Add CpuSSE4_2_Or_ABM.
	303
	304	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	305	(CpuLM): Updated.
	306	(i386_cpu_flags): Add cpusse4_2_or_abm.
	307
	308	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	309	CpuABM\|CpuSSE4_2 on popcnt.
	310	* i386-init.h: Regenerated.
	311	* i386-tbl.h: Likewise.
	312
f2a9c676 L	313	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	314
	315	* i386-opc.h: Update comments.
	316
d978b5be L	317	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	318
	319	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	320	* i386-opc.h: Likewise.
	321	* i386-opc.tbl: Likewise.
	322
582d5edd L	323	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	324
	325	PR gas/5534
	326	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	327	Byte, Word, Dword, QWord and Xmmword.
	328
	329	* i386-opc.h (No_xSuf): New.
	330	(CheckSize): Likewise.
	331	(Byte): Likewise.
	332	(Word): Likewise.
	333	(Dword): Likewise.
	334	(QWord): Likewise.
	335	(Xmmword): Likewise.
	336	(FWait): Updated.
	337	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	338	Dword, QWord and Xmmword.
	339
	340	* i386-opc.tbl: Add CheckSize\|QWord to movq if IgnoreSize is
	341	used.
	342	* i386-tbl.h: Regenerated.
	343
3fe15143 MK	344	2008-01-02 Mark Kettenis <kettenis@gnu.org>
	345
	346	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	347	From Miod Vallat.
	348
6c7ac64e	349	For older changes see ChangeLog-2007
252b5132 RH	350	\f
252b5132 RH	351	Local Variables:
2f6d2f85 NC	352	mode: change-log
	353	left-margin: 8
	354	fill-column: 74
252b5132 RH	355	version-control: never
252b5132 RH	356	End: