* mips-dis.c: Update copyright.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12008-02-04 Adam Nemet <anemet@caviumnetworks.com>
2
3 * mips-dis.c: Update copyright.
4 (mips_arch_choices): Add Octeon.
5 * mips-opc.c: Update copyright.
6 (IOCT): New macro.
7 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
8
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92008-01-29 Alan Modra <amodra@bigpond.net.au>
10
11 * ppc-opc.c: Support optional L form mtmsr.
12
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132008-01-24 H.J. Lu <hongjiu.lu@intel.com>
14
15 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
16
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172008-01-23 H.J. Lu <hongjiu.lu@intel.com>
18
19 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
20 * i386-init.h: Regenerated.
21
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222008-01-23 Tristan Gingold <gingold@adacore.com>
23
24 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
25 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
26
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272008-01-22 H.J. Lu <hongjiu.lu@intel.com>
28
29 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
30 (cpu_flags): Likewise.
31
32 * i386-opc.h (CpuMMX2): Removed.
33 (CpuSSE): Updated.
34
35 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
36 * i386-init.h: Regenerated.
37 * i386-tbl.h: Likewise.
38
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392008-01-22 H.J. Lu <hongjiu.lu@intel.com>
40
41 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
42 CPU_SMX_FLAGS.
43 * i386-init.h: Regenerated.
44
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452008-01-15 H.J. Lu <hongjiu.lu@intel.com>
46
47 * i386-opc.tbl: Use Qword on movddup.
48 * i386-tbl.h: Regenerated.
49
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502008-01-15 H.J. Lu <hongjiu.lu@intel.com>
51
52 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
53 * i386-tbl.h: Regenerated.
54
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552008-01-15 H.J. Lu <hongjiu.lu@intel.com>
56
57 * i386-dis.c (Mx): New.
58 (PREFIX_0FC3): Likewise.
59 (PREFIX_0FC7_REG_6): Updated.
60 (dis386_twobyte): Use PREFIX_0FC3.
61 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
62 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
63 movntss.
64
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652008-01-14 H.J. Lu <hongjiu.lu@intel.com>
66
67 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
68 (operand_types): Add Mem.
69
70 * i386-opc.h (IntelSyntax): New.
71 * i386-opc.h (Mem): New.
72 (Byte): Updated.
73 (Opcode_Modifier_Max): Updated.
74 (i386_opcode_modifier): Add intelsyntax.
75 (i386_operand_type): Add mem.
76
77 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
78 instructions.
79
80 * i386-reg.tbl: Add size for accumulator.
81
82 * i386-init.h: Regenerated.
83 * i386-tbl.h: Likewise.
84
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852008-01-13 H.J. Lu <hongjiu.lu@intel.com>
86
87 * i386-opc.h (Byte): Fix a typo.
88
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892008-01-12 H.J. Lu <hongjiu.lu@intel.com>
90
91 PR gas/5534
92 * i386-gen.c (operand_type_init): Add Dword to
93 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
94 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
95 Qword and Xmmword.
96 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
97 Xmmword, Unspecified and Anysize.
98 (set_bitfield): Make Mmword an alias of Qword. Make Oword
99 an alias of Xmmword.
100
101 * i386-opc.h (CheckSize): Removed.
102 (Byte): Updated.
103 (Word): Likewise.
104 (Dword): Likewise.
105 (Qword): Likewise.
106 (Xmmword): Likewise.
107 (FWait): Updated.
108 (OTMax): Likewise.
109 (i386_opcode_modifier): Remove checksize, byte, word, dword,
110 qword and xmmword.
111 (Fword): New.
112 (TBYTE): Likewise.
113 (Unspecified): Likewise.
114 (Anysize): Likewise.
115 (i386_operand_type): Add byte, word, dword, fword, qword,
116 tbyte xmmword, unspecified and anysize.
117
118 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
119 Tbyte, Xmmword, Unspecified and Anysize.
120
121 * i386-reg.tbl: Add size for accumulator.
122
123 * i386-init.h: Regenerated.
124 * i386-tbl.h: Likewise.
125
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1262008-01-10 H.J. Lu <hongjiu.lu@intel.com>
127
128 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
129 (REG_0F18): Updated.
130 (reg_table): Updated.
131 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
132 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
133
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1342008-01-08 H.J. Lu <hongjiu.lu@intel.com>
135
136 * i386-gen.c (set_bitfield): Use fail () on error.
137
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1382008-01-08 H.J. Lu <hongjiu.lu@intel.com>
139
140 * i386-gen.c (lineno): New.
141 (filename): Likewise.
142 (set_bitfield): Report filename and line numer on error.
143 (process_i386_opcodes): Set filename and update lineno.
144 (process_i386_registers): Likewise.
145
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1462008-01-05 H.J. Lu <hongjiu.lu@intel.com>
147
148 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
149 ATTSyntax.
150
151 * i386-opc.h (IntelMnemonic): Renamed to ..
152 (ATTSyntax): This
153 (Opcode_Modifier_Max): Updated.
154 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
155 and intelsyntax.
156
157 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
158 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
159 * i386-tbl.h: Regenerated.
160
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1612008-01-04 H.J. Lu <hongjiu.lu@intel.com>
162
163 * i386-gen.c: Update copyright to 2008.
164 * i386-opc.h: Likewise.
165 * i386-opc.tbl: Likewise.
166
167 * i386-init.h: Regenerated.
168 * i386-tbl.h: Likewise.
169
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1702008-01-04 H.J. Lu <hongjiu.lu@intel.com>
171
172 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
173 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
174 * i386-tbl.h: Regenerated.
175
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1762008-01-03 H.J. Lu <hongjiu.lu@intel.com>
177
178 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
179 CpuSSE4_2_Or_ABM.
180 (cpu_flags): Likewise.
181
182 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
183 (CpuSSE4_2_Or_ABM): Likewise.
184 (CpuLM): Updated.
185 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
186
187 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
188 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
189 and CpuPadLock, respectively.
190 * i386-init.h: Regenerated.
191 * i386-tbl.h: Likewise.
192
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1932008-01-03 H.J. Lu <hongjiu.lu@intel.com>
194
195 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
196
197 * i386-opc.h (No_xSuf): Removed.
198 (CheckSize): Updated.
199
200 * i386-tbl.h: Regenerated.
201
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2022008-01-02 H.J. Lu <hongjiu.lu@intel.com>
203
204 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
205 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
206 CPU_SSE5_FLAGS.
207 (cpu_flags): Add CpuSSE4_2_Or_ABM.
208
209 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
210 (CpuLM): Updated.
211 (i386_cpu_flags): Add cpusse4_2_or_abm.
212
213 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
214 CpuABM|CpuSSE4_2 on popcnt.
215 * i386-init.h: Regenerated.
216 * i386-tbl.h: Likewise.
217
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2182008-01-02 H.J. Lu <hongjiu.lu@intel.com>
219
220 * i386-opc.h: Update comments.
221
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2222008-01-02 H.J. Lu <hongjiu.lu@intel.com>
223
224 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
225 * i386-opc.h: Likewise.
226 * i386-opc.tbl: Likewise.
227
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2282008-01-02 H.J. Lu <hongjiu.lu@intel.com>
229
230 PR gas/5534
231 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
232 Byte, Word, Dword, QWord and Xmmword.
233
234 * i386-opc.h (No_xSuf): New.
235 (CheckSize): Likewise.
236 (Byte): Likewise.
237 (Word): Likewise.
238 (Dword): Likewise.
239 (QWord): Likewise.
240 (Xmmword): Likewise.
241 (FWait): Updated.
242 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
243 Dword, QWord and Xmmword.
244
245 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
246 used.
247 * i386-tbl.h: Regenerated.
248
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2492008-01-02 Mark Kettenis <kettenis@gnu.org>
250
251 * m88k-dis.c (instructions): Fix fcvt.* instructions.
252 From Miod Vallat.
253
6c7ac64e 254For older changes see ChangeLog-2007
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