* cache.c (cache_bread): Set bfd_error_file_truncated if EOF
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
bb8541b9
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12008-02-04 H.J. Lu <hongjiu.lu@intel.com>
2
3 PR 5715
4 * configure: Regenerated.
5
57b592a3
AN
62008-02-04 Adam Nemet <anemet@caviumnetworks.com>
7
8 * mips-dis.c: Update copyright.
9 (mips_arch_choices): Add Octeon.
10 * mips-opc.c: Update copyright.
11 (IOCT): New macro.
12 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
13
930bb4cf
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142008-01-29 Alan Modra <amodra@bigpond.net.au>
15
16 * ppc-opc.c: Support optional L form mtmsr.
17
82c18208
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182008-01-24 H.J. Lu <hongjiu.lu@intel.com>
19
20 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
21
599121aa
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222008-01-23 H.J. Lu <hongjiu.lu@intel.com>
23
24 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
25 * i386-init.h: Regenerated.
26
80098f51
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272008-01-23 Tristan Gingold <gingold@adacore.com>
28
29 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
30 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
31
115c7c25
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322008-01-22 H.J. Lu <hongjiu.lu@intel.com>
33
34 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
35 (cpu_flags): Likewise.
36
37 * i386-opc.h (CpuMMX2): Removed.
38 (CpuSSE): Updated.
39
40 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
41 * i386-init.h: Regenerated.
42 * i386-tbl.h: Likewise.
43
6305a203
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442008-01-22 H.J. Lu <hongjiu.lu@intel.com>
45
46 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
47 CPU_SMX_FLAGS.
48 * i386-init.h: Regenerated.
49
fd07a1c8
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502008-01-15 H.J. Lu <hongjiu.lu@intel.com>
51
52 * i386-opc.tbl: Use Qword on movddup.
53 * i386-tbl.h: Regenerated.
54
321fd21e
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552008-01-15 H.J. Lu <hongjiu.lu@intel.com>
56
57 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
58 * i386-tbl.h: Regenerated.
59
4ee52178
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602008-01-15 H.J. Lu <hongjiu.lu@intel.com>
61
62 * i386-dis.c (Mx): New.
63 (PREFIX_0FC3): Likewise.
64 (PREFIX_0FC7_REG_6): Updated.
65 (dis386_twobyte): Use PREFIX_0FC3.
66 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
67 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
68 movntss.
69
5c07affc
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702008-01-14 H.J. Lu <hongjiu.lu@intel.com>
71
72 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
73 (operand_types): Add Mem.
74
75 * i386-opc.h (IntelSyntax): New.
76 * i386-opc.h (Mem): New.
77 (Byte): Updated.
78 (Opcode_Modifier_Max): Updated.
79 (i386_opcode_modifier): Add intelsyntax.
80 (i386_operand_type): Add mem.
81
82 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
83 instructions.
84
85 * i386-reg.tbl: Add size for accumulator.
86
87 * i386-init.h: Regenerated.
88 * i386-tbl.h: Likewise.
89
0d6a2f58
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902008-01-13 H.J. Lu <hongjiu.lu@intel.com>
91
92 * i386-opc.h (Byte): Fix a typo.
93
7d5e4556
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942008-01-12 H.J. Lu <hongjiu.lu@intel.com>
95
96 PR gas/5534
97 * i386-gen.c (operand_type_init): Add Dword to
98 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
99 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
100 Qword and Xmmword.
101 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
102 Xmmword, Unspecified and Anysize.
103 (set_bitfield): Make Mmword an alias of Qword. Make Oword
104 an alias of Xmmword.
105
106 * i386-opc.h (CheckSize): Removed.
107 (Byte): Updated.
108 (Word): Likewise.
109 (Dword): Likewise.
110 (Qword): Likewise.
111 (Xmmword): Likewise.
112 (FWait): Updated.
113 (OTMax): Likewise.
114 (i386_opcode_modifier): Remove checksize, byte, word, dword,
115 qword and xmmword.
116 (Fword): New.
117 (TBYTE): Likewise.
118 (Unspecified): Likewise.
119 (Anysize): Likewise.
120 (i386_operand_type): Add byte, word, dword, fword, qword,
121 tbyte xmmword, unspecified and anysize.
122
123 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
124 Tbyte, Xmmword, Unspecified and Anysize.
125
126 * i386-reg.tbl: Add size for accumulator.
127
128 * i386-init.h: Regenerated.
129 * i386-tbl.h: Likewise.
130
b5b1fc4f
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1312008-01-10 H.J. Lu <hongjiu.lu@intel.com>
132
133 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
134 (REG_0F18): Updated.
135 (reg_table): Updated.
136 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
137 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
138
50e8458f
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1392008-01-08 H.J. Lu <hongjiu.lu@intel.com>
140
141 * i386-gen.c (set_bitfield): Use fail () on error.
142
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1432008-01-08 H.J. Lu <hongjiu.lu@intel.com>
144
145 * i386-gen.c (lineno): New.
146 (filename): Likewise.
147 (set_bitfield): Report filename and line numer on error.
148 (process_i386_opcodes): Set filename and update lineno.
149 (process_i386_registers): Likewise.
150
e1d4d893
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1512008-01-05 H.J. Lu <hongjiu.lu@intel.com>
152
153 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
154 ATTSyntax.
155
156 * i386-opc.h (IntelMnemonic): Renamed to ..
157 (ATTSyntax): This
158 (Opcode_Modifier_Max): Updated.
159 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
160 and intelsyntax.
161
162 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
163 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
164 * i386-tbl.h: Regenerated.
165
6f143e4d
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1662008-01-04 H.J. Lu <hongjiu.lu@intel.com>
167
168 * i386-gen.c: Update copyright to 2008.
169 * i386-opc.h: Likewise.
170 * i386-opc.tbl: Likewise.
171
172 * i386-init.h: Regenerated.
173 * i386-tbl.h: Likewise.
174
c6add537
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1752008-01-04 H.J. Lu <hongjiu.lu@intel.com>
176
177 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
178 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
179 * i386-tbl.h: Regenerated.
180
3629bb00
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1812008-01-03 H.J. Lu <hongjiu.lu@intel.com>
182
183 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
184 CpuSSE4_2_Or_ABM.
185 (cpu_flags): Likewise.
186
187 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
188 (CpuSSE4_2_Or_ABM): Likewise.
189 (CpuLM): Updated.
190 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
191
192 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
193 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
194 and CpuPadLock, respectively.
195 * i386-init.h: Regenerated.
196 * i386-tbl.h: Likewise.
197
24995bd6
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1982008-01-03 H.J. Lu <hongjiu.lu@intel.com>
199
200 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
201
202 * i386-opc.h (No_xSuf): Removed.
203 (CheckSize): Updated.
204
205 * i386-tbl.h: Regenerated.
206
e0329a22
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2072008-01-02 H.J. Lu <hongjiu.lu@intel.com>
208
209 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
210 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
211 CPU_SSE5_FLAGS.
212 (cpu_flags): Add CpuSSE4_2_Or_ABM.
213
214 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
215 (CpuLM): Updated.
216 (i386_cpu_flags): Add cpusse4_2_or_abm.
217
218 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
219 CpuABM|CpuSSE4_2 on popcnt.
220 * i386-init.h: Regenerated.
221 * i386-tbl.h: Likewise.
222
f2a9c676
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2232008-01-02 H.J. Lu <hongjiu.lu@intel.com>
224
225 * i386-opc.h: Update comments.
226
d978b5be
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2272008-01-02 H.J. Lu <hongjiu.lu@intel.com>
228
229 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
230 * i386-opc.h: Likewise.
231 * i386-opc.tbl: Likewise.
232
582d5edd
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2332008-01-02 H.J. Lu <hongjiu.lu@intel.com>
234
235 PR gas/5534
236 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
237 Byte, Word, Dword, QWord and Xmmword.
238
239 * i386-opc.h (No_xSuf): New.
240 (CheckSize): Likewise.
241 (Byte): Likewise.
242 (Word): Likewise.
243 (Dword): Likewise.
244 (QWord): Likewise.
245 (Xmmword): Likewise.
246 (FWait): Updated.
247 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
248 Dword, QWord and Xmmword.
249
250 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
251 used.
252 * i386-tbl.h: Regenerated.
253
3fe15143
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2542008-01-02 Mark Kettenis <kettenis@gnu.org>
255
256 * m88k-dis.c (instructions): Fix fcvt.* instructions.
257 From Miod Vallat.
258
6c7ac64e 259For older changes see ChangeLog-2007
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260\f
261Local Variables:
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262mode: change-log
263left-margin: 8
264fill-column: 74
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265version-control: never
266End:
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