projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| bb35fb24 NC |
1 | 2008-06-12 Adam Nemet <anemet@caviumnetworks.com> |
| 2 | ||
| 3 | * mips-dis.c (print_insn_args): Handle field descriptors +x, +p, | |
| 4 | +s, +S. | |
| 5 | * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions | |
| 6 | baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, | |
| 7 | syncw, syncws, vm3mulu, vm0 and vmulu. | |
| 8 | ||
| dd3cbb7e NC |
9 | * mips-dis.c (print_insn_args): Handle field descriptor +Q. |
| 10 | * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq, | |
| 11 | seqi, sne and snei. | |
| 12 | ||
| a5dabbb0 L |
13 | 2008-05-30 H.J. Lu <hongjiu.lu@intel.com> |
| 14 | ||
| 15 | * i386-opc.tbl: Add vmovd with 64bit operand. | |
| 16 | * i386-tbl.h: Regenerated. | |
| 17 | ||
| 725a9891 MS |
18 | 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com> |
| 19 | ||
| 20 | * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format. | |
| 21 | ||
| cbc80391 L |
22 | 2008-05-22 H.J. Lu <hongjiu.lu@intel.com> |
| 23 | ||
| 24 | * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi. | |
| 25 | * i386-tbl.h: Regenerated. | |
| 26 | ||
| 116615c5 L |
27 | 2008-05-22 H.J. Lu <hongjiu.lu@intel.com> |
| 28 | ||
| 29 | PR gas/6517 | |
| 30 | * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss | |
| 31 | into 32bit and 64bit. Remove Reg64|Qword and add | |
| 32 | IgnoreSize|No_qSuf on 32bit version. | |
| 33 | * i386-tbl.h: Regenerated. | |
| 34 | ||
| d9479f2d L |
35 | 2008-05-21 H.J. Lu <hongjiu.lu@intel.com> |
| 36 | ||
| 37 | * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq. | |
| 38 | * i386-tbl.h: Regenerated. | |
| 39 | ||
| 3ce6fddb NC |
40 | 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com> |
| 41 | ||
| 42 | * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond. | |
| 43 | ||
| 8944f3c2 AM |
44 | 2008-05-14 Alan Modra <amodra@bigpond.net.au> |
| 45 | ||
| 46 | * Makefile.am: Run "make dep-am". | |
| 47 | * Makefile.in: Regenerate. | |
| 48 | ||
| f1f8f695 L |
49 | 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> |
| 50 | ||
| 51 | * i386-dis.c (MOVBE_Fixup): New. | |
| 52 | (Mo): Likewise. | |
| 53 | (PREFIX_0F3880): Likewise. | |
| 54 | (PREFIX_0F3881): Likewise. | |
| 55 | (PREFIX_0F38F0): Updated. | |
| 56 | (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update | |
| 57 | PREFIX_0F38F0 and PREFIX_0F38F1 for movbe. | |
| 58 | (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881. | |
| 59 | ||
| 60 | * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and | |
| 61 | CPU_EPT_FLAGS. | |
| 62 | (cpu_flags): Add CpuMovbe and CpuEPT. | |
| 63 | ||
| 64 | * i386-opc.h (CpuMovbe): New. | |
| 65 | (CpuEPT): Likewise. | |
| 66 | (CpuLM): Updated. | |
| 67 | (i386_cpu_flags): Add cpumovbe and cpuept. | |
| 68 | ||
| 69 | * i386-opc.tbl: Add entries for movbe and EPT instructions. | |
| 70 | * i386-init.h: Regenerated. | |
| 71 | * i386-tbl.h: Likewise. | |
| 72 | ||
| 89aa3097 AN |
73 | 2008-04-29 Adam Nemet <anemet@caviumnetworks.com> |
| 74 | ||
| 75 | * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for | |
| 76 | the two drem and the two dremu macros. | |
| 77 | ||
| 39c5c168 AN |
78 | 2008-04-28 Adam Nemet <anemet@caviumnetworks.com> |
| 79 | ||
| 80 | * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1 | |
| 81 | instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and | |
| 82 | cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros | |
| 83 | INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D. | |
| 84 | ||
| f04d18b7 DM |
85 | 2008-04-25 David S. Miller <davem@davemloft.net> |
| 86 | ||
| 87 | * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr | |
| 88 | instead of %sys_tick_cmpr, as suggested in architecture manuals. | |
| 89 | ||
| 6194aaab L |
90 | 2008-04-23 Paolo Bonzini <bonzini@gnu.org> |
| 91 | ||
| 92 | * aclocal.m4: Regenerate. | |
| 93 | * configure: Regenerate. | |
| 94 | ||
| 1a6b486f DM |
95 | 2008-04-23 David S. Miller <davem@davemloft.net> |
| 96 | ||
| 97 | * sparc-opc.c (asi_table): Add UltraSPARC and Niagara | |
| 98 | extended values. | |
| 99 | (prefetch_table): Add missing values. | |
| 100 | ||
| 81f8a913 L |
101 | 2008-04-22 H.J. Lu <hongjiu.lu@intel.com> |
| 102 | ||
| 103 | * i386-gen.c (opcode_modifiers): Add NoAVX. | |
| 104 | ||
| 105 | * i386-opc.h (NoAVX): New. | |
| 106 | (OldGcc): Updated. | |
| 107 | (i386_opcode_modifier): Add noavx. | |
| 108 | ||
| 109 | * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3 | |
| 110 | instructions which don't have AVX equivalent. | |
| 111 | * i386-tbl.h: Regenerated. | |
| 112 | ||
| dae39acc L |
113 | 2008-04-18 H.J. Lu <hongjiu.lu@intel.com> |
| 114 | ||
| 115 | * i386-dis.c (OP_VEX_FMA): New. | |
| 116 | (OP_EX_VexImmW): Likewise. | |
| 117 | (VexFMA): Likewise. | |
| 118 | (Vex128FMA): Likewise. | |
| 119 | (EXVexImmW): Likewise. | |
| 120 | (get_vex_imm8): Likewise. | |
| 121 | (OP_EX_VexReg): Likewise. | |
| 122 | (vex_i4_done): Renamed to ... | |
| 123 | (vex_w_done): This. | |
| 124 | (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps | |
| 125 | and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on | |
| 126 | FMA instructions. | |
| 127 | (print_insn): Updated. | |
| 128 | (OP_EX_VexW): Rewrite to swap register in VEX with EX. | |
| 129 | (OP_REG_VexI4): Check invalid high registers. | |
| 130 | ||
| ce886ab1 DR |
131 | 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> |
| 132 | Michael Meissner <michael.meissner@amd.com> | |
| 133 | ||
| 134 | * i386-opc.tbl: Fix protX to allow memory in the middle operand. | |
| 135 | * i386-tbl.h: Regenerate from i386-opc.tbl. | |
| 8944f3c2 | 136 | |
| 19a6653c AM |
137 | 2008-04-14 Edmar Wienskoski <edmar@freescale.com> |
| 138 | ||
| 139 | * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to | |
| 140 | accept Power E500MC instructions. | |
| 141 | (print_ppc_disassembler_options): Document -Me500mc. | |
| 142 | * ppc-opc.c (DUIS, DUI, T): New. | |
| 143 | (XRT, XRTRA): Likewise. | |
| 144 | (E500MC): Likewise. | |
| 145 | (powerpc_opcodes): Add new Power E500MC instructions. | |
| 146 | ||
| 112b7c50 AK |
147 | 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> |
| 148 | ||
| 149 | * s390-dis.c (init_disasm): Evaluate disassembler_options. | |
| 150 | (print_s390_disassembler_options): New function. | |
| 151 | * disassemble.c (disassembler_usage): Invoke | |
| 152 | print_s390_disassembler_options. | |
| 153 | ||
| 7ff42648 AK |
154 | 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> |
| 155 | ||
| 156 | * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes | |
| 157 | of local variables used for mnemonic parsing: prefix, suffix and | |
| 158 | number. | |
| 159 | ||
| 45a5551e AK |
160 | 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> |
| 161 | ||
| 162 | * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic | |
| 163 | extensions for conditional jumps (o, p, m, nz, z, nm, np, no). | |
| 164 | (s390_crb_extensions): New extensions table. | |
| 165 | (insertExpandedMnemonic): Handle '$' tag. | |
| 166 | * s390-opc.txt: Remove conditional jump variants which can now | |
| 167 | be expanded automatically. | |
| 168 | Replace '*' tag with '$' in the compare and branch instructions. | |
| 169 | ||
| 06c8514a L |
170 | 2008-04-07 H.J. Lu <hongjiu.lu@intel.com> |
| 171 | ||
| 172 | * i386-dis.c (PREFIX_VEX_38XX): Add a tab. | |
| 173 | (PREFIX_VEX_3AXX): Likewis. | |
| 174 | ||
| b122c285 L |
175 | 2008-04-07 H.J. Lu <hongjiu.lu@intel.com> |
| 176 | ||
| 177 | * i386-opc.tbl: Remove 4 extra blank lines. | |
| 178 | ||
| 594ab6a3 L |
179 | 2008-04-04 H.J. Lu <hongjiu.lu@intel.com> |
| 180 | ||
| 181 | * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL | |
| 182 | with CPU_PCLMUL_FLAGS/CpuPCLMUL. | |
| 183 | (cpu_flags): Replace CpuCLMUL with CpuPCLMUL. | |
| 184 | * i386-opc.tbl: Likewise. | |
| 185 | ||
| 186 | * i386-opc.h (CpuCLMUL): Renamed to ... | |
| 187 | (CpuPCLMUL): This. | |
| 188 | (CpuFMA): Updated. | |
| 189 | (i386_cpu_flags): Replace cpuclmul with cpupclmul. | |
| 190 | ||
| 191 | * i386-init.h: Regenerated. | |
| 192 | ||
| c0f3af97 L |
193 | 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> |
| 194 | ||
| 195 | * i386-dis.c (OP_E_register): New. | |
| 196 | (OP_E_memory): Likewise. | |
| 197 | (OP_VEX): Likewise. | |
| 198 | (OP_EX_Vex): Likewise. | |
| 199 | (OP_EX_VexW): Likewise. | |
| 200 | (OP_XMM_Vex): Likewise. | |
| 201 | (OP_XMM_VexW): Likewise. | |
| 202 | (OP_REG_VexI4): Likewise. | |
| 203 | (PCLMUL_Fixup): Likewise. | |
| 204 | (VEXI4_Fixup): Likewise. | |
| 205 | (VZERO_Fixup): Likewise. | |
| 206 | (VCMP_Fixup): Likewise. | |
| 207 | (VPERMIL2_Fixup): Likewise. | |
| 208 | (rex_original): Likewise. | |
| 209 | (rex_ignored): Likewise. | |
| 210 | (Mxmm): Likewise. | |
| 211 | (XMM): Likewise. | |
| 212 | (EXxmm): Likewise. | |
| 213 | (EXxmmq): Likewise. | |
| 214 | (EXymmq): Likewise. | |
| 215 | (Vex): Likewise. | |
| 216 | (Vex128): Likewise. | |
| 217 | (Vex256): Likewise. | |
| 218 | (VexI4): Likewise. | |
| 219 | (EXdVex): Likewise. | |
| 220 | (EXqVex): Likewise. | |
| 221 | (EXVexW): Likewise. | |
| 222 | (EXdVexW): Likewise. | |
| 223 | (EXqVexW): Likewise. | |
| 224 | (XMVex): Likewise. | |
| 225 | (XMVexW): Likewise. | |
| 226 | (XMVexI4): Likewise. | |
| 227 | (PCLMUL): Likewise. | |
| 228 | (VZERO): Likewise. | |
| 229 | (VCMP): Likewise. | |
| 230 | (VPERMIL2): Likewise. | |
| 231 | (xmm_mode): Likewise. | |
| 232 | (xmmq_mode): Likewise. | |
| 233 | (ymmq_mode): Likewise. | |
| 234 | (vex_mode): Likewise. | |
| 235 | (vex128_mode): Likewise. | |
| 236 | (vex256_mode): Likewise. | |
| 237 | (USE_VEX_C4_TABLE): Likewise. | |
| 238 | (USE_VEX_C5_TABLE): Likewise. | |
| 239 | (USE_VEX_LEN_TABLE): Likewise. | |
| 240 | (VEX_C4_TABLE): Likewise. | |
| 241 | (VEX_C5_TABLE): Likewise. | |
| 242 | (VEX_LEN_TABLE): Likewise. | |
| 243 | (REG_VEX_XX): Likewise. | |
| 244 | (MOD_VEX_XXX): Likewise. | |
| 245 | (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. | |
| 246 | (PREFIX_0F3A44): Likewise. | |
| 247 | (PREFIX_0F3ADF): Likewise. | |
| 248 | (PREFIX_VEX_XXX): Likewise. | |
| 249 | (VEX_OF): Likewise. | |
| 250 | (VEX_OF38): Likewise. | |
| 251 | (VEX_OF3A): Likewise. | |
| 252 | (VEX_LEN_XXX): Likewise. | |
| 253 | (vex): Likewise. | |
| 254 | (need_vex): Likewise. | |
| 255 | (need_vex_reg): Likewise. | |
| 256 | (vex_i4_done): Likewise. | |
| 257 | (vex_table): Likewise. | |
| 258 | (vex_len_table): Likewise. | |
| 259 | (OP_REG_VexI4): Likewise. | |
| 260 | (vex_cmp_op): Likewise. | |
| 261 | (pclmul_op): Likewise. | |
| 262 | (vpermil2_op): Likewise. | |
| 263 | (m_mode): Updated. | |
| 264 | (es_reg): Likewise. | |
| 265 | (PREFIX_0F38F0): Likewise. | |
| 266 | (PREFIX_0F3A60): Likewise. | |
| 267 | (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. | |
| 268 | (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF | |
| 269 | and PREFIX_VEX_XXX entries. | |
| 270 | (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. | |
| 271 | (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and | |
| 272 | PREFIX_0F3ADF. | |
| 273 | (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. | |
| 274 | Add MOD_VEX_XXX entries. | |
| 275 | (ckprefix): Initialize rex_original and rex_ignored. Store the | |
| 276 | REX byte in rex_original. | |
| 277 | (get_valid_dis386): Handle the implicit prefix in VEX prefix | |
| 278 | bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. | |
| 279 | (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before | |
| 280 | calling get_valid_dis386. Use rex_original and rex_ignored when | |
| 281 | printing out REX. | |
| 282 | (putop): Handle "XY". | |
| 283 | (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and | |
| 284 | ymmq_mode. | |
| 285 | (OP_E_extended): Updated to use OP_E_register and | |
| 286 | OP_E_memory. | |
| 287 | (OP_XMM): Handle VEX. | |
| 288 | (OP_EX): Likewise. | |
| 289 | (XMM_Fixup): Likewise. | |
| 290 | (CMP_Fixup): Use ARRAY_SIZE. | |
| 291 | ||
| 292 | * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, | |
| 293 | CPU_FMA_FLAGS and CPU_AVX_FLAGS. | |
| 294 | (operand_type_init): Add OPERAND_TYPE_REGYMM and | |
| 295 | OPERAND_TYPE_VEX_IMM4. | |
| 296 | (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. | |
| 297 | (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, | |
| 298 | VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, | |
| 299 | VexImmExt and SSE2AVX. | |
| 300 | (operand_types): Add RegYMM, Ymmword and Vex_Imm4. | |
| 301 | ||
| 302 | * i386-opc.h (CpuAVX): New. | |
| 303 | (CpuAES): Likewise. | |
| 304 | (CpuCLMUL): Likewise. | |
| 305 | (CpuFMA): Likewise. | |
| 306 | (Vex): Likewise. | |
| 307 | (Vex256): Likewise. | |
| 308 | (VexNDS): Likewise. | |
| 309 | (VexNDD): Likewise. | |
| 310 | (VexW0): Likewise. | |
| 311 | (VexW1): Likewise. | |
| 312 | (Vex0F): Likewise. | |
| 313 | (Vex0F38): Likewise. | |
| 314 | (Vex0F3A): Likewise. | |
| 315 | (Vex3Sources): Likewise. | |
| 316 | (VexImmExt): Likewise. | |
| 317 | (SSE2AVX): Likewise. | |
| 318 | (RegYMM): Likewise. | |
| 319 | (Ymmword): Likewise. | |
| 320 | (Vex_Imm4): Likewise. | |
| 321 | (Implicit1stXmm0): Likewise. | |
| 322 | (CpuXsave): Updated. | |
| 323 | (CpuLM): Likewise. | |
| 324 | (ByteOkIntel): Likewise. | |
| 325 | (OldGcc): Likewise. | |
| 326 | (Control): Likewise. | |
| 327 | (Unspecified): Likewise. | |
| 328 | (OTMax): Likewise. | |
| 329 | (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. | |
| 330 | (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, | |
| 331 | vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, | |
| 332 | vex3sources, veximmext and sse2avx. | |
| 333 | (i386_operand_type): Add regymm, ymmword and vex_imm4. | |
| 334 | ||
| 335 | * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. | |
| 336 | ||
| 337 | * i386-reg.tbl: Add AVX registers, ymm0..ymm15. | |
| 338 | ||
| 339 | * i386-init.h: Regenerated. | |
| 340 | * i386-tbl.h: Likewise. | |
| 341 | ||
| b21c9cb4 BS |
342 | 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com> |
| 343 | ||
| 344 | From Robin Getz <robin.getz@analog.com> | |
| 345 | * bfin-dis.c (bu32): Typedef. | |
| 346 | (enum const_forms_t): Add c_uimm32 and c_huimm32. | |
| 347 | (constant_formats[]): Add uimm32 and huimm16. | |
| 348 | (fmtconst_val): New. | |
| 349 | (uimm32): Define. | |
| 350 | (huimm32): Define. | |
| 351 | (imm16_val): Define. | |
| 352 | (luimm16_val): Define. | |
| 353 | (struct saved_state): Define. | |
| 354 | (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG, | |
| 355 | A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG, | |
| 356 | LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define. | |
| 357 | (get_allreg): New. | |
| 358 | (decode_LDIMMhalf_0): Print out the whole register value. | |
| 359 | ||
| ee171c8f BS |
360 | From Jie Zhang <jie.zhang@analog.com> |
| 361 | * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for | |
| 362 | multiply and multiply-accumulate to data register instruction. | |
| 363 | ||
| 086134ec BS |
364 | * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d, |
| 365 | c_imm32, c_huimm32e): Define. | |
| 366 | (constant_formats): Add flags for printing decimal, leading spaces, and | |
| 367 | exact symbols. | |
| 368 | (comment, parallel): Add global flags in all disassembly. | |
| 369 | (fmtconst): Take advantage of new flags, and print default in hex. | |
| 370 | (fmtconst_val): Likewise. | |
| 371 | (decode_macfunc): Be consistant with spaces, tabs, comments, | |
| 372 | capitalization in disassembly, fix minor coding style issues. | |
| 373 | (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise. | |
| 374 | (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0, | |
| 375 | decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0, | |
| 376 | decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0, | |
| 377 | decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0, | |
| 378 | decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0, | |
| 379 | decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0, | |
| 380 | decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0, | |
| 381 | decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0, | |
| 382 | decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0, | |
| 383 | _print_insn_bfin, print_insn_bfin): Likewise. | |
| 384 | ||
| 58c85be7 RW |
385 | 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 386 | ||
| 387 | * aclocal.m4: Regenerate. | |
| 388 | * configure: Likewise. | |
| 389 | * Makefile.in: Likewise. | |
| 390 | ||
| 50e7d84b AM |
391 | 2008-03-13 Alan Modra <amodra@bigpond.net.au> |
| 392 | ||
| 393 | * Makefile.am: Run "make dep-am". | |
| 394 | * Makefile.in: Regenerate. | |
| 395 | * configure: Regenerate. | |
| 396 | ||
| de866fcc AM |
397 | 2008-03-07 Alan Modra <amodra@bigpond.net.au> |
| 398 | ||
| 399 | * ppc-opc.c (powerpc_opcodes): Order and format. | |
| 400 | ||
| 28dbc079 L |
401 | 2008-03-01 H.J. Lu <hongjiu.lu@intel.com> |
| 402 | ||
| 403 | * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64. | |
| 404 | * i386-tbl.h: Regenerated. | |
| 405 | ||
| 849830bd L |
406 | 2008-02-23 H.J. Lu <hongjiu.lu@intel.com> |
| 407 | ||
| 408 | * i386-opc.tbl: Disallow 16-bit near indirect branches for | |
| 409 | x86-64. | |
| 410 | * i386-tbl.h: Regenerated. | |
| 411 | ||
| 743ddb6b JB |
412 | 2008-02-21 Jan Beulich <jbeulich@novell.com> |
| 413 | ||
| 414 | * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword | |
| 415 | and Fword for far indirect jmp. Allow Reg16 and Word for near | |
| 416 | indirect jmp on x86-64. Disallow Fword for lcall. | |
| 417 | * i386-tbl.h: Re-generate. | |
| 418 | ||
| 796d5313 NC |
419 | 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com> |
| 420 | ||
| 421 | * cr16-opc.c (cr16_num_optab): Defined | |
| 422 | ||
| 65da13b5 L |
423 | 2008-02-16 H.J. Lu <hongjiu.lu@intel.com> |
| 424 | ||
| 425 | * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG. | |
| 426 | * i386-init.h: Regenerated. | |
| 427 | ||
| 0e336180 NC |
428 | 2008-02-14 Nick Clifton <nickc@redhat.com> |
| 429 | ||
| 430 | PR binutils/5524 | |
| 431 | * configure.in (SHARED_LIBADD): Select the correct host specific | |
| 432 | file extension for shared libraries. | |
| 433 | * configure: Regenerate. | |
| 434 | ||
| b7240065 JB |
435 | 2008-02-13 Jan Beulich <jbeulich@novell.com> |
| 436 | ||
| 437 | * i386-opc.h (RegFlat): New. | |
| 438 | * i386-reg.tbl (flat): Add. | |
| 439 | * i386-tbl.h: Re-generate. | |
| 440 | ||
| 34b772a6 JB |
441 | 2008-02-13 Jan Beulich <jbeulich@novell.com> |
| 442 | ||
| 443 | * i386-dis.c (a_mode): New. | |
| 444 | (cond_jump_mode): Adjust. | |
| 445 | (Ma): Change to a_mode. | |
| 446 | (intel_operand_size): Handle a_mode. | |
| 447 | * i386-opc.tbl: Allow Dword and Qword for bound. | |
| 448 | * i386-tbl.h: Re-generate. | |
| 449 | ||
| a60de03c JB |
450 | 2008-02-13 Jan Beulich <jbeulich@novell.com> |
| 451 | ||
| 452 | * i386-gen.c (process_i386_registers): Process new fields. | |
| 453 | * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to | |
| 454 | unsigned char. Add dw2_regnum and Dw2Inval. | |
| 455 | * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo | |
| 456 | register names. | |
| 457 | * i386-tbl.h: Re-generate. | |
| 458 | ||
| f03fe4c1 L |
459 | 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> |
| 460 | ||
| 4b6bc8eb | 461 | * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS. |
| f03fe4c1 L |
462 | * i386-init.h: Updated. |
| 463 | ||
| 475a2301 L |
464 | 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> |
| 465 | ||
| 466 | * i386-gen.c (cpu_flags): Add CpuXsave. | |
| 467 | ||
| 468 | * i386-opc.h (CpuXsave): New. | |
| 4b6bc8eb | 469 | (CpuLM): Updated. |
| 475a2301 L |
470 | (i386_cpu_flags): Add cpuxsave. |
| 471 | ||
| 472 | * i386-dis.c (MOD_0FAE_REG_4): New. | |
| 473 | (RM_0F01_REG_2): Likewise. | |
| 474 | (MOD_0FAE_REG_5): Updated. | |
| 475 | (RM_0F01_REG_3): Likewise. | |
| 476 | (reg_table): Use MOD_0FAE_REG_4. | |
| 477 | (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated | |
| 478 | for xrstor. | |
| 479 | (rm_table): Add RM_0F01_REG_2. | |
| 480 | ||
| 481 | * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv. | |
| 482 | * i386-init.h: Regenerated. | |
| 483 | * i386-tbl.h: Likewise. | |
| 484 | ||
| 595785c6 | 485 | 2008-02-11 Jan Beulich <jbeulich@novell.com> |
| 041179fc | 486 | |
| 595785c6 JB |
487 | * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove |
| 488 | Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz). | |
| 489 | * i386-tbl.h: Re-generate. | |
| 490 | ||
| bb8541b9 L |
491 | 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> |
| 492 | ||
| 493 | PR 5715 | |
| 494 | * configure: Regenerated. | |
| 495 | ||
| 57b592a3 AN |
496 | 2008-02-04 Adam Nemet <anemet@caviumnetworks.com> |
| 497 | ||
| 498 | * mips-dis.c: Update copyright. | |
| 499 | (mips_arch_choices): Add Octeon. | |
| 500 | * mips-opc.c: Update copyright. | |
| 501 | (IOCT): New macro. | |
| 502 | (mips_builtin_opcodes): Add Octeon instruction synciobdma. | |
| 503 | ||
| 930bb4cf AM |
504 | 2008-01-29 Alan Modra <amodra@bigpond.net.au> |
| 505 | ||
| 506 | * ppc-opc.c: Support optional L form mtmsr. | |
| 507 | ||
| 82c18208 L |
508 | 2008-01-24 H.J. Lu <hongjiu.lu@intel.com> |
| 509 | ||
| 510 | * i386-dis.c (OP_E_extended): Handle r12 like rsp. | |
| 511 | ||
| 599121aa L |
512 | 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> |
| 513 | ||
| 514 | * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS. | |
| 515 | * i386-init.h: Regenerated. | |
| 516 | ||
| 80098f51 TG |
517 | 2008-01-23 Tristan Gingold <gingold@adacore.com> |
| 518 | ||
| 519 | * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr, | |
| 520 | ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr. | |
| 521 | ||
| 115c7c25 L |
522 | 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> |
| 523 | ||
| 524 | * i386-gen.c (cpu_flag_init): Remove CpuMMX2. | |
| 525 | (cpu_flags): Likewise. | |
| 526 | ||
| 527 | * i386-opc.h (CpuMMX2): Removed. | |
| 528 | (CpuSSE): Updated. | |
| 529 | ||
| 530 | * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA. | |
| 531 | * i386-init.h: Regenerated. | |
| 532 | * i386-tbl.h: Likewise. | |
| 533 | ||
| 6305a203 L |
534 | 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> |
| 535 | ||
| 536 | * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and | |
| 537 | CPU_SMX_FLAGS. | |
| 538 | * i386-init.h: Regenerated. | |
| 539 | ||
| fd07a1c8 L |
540 | 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> |
| 541 | ||
| 542 | * i386-opc.tbl: Use Qword on movddup. | |
| 543 | * i386-tbl.h: Regenerated. | |
| 544 | ||
| 321fd21e L |
545 | 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> |
| 546 | ||
| 547 | * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax. | |
| 548 | * i386-tbl.h: Regenerated. | |
| 549 | ||
| 4ee52178 L |
550 | 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> |
| 551 | ||
| 552 | * i386-dis.c (Mx): New. | |
| 553 | (PREFIX_0FC3): Likewise. | |
| 554 | (PREFIX_0FC7_REG_6): Updated. | |
| 555 | (dis386_twobyte): Use PREFIX_0FC3. | |
| 556 | (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd. | |
| 557 | Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on | |
| 558 | movntss. | |
| 559 | ||
| 5c07affc L |
560 | 2008-01-14 H.J. Lu <hongjiu.lu@intel.com> |
| 561 | ||
| 562 | * i386-gen.c (opcode_modifiers): Add IntelSyntax. | |
| 563 | (operand_types): Add Mem. | |
| 564 | ||
| 565 | * i386-opc.h (IntelSyntax): New. | |
| 566 | * i386-opc.h (Mem): New. | |
| 567 | (Byte): Updated. | |
| 568 | (Opcode_Modifier_Max): Updated. | |
| 569 | (i386_opcode_modifier): Add intelsyntax. | |
| 570 | (i386_operand_type): Add mem. | |
| 571 | ||
| 572 | * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more | |
| 573 | instructions. | |
| 574 | ||
| 575 | * i386-reg.tbl: Add size for accumulator. | |
| 576 | ||
| 577 | * i386-init.h: Regenerated. | |
| 578 | * i386-tbl.h: Likewise. | |
| 579 | ||
| 0d6a2f58 L |
580 | 2008-01-13 H.J. Lu <hongjiu.lu@intel.com> |
| 581 | ||
| 582 | * i386-opc.h (Byte): Fix a typo. | |
| 583 | ||
| 7d5e4556 L |
584 | 2008-01-12 H.J. Lu <hongjiu.lu@intel.com> |
| 585 | ||
| 586 | PR gas/5534 | |
| 587 | * i386-gen.c (operand_type_init): Add Dword to | |
| 588 | OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64. | |
| 589 | (opcode_modifiers): Remove CheckSize, Byte, Word, Dword, | |
| 590 | Qword and Xmmword. | |
| 591 | (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte, | |
| 592 | Xmmword, Unspecified and Anysize. | |
| 593 | (set_bitfield): Make Mmword an alias of Qword. Make Oword | |
| 594 | an alias of Xmmword. | |
| 595 | ||
| 596 | * i386-opc.h (CheckSize): Removed. | |
| 597 | (Byte): Updated. | |
| 598 | (Word): Likewise. | |
| 599 | (Dword): Likewise. | |
| 600 | (Qword): Likewise. | |
| 601 | (Xmmword): Likewise. | |
| 602 | (FWait): Updated. | |
| 603 | (OTMax): Likewise. | |
| 604 | (i386_opcode_modifier): Remove checksize, byte, word, dword, | |
| 605 | qword and xmmword. | |
| 606 | (Fword): New. | |
| 607 | (TBYTE): Likewise. | |
| 608 | (Unspecified): Likewise. | |
| 609 | (Anysize): Likewise. | |
| 610 | (i386_operand_type): Add byte, word, dword, fword, qword, | |
| 611 | tbyte xmmword, unspecified and anysize. | |
| 612 | ||
| 613 | * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword, | |
| 614 | Tbyte, Xmmword, Unspecified and Anysize. | |
| 615 | ||
| 616 | * i386-reg.tbl: Add size for accumulator. | |
| 617 | ||
| 618 | * i386-init.h: Regenerated. | |
| 619 | * i386-tbl.h: Likewise. | |
| 620 | ||
| b5b1fc4f L |
621 | 2008-01-10 H.J. Lu <hongjiu.lu@intel.com> |
| 622 | ||
| 623 | * i386-dis.c (REG_0F0E): Renamed to REG_0F0D. | |
| 624 | (REG_0F18): Updated. | |
| 625 | (reg_table): Updated. | |
| 626 | (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e. | |
| 627 | (twobyte_has_modrm): Set 1 for 0x19 to 0x1e. | |
| 628 | ||
| 50e8458f L |
629 | 2008-01-08 H.J. Lu <hongjiu.lu@intel.com> |
| 630 | ||
| 631 | * i386-gen.c (set_bitfield): Use fail () on error. | |
| 632 | ||
| 3d4d5afa L |
633 | 2008-01-08 H.J. Lu <hongjiu.lu@intel.com> |
| 634 | ||
| 635 | * i386-gen.c (lineno): New. | |
| 636 | (filename): Likewise. | |
| 637 | (set_bitfield): Report filename and line numer on error. | |
| 638 | (process_i386_opcodes): Set filename and update lineno. | |
| 639 | (process_i386_registers): Likewise. | |
| 640 | ||
| e1d4d893 L |
641 | 2008-01-05 H.J. Lu <hongjiu.lu@intel.com> |
| 642 | ||
| 643 | * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to | |
| 644 | ATTSyntax. | |
| 645 | ||
| 646 | * i386-opc.h (IntelMnemonic): Renamed to .. | |
| 647 | (ATTSyntax): This | |
| 648 | (Opcode_Modifier_Max): Updated. | |
| 649 | (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax | |
| 650 | and intelsyntax. | |
| 651 | ||
| 8944f3c2 | 652 | * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax |
| e1d4d893 L |
653 | on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp. |
| 654 | * i386-tbl.h: Regenerated. | |
| 655 | ||
| 6f143e4d L |
656 | 2008-01-04 H.J. Lu <hongjiu.lu@intel.com> |
| 657 | ||
| 658 | * i386-gen.c: Update copyright to 2008. | |
| 659 | * i386-opc.h: Likewise. | |
| 660 | * i386-opc.tbl: Likewise. | |
| 661 | ||
| 662 | * i386-init.h: Regenerated. | |
| 663 | * i386-tbl.h: Likewise. | |
| 664 | ||
| c6add537 L |
665 | 2008-01-04 H.J. Lu <hongjiu.lu@intel.com> |
| 666 | ||
| 667 | * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps, | |
| 668 | pextrb, pextrw, pinsrb, pinsrw and pmovmskb. | |
| 669 | * i386-tbl.h: Regenerated. | |
| 670 | ||
| 3629bb00 L |
671 | 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> |
| 672 | ||
| 673 | * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and | |
| 674 | CpuSSE4_2_Or_ABM. | |
| 675 | (cpu_flags): Likewise. | |
| 676 | ||
| 677 | * i386-opc.h (CpuSSE4_1_Or_5): Removed. | |
| 678 | (CpuSSE4_2_Or_ABM): Likewise. | |
| 679 | (CpuLM): Updated. | |
| 680 | (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm. | |
| 681 | ||
| 682 | * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and | |
| 683 | Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2 | |
| 684 | and CpuPadLock, respectively. | |
| 685 | * i386-init.h: Regenerated. | |
| 686 | * i386-tbl.h: Likewise. | |
| 687 | ||
| 24995bd6 L |
688 | 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> |
| 689 | ||
| 690 | * i386-gen.c (opcode_modifiers): Remove No_xSuf. | |
| 691 | ||
| 692 | * i386-opc.h (No_xSuf): Removed. | |
| 693 | (CheckSize): Updated. | |
| 694 | ||
| 695 | * i386-tbl.h: Regenerated. | |
| 696 | ||
| e0329a22 L |
697 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
| 698 | ||
| 699 | * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to | |
| 700 | CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and | |
| 701 | CPU_SSE5_FLAGS. | |
| 702 | (cpu_flags): Add CpuSSE4_2_Or_ABM. | |
| 703 | ||
| 704 | * i386-opc.h (CpuSSE4_2_Or_ABM): New. | |
| 705 | (CpuLM): Updated. | |
| 706 | (i386_cpu_flags): Add cpusse4_2_or_abm. | |
| 707 | ||
| 708 | * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of | |
| 709 | CpuABM|CpuSSE4_2 on popcnt. | |
| 710 | * i386-init.h: Regenerated. | |
| 711 | * i386-tbl.h: Likewise. | |
| 712 | ||
| f2a9c676 L |
713 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
| 714 | ||
| 715 | * i386-opc.h: Update comments. | |
| 716 | ||
| d978b5be L |
717 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
| 718 | ||
| 719 | * i386-gen.c (opcode_modifiers): Use Qword instead of QWord. | |
| 720 | * i386-opc.h: Likewise. | |
| 721 | * i386-opc.tbl: Likewise. | |
| 722 | ||
| 582d5edd L |
723 | 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> |
| 724 | ||
| 725 | PR gas/5534 | |
| 726 | * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize, | |
| 727 | Byte, Word, Dword, QWord and Xmmword. | |
| 728 | ||
| 729 | * i386-opc.h (No_xSuf): New. | |
| 730 | (CheckSize): Likewise. | |
| 731 | (Byte): Likewise. | |
| 732 | (Word): Likewise. | |
| 733 | (Dword): Likewise. | |
| 734 | (QWord): Likewise. | |
| 735 | (Xmmword): Likewise. | |
| 736 | (FWait): Updated. | |
| 737 | (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word, | |
| 738 | Dword, QWord and Xmmword. | |
| 739 | ||
| 740 | * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is | |
| 741 | used. | |
| 742 | * i386-tbl.h: Regenerated. | |
| 743 | ||
| 3fe15143 MK |
744 | 2008-01-02 Mark Kettenis <kettenis@gnu.org> |
| 745 | ||
| 746 | * m88k-dis.c (instructions): Fix fcvt.* instructions. | |
| 747 | From Miod Vallat. | |
| 748 | ||
| 6c7ac64e | 749 | For older changes see ChangeLog-2007 |
| 252b5132 RH |
750 | \f |
| 751 | Local Variables: | |
| 2f6d2f85 NC |
752 | mode: change-log |
| 753 | left-margin: 8 | |
| 754 | fill-column: 74 | |
| 252b5132 RH |
755 | version-control: never |
| 756 | End: |