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* ada-lang.c (ada_evaluate_subexp) [UNOP_IND]: Remove strange
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
34b23dab
AK		 12008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
2
3 * s390-opc.txt (stdy, stey): Fix description
4
782e11fd
AM		 52008-09-30 Alan Modra <amodra@bigpond.net.au>
6
7 * Makefile.am: Run "make dep-am".
8 * Makefile.in: Regenerate.
9
1927a18f
L		 102008-09-29 H.J. Lu <hongjiu.lu@intel.com>
11
12 * aclocal.m4: Regenerated.
13 * configure: Likewise.
14 * Makefile.in: Likewise.
15
afac680a
NC		 162008-09-29 Nick Clifton <nickc@redhat.com>
17
18 * po/vi.po: Updated Vietnamese translation.
19 * po/fr.po: Updated French translation.
20
b40d5eb9
AK		 212008-09-26 Florian Krohm <fkrohm@us.ibm.com>
22
23 * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
24 (cfxr, cfdr, cfer, clclu): Add esa flag.
25 (sqd): Instruction added.
26 (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
27 * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
28
d0411736
AM		 292008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
30
31 * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
32 (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
33
3e126784
L		 342008-09-11 H.J. Lu <hongjiu.lu@intel.com>
35
36 * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
37 * i386-tbl.h: Regenerated.
38
ddab3d59
JB		 392008-08-28 Jan Beulich <jbeulich@novell.com>
40
41 * i386-dis.c (dis386): Adjust far return mnemonics.
42 * i386-opc.tbl: Add retf.
43 * i386-tbl.h: Re-generate.
44
b19d5385
JB		 452008-08-28 Jan Beulich <jbeulich@novell.com>
46
47 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
48
1ca35711
L		 492008-08-28 H.J. Lu <hongjiu.lu@intel.com>
50
51 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
52 * ia64-gen.c (lookup_specifier): Likewise.
53
54 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
55 * ia64-raw.tbl: Likewise.
56 * ia64-waw.tbl: Likewise.
57 * ia64-asmtab.c: Regenerated.
58
515c56e7
L		 592008-08-27 H.J. Lu <hongjiu.lu@intel.com>
60
61 * i386-opc.tbl: Correct fidivr operand size.
62
63 * i386-tbl.h: Regenerated.
64
da594c4a
AM		 652008-08-24 Alan Modra <amodra@bigpond.net.au>
66
67 * configure.in: Update a number of obsolete autoconf macros.
68 * aclocal.m4: Regenerate.
69
a5ff0eb2
L		 702008-08-20 H.J. Lu <hongjiu.lu@intel.com>
71
72 AVX Programming Reference (August, 2008)
73 * i386-dis.c (PREFIX_VEX_38DB): New.
74 (PREFIX_VEX_38DC): Likewise.
75 (PREFIX_VEX_38DD): Likewise.
76 (PREFIX_VEX_38DE): Likewise.
77 (PREFIX_VEX_38DF): Likewise.
78 (PREFIX_VEX_3ADF): Likewise.
79 (VEX_LEN_38DB_P_2): Likewise.
80 (VEX_LEN_38DC_P_2): Likewise.
81 (VEX_LEN_38DD_P_2): Likewise.
82 (VEX_LEN_38DE_P_2): Likewise.
83 (VEX_LEN_38DF_P_2): Likewise.
84 (VEX_LEN_3ADF_P_2): Likewise.
85 (PREFIX_VEX_3A04): Updated.
86 (VEX_LEN_3A06_P_2): Likewise.
87 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
88 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
89 (x86_64_table): Likewise.
90 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
91 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
92 VEX_LEN_3ADF_P_2.
93
94 * i386-opc.tbl: Add AES + AVX instructions.
95 * i386-init.h: Regenerated.
96 * i386-tbl.h: Likewise.
97
7dc6076f
AK		 982008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
99
100 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
101 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
102
7357c5b6
AM		 1032008-08-15 Alan Modra <amodra@bigpond.net.au>
104
105 PR 6526
106 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
107 * Makefile.in: Regenerate.
108 * aclocal.m4: Regenerate.
109 * config.in: Regenerate.
110 * configure: Regenerate.
111
899d85be
AM		 1122008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
113
114 PR 6825
115 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
116
dfb07592
L		 1172008-08-12 H.J. Lu <hongjiu.lu@intel.com>
118
119 * i386-opc.tbl: Add syscall and sysret for Cpu64.
120
121 * i386-tbl.h: Regenerated.
122
323ee3f4
AM		 1232008-08-04 Alan Modra <amodra@bigpond.net.au>
124
125 * Makefile.am (POTFILES.in): Set LC_ALL=C.
126 * Makefile.in: Regenerate.
127 * po/POTFILES.in: Regenerate.
128
9b4e5766
PB		 1292008-08-01 Peter Bergner <bergner@vnet.ibm.com>
130
131 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
132 (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
133 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
134 * ppc-opc.c (insert_xt6): New static function.
135 (extract_xt6): Likewise.
136 (insert_xa6): Likewise.
137 (extract_xa6: Likewise.
138 (insert_xb6): Likewise.
139 (extract_xb6): Likewise.
140 (insert_xb6s): Likewise.
141 (extract_xb6s): Likewise.
142 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
143 XX3DM_MASK, PPCVSX): New.
144 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
145 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
146
20fd6e2e
PA		 1472008-08-01 Pedro Alves <pedro@codesourcery.com>
148
149 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
150 * Makefile.in: Regenerate.
151
a656ed5b
L		 1522008-08-01 H.J. Lu <hongjiu.lu@intel.com>
153
154 * i386-reg.tbl: Use Dw2Inval on AVX registers.
155 * i386-tbl.h: Regenerated.
156
081ba1b3
AM		 1572008-07-30 Michael J. Eager <eager@eagercon.com>
158
159 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
160 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
161 (insert_sprg, PPC405): Use PPC_OPCODE_405.
162 (powerpc_opcodes): Add Xilinx APU related opcodes.
163
0af1713e
AM		 1642008-07-30 Alan Modra <amodra@bigpond.net.au>
165
166 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
167
30c09090
RS		 1682008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
169
170 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
171
c27e721e
AN		 1722008-07-07 Adam Nemet <anemet@caviumnetworks.com>
173
174 * mips-opc.c (CP): New macro.
175 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
176 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
177 dmtc2 Octeon instructions.
178
bd2e2557
SS		 1792008-07-07 Stan Shebs <stan@codesourcery.com>
180
181 * dis-init.c (init_disassemble_info): Init endian_code field.
182 * arm-dis.c (print_insn): Disassemble code according to
183 setting of endian_code.
184 (print_insn_big_arm): Detect when BE8 extension flag has been set.
185
6ba2a415
RS		 1862008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
187
188 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
189 for ELF symbols.
190
c8187e15
PB		 1912008-06-25 Peter Bergner <bergner@vnet.ibm.com>
192
193 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
194 (print_ppc_disassembler_options): Likewise.
195 * ppc-opc.c (PPC464): Define.
196 (powerpc_opcodes): Add mfdcrux and mtdcrux.
197
7a283e07
RW		 1982008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
199
200 * configure: Regenerate.
201
fa452fa6
PB		 2022008-06-13 Peter Bergner <bergner@vnet.ibm.com>
203
204 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
205 ppc_cpu_t typedef.
206 (struct dis_private): New.
207 (POWERPC_DIALECT): New define.
208 (powerpc_dialect): Renamed to...
209 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
210 struct dis_private.
211 (print_insn_big_powerpc): Update for using structure in
212 info->private_data.
213 (print_insn_little_powerpc): Likewise.
214 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
215 (skip_optional_operands): Likewise.
216 (print_insn_powerpc): Likewise. Remove initialization of dialect.
217 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
218 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
219 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
220 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
221 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
222 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
223 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
224 param to be of type ppc_cpu_t. Update prototype.
225
bb35fb24
NC		 2262008-06-12 Adam Nemet <anemet@caviumnetworks.com>
227
228 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
229 +s, +S.
230 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
231 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
232 syncw, syncws, vm3mulu, vm0 and vmulu.
233
dd3cbb7e
NC		 234 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
235 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
236 seqi, sne and snei.
237
a5dabbb0
L		 2382008-05-30 H.J. Lu <hongjiu.lu@intel.com>
239
240 * i386-opc.tbl: Add vmovd with 64bit operand.
241 * i386-tbl.h: Regenerated.
242
725a9891
MS		 2432008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
244
245 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
246
cbc80391
L		 2472008-05-22 H.J. Lu <hongjiu.lu@intel.com>
248
249 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
250 * i386-tbl.h: Regenerated.
251
116615c5
L		 2522008-05-22 H.J. Lu <hongjiu.lu@intel.com>
253
254 PR gas/6517
255 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
256 into 32bit and 64bit. Remove Reg64|Qword and add
257 IgnoreSize|No_qSuf on 32bit version.
258 * i386-tbl.h: Regenerated.
259
d9479f2d
L		 2602008-05-21 H.J. Lu <hongjiu.lu@intel.com>
261
262 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
263 * i386-tbl.h: Regenerated.
264
3ce6fddb
NC		 2652008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
266
267 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
268
8944f3c2
AM		 2692008-05-14 Alan Modra <amodra@bigpond.net.au>
270
271 * Makefile.am: Run "make dep-am".
272 * Makefile.in: Regenerate.
273
f1f8f695
L		 2742008-05-02 H.J. Lu <hongjiu.lu@intel.com>
275
276 * i386-dis.c (MOVBE_Fixup): New.
277 (Mo): Likewise.
278 (PREFIX_0F3880): Likewise.
279 (PREFIX_0F3881): Likewise.
280 (PREFIX_0F38F0): Updated.
281 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
282 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
283 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
284
285 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
286 CPU_EPT_FLAGS.
287 (cpu_flags): Add CpuMovbe and CpuEPT.
288
289 * i386-opc.h (CpuMovbe): New.
290 (CpuEPT): Likewise.
291 (CpuLM): Updated.
292 (i386_cpu_flags): Add cpumovbe and cpuept.
293
294 * i386-opc.tbl: Add entries for movbe and EPT instructions.
295 * i386-init.h: Regenerated.
296 * i386-tbl.h: Likewise.
297
89aa3097
AN		 2982008-04-29 Adam Nemet <anemet@caviumnetworks.com>
299
300 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
301 the two drem and the two dremu macros.
302
39c5c168
AN		 3032008-04-28 Adam Nemet <anemet@caviumnetworks.com>
304
305 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
306 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
307 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
308 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
309
f04d18b7
DM		 3102008-04-25 David S. Miller <davem@davemloft.net>
311
312 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
313 instead of %sys_tick_cmpr, as suggested in architecture manuals.
314
6194aaab
L		 3152008-04-23 Paolo Bonzini <bonzini@gnu.org>
316
317 * aclocal.m4: Regenerate.
318 * configure: Regenerate.
319
1a6b486f
DM		 3202008-04-23 David S. Miller <davem@davemloft.net>
321
322 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
323 extended values.
324 (prefetch_table): Add missing values.
325
81f8a913
L		 3262008-04-22 H.J. Lu <hongjiu.lu@intel.com>
327
328 * i386-gen.c (opcode_modifiers): Add NoAVX.
329
330 * i386-opc.h (NoAVX): New.
331 (OldGcc): Updated.
332 (i386_opcode_modifier): Add noavx.
333
334 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
335 instructions which don't have AVX equivalent.
336 * i386-tbl.h: Regenerated.
337
dae39acc
L		 3382008-04-18 H.J. Lu <hongjiu.lu@intel.com>
339
340 * i386-dis.c (OP_VEX_FMA): New.
341 (OP_EX_VexImmW): Likewise.
342 (VexFMA): Likewise.
343 (Vex128FMA): Likewise.
344 (EXVexImmW): Likewise.
345 (get_vex_imm8): Likewise.
346 (OP_EX_VexReg): Likewise.
347 (vex_i4_done): Renamed to ...
348 (vex_w_done): This.
349 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
350 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
351 FMA instructions.
352 (print_insn): Updated.
353 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
354 (OP_REG_VexI4): Check invalid high registers.
355
ce886ab1
DR		 3562008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
357 Michael Meissner <michael.meissner@amd.com>
358
359 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
360 * i386-tbl.h: Regenerate from i386-opc.tbl.
8944f3c2 361
19a6653c
AM		 3622008-04-14 Edmar Wienskoski <edmar@freescale.com>
363
364 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
365 accept Power E500MC instructions.
366 (print_ppc_disassembler_options): Document -Me500mc.
367 * ppc-opc.c (DUIS, DUI, T): New.
368 (XRT, XRTRA): Likewise.
369 (E500MC): Likewise.
370 (powerpc_opcodes): Add new Power E500MC instructions.
371
112b7c50
AK		 3722008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
373
374 * s390-dis.c (init_disasm): Evaluate disassembler_options.
375 (print_s390_disassembler_options): New function.
376 * disassemble.c (disassembler_usage): Invoke
377 print_s390_disassembler_options.
378
7ff42648
AK		 3792008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
380
381 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
382 of local variables used for mnemonic parsing: prefix, suffix and
383 number.
384
45a5551e
AK		 3852008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
386
387 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
388 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
389 (s390_crb_extensions): New extensions table.
390 (insertExpandedMnemonic): Handle '$' tag.
391 * s390-opc.txt: Remove conditional jump variants which can now
392 be expanded automatically.
393 Replace '*' tag with '$' in the compare and branch instructions.
394
06c8514a
L		 3952008-04-07 H.J. Lu <hongjiu.lu@intel.com>
396
397 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
398 (PREFIX_VEX_3AXX): Likewis.
399
b122c285
L		 4002008-04-07 H.J. Lu <hongjiu.lu@intel.com>
401
402 * i386-opc.tbl: Remove 4 extra blank lines.
403
594ab6a3
L		 4042008-04-04 H.J. Lu <hongjiu.lu@intel.com>
405
406 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
407 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
408 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
409 * i386-opc.tbl: Likewise.
410
411 * i386-opc.h (CpuCLMUL): Renamed to ...
412 (CpuPCLMUL): This.
413 (CpuFMA): Updated.
414 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
415
416 * i386-init.h: Regenerated.
417
c0f3af97
L		 4182008-04-03 H.J. Lu <hongjiu.lu@intel.com>
419
420 * i386-dis.c (OP_E_register): New.
421 (OP_E_memory): Likewise.
422 (OP_VEX): Likewise.
423 (OP_EX_Vex): Likewise.
424 (OP_EX_VexW): Likewise.
425 (OP_XMM_Vex): Likewise.
426 (OP_XMM_VexW): Likewise.
427 (OP_REG_VexI4): Likewise.
428 (PCLMUL_Fixup): Likewise.
429 (VEXI4_Fixup): Likewise.
430 (VZERO_Fixup): Likewise.
431 (VCMP_Fixup): Likewise.
432 (VPERMIL2_Fixup): Likewise.
433 (rex_original): Likewise.
434 (rex_ignored): Likewise.
435 (Mxmm): Likewise.
436 (XMM): Likewise.
437 (EXxmm): Likewise.
438 (EXxmmq): Likewise.
439 (EXymmq): Likewise.
440 (Vex): Likewise.
441 (Vex128): Likewise.
442 (Vex256): Likewise.
443 (VexI4): Likewise.
444 (EXdVex): Likewise.
445 (EXqVex): Likewise.
446 (EXVexW): Likewise.
447 (EXdVexW): Likewise.
448 (EXqVexW): Likewise.
449 (XMVex): Likewise.
450 (XMVexW): Likewise.
451 (XMVexI4): Likewise.
452 (PCLMUL): Likewise.
453 (VZERO): Likewise.
454 (VCMP): Likewise.
455 (VPERMIL2): Likewise.
456 (xmm_mode): Likewise.
457 (xmmq_mode): Likewise.
458 (ymmq_mode): Likewise.
459 (vex_mode): Likewise.
460 (vex128_mode): Likewise.
461 (vex256_mode): Likewise.
462 (USE_VEX_C4_TABLE): Likewise.
463 (USE_VEX_C5_TABLE): Likewise.
464 (USE_VEX_LEN_TABLE): Likewise.
465 (VEX_C4_TABLE): Likewise.
466 (VEX_C5_TABLE): Likewise.
467 (VEX_LEN_TABLE): Likewise.
468 (REG_VEX_XX): Likewise.
469 (MOD_VEX_XXX): Likewise.
470 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
471 (PREFIX_0F3A44): Likewise.
472 (PREFIX_0F3ADF): Likewise.
473 (PREFIX_VEX_XXX): Likewise.
474 (VEX_OF): Likewise.
475 (VEX_OF38): Likewise.
476 (VEX_OF3A): Likewise.
477 (VEX_LEN_XXX): Likewise.
478 (vex): Likewise.
479 (need_vex): Likewise.
480 (need_vex_reg): Likewise.
481 (vex_i4_done): Likewise.
482 (vex_table): Likewise.
483 (vex_len_table): Likewise.
484 (OP_REG_VexI4): Likewise.
485 (vex_cmp_op): Likewise.
486 (pclmul_op): Likewise.
487 (vpermil2_op): Likewise.
488 (m_mode): Updated.
489 (es_reg): Likewise.
490 (PREFIX_0F38F0): Likewise.
491 (PREFIX_0F3A60): Likewise.
492 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
493 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
494 and PREFIX_VEX_XXX entries.
495 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
496 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
497 PREFIX_0F3ADF.
498 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
499 Add MOD_VEX_XXX entries.
500 (ckprefix): Initialize rex_original and rex_ignored. Store the
501 REX byte in rex_original.
502 (get_valid_dis386): Handle the implicit prefix in VEX prefix
503 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
504 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
505 calling get_valid_dis386. Use rex_original and rex_ignored when
506 printing out REX.
507 (putop): Handle "XY".
508 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
509 ymmq_mode.
510 (OP_E_extended): Updated to use OP_E_register and
511 OP_E_memory.
512 (OP_XMM): Handle VEX.
513 (OP_EX): Likewise.
514 (XMM_Fixup): Likewise.
515 (CMP_Fixup): Use ARRAY_SIZE.
516
517 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
518 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
519 (operand_type_init): Add OPERAND_TYPE_REGYMM and
520 OPERAND_TYPE_VEX_IMM4.
521 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
522 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
523 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
524 VexImmExt and SSE2AVX.
525 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
526
527 * i386-opc.h (CpuAVX): New.
528 (CpuAES): Likewise.
529 (CpuCLMUL): Likewise.
530 (CpuFMA): Likewise.
531 (Vex): Likewise.
532 (Vex256): Likewise.
533 (VexNDS): Likewise.
534 (VexNDD): Likewise.
535 (VexW0): Likewise.
536 (VexW1): Likewise.
537 (Vex0F): Likewise.
538 (Vex0F38): Likewise.
539 (Vex0F3A): Likewise.
540 (Vex3Sources): Likewise.
541 (VexImmExt): Likewise.
542 (SSE2AVX): Likewise.
543 (RegYMM): Likewise.
544 (Ymmword): Likewise.
545 (Vex_Imm4): Likewise.
546 (Implicit1stXmm0): Likewise.
547 (CpuXsave): Updated.
548 (CpuLM): Likewise.
549 (ByteOkIntel): Likewise.
550 (OldGcc): Likewise.
551 (Control): Likewise.
552 (Unspecified): Likewise.
553 (OTMax): Likewise.
554 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
555 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
556 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
557 vex3sources, veximmext and sse2avx.
558 (i386_operand_type): Add regymm, ymmword and vex_imm4.
559
560 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
561
562 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
563
564 * i386-init.h: Regenerated.
565 * i386-tbl.h: Likewise.
566
b21c9cb4
BS		 5672008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
568
569 From Robin Getz <robin.getz@analog.com>
570 * bfin-dis.c (bu32): Typedef.
571 (enum const_forms_t): Add c_uimm32 and c_huimm32.
572 (constant_formats[]): Add uimm32 and huimm16.
573 (fmtconst_val): New.
574 (uimm32): Define.
575 (huimm32): Define.
576 (imm16_val): Define.
577 (luimm16_val): Define.
578 (struct saved_state): Define.
579 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
580 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
581 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
582 (get_allreg): New.
583 (decode_LDIMMhalf_0): Print out the whole register value.
584
ee171c8f
BS		 585 From Jie Zhang <jie.zhang@analog.com>
586 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
587 multiply and multiply-accumulate to data register instruction.
588
086134ec
BS		 589 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
590 c_imm32, c_huimm32e): Define.
591 (constant_formats): Add flags for printing decimal, leading spaces, and
592 exact symbols.
593 (comment, parallel): Add global flags in all disassembly.
594 (fmtconst): Take advantage of new flags, and print default in hex.
595 (fmtconst_val): Likewise.
596 (decode_macfunc): Be consistant with spaces, tabs, comments,
597 capitalization in disassembly, fix minor coding style issues.
598 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
599 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
600 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
601 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
602 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
603 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
604 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
605 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
606 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
607 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
608 _print_insn_bfin, print_insn_bfin): Likewise.
609
58c85be7
RW		 6102008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
611
612 * aclocal.m4: Regenerate.
613 * configure: Likewise.
614 * Makefile.in: Likewise.
615
50e7d84b
AM		 6162008-03-13 Alan Modra <amodra@bigpond.net.au>
617
618 * Makefile.am: Run "make dep-am".
619 * Makefile.in: Regenerate.
620 * configure: Regenerate.
621
de866fcc
AM		 6222008-03-07 Alan Modra <amodra@bigpond.net.au>
623
624 * ppc-opc.c (powerpc_opcodes): Order and format.
625
28dbc079
L		 6262008-03-01 H.J. Lu <hongjiu.lu@intel.com>
627
628 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
629 * i386-tbl.h: Regenerated.
630
849830bd
L		 6312008-02-23 H.J. Lu <hongjiu.lu@intel.com>
632
633 * i386-opc.tbl: Disallow 16-bit near indirect branches for
634 x86-64.
635 * i386-tbl.h: Regenerated.
636
743ddb6b
JB		 6372008-02-21 Jan Beulich <jbeulich@novell.com>
638
639 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
640 and Fword for far indirect jmp. Allow Reg16 and Word for near
641 indirect jmp on x86-64. Disallow Fword for lcall.
642 * i386-tbl.h: Re-generate.
643
796d5313
NC		 6442008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
645
646 * cr16-opc.c (cr16_num_optab): Defined
647
65da13b5
L		 6482008-02-16 H.J. Lu <hongjiu.lu@intel.com>
649
650 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
651 * i386-init.h: Regenerated.
652
0e336180
NC		 6532008-02-14 Nick Clifton <nickc@redhat.com>
654
655 PR binutils/5524
656 * configure.in (SHARED_LIBADD): Select the correct host specific
657 file extension for shared libraries.
658 * configure: Regenerate.
659
b7240065
JB		 6602008-02-13 Jan Beulich <jbeulich@novell.com>
661
662 * i386-opc.h (RegFlat): New.
663 * i386-reg.tbl (flat): Add.
664 * i386-tbl.h: Re-generate.
665
34b772a6
JB		 6662008-02-13 Jan Beulich <jbeulich@novell.com>
667
668 * i386-dis.c (a_mode): New.
669 (cond_jump_mode): Adjust.
670 (Ma): Change to a_mode.
671 (intel_operand_size): Handle a_mode.
672 * i386-opc.tbl: Allow Dword and Qword for bound.
673 * i386-tbl.h: Re-generate.
674
a60de03c
JB		 6752008-02-13 Jan Beulich <jbeulich@novell.com>
676
677 * i386-gen.c (process_i386_registers): Process new fields.
678 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
679 unsigned char. Add dw2_regnum and Dw2Inval.
680 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
681 register names.
682 * i386-tbl.h: Re-generate.
683
f03fe4c1
L		 6842008-02-11 H.J. Lu <hongjiu.lu@intel.com>
685
4b6bc8eb 686 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
f03fe4c1
L		 687 * i386-init.h: Updated.
688
475a2301
L		 6892008-02-11 H.J. Lu <hongjiu.lu@intel.com>
690
691 * i386-gen.c (cpu_flags): Add CpuXsave.
692
693 * i386-opc.h (CpuXsave): New.
4b6bc8eb 694 (CpuLM): Updated.
475a2301
L		 695 (i386_cpu_flags): Add cpuxsave.
696
697 * i386-dis.c (MOD_0FAE_REG_4): New.
698 (RM_0F01_REG_2): Likewise.
699 (MOD_0FAE_REG_5): Updated.
700 (RM_0F01_REG_3): Likewise.
701 (reg_table): Use MOD_0FAE_REG_4.
702 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
703 for xrstor.
704 (rm_table): Add RM_0F01_REG_2.
705
706 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
707 * i386-init.h: Regenerated.
708 * i386-tbl.h: Likewise.
709
595785c6 7102008-02-11 Jan Beulich <jbeulich@novell.com>
041179fc 711
595785c6
JB		 712 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
713 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
714 * i386-tbl.h: Re-generate.
715
bb8541b9
L		 7162008-02-04 H.J. Lu <hongjiu.lu@intel.com>
717
718 PR 5715
719 * configure: Regenerated.
720
57b592a3
AN		 7212008-02-04 Adam Nemet <anemet@caviumnetworks.com>
722
723 * mips-dis.c: Update copyright.
724 (mips_arch_choices): Add Octeon.
725 * mips-opc.c: Update copyright.
726 (IOCT): New macro.
727 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
728
930bb4cf
AM		 7292008-01-29 Alan Modra <amodra@bigpond.net.au>
730
731 * ppc-opc.c: Support optional L form mtmsr.
732
82c18208
L		 7332008-01-24 H.J. Lu <hongjiu.lu@intel.com>
734
735 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
736
599121aa
L		 7372008-01-23 H.J. Lu <hongjiu.lu@intel.com>
738
739 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
740 * i386-init.h: Regenerated.
741
80098f51
TG		 7422008-01-23 Tristan Gingold <gingold@adacore.com>
743
744 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
745 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
746
115c7c25
L		 7472008-01-22 H.J. Lu <hongjiu.lu@intel.com>
748
749 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
750 (cpu_flags): Likewise.
751
752 * i386-opc.h (CpuMMX2): Removed.
753 (CpuSSE): Updated.
754
755 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
756 * i386-init.h: Regenerated.
757 * i386-tbl.h: Likewise.
758
6305a203
L		 7592008-01-22 H.J. Lu <hongjiu.lu@intel.com>
760
761 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
762 CPU_SMX_FLAGS.
763 * i386-init.h: Regenerated.
764
fd07a1c8
L		 7652008-01-15 H.J. Lu <hongjiu.lu@intel.com>
766
767 * i386-opc.tbl: Use Qword on movddup.
768 * i386-tbl.h: Regenerated.
769
321fd21e
L		 7702008-01-15 H.J. Lu <hongjiu.lu@intel.com>
771
772 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
773 * i386-tbl.h: Regenerated.
774
4ee52178
L		 7752008-01-15 H.J. Lu <hongjiu.lu@intel.com>
776
777 * i386-dis.c (Mx): New.
778 (PREFIX_0FC3): Likewise.
779 (PREFIX_0FC7_REG_6): Updated.
780 (dis386_twobyte): Use PREFIX_0FC3.
781 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
782 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
783 movntss.
784
5c07affc
L		 7852008-01-14 H.J. Lu <hongjiu.lu@intel.com>
786
787 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
788 (operand_types): Add Mem.
789
790 * i386-opc.h (IntelSyntax): New.
791 * i386-opc.h (Mem): New.
792 (Byte): Updated.
793 (Opcode_Modifier_Max): Updated.
794 (i386_opcode_modifier): Add intelsyntax.
795 (i386_operand_type): Add mem.
796
797 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
798 instructions.
799
800 * i386-reg.tbl: Add size for accumulator.
801
802 * i386-init.h: Regenerated.
803 * i386-tbl.h: Likewise.
804
0d6a2f58
L		 8052008-01-13 H.J. Lu <hongjiu.lu@intel.com>
806
807 * i386-opc.h (Byte): Fix a typo.
808
7d5e4556
L		 8092008-01-12 H.J. Lu <hongjiu.lu@intel.com>
810
811 PR gas/5534
812 * i386-gen.c (operand_type_init): Add Dword to
813 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
814 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
815 Qword and Xmmword.
816 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
817 Xmmword, Unspecified and Anysize.
818 (set_bitfield): Make Mmword an alias of Qword. Make Oword
819 an alias of Xmmword.
820
821 * i386-opc.h (CheckSize): Removed.
822 (Byte): Updated.
823 (Word): Likewise.
824 (Dword): Likewise.
825 (Qword): Likewise.
826 (Xmmword): Likewise.
827 (FWait): Updated.
828 (OTMax): Likewise.
829 (i386_opcode_modifier): Remove checksize, byte, word, dword,
830 qword and xmmword.
831 (Fword): New.
832 (TBYTE): Likewise.
833 (Unspecified): Likewise.
834 (Anysize): Likewise.
835 (i386_operand_type): Add byte, word, dword, fword, qword,
836 tbyte xmmword, unspecified and anysize.
837
838 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
839 Tbyte, Xmmword, Unspecified and Anysize.
840
841 * i386-reg.tbl: Add size for accumulator.
842
843 * i386-init.h: Regenerated.
844 * i386-tbl.h: Likewise.
845
b5b1fc4f
L		 8462008-01-10 H.J. Lu <hongjiu.lu@intel.com>
847
848 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
849 (REG_0F18): Updated.
850 (reg_table): Updated.
851 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
852 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
853
50e8458f
L		 8542008-01-08 H.J. Lu <hongjiu.lu@intel.com>
855
856 * i386-gen.c (set_bitfield): Use fail () on error.
857
3d4d5afa
L		 8582008-01-08 H.J. Lu <hongjiu.lu@intel.com>
859
860 * i386-gen.c (lineno): New.
861 (filename): Likewise.
862 (set_bitfield): Report filename and line numer on error.
863 (process_i386_opcodes): Set filename and update lineno.
864 (process_i386_registers): Likewise.
865
e1d4d893
L		 8662008-01-05 H.J. Lu <hongjiu.lu@intel.com>
867
868 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
869 ATTSyntax.
870
871 * i386-opc.h (IntelMnemonic): Renamed to ..
872 (ATTSyntax): This
873 (Opcode_Modifier_Max): Updated.
874 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
875 and intelsyntax.
876
8944f3c2 877 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
e1d4d893
L		 878 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
879 * i386-tbl.h: Regenerated.
880
6f143e4d
L		 8812008-01-04 H.J. Lu <hongjiu.lu@intel.com>
882
883 * i386-gen.c: Update copyright to 2008.
884 * i386-opc.h: Likewise.
885 * i386-opc.tbl: Likewise.
886
887 * i386-init.h: Regenerated.
888 * i386-tbl.h: Likewise.
889
c6add537
L		 8902008-01-04 H.J. Lu <hongjiu.lu@intel.com>
891
892 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
893 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
894 * i386-tbl.h: Regenerated.
895
3629bb00
L		 8962008-01-03 H.J. Lu <hongjiu.lu@intel.com>
897
898 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
899 CpuSSE4_2_Or_ABM.
900 (cpu_flags): Likewise.
901
902 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
903 (CpuSSE4_2_Or_ABM): Likewise.
904 (CpuLM): Updated.
905 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
906
907 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
908 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
909 and CpuPadLock, respectively.
910 * i386-init.h: Regenerated.
911 * i386-tbl.h: Likewise.
912
24995bd6
L		 9132008-01-03 H.J. Lu <hongjiu.lu@intel.com>
914
915 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
916
917 * i386-opc.h (No_xSuf): Removed.
918 (CheckSize): Updated.
919
920 * i386-tbl.h: Regenerated.
921
e0329a22
L		 9222008-01-02 H.J. Lu <hongjiu.lu@intel.com>
923
924 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
925 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
926 CPU_SSE5_FLAGS.
927 (cpu_flags): Add CpuSSE4_2_Or_ABM.
928
929 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
930 (CpuLM): Updated.
931 (i386_cpu_flags): Add cpusse4_2_or_abm.
932
933 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
934 CpuABM|CpuSSE4_2 on popcnt.
935 * i386-init.h: Regenerated.
936 * i386-tbl.h: Likewise.
937
f2a9c676
L		 9382008-01-02 H.J. Lu <hongjiu.lu@intel.com>
939
940 * i386-opc.h: Update comments.
941
d978b5be
L		 9422008-01-02 H.J. Lu <hongjiu.lu@intel.com>
943
944 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
945 * i386-opc.h: Likewise.
946 * i386-opc.tbl: Likewise.
947
582d5edd
L		 9482008-01-02 H.J. Lu <hongjiu.lu@intel.com>
949
950 PR gas/5534
951 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
952 Byte, Word, Dword, QWord and Xmmword.
953
954 * i386-opc.h (No_xSuf): New.
955 (CheckSize): Likewise.
956 (Byte): Likewise.
957 (Word): Likewise.
958 (Dword): Likewise.
959 (QWord): Likewise.
960 (Xmmword): Likewise.
961 (FWait): Updated.
962 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
963 Dword, QWord and Xmmword.
964
965 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
966 used.
967 * i386-tbl.h: Regenerated.
968
3fe15143
MK		 9692008-01-02 Mark Kettenis <kettenis@gnu.org>
970
971 * m88k-dis.c (instructions): Fix fcvt.* instructions.
972 From Miod Vallat.
973
6c7ac64e 974For older changes see ChangeLog-2007
252b5132
RH		 975\f
976Local Variables:
2f6d2f85
NC		 977mode: change-log
978left-margin: 8
979fill-column: 74
252b5132
RH		 980version-control: never
981End:
GDB Binutils - Deliverables
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