[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add {vex} pseudo prefix.
	* i386-tbl.h: Regenerated.

2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR 25376
	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	(neon_opcodes): Likewise.
	(select_arm_features): Make sure we enable MVE bits when selecting
	armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
	any architecture.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl: Drop stale comment from XOP section.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	(extractps): Add VexWIG to SSE2AVX forms.
	* i386-tbl.h: Re-generate.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	Size64 from and use VexW1 on SSE2AVX forms.
	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	* i386-tbl.h: Re-generate.

2020-01-15  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_version): Make unsigned long.
	(optab, optab_special, registernames): New file scope vars.
	(tic4x_print_register): Set up registernames rather than
	malloc'd registertable.
	(tic4x_disassemble): Delete optable and optable_special.  Use
	optab and optab_special instead.  Throw away old optab,
	optab_special and registernames when info->mach changes.

2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25377
	* z80-dis.c (suffix): Use .db instruction to generate double
	prefix.

2020-01-14  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
	values to unsigned before shifting.

2020-01-13  Thomas Troeger  <tstroege@gmx.de>

	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	flow instructions.
	(print_insn_thumb16, print_insn_thumb32): Likewise.
	(print_insn): Initialize the insn info.
	* i386-dis.c (print_insn): Initialize the insn info fields, and
	detect jumps.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

	* arc-opc.c (C_NE): Make it required.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

        * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	reserved register name.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
	result of wasm_read_leb128 in a uint64_t and check that bits
	are not lost when copying to other locals.  Use uint32_t for
	most locals.  Use PRId64 when printing int64_t.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c: Formatting.
	* score7-dis.c: Formatting.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c (print_insn_score48): Use unsigned variables for
	unsigned values.  Don't left shift negative values.
	(print_insn_score32): Likewise.
	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_print_register): Remove dead code.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* fr30-ibld.c: Regenerate.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* xgate-dis.c (print_insn): Don't left shift signed value.
	(ripBits): Formatting, use 1u.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	* tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	and XRREG value earlier to avoid a shift with negative exponent.
	* m10200-dis.c (disassemble): Similarly.

2020-01-09  Nick Clifton  <nickc@redhat.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use correct cast.

2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use character constant when checking
	opcode byte value.

2020-01-09  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (SEP_Fixup): New.
	(SEP): Define.
	(dis386_twobyte): Use it for sysenter/sysexit.
	(enum x86_64_isa): Change amd64 enumerator to value 1.
	(OP_J): Compare isa64 against intel64 instead of amd64.
	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	forms.
	* i386-tbl.h: Re-generate.

2020-01-08  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c: Include libiberty.h
	(instr_data_s): Make max_fetched unsigned.
	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	Don't exceed byte_info bounds.
	(output_instr): Make num_bytes unsigned.
	(unpack_instr): Likewise for nibl_count and loop.
	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	idx unsigned.
	* z8k-opc.h: Regenerate.

2020-01-07  Shahab Vahedi  <shahab@synopsys.com>

	* arc-tbl.h (llock): Use 'LLOCK' as class.
	(llockd): Likewise.
	(scond): Use 'SCOND' as class.
	(scondd): Likewise.
	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	(scondd): Likewise.

2020-01-06  Alan Modra  <amodra@gmail.com>

	* m32c-ibld.c: Regenerate.

2020-01-06  Alan Modra  <amodra@gmail.com>

	PR 25344
	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	Peek at next byte to prevent recursion on repeated prefix bytes.
	Ensure uninitialised "mybuf" is not accessed.
	(print_insn_z80): Don't zero n_fetch and n_used here,..
	(print_insn_z80_buf): ..do it here instead.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* m32r-ibld.c: Regenerate.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Use
	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
	forms of SUDOT and USDOT.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
	uzip{1,2}.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
	FMMLA encoding.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>

	* z80-dis.c: Add support for eZ80 and Z80 instructions.

2020-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2019
\f
Copyright (C) 2020 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
42e04b36 L	1	2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
	2
	3	* i386-opc.tbl: Add {vex} pseudo prefix.
	4	* i386-tbl.h: Regenerated.
	5
2da2eaf4 AV	6	2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
	7
	8	PR 25376
	9	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	10	(neon_opcodes): Likewise.
	11	(select_arm_features): Make sure we enable MVE bits when selecting
	12	armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
	13	any architecture.
	14
d0849eed JB	15	2020-01-16 Jan Beulich <jbeulich@suse.com>
	16
	17	* i386-opc.tbl: Drop stale comment from XOP section.
	18
9cf70a44 JB	19	2020-01-16 Jan Beulich <jbeulich@suse.com>
	20
	21	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	22	(extractps): Add VexWIG to SSE2AVX forms.
	23	* i386-tbl.h: Re-generate.
	24
4814632e JB	25	2020-01-16 Jan Beulich <jbeulich@suse.com>
	26
	27	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	28	Size64 from and use VexW1 on SSE2AVX forms.
	29	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	30	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	31	* i386-tbl.h: Re-generate.
	32
aad09917 AM	33	2020-01-15 Alan Modra <amodra@gmail.com>
	34
	35	* tic4x-dis.c (tic4x_version): Make unsigned long.
	36	(optab, optab_special, registernames): New file scope vars.
	37	(tic4x_print_register): Set up registernames rather than
	38	malloc'd registertable.
	39	(tic4x_disassemble): Delete optable and optable_special. Use
	40	optab and optab_special instead. Throw away old optab,
	41	optab_special and registernames when info->mach changes.
	42
7a6bf3be SB	43	2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
	44
	45	PR 25377
	46	* z80-dis.c (suffix): Use .db instruction to generate double
	47	prefix.
	48
ca1eaac0 AM	49	2020-01-14 Alan Modra <amodra@gmail.com>
	50
	51	* z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
	52	values to unsigned before shifting.
	53
1d67fe3b TT	54	2020-01-13 Thomas Troeger <tstroege@gmx.de>
	55
	56	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	57	flow instructions.
	58	(print_insn_thumb16, print_insn_thumb32): Likewise.
	59	(print_insn): Initialize the insn info.
	60	* i386-dis.c (print_insn): Initialize the insn info fields, and
	61	detect jumps.
	62
5e4f7e05 CZ	63	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	64
	65	* arc-opc.c (C_NE): Make it required.
	66
b9fe6b8a CZ	67	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	68
	69	* opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	70	reserved register name.
	71
90dee485 AM	72	2020-01-13 Alan Modra <amodra@gmail.com>
	73
	74	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	75	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.
	76
febda64f AM	77	2020-01-13 Alan Modra <amodra@gmail.com>
	78
	79	* wasm32-dis.c (print_insn_wasm32): Localise variables. Store
	80	result of wasm_read_leb128 in a uint64_t and check that bits
	81	are not lost when copying to other locals. Use uint32_t for
	82	most locals. Use PRId64 when printing int64_t.
	83
df08b588 AM	84	2020-01-13 Alan Modra <amodra@gmail.com>
	85
	86	* score-dis.c: Formatting.
	87	* score7-dis.c: Formatting.
	88
b2c759ce AM	89	2020-01-13 Alan Modra <amodra@gmail.com>
	90
	91	* score-dis.c (print_insn_score48): Use unsigned variables for
	92	unsigned values. Don't left shift negative values.
	93	(print_insn_score32): Likewise.
	94	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
	95
5496abe1 AM	96	2020-01-13 Alan Modra <amodra@gmail.com>
	97
	98	* tic4x-dis.c (tic4x_print_register): Remove dead code.
	99
202e762b AM	100	2020-01-13 Alan Modra <amodra@gmail.com>
	101
	102	* fr30-ibld.c: Regenerate.
	103
7ef412cf AM	104	2020-01-13 Alan Modra <amodra@gmail.com>
	105
	106	* xgate-dis.c (print_insn): Don't left shift signed value.
	107	(ripBits): Formatting, use 1u.
	108
7f578b95 AM	109	2020-01-10 Alan Modra <amodra@gmail.com>
	110
	111	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	112	* tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
	113
441af85b AM	114	2020-01-10 Alan Modra <amodra@gmail.com>
	115
	116	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	117	and XRREG value earlier to avoid a shift with negative exponent.
	118	* m10200-dis.c (disassemble): Similarly.
	119
bce58db4 NC	120	2020-01-09 Nick Clifton <nickc@redhat.com>
	121
	122	PR 25224
	123	* z80-dis.c (ld_ii_ii): Use correct cast.
	124
40c75bc8 SB	125	2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
	126
	127	PR 25224
	128	* z80-dis.c (ld_ii_ii): Use character constant when checking
	129	opcode byte value.
	130
d835a58b JB	131	2020-01-09 Jan Beulich <jbeulich@suse.com>
	132
	133	* i386-dis.c (SEP_Fixup): New.
	134	(SEP): Define.
	135	(dis386_twobyte): Use it for sysenter/sysexit.
	136	(enum x86_64_isa): Change amd64 enumerator to value 1.
	137	(OP_J): Compare isa64 against intel64 instead of amd64.
	138	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	139	forms.
	140	* i386-tbl.h: Re-generate.
	141
030a2e78 AM	142	2020-01-08 Alan Modra <amodra@gmail.com>
	143
	144	* z8k-dis.c: Include libiberty.h
	145	(instr_data_s): Make max_fetched unsigned.
	146	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	147	Don't exceed byte_info bounds.
	148	(output_instr): Make num_bytes unsigned.
	149	(unpack_instr): Likewise for nibl_count and loop.
	150	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	151	idx unsigned.
	152	* z8k-opc.h: Regenerate.
	153
bb82aefe SV	154	2020-01-07 Shahab Vahedi <shahab@synopsys.com>
	155
	156	* arc-tbl.h (llock): Use 'LLOCK' as class.
	157	(llockd): Likewise.
	158	(scond): Use 'SCOND' as class.
	159	(scondd): Likewise.
	160	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	161	(scondd): Likewise.
	162
cc6aa1a6 AM	163	2020-01-06 Alan Modra <amodra@gmail.com>
	164
	165	* m32c-ibld.c: Regenerate.
	166
660e62b1 AM	167	2020-01-06 Alan Modra <amodra@gmail.com>
	168
	169	PR 25344
	170	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	171	Peek at next byte to prevent recursion on repeated prefix bytes.
	172	Ensure uninitialised "mybuf" is not accessed.
	173	(print_insn_z80): Don't zero n_fetch and n_used here,..
	174	(print_insn_z80_buf): ..do it here instead.
	175
c9ae58fe AM	176	2020-01-04 Alan Modra <amodra@gmail.com>
	177
	178	* m32r-ibld.c: Regenerate.
	179
5f57d4ec AM	180	2020-01-04 Alan Modra <amodra@gmail.com>
	181
	182	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
	183
2c5c1196 AM	184	2020-01-04 Alan Modra <amodra@gmail.com>
	185
	186	* crx-dis.c (match_opcode): Avoid shift left of signed value.
	187
2e98c6c5 AM	188	2020-01-04 Alan Modra <amodra@gmail.com>
	189
	190	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
	191
567dfba2 JB	192	2020-01-03 Jan Beulich <jbeulich@suse.com>
567dfba2 JB	193
5437a02a JB	194	* aarch64-tbl.h (aarch64_opcode_table): Use
	195	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
	196
	197	2020-01-03 Jan Beulich <jbeulich@suse.com>
	198
	199	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2 JB	200	forms of SUDOT and USDOT.
567dfba2 JB	201
8c45011a JB	202	2020-01-03 Jan Beulich <jbeulich@suse.com>
8c45011a JB	203
5437a02a	204	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a JB	205	uzip{1,2}.
	206	* opcodes/aarch64-dis-2.c: Re-generate.
	207
f4950f76 JB	208	2020-01-03 Jan Beulich <jbeulich@suse.com>
f4950f76 JB	209
5437a02a	210	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76 JB	211	FMMLA encoding.
	212	* opcodes/aarch64-dis-2.c: Re-generate.
	213
6655dba2 SB	214	2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
	215
	216	* z80-dis.c: Add support for eZ80 and Z80 instructions.
	217
b14ce8bf AM	218	2020-01-01 Alan Modra <amodra@gmail.com>
	219
	220	Update year range in copyright notice of all files.
	221
0b114740	222	For older changes see ChangeLog-2019
3499769a	223	\f
0b114740	224	Copyright (C) 2020 Free Software Foundation, Inc.
3499769a AM	225
	226	Copying and distribution of this file, with or without modification,
	227	are permitted in any medium without royalty provided the copyright
	228	notice and this notice are preserved.
	229
	230	Local Variables:
	231	mode: change-log
	232	left-margin: 8
	233	fill-column: 74
	234	version-control: never
	235	End: