[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>

	* cr16-opc.c  (cr16_num_optab): Defined

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	* i386-init.h: Regenerated.

2008-02-14  Nick Clifton  <nickc@redhat.com>

	PR binutils/5524
	* configure.in (SHARED_LIBADD): Select the correct host specific
	file extension for shared libraries.
	* configure: Regenerate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-02-11  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	* i386-tbl.h: Re-generate.

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>

	* mips-dis.c: Update copyright.
	(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.

2008-01-29  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c: Support optional L form mtmsr.

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.

2008-01-23  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (Byte): Fix a typo.

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (set_bitfield): Use fail () on error.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (lineno): New.
	(filename): Likewise.
	(set_bitfield): Report filename and line numer on error.
	(process_i386_opcodes): Set filename and update lineno.
	(process_i386_registers): Likewise.

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax 
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c: Update copyright to 2008.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.

2008-01-02  Mark Kettenis  <kettenis@gnu.org>

	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	From Miod Vallat.

For older changes see ChangeLog-2007
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
796d5313 NC	1	2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
	2
	3	* cr16-opc.c (cr16_num_optab): Defined
	4
65da13b5 L	5	2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
	6
	7	* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	8	* i386-init.h: Regenerated.
	9
0e336180 NC	10	2008-02-14 Nick Clifton <nickc@redhat.com>
	11
	12	PR binutils/5524
	13	* configure.in (SHARED_LIBADD): Select the correct host specific
	14	file extension for shared libraries.
	15	* configure: Regenerate.
	16
b7240065 JB	17	2008-02-13 Jan Beulich <jbeulich@novell.com>
	18
	19	* i386-opc.h (RegFlat): New.
	20	* i386-reg.tbl (flat): Add.
	21	* i386-tbl.h: Re-generate.
	22
34b772a6 JB	23	2008-02-13 Jan Beulich <jbeulich@novell.com>
	24
	25	* i386-dis.c (a_mode): New.
	26	(cond_jump_mode): Adjust.
	27	(Ma): Change to a_mode.
	28	(intel_operand_size): Handle a_mode.
	29	* i386-opc.tbl: Allow Dword and Qword for bound.
	30	* i386-tbl.h: Re-generate.
	31
a60de03c JB	32	2008-02-13 Jan Beulich <jbeulich@novell.com>
	33
	34	* i386-gen.c (process_i386_registers): Process new fields.
	35	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	36	unsigned char. Add dw2_regnum and Dw2Inval.
	37	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	38	register names.
	39	* i386-tbl.h: Re-generate.
	40
f03fe4c1 L	41	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
f03fe4c1 L	42
4b6bc8eb	43	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
f03fe4c1 L	44	* i386-init.h: Updated.
f03fe4c1 L	45
475a2301 L	46	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
	47
	48	* i386-gen.c (cpu_flags): Add CpuXsave.
	49
	50	* i386-opc.h (CpuXsave): New.
4b6bc8eb	51	(CpuLM): Updated.
475a2301 L	52	(i386_cpu_flags): Add cpuxsave.
	53
	54	* i386-dis.c (MOD_0FAE_REG_4): New.
	55	(RM_0F01_REG_2): Likewise.
	56	(MOD_0FAE_REG_5): Updated.
	57	(RM_0F01_REG_3): Likewise.
	58	(reg_table): Use MOD_0FAE_REG_4.
	59	(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
	60	for xrstor.
	61	(rm_table): Add RM_0F01_REG_2.
	62
	63	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	64	* i386-init.h: Regenerated.
	65	* i386-tbl.h: Likewise.
	66
595785c6	67	2008-02-11 Jan Beulich <jbeulich@novell.com>
041179fc	68
595785c6 JB	69	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	70	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	71	* i386-tbl.h: Re-generate.
	72
bb8541b9 L	73	2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
	74
	75	PR 5715
	76	* configure: Regenerated.
	77
57b592a3 AN	78	2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
	79
	80	* mips-dis.c: Update copyright.
	81	(mips_arch_choices): Add Octeon.
	82	* mips-opc.c: Update copyright.
	83	(IOCT): New macro.
	84	(mips_builtin_opcodes): Add Octeon instruction synciobdma.
	85
930bb4cf AM	86	2008-01-29 Alan Modra <amodra@bigpond.net.au>
	87
	88	* ppc-opc.c: Support optional L form mtmsr.
	89
82c18208 L	90	2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
	91
	92	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
	93
599121aa L	94	2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
	95
	96	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	97	* i386-init.h: Regenerated.
	98
80098f51 TG	99	2008-01-23 Tristan Gingold <gingold@adacore.com>
	100
	101	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	102	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
	103
115c7c25 L	104	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	105
	106	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	107	(cpu_flags): Likewise.
	108
	109	* i386-opc.h (CpuMMX2): Removed.
	110	(CpuSSE): Updated.
	111
	112	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE\|Cpu3dnowA.
	113	* i386-init.h: Regenerated.
	114	* i386-tbl.h: Likewise.
	115
6305a203 L	116	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	117
	118	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	119	CPU_SMX_FLAGS.
	120	* i386-init.h: Regenerated.
	121
fd07a1c8 L	122	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	123
	124	* i386-opc.tbl: Use Qword on movddup.
	125	* i386-tbl.h: Regenerated.
	126
321fd21e L	127	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	128
	129	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	130	* i386-tbl.h: Regenerated.
	131
4ee52178 L	132	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	133
	134	* i386-dis.c (Mx): New.
	135	(PREFIX_0FC3): Likewise.
	136	(PREFIX_0FC7_REG_6): Updated.
	137	(dis386_twobyte): Use PREFIX_0FC3.
	138	(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
	139	Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
	140	movntss.
	141
5c07affc L	142	2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
	143
	144	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	145	(operand_types): Add Mem.
	146
	147	* i386-opc.h (IntelSyntax): New.
	148	* i386-opc.h (Mem): New.
	149	(Byte): Updated.
	150	(Opcode_Modifier_Max): Updated.
	151	(i386_opcode_modifier): Add intelsyntax.
	152	(i386_operand_type): Add mem.
	153
	154	* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
	155	instructions.
	156
	157	* i386-reg.tbl: Add size for accumulator.
	158
	159	* i386-init.h: Regenerated.
	160	* i386-tbl.h: Likewise.
	161
0d6a2f58 L	162	2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
	163
	164	* i386-opc.h (Byte): Fix a typo.
	165
7d5e4556 L	166	2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
	167
	168	PR gas/5534
	169	* i386-gen.c (operand_type_init): Add Dword to
	170	OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
	171	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	172	Qword and Xmmword.
	173	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	174	Xmmword, Unspecified and Anysize.
	175	(set_bitfield): Make Mmword an alias of Qword. Make Oword
	176	an alias of Xmmword.
	177
	178	* i386-opc.h (CheckSize): Removed.
	179	(Byte): Updated.
	180	(Word): Likewise.
	181	(Dword): Likewise.
	182	(Qword): Likewise.
	183	(Xmmword): Likewise.
	184	(FWait): Updated.
	185	(OTMax): Likewise.
	186	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	187	qword and xmmword.
	188	(Fword): New.
	189	(TBYTE): Likewise.
	190	(Unspecified): Likewise.
	191	(Anysize): Likewise.
	192	(i386_operand_type): Add byte, word, dword, fword, qword,
	193	tbyte xmmword, unspecified and anysize.
	194
	195	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	196	Tbyte, Xmmword, Unspecified and Anysize.
	197
	198	* i386-reg.tbl: Add size for accumulator.
	199
	200	* i386-init.h: Regenerated.
	201	* i386-tbl.h: Likewise.
	202
b5b1fc4f L	203	2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
	204
	205	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	206	(REG_0F18): Updated.
	207	(reg_table): Updated.
	208	(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
	209	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
	210
50e8458f L	211	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	212
	213	* i386-gen.c (set_bitfield): Use fail () on error.
	214
3d4d5afa L	215	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	216
	217	* i386-gen.c (lineno): New.
	218	(filename): Likewise.
	219	(set_bitfield): Report filename and line numer on error.
	220	(process_i386_opcodes): Set filename and update lineno.
	221	(process_i386_registers): Likewise.
	222
e1d4d893 L	223	2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
	224
	225	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	226	ATTSyntax.
	227
	228	* i386-opc.h (IntelMnemonic): Renamed to ..
	229	(ATTSyntax): This
	230	(Opcode_Modifier_Max): Updated.
	231	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	232	and intelsyntax.
	233
	234	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	235	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	236	* i386-tbl.h: Regenerated.
	237
6f143e4d L	238	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	239
	240	* i386-gen.c: Update copyright to 2008.
	241	* i386-opc.h: Likewise.
	242	* i386-opc.tbl: Likewise.
	243
	244	* i386-init.h: Regenerated.
	245	* i386-tbl.h: Likewise.
	246
c6add537 L	247	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	248
	249	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	250	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	251	* i386-tbl.h: Regenerated.
	252
3629bb00 L	253	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	254
	255	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	256	CpuSSE4_2_Or_ABM.
	257	(cpu_flags): Likewise.
	258
	259	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	260	(CpuSSE4_2_Or_ABM): Likewise.
	261	(CpuLM): Updated.
	262	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
	263
	264	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	265	Cpu686\|CpuPadLock with CpuSSE4_1\|CpuSSE5, CpuABM\|CpuSSE4_2
	266	and CpuPadLock, respectively.
	267	* i386-init.h: Regenerated.
	268	* i386-tbl.h: Likewise.
	269
24995bd6 L	270	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	271
	272	* i386-gen.c (opcode_modifiers): Remove No_xSuf.
	273
	274	* i386-opc.h (No_xSuf): Removed.
	275	(CheckSize): Updated.
	276
	277	* i386-tbl.h: Regenerated.
	278
e0329a22 L	279	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	280
	281	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	282	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	283	CPU_SSE5_FLAGS.
	284	(cpu_flags): Add CpuSSE4_2_Or_ABM.
	285
	286	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	287	(CpuLM): Updated.
	288	(i386_cpu_flags): Add cpusse4_2_or_abm.
	289
	290	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	291	CpuABM\|CpuSSE4_2 on popcnt.
	292	* i386-init.h: Regenerated.
	293	* i386-tbl.h: Likewise.
	294
f2a9c676 L	295	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	296
	297	* i386-opc.h: Update comments.
	298
d978b5be L	299	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	300
	301	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	302	* i386-opc.h: Likewise.
	303	* i386-opc.tbl: Likewise.
	304
582d5edd L	305	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	306
	307	PR gas/5534
	308	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	309	Byte, Word, Dword, QWord and Xmmword.
	310
	311	* i386-opc.h (No_xSuf): New.
	312	(CheckSize): Likewise.
	313	(Byte): Likewise.
	314	(Word): Likewise.
	315	(Dword): Likewise.
	316	(QWord): Likewise.
	317	(Xmmword): Likewise.
	318	(FWait): Updated.
	319	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	320	Dword, QWord and Xmmword.
	321
	322	* i386-opc.tbl: Add CheckSize\|QWord to movq if IgnoreSize is
	323	used.
	324	* i386-tbl.h: Regenerated.
	325
3fe15143 MK	326	2008-01-02 Mark Kettenis <kettenis@gnu.org>
	327
	328	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	329	From Miod Vallat.
	330
6c7ac64e	331	For older changes see ChangeLog-2007
252b5132 RH	332	\f
252b5132 RH	333	Local Variables:
2f6d2f85 NC	334	mode: change-log
	335	left-margin: 8
	336	fill-column: 74
252b5132 RH	337	version-control: never
252b5132 RH	338	End: