[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (neg): New instruction variant.

2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>

	* arc-dis.c (find_format, find_format, get_auxreg)
	(print_insn_arc): Changed.
	* arc-ext.h (INSERT_XOP): Likewise.

2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* tic54x-dis.c (sprint_mmr): Adjust.
	* tic54x-opc.c: Likewise.

2016-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.

2016-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c: Formatting.
	(NSISIGNOPT): Define.
	(powerpc_opcodes <subis>): Use NSISIGNOPT.

2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	replacing references to `micromips_ase' throughout.
	(_print_insn_mips): Don't use file-level microMIPS annotation to
	determine the disassembly mode with the symbol table.

2016-05-13  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.

2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>

	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	mips64r6.
	* mips-opc.c (D34): New macro.
	(mips_builtin_opcodes): Define bposge32c for DSPr3.

2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>

	* i386-dis.c (prefix_table): Add RDPID instruction.
	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	(cpu_flags): Add RDPID bitfield.
	* i386-opc.h (enum): Add RDPID element.
	(i386_cpu_flags): Add RDPID field.
	* i386-opc.tbl: Add RDPID instruction.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Regenerate.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	branch type of a symbol.
	(print_insn): Likewise.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	Mainline Security Extensions instructions.
	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	Extensions instructions.
	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	instructions.
	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	special registers.

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.

2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	(arcExtMap_genOpcode): Likewise.
	* arc-opc.c (arg_32bit_rc): Define new variable.
	(arg_32bit_u6): Likewise.
	(arg_32bit_limm): Likewise.

2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-gen.c (VERIFIER): Define.
	* aarch64-opc.c (VERIFIER): Define.
	(verify_ldpsw): Use static linkage.
	* aarch64-opc.h (verify_ldpsw): Remove.
	* aarch64-tbl.h: Use VERIFIER for verifiers.

2016-04-28  Nick Clifton  <nickc@redhat.com>

	PR target/19722
	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
87789e08 CZ	1	2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
	2
	3	* arc-tbl.h (neg): New instruction variant.
	4
c810e0b8 CZ	5	2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
	6
	7	* arc-dis.c (find_format, find_format, get_auxreg)
	8	(print_insn_arc): Changed.
	9	* arc-ext.h (INSERT_XOP): Likewise.
	10
3d207518 TS	11	2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	12
	13	* tic54x-dis.c (sprint_mmr): Adjust.
	14	* tic54x-opc.c: Likewise.
	15
514e58b7 AM	16	2016-05-19 Alan Modra <amodra@gmail.com>
	17
	18	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
	19
e43de63c AM	20	2016-05-19 Alan Modra <amodra@gmail.com>
	21
	22	* ppc-opc.c: Formatting.
	23	(NSISIGNOPT): Define.
	24	(powerpc_opcodes <subis>): Use NSISIGNOPT.
	25
1401d2fe MR	26	2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
	27
	28	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	29	replacing references to `micromips_ase' throughout.
	30	(_print_insn_mips): Don't use file-level microMIPS annotation to
	31	determine the disassembly mode with the symbol table.
	32
1178da44 PB	33	2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
	34
	35	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
	36
8f4f9071 MF	37	2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
	38
	39	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	40	mips64r6.
	41	* mips-opc.c (D34): New macro.
	42	(mips_builtin_opcodes): Define bposge32c for DSPr3.
	43
8bc52696 AF	44	2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
	45
	46	* i386-dis.c (prefix_table): Add RDPID instruction.
	47	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	48	(cpu_flags): Add RDPID bitfield.
	49	* i386-opc.h (enum): Add RDPID element.
	50	(i386_cpu_flags): Add RDPID field.
	51	* i386-opc.tbl: Add RDPID instruction.
	52	* i386-init.h: Regenerate.
	53	* i386-tbl.h: Regenerate.
	54
39d911fc TP	55	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	56
	57	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	58	branch type of a symbol.
	59	(print_insn): Likewise.
	60
16a1fa25 TP	61	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	62
	63	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	64	Mainline Security Extensions instructions.
	65	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	66	Extensions instructions.
	67	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	68	instructions.
	69	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	70	special registers.
	71
d751b79e JM	72	2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
	73
	74	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
	75
945e0f82 CZ	76	2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
	77
	78	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	79	(arcExtMap_genOpcode): Likewise.
	80	* arc-opc.c (arg_32bit_rc): Define new variable.
	81	(arg_32bit_u6): Likewise.
	82	(arg_32bit_limm): Likewise.
	83
20f55f38 SN	84	2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
	85
	86	* aarch64-gen.c (VERIFIER): Define.
	87	* aarch64-opc.c (VERIFIER): Define.
	88	(verify_ldpsw): Use static linkage.
	89	* aarch64-opc.h (verify_ldpsw): Remove.
	90	* aarch64-tbl.h: Use VERIFIER for verifiers.
	91
4bd13cde NC	92	2016-04-28 Nick Clifton <nickc@redhat.com>
	93
	94	PR target/19722
	95	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	96	* aarch64-opc.c (verify_ldpsw): New function.
	97	* aarch64-opc.h (verify_ldpsw): New prototype.
	98	* aarch64-tbl.h: Add initialiser for verifier field.
	99	(LDPSW): Set verifier to verify_ldpsw.
	100
c0f92bf9 L	101	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	102
	103	PR binutils/19983
	104	PR binutils/19984
	105	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	106	smaller than address size.
	107
e6c7cdec TS	108	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	109
	110	* alpha-dis.c: Regenerate.
	111	* crx-dis.c: Likewise.
	112	* disassemble.c: Likewise.
	113	* epiphany-opc.c: Likewise.
	114	* fr30-opc.c: Likewise.
	115	* frv-opc.c: Likewise.
	116	* ip2k-opc.c: Likewise.
	117	* iq2000-opc.c: Likewise.
	118	* lm32-opc.c: Likewise.
	119	* lm32-opinst.c: Likewise.
	120	* m32c-opc.c: Likewise.
	121	* m32r-opc.c: Likewise.
	122	* m32r-opinst.c: Likewise.
	123	* mep-opc.c: Likewise.
	124	* mt-opc.c: Likewise.
	125	* or1k-opc.c: Likewise.
	126	* or1k-opinst.c: Likewise.
	127	* tic80-opc.c: Likewise.
	128	* xc16x-opc.c: Likewise.
	129	* xstormy16-opc.c: Likewise.
	130
537aefaf AB	131	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	132
	133	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	134	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	135	calcsd, and calcxd instructions.
	136	* arc-opc.c (insert_nps_bitop_size): Delete.
	137	(extract_nps_bitop_size): Delete.
	138	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	139	(extract_nps_qcmp_m3): Define.
	140	(extract_nps_qcmp_m2): Define.
	141	(extract_nps_qcmp_m1): Define.
	142	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	143	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	144	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	145	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	146	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	147	NPS_QCMP_M3.
	148
c8f785f2 AB	149	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	150
	151	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	152
6fd8e7c2 L	153	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	154
	155	* Makefile.in: Regenerated with automake 1.11.6.
	156	* aclocal.m4: Likewise.
	157
4b0c052e AB	158	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	159
	160	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	161	instructions.
	162	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	163	(extract_nps_cmem_uimm16): New function.
	164	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	165
cb040366 AB	166	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	167
	168	* arc-dis.c (arc_insn_length): New function.
	169	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	170	(find_format): Change insnLen parameter to unsigned.
	171
accc0180 NC	172	2016-04-13 Nick Clifton <nickc@redhat.com>
	173
	174	PR target/19937
	175	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	176	the LD.B and LD.BU instructions.
	177
f36e33da CZ	178	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	179
	180	* arc-dis.c (find_format): Check for extension flags.
	181	(print_flags): New function.
	182	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	183	.extAuxRegister.
	184	* arc-ext.c (arcExtMap_coreRegName): Use
	185	LAST_EXTENSION_CORE_REGISTER.
	186	(arcExtMap_coreReadWrite): Likewise.
	187	(dump_ARC_extmap): Update printing.
	188	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	189	(arc_aux_regs): Add cpu field.
	190	* arc-regs.h: Add cpu field, lower case name aux registers.
	191
1c2e355e CZ	192	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	193
	194	* arc-tbl.h: Add rtsc, sleep with no arguments.
	195
b99747ae CZ	196	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	197
	198	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	199	Initialize.
	200	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	201	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	202	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	203	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	204	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	205	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	206	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	207	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	208	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	209	(arc_opcode arc_opcodes): Null terminate the array.
	210	(arc_num_opcodes): Remove.
	211	* arc-ext.h (INSERT_XOP): Define.
	212	(extInstruction_t): Likewise.
	213	(arcExtMap_instName): Delete.
	214	(arcExtMap_insn): New function.
	215	(arcExtMap_genOpcode): Likewise.
	216	* arc-ext.c (ExtInstruction): Remove.
	217	(create_map): Zero initialize instruction fields.
	218	(arcExtMap_instName): Remove.
	219	(arcExtMap_insn): New function.
	220	(dump_ARC_extmap): More info while debuging.
	221	(arcExtMap_genOpcode): New function.
	222	* arc-dis.c (find_format): New function.
	223	(print_insn_arc): Use find_format.
	224	(arc_get_disassembler): Enable dump_ARC_extmap only when
	225	debugging.
	226
92708cec MR	227	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	228
	229	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	230	instruction bits out.
	231
a42a4f84 AB	232	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	233
	234	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	235	* arc-opc.c (arc_flag_operands): Add new flags.
	236	(arc_flag_classes): Add new classes.
	237
1328504b AB	238	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	239
	240	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	241
820f03ff AB	242	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	243
	244	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	245	encode1, rflt, crc16, and crc32 instructions.
	246	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	247	(arc_flag_classes): Add C_NPS_R.
	248	(insert_nps_bitop_size_2b): New function.
	249	(extract_nps_bitop_size_2b): Likewise.
	250	(insert_nps_bitop_uimm8): Likewise.
	251	(extract_nps_bitop_uimm8): Likewise.
	252	(arc_operands): Add new operand entries.
	253
8ddf6b2a CZ	254	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	255
b99747ae CZ	256	* arc-regs.h: Add a new subclass field. Add double assist
	257	accumulator register values.
	258	* arc-tbl.h: Use DPA subclass to mark the double assist
	259	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	260	* arc-opc.c (RSP): Define instead of SP.
	261	(arc_aux_regs): Add the subclass field.
8ddf6b2a	262
589a7d88 JW	263	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	264
	265	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	266
0a191de9	267	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	268
	269	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	270	NPS_R_SRC1.
	271
0a106562 AB	272	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	273
	274	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	275	issues. No functional changes.
	276
bd05ac5f CZ	277	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	278
b99747ae CZ	279	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	280	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	281	(RTT): Remove duplicate.
	282	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	283	(PCT_CONFIG*): Remove.
	284	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	285
9885948f CZ	286	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	287
b99747ae	288	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	289
f2dd8838 CZ	290	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	291
b99747ae CZ	292	* arc-tbl.h (invld07): Remove.
	293	* arc-ext-tbl.h: New file.
	294	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	295	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	296
0d2f91fe JK	297	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	298
	299	Fix -Wstack-usage warnings.
	300	* aarch64-dis.c (print_operands): Substitute size.
	301	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	302
a6b71f42 JM	303	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	304
	305	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	306	to get a proper diagnostic when an invalid ASR register is used.
	307
9780e045 NC	308	2016-03-22 Nick Clifton <nickc@redhat.com>
	309
	310	* configure: Regenerate.
	311
e23e8ebe AB	312	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	313
	314	* arc-nps400-tbl.h: New file.
	315	* arc-opc.c: Add top level comment.
	316	(insert_nps_3bit_dst): New function.
	317	(extract_nps_3bit_dst): New function.
	318	(insert_nps_3bit_src2): New function.
	319	(extract_nps_3bit_src2): New function.
	320	(insert_nps_bitop_size): New function.
	321	(extract_nps_bitop_size): New function.
	322	(arc_flag_operands): Add nps400 entries.
	323	(arc_flag_classes): Add nps400 entries.
	324	(arc_operands): Add nps400 entries.
	325	(arc_opcodes): Add nps400 include.
	326
1ae8ab47 AB	327	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	328
	329	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	330	the new class enum values.
	331
8699fc3e AB	332	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	333
	334	* arc-dis.c (print_insn_arc): Handle nps400.
	335
24740d83 AB	336	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	337
	338	* arc-opc.c (BASE): Delete.
	339
8678914f NC	340	2016-03-18 Nick Clifton <nickc@redhat.com>
	341
	342	PR target/19721
	343	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	344	of MOV insn that aliases an ORR insn.
	345
cc933301 JW	346	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	347
	348	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	349
f86f5863 TS	350	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	351
	352	* mcore-opc.h: Add const qualifiers.
	353	* microblaze-opc.h (struct op_code_struct): Likewise.
	354	* sh-opc.h: Likewise.
	355	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	356	(tic4x_print_op): Likewise.
	357
62de1c63 AM	358	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	359
d11698cd	360	* or1k-desc.h: Regenerate.
62de1c63	361	* fr30-ibld.c: Regenerate.
c697cf0b	362	* rl78-decode.c: Regenerate.
62de1c63	363
020efce5 NC	364	2016-03-01 Nick Clifton <nickc@redhat.com>
	365
	366	PR target/19747
	367	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	368
b0c11777 RL	369	2016-02-24 Renlin Li <renlin.li@arm.com>
	370
	371	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	372	(print_insn_coprocessor): Support fp16 instructions.
	373
3e309328 RL	374	2016-02-24 Renlin Li <renlin.li@arm.com>
	375
	376	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	377	vminnm, vrint(mpna).
	378
8afc7bea RL	379	2016-02-24 Renlin Li <renlin.li@arm.com>
	380
	381	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	382	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	383
4fd7268a L	384	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	385
	386	* i386-dis.c (print_insn): Parenthesize expression to prevent
	387	truncated addresses.
	388	(OP_J): Likewise.
	389
4670103e CZ	390	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	391	Janek van Oirschot <jvanoirs@synopsys.com>
	392
b99747ae CZ	393	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	394	variable.
4670103e	395
c1d9289f NC	396	2016-02-04 Nick Clifton <nickc@redhat.com>
	397
	398	PR target/19561
	399	* msp430-dis.c (print_insn_msp430): Add a special case for
	400	decoding an RRC instruction with the ZC bit set in the extension
	401	word.
	402
a143b004 AB	403	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	404
	405	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	406	* epiphany-ibld.c: Regenerate.
	407	* fr30-ibld.c: Regenerate.
	408	* frv-ibld.c: Regenerate.
	409	* ip2k-ibld.c: Regenerate.
	410	* iq2000-ibld.c: Regenerate.
	411	* lm32-ibld.c: Regenerate.
	412	* m32c-ibld.c: Regenerate.
	413	* m32r-ibld.c: Regenerate.
	414	* mep-ibld.c: Regenerate.
	415	* mt-ibld.c: Regenerate.
	416	* or1k-ibld.c: Regenerate.
	417	* xc16x-ibld.c: Regenerate.
	418	* xstormy16-ibld.c: Regenerate.
	419
b89807c6 AB	420	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	421
	422	* epiphany-dis.c: Regenerated from latest cpu files.
	423
d8c823c8 MM	424	2016-02-01 Michael McConville <mmcco@mykolab.com>
	425
	426	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	427	test bit.
	428
5bc5ae88 RL	429	2016-01-25 Renlin Li <renlin.li@arm.com>
	430
	431	* arm-dis.c (mapping_symbol_for_insn): New function.
	432	(find_ifthen_state): Call mapping_symbol_for_insn().
	433
0bff6e2d MW	434	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	435
	436	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	437	of MSR UAO immediate operand.
	438
100b4f2e MR	439	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	440
	441	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	442	instruction support.
	443
5c14705f AM	444	2016-01-17 Alan Modra <amodra@gmail.com>
	445
	446	* configure: Regenerate.
	447
4d82fe66 NC	448	2016-01-14 Nick Clifton <nickc@redhat.com>
	449
	450	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	451	instructions that can support stack pointer operations.
	452	* rl78-decode.c: Regenerate.
	453	* rl78-dis.c: Fix display of stack pointer in MOVW based
	454	instructions.
	455
651657fa MW	456	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	457
	458	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	459	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	460	erxtatus_el1 and erxaddr_el1.
	461
105bde57 MW	462	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	463
	464	* arm-dis.c (arm_opcodes): Add "esb".
	465	(thumb_opcodes): Likewise.
	466
afa8d405 PB	467	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	468
	469	* ppc-opc.c <xscmpnedp>: Delete.
	470	<xvcmpnedp>: Likewise.
	471	<xvcmpnedp.>: Likewise.
	472	<xvcmpnesp>: Likewise.
	473	<xvcmpnesp.>: Likewise.
	474
83c3256e AS	475	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	476
	477	PR gas/13050
	478	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	479	addition to ISA_A.
	480
6f2750fe AM	481	2016-01-01 Alan Modra <amodra@gmail.com>
	482
	483	Update year range in copyright notice of all files.
	484
3499769a AM	485	For older changes see ChangeLog-2015
	486	\f
	487	Copyright (C) 2016 Free Software Foundation, Inc.
	488
	489	Copying and distribution of this file, with or without modification,
	490	are permitted in any medium without royalty provided the copyright
	491	notice and this notice are preserved.
	492
	493	Local Variables:
	494	mode: change-log
	495	left-margin: 8
	496	fill-column: 74
	497	version-control: never
	498	End: