[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>

	* i386-dis.c (prefix_table): Add RDPID instruction.
	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	(cpu_flags): Add RDPID bitfield.
	* i386-opc.h (enum): Add RDPID element.
	(i386_cpu_flags): Add RDPID field.
	* i386-opc.tbl: Add RDPID instruction.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Regenerate.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	branch type of a symbol.
	(print_insn): Likewise.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	Mainline Security Extensions instructions.
	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	Extensions instructions.
	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	instructions.
	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	special registers.

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.

2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	(arcExtMap_genOpcode): Likewise.
	* arc-opc.c (arg_32bit_rc): Define new variable.
	(arg_32bit_u6): Likewise.
	(arg_32bit_limm): Likewise.

2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-gen.c (VERIFIER): Define.
	* aarch64-opc.c (VERIFIER): Define.
	(verify_ldpsw): Use static linkage.
	* aarch64-opc.h (verify_ldpsw): Remove.
	* aarch64-tbl.h: Use VERIFIER for verifiers.

2016-04-28  Nick Clifton  <nickc@redhat.com>

	PR target/19722
	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
8bc52696 AF	1	2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
	2
	3	* i386-dis.c (prefix_table): Add RDPID instruction.
	4	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	5	(cpu_flags): Add RDPID bitfield.
	6	* i386-opc.h (enum): Add RDPID element.
	7	(i386_cpu_flags): Add RDPID field.
	8	* i386-opc.tbl: Add RDPID instruction.
	9	* i386-init.h: Regenerate.
	10	* i386-tbl.h: Regenerate.
	11
39d911fc TP	12	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	13
	14	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	15	branch type of a symbol.
	16	(print_insn): Likewise.
	17
16a1fa25 TP	18	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	19
	20	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	21	Mainline Security Extensions instructions.
	22	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	23	Extensions instructions.
	24	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	25	instructions.
	26	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	27	special registers.
	28
d751b79e JM	29	2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
	30
	31	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
	32
945e0f82 CZ	33	2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
	34
	35	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	36	(arcExtMap_genOpcode): Likewise.
	37	* arc-opc.c (arg_32bit_rc): Define new variable.
	38	(arg_32bit_u6): Likewise.
	39	(arg_32bit_limm): Likewise.
	40
20f55f38 SN	41	2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
	42
	43	* aarch64-gen.c (VERIFIER): Define.
	44	* aarch64-opc.c (VERIFIER): Define.
	45	(verify_ldpsw): Use static linkage.
	46	* aarch64-opc.h (verify_ldpsw): Remove.
	47	* aarch64-tbl.h: Use VERIFIER for verifiers.
	48
4bd13cde NC	49	2016-04-28 Nick Clifton <nickc@redhat.com>
	50
	51	PR target/19722
	52	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	53	* aarch64-opc.c (verify_ldpsw): New function.
	54	* aarch64-opc.h (verify_ldpsw): New prototype.
	55	* aarch64-tbl.h: Add initialiser for verifier field.
	56	(LDPSW): Set verifier to verify_ldpsw.
	57
c0f92bf9 L	58	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	59
	60	PR binutils/19983
	61	PR binutils/19984
	62	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	63	smaller than address size.
	64
e6c7cdec TS	65	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	66
	67	* alpha-dis.c: Regenerate.
	68	* crx-dis.c: Likewise.
	69	* disassemble.c: Likewise.
	70	* epiphany-opc.c: Likewise.
	71	* fr30-opc.c: Likewise.
	72	* frv-opc.c: Likewise.
	73	* ip2k-opc.c: Likewise.
	74	* iq2000-opc.c: Likewise.
	75	* lm32-opc.c: Likewise.
	76	* lm32-opinst.c: Likewise.
	77	* m32c-opc.c: Likewise.
	78	* m32r-opc.c: Likewise.
	79	* m32r-opinst.c: Likewise.
	80	* mep-opc.c: Likewise.
	81	* mt-opc.c: Likewise.
	82	* or1k-opc.c: Likewise.
	83	* or1k-opinst.c: Likewise.
	84	* tic80-opc.c: Likewise.
	85	* xc16x-opc.c: Likewise.
	86	* xstormy16-opc.c: Likewise.
	87
537aefaf AB	88	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	89
	90	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	91	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	92	calcsd, and calcxd instructions.
	93	* arc-opc.c (insert_nps_bitop_size): Delete.
	94	(extract_nps_bitop_size): Delete.
	95	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	96	(extract_nps_qcmp_m3): Define.
	97	(extract_nps_qcmp_m2): Define.
	98	(extract_nps_qcmp_m1): Define.
	99	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	100	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	101	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	102	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	103	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	104	NPS_QCMP_M3.
	105
c8f785f2 AB	106	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	107
	108	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	109
6fd8e7c2 L	110	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	111
	112	* Makefile.in: Regenerated with automake 1.11.6.
	113	* aclocal.m4: Likewise.
	114
4b0c052e AB	115	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	116
	117	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	118	instructions.
	119	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	120	(extract_nps_cmem_uimm16): New function.
	121	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	122
cb040366 AB	123	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	124
	125	* arc-dis.c (arc_insn_length): New function.
	126	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	127	(find_format): Change insnLen parameter to unsigned.
	128
accc0180 NC	129	2016-04-13 Nick Clifton <nickc@redhat.com>
	130
	131	PR target/19937
	132	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	133	the LD.B and LD.BU instructions.
	134
f36e33da CZ	135	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	136
	137	* arc-dis.c (find_format): Check for extension flags.
	138	(print_flags): New function.
	139	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	140	.extAuxRegister.
	141	* arc-ext.c (arcExtMap_coreRegName): Use
	142	LAST_EXTENSION_CORE_REGISTER.
	143	(arcExtMap_coreReadWrite): Likewise.
	144	(dump_ARC_extmap): Update printing.
	145	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	146	(arc_aux_regs): Add cpu field.
	147	* arc-regs.h: Add cpu field, lower case name aux registers.
	148
1c2e355e CZ	149	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	150
	151	* arc-tbl.h: Add rtsc, sleep with no arguments.
	152
b99747ae CZ	153	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	154
	155	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	156	Initialize.
	157	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	158	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	159	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	160	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	161	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	162	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	163	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	164	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	165	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	166	(arc_opcode arc_opcodes): Null terminate the array.
	167	(arc_num_opcodes): Remove.
	168	* arc-ext.h (INSERT_XOP): Define.
	169	(extInstruction_t): Likewise.
	170	(arcExtMap_instName): Delete.
	171	(arcExtMap_insn): New function.
	172	(arcExtMap_genOpcode): Likewise.
	173	* arc-ext.c (ExtInstruction): Remove.
	174	(create_map): Zero initialize instruction fields.
	175	(arcExtMap_instName): Remove.
	176	(arcExtMap_insn): New function.
	177	(dump_ARC_extmap): More info while debuging.
	178	(arcExtMap_genOpcode): New function.
	179	* arc-dis.c (find_format): New function.
	180	(print_insn_arc): Use find_format.
	181	(arc_get_disassembler): Enable dump_ARC_extmap only when
	182	debugging.
	183
92708cec MR	184	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	185
	186	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	187	instruction bits out.
	188
a42a4f84 AB	189	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	190
	191	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	192	* arc-opc.c (arc_flag_operands): Add new flags.
	193	(arc_flag_classes): Add new classes.
	194
1328504b AB	195	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	196
	197	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	198
820f03ff AB	199	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	200
	201	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	202	encode1, rflt, crc16, and crc32 instructions.
	203	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	204	(arc_flag_classes): Add C_NPS_R.
	205	(insert_nps_bitop_size_2b): New function.
	206	(extract_nps_bitop_size_2b): Likewise.
	207	(insert_nps_bitop_uimm8): Likewise.
	208	(extract_nps_bitop_uimm8): Likewise.
	209	(arc_operands): Add new operand entries.
	210
8ddf6b2a CZ	211	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	212
b99747ae CZ	213	* arc-regs.h: Add a new subclass field. Add double assist
	214	accumulator register values.
	215	* arc-tbl.h: Use DPA subclass to mark the double assist
	216	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	217	* arc-opc.c (RSP): Define instead of SP.
	218	(arc_aux_regs): Add the subclass field.
8ddf6b2a	219
589a7d88 JW	220	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	221
	222	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	223
0a191de9	224	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	225
	226	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	227	NPS_R_SRC1.
	228
0a106562 AB	229	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	230
	231	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	232	issues. No functional changes.
	233
bd05ac5f CZ	234	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	235
b99747ae CZ	236	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	237	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	238	(RTT): Remove duplicate.
	239	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	240	(PCT_CONFIG*): Remove.
	241	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	242
9885948f CZ	243	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	244
b99747ae	245	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	246
f2dd8838 CZ	247	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	248
b99747ae CZ	249	* arc-tbl.h (invld07): Remove.
	250	* arc-ext-tbl.h: New file.
	251	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	252	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	253
0d2f91fe JK	254	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	255
	256	Fix -Wstack-usage warnings.
	257	* aarch64-dis.c (print_operands): Substitute size.
	258	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	259
a6b71f42 JM	260	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	261
	262	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	263	to get a proper diagnostic when an invalid ASR register is used.
	264
9780e045 NC	265	2016-03-22 Nick Clifton <nickc@redhat.com>
	266
	267	* configure: Regenerate.
	268
e23e8ebe AB	269	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	270
	271	* arc-nps400-tbl.h: New file.
	272	* arc-opc.c: Add top level comment.
	273	(insert_nps_3bit_dst): New function.
	274	(extract_nps_3bit_dst): New function.
	275	(insert_nps_3bit_src2): New function.
	276	(extract_nps_3bit_src2): New function.
	277	(insert_nps_bitop_size): New function.
	278	(extract_nps_bitop_size): New function.
	279	(arc_flag_operands): Add nps400 entries.
	280	(arc_flag_classes): Add nps400 entries.
	281	(arc_operands): Add nps400 entries.
	282	(arc_opcodes): Add nps400 include.
	283
1ae8ab47 AB	284	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	285
	286	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	287	the new class enum values.
	288
8699fc3e AB	289	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	290
	291	* arc-dis.c (print_insn_arc): Handle nps400.
	292
24740d83 AB	293	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	294
	295	* arc-opc.c (BASE): Delete.
	296
8678914f NC	297	2016-03-18 Nick Clifton <nickc@redhat.com>
	298
	299	PR target/19721
	300	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	301	of MOV insn that aliases an ORR insn.
	302
cc933301 JW	303	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	304
	305	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	306
f86f5863 TS	307	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	308
	309	* mcore-opc.h: Add const qualifiers.
	310	* microblaze-opc.h (struct op_code_struct): Likewise.
	311	* sh-opc.h: Likewise.
	312	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	313	(tic4x_print_op): Likewise.
	314
62de1c63 AM	315	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	316
d11698cd	317	* or1k-desc.h: Regenerate.
62de1c63	318	* fr30-ibld.c: Regenerate.
c697cf0b	319	* rl78-decode.c: Regenerate.
62de1c63	320
020efce5 NC	321	2016-03-01 Nick Clifton <nickc@redhat.com>
	322
	323	PR target/19747
	324	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	325
b0c11777 RL	326	2016-02-24 Renlin Li <renlin.li@arm.com>
	327
	328	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	329	(print_insn_coprocessor): Support fp16 instructions.
	330
3e309328 RL	331	2016-02-24 Renlin Li <renlin.li@arm.com>
	332
	333	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	334	vminnm, vrint(mpna).
	335
8afc7bea RL	336	2016-02-24 Renlin Li <renlin.li@arm.com>
	337
	338	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	339	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	340
4fd7268a L	341	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	342
	343	* i386-dis.c (print_insn): Parenthesize expression to prevent
	344	truncated addresses.
	345	(OP_J): Likewise.
	346
4670103e CZ	347	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	348	Janek van Oirschot <jvanoirs@synopsys.com>
	349
b99747ae CZ	350	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	351	variable.
4670103e	352
c1d9289f NC	353	2016-02-04 Nick Clifton <nickc@redhat.com>
	354
	355	PR target/19561
	356	* msp430-dis.c (print_insn_msp430): Add a special case for
	357	decoding an RRC instruction with the ZC bit set in the extension
	358	word.
	359
a143b004 AB	360	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	361
	362	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	363	* epiphany-ibld.c: Regenerate.
	364	* fr30-ibld.c: Regenerate.
	365	* frv-ibld.c: Regenerate.
	366	* ip2k-ibld.c: Regenerate.
	367	* iq2000-ibld.c: Regenerate.
	368	* lm32-ibld.c: Regenerate.
	369	* m32c-ibld.c: Regenerate.
	370	* m32r-ibld.c: Regenerate.
	371	* mep-ibld.c: Regenerate.
	372	* mt-ibld.c: Regenerate.
	373	* or1k-ibld.c: Regenerate.
	374	* xc16x-ibld.c: Regenerate.
	375	* xstormy16-ibld.c: Regenerate.
	376
b89807c6 AB	377	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	378
	379	* epiphany-dis.c: Regenerated from latest cpu files.
	380
d8c823c8 MM	381	2016-02-01 Michael McConville <mmcco@mykolab.com>
	382
	383	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	384	test bit.
	385
5bc5ae88 RL	386	2016-01-25 Renlin Li <renlin.li@arm.com>
	387
	388	* arm-dis.c (mapping_symbol_for_insn): New function.
	389	(find_ifthen_state): Call mapping_symbol_for_insn().
	390
0bff6e2d MW	391	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	392
	393	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	394	of MSR UAO immediate operand.
	395
100b4f2e MR	396	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	397
	398	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	399	instruction support.
	400
5c14705f AM	401	2016-01-17 Alan Modra <amodra@gmail.com>
	402
	403	* configure: Regenerate.
	404
4d82fe66 NC	405	2016-01-14 Nick Clifton <nickc@redhat.com>
	406
	407	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	408	instructions that can support stack pointer operations.
	409	* rl78-decode.c: Regenerate.
	410	* rl78-dis.c: Fix display of stack pointer in MOVW based
	411	instructions.
	412
651657fa MW	413	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	414
	415	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	416	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	417	erxtatus_el1 and erxaddr_el1.
	418
105bde57 MW	419	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	420
	421	* arm-dis.c (arm_opcodes): Add "esb".
	422	(thumb_opcodes): Likewise.
	423
afa8d405 PB	424	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	425
	426	* ppc-opc.c <xscmpnedp>: Delete.
	427	<xvcmpnedp>: Likewise.
	428	<xvcmpnedp.>: Likewise.
	429	<xvcmpnesp>: Likewise.
	430	<xvcmpnesp.>: Likewise.
	431
83c3256e AS	432	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	433
	434	PR gas/13050
	435	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	436	addition to ISA_A.
	437
6f2750fe AM	438	2016-01-01 Alan Modra <amodra@gmail.com>
	439
	440	Update year range in copyright notice of all files.
	441
3499769a AM	442	For older changes see ChangeLog-2015
	443	\f
	444	Copyright (C) 2016 Free Software Foundation, Inc.
	445
	446	Copying and distribution of this file, with or without modification,
	447	are permitted in any medium without royalty provided the copyright
	448	notice and this notice are preserved.
	449
	450	Local Variables:
	451	mode: change-log
	452	left-margin: 8
	453	fill-column: 74
	454	version-control: never
	455	End: