[ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructions
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
945e0f82
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12016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
2
3 * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
4 (arcExtMap_genOpcode): Likewise.
5 * arc-opc.c (arg_32bit_rc): Define new variable.
6 (arg_32bit_u6): Likewise.
7 (arg_32bit_limm): Likewise.
8
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92016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
10
11 * aarch64-gen.c (VERIFIER): Define.
12 * aarch64-opc.c (VERIFIER): Define.
13 (verify_ldpsw): Use static linkage.
14 * aarch64-opc.h (verify_ldpsw): Remove.
15 * aarch64-tbl.h: Use VERIFIER for verifiers.
16
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172016-04-28 Nick Clifton <nickc@redhat.com>
18
19 PR target/19722
20 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
21 * aarch64-opc.c (verify_ldpsw): New function.
22 * aarch64-opc.h (verify_ldpsw): New prototype.
23 * aarch64-tbl.h: Add initialiser for verifier field.
24 (LDPSW): Set verifier to verify_ldpsw.
25
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262016-04-23 H.J. Lu <hongjiu.lu@intel.com>
27
28 PR binutils/19983
29 PR binutils/19984
30 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
31 smaller than address size.
32
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332016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
34
35 * alpha-dis.c: Regenerate.
36 * crx-dis.c: Likewise.
37 * disassemble.c: Likewise.
38 * epiphany-opc.c: Likewise.
39 * fr30-opc.c: Likewise.
40 * frv-opc.c: Likewise.
41 * ip2k-opc.c: Likewise.
42 * iq2000-opc.c: Likewise.
43 * lm32-opc.c: Likewise.
44 * lm32-opinst.c: Likewise.
45 * m32c-opc.c: Likewise.
46 * m32r-opc.c: Likewise.
47 * m32r-opinst.c: Likewise.
48 * mep-opc.c: Likewise.
49 * mt-opc.c: Likewise.
50 * or1k-opc.c: Likewise.
51 * or1k-opinst.c: Likewise.
52 * tic80-opc.c: Likewise.
53 * xc16x-opc.c: Likewise.
54 * xstormy16-opc.c: Likewise.
55
537aefaf
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562016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
57
58 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
59 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
60 calcsd, and calcxd instructions.
61 * arc-opc.c (insert_nps_bitop_size): Delete.
62 (extract_nps_bitop_size): Delete.
63 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
64 (extract_nps_qcmp_m3): Define.
65 (extract_nps_qcmp_m2): Define.
66 (extract_nps_qcmp_m1): Define.
67 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
68 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
69 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
70 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
71 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
72 NPS_QCMP_M3.
73
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742016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
75
76 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
77
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782016-04-15 H.J. Lu <hongjiu.lu@intel.com>
79
80 * Makefile.in: Regenerated with automake 1.11.6.
81 * aclocal.m4: Likewise.
82
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832016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
84
85 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
86 instructions.
87 * arc-opc.c (insert_nps_cmem_uimm16): New function.
88 (extract_nps_cmem_uimm16): New function.
89 (arc_operands): Add NPS_XLDST_UIMM16 operand.
90
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912016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
92
93 * arc-dis.c (arc_insn_length): New function.
94 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
95 (find_format): Change insnLen parameter to unsigned.
96
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972016-04-13 Nick Clifton <nickc@redhat.com>
98
99 PR target/19937
100 * v850-opc.c (v850_opcodes): Correct masks for long versions of
101 the LD.B and LD.BU instructions.
102
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1032016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
104
105 * arc-dis.c (find_format): Check for extension flags.
106 (print_flags): New function.
107 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
108 .extAuxRegister.
109 * arc-ext.c (arcExtMap_coreRegName): Use
110 LAST_EXTENSION_CORE_REGISTER.
111 (arcExtMap_coreReadWrite): Likewise.
112 (dump_ARC_extmap): Update printing.
113 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
114 (arc_aux_regs): Add cpu field.
115 * arc-regs.h: Add cpu field, lower case name aux registers.
116
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1172016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
118
119 * arc-tbl.h: Add rtsc, sleep with no arguments.
120
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1212016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
122
123 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
124 Initialize.
125 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
126 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
127 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
128 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
129 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
130 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
131 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
132 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
133 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
134 (arc_opcode arc_opcodes): Null terminate the array.
135 (arc_num_opcodes): Remove.
136 * arc-ext.h (INSERT_XOP): Define.
137 (extInstruction_t): Likewise.
138 (arcExtMap_instName): Delete.
139 (arcExtMap_insn): New function.
140 (arcExtMap_genOpcode): Likewise.
141 * arc-ext.c (ExtInstruction): Remove.
142 (create_map): Zero initialize instruction fields.
143 (arcExtMap_instName): Remove.
144 (arcExtMap_insn): New function.
145 (dump_ARC_extmap): More info while debuging.
146 (arcExtMap_genOpcode): New function.
147 * arc-dis.c (find_format): New function.
148 (print_insn_arc): Use find_format.
149 (arc_get_disassembler): Enable dump_ARC_extmap only when
150 debugging.
151
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1522016-04-11 Maciej W. Rozycki <macro@imgtec.com>
153
154 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
155 instruction bits out.
156
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1572016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
158
159 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
160 * arc-opc.c (arc_flag_operands): Add new flags.
161 (arc_flag_classes): Add new classes.
162
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1632016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
164
165 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
166
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1672016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
168
169 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
170 encode1, rflt, crc16, and crc32 instructions.
171 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
172 (arc_flag_classes): Add C_NPS_R.
173 (insert_nps_bitop_size_2b): New function.
174 (extract_nps_bitop_size_2b): Likewise.
175 (insert_nps_bitop_uimm8): Likewise.
176 (extract_nps_bitop_uimm8): Likewise.
177 (arc_operands): Add new operand entries.
178
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1792016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
180
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181 * arc-regs.h: Add a new subclass field. Add double assist
182 accumulator register values.
183 * arc-tbl.h: Use DPA subclass to mark the double assist
184 instructions. Use DPX/SPX subclas to mark the FPX instructions.
185 * arc-opc.c (RSP): Define instead of SP.
186 (arc_aux_regs): Add the subclass field.
8ddf6b2a 187
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1882016-04-05 Jiong Wang <jiong.wang@arm.com>
189
190 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
191
0a191de9 1922016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
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193
194 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
195 NPS_R_SRC1.
196
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1972016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
198
199 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
200 issues. No functional changes.
201
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2022016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
203
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204 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
205 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
206 (RTT): Remove duplicate.
207 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
208 (PCT_CONFIG*): Remove.
209 (D1L, D1H, D2H, D2L): Define.
bd05ac5f 210
9885948f
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2112016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
212
b99747ae 213 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f 214
f2dd8838
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2152016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
216
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217 * arc-tbl.h (invld07): Remove.
218 * arc-ext-tbl.h: New file.
219 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
220 * arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838 221
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2222016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
223
224 Fix -Wstack-usage warnings.
225 * aarch64-dis.c (print_operands): Substitute size.
226 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
227
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2282016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
229
230 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
231 to get a proper diagnostic when an invalid ASR register is used.
232
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2332016-03-22 Nick Clifton <nickc@redhat.com>
234
235 * configure: Regenerate.
236
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2372016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
238
239 * arc-nps400-tbl.h: New file.
240 * arc-opc.c: Add top level comment.
241 (insert_nps_3bit_dst): New function.
242 (extract_nps_3bit_dst): New function.
243 (insert_nps_3bit_src2): New function.
244 (extract_nps_3bit_src2): New function.
245 (insert_nps_bitop_size): New function.
246 (extract_nps_bitop_size): New function.
247 (arc_flag_operands): Add nps400 entries.
248 (arc_flag_classes): Add nps400 entries.
249 (arc_operands): Add nps400 entries.
250 (arc_opcodes): Add nps400 include.
251
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2522016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
253
254 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
255 the new class enum values.
256
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2572016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
258
259 * arc-dis.c (print_insn_arc): Handle nps400.
260
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2612016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
262
263 * arc-opc.c (BASE): Delete.
264
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2652016-03-18 Nick Clifton <nickc@redhat.com>
266
267 PR target/19721
268 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
269 of MOV insn that aliases an ORR insn.
270
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2712016-03-16 Jiong Wang <jiong.wang@arm.com>
272
273 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
274
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2752016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
276
277 * mcore-opc.h: Add const qualifiers.
278 * microblaze-opc.h (struct op_code_struct): Likewise.
279 * sh-opc.h: Likewise.
280 * tic4x-dis.c (tic4x_print_indirect): Likewise.
281 (tic4x_print_op): Likewise.
282
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2832016-03-02 Alan Modra <amodra@gmail.com>
284
d11698cd 285 * or1k-desc.h: Regenerate.
62de1c63 286 * fr30-ibld.c: Regenerate.
c697cf0b 287 * rl78-decode.c: Regenerate.
62de1c63 288
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2892016-03-01 Nick Clifton <nickc@redhat.com>
290
291 PR target/19747
292 * rl78-dis.c (print_insn_rl78_common): Fix typo.
293
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2942016-02-24 Renlin Li <renlin.li@arm.com>
295
296 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
297 (print_insn_coprocessor): Support fp16 instructions.
298
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2992016-02-24 Renlin Li <renlin.li@arm.com>
300
301 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
302 vminnm, vrint(mpna).
303
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3042016-02-24 Renlin Li <renlin.li@arm.com>
305
306 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
307 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
308
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3092016-02-15 H.J. Lu <hongjiu.lu@intel.com>
310
311 * i386-dis.c (print_insn): Parenthesize expression to prevent
312 truncated addresses.
313 (OP_J): Likewise.
314
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3152016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
316 Janek van Oirschot <jvanoirs@synopsys.com>
317
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318 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
319 variable.
4670103e 320
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3212016-02-04 Nick Clifton <nickc@redhat.com>
322
323 PR target/19561
324 * msp430-dis.c (print_insn_msp430): Add a special case for
325 decoding an RRC instruction with the ZC bit set in the extension
326 word.
327
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3282016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
329
330 * cgen-ibld.in (insert_normal): Rework calculation of shift.
331 * epiphany-ibld.c: Regenerate.
332 * fr30-ibld.c: Regenerate.
333 * frv-ibld.c: Regenerate.
334 * ip2k-ibld.c: Regenerate.
335 * iq2000-ibld.c: Regenerate.
336 * lm32-ibld.c: Regenerate.
337 * m32c-ibld.c: Regenerate.
338 * m32r-ibld.c: Regenerate.
339 * mep-ibld.c: Regenerate.
340 * mt-ibld.c: Regenerate.
341 * or1k-ibld.c: Regenerate.
342 * xc16x-ibld.c: Regenerate.
343 * xstormy16-ibld.c: Regenerate.
344
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3452016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
346
347 * epiphany-dis.c: Regenerated from latest cpu files.
348
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3492016-02-01 Michael McConville <mmcco@mykolab.com>
350
351 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
352 test bit.
353
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3542016-01-25 Renlin Li <renlin.li@arm.com>
355
356 * arm-dis.c (mapping_symbol_for_insn): New function.
357 (find_ifthen_state): Call mapping_symbol_for_insn().
358
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3592016-01-20 Matthew Wahab <matthew.wahab@arm.com>
360
361 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
362 of MSR UAO immediate operand.
363
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3642016-01-18 Maciej W. Rozycki <macro@imgtec.com>
365
366 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
367 instruction support.
368
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3692016-01-17 Alan Modra <amodra@gmail.com>
370
371 * configure: Regenerate.
372
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3732016-01-14 Nick Clifton <nickc@redhat.com>
374
375 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
376 instructions that can support stack pointer operations.
377 * rl78-decode.c: Regenerate.
378 * rl78-dis.c: Fix display of stack pointer in MOVW based
379 instructions.
380
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3812016-01-14 Matthew Wahab <matthew.wahab@arm.com>
382
383 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
384 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
385 erxtatus_el1 and erxaddr_el1.
386
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3872016-01-12 Matthew Wahab <matthew.wahab@arm.com>
388
389 * arm-dis.c (arm_opcodes): Add "esb".
390 (thumb_opcodes): Likewise.
391
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3922016-01-11 Peter Bergner <bergner@vnet.ibm.com>
393
394 * ppc-opc.c <xscmpnedp>: Delete.
395 <xvcmpnedp>: Likewise.
396 <xvcmpnedp.>: Likewise.
397 <xvcmpnesp>: Likewise.
398 <xvcmpnesp.>: Likewise.
399
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4002016-01-08 Andreas Schwab <schwab@linux-m68k.org>
401
402 PR gas/13050
403 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
404 addition to ISA_A.
405
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4062016-01-01 Alan Modra <amodra@gmail.com>
407
408 Update year range in copyright notice of all files.
409
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410For older changes see ChangeLog-2015
411\f
412Copyright (C) 2016 Free Software Foundation, Inc.
413
414Copying and distribution of this file, with or without modification,
415are permitted in any medium without royalty provided the copyright
416notice and this notice are preserved.
417
418Local Variables:
419mode: change-log
420left-margin: 8
421fill-column: 74
422version-control: never
423End:
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