Commit | Line | Data |
---|---|---|
a3c62988 NC |
1 | 2013-01-10 Will Newton <will.newton@imgtec.com> |
2 | ||
3 | * Makefile.am: Add Meta. | |
4 | * configure.in: Add Meta. | |
5 | * disassemble.c: Add Meta support. | |
6 | * metag-dis.c: New file. | |
7 | * Makefile.in: Regenerate. | |
8 | * configure: Regenerate. | |
9 | ||
73335eae NC |
10 | 2013-01-07 Kaushik Phatak <kaushik.phatak@kpitcummins.com> |
11 | ||
12 | * cr16-dis.c (make_instruction): Rename to cr16_make_instruction. | |
13 | (match_opcode): Rename to cr16_match_opcode. | |
14 | ||
e407c74b NC |
15 | 2013-01-04 Juergen Urban <JuergenUrban@gmx.de> |
16 | ||
17 | * mips-dis.c: Add names for CP0 registers of r5900. | |
18 | * mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for | |
19 | instructions sq and lq. | |
20 | Add support for MIPS r5900 CPU. | |
21 | Add support for 128 bit MMI (Multimedia Instructions). | |
22 | Add support for EE instructions (Emotion Engine). | |
23 | Disable unsupported floating point instructions (64 bit and | |
24 | undefined compare operations). | |
25 | Enable instructions of MIPS ISA IV which are supported by r5900. | |
26 | Disable 64 bit co processor instructions. | |
27 | Disable 64 bit multiplication and division instructions. | |
28 | Disable instructions for co-processor 2 and 3, because these are | |
29 | not supported (preparation for later VU0 support (Vector Unit)). | |
30 | Disable cvt.w.s because this behaves like trunc.w.s and the | |
31 | correct execution can't be ensured on r5900. | |
32 | Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This | |
33 | will confuse less developers and compilers. | |
34 | ||
a32c3ff8 NC |
35 | 2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> |
36 | ||
fb098a1e YZ |
37 | * aarch64-opc.c (aarch64_print_operand): Change to print |
38 | AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal | |
39 | in comment. | |
40 | * aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag | |
41 | from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and | |
42 | OP_MOV_IMM_WIDE. | |
43 | ||
44 | 2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> | |
45 | ||
46 | * aarch64-opc.c (aarch64_prfops): Update to support PLIL1KEEP, | |
47 | PLIL1STRM, PLIL2KEEP, PLIL2STRM, PLIL3KEEP and PLIL3STRM. | |
a32c3ff8 | 48 | |
62658407 L |
49 | 2013-01-02 H.J. Lu <hongjiu.lu@intel.com> |
50 | ||
51 | * i386-gen.c (process_copyright): Update copyright year to 2013. | |
52 | ||
bab4becb | 53 | 2013-01-02 Kaushik Phatak <kaushik.phatak@kpitcummins.com> |
5bf135a7 | 54 | |
bab4becb NC |
55 | * cr16-dis.c (match_opcode,make_instruction): Remove static |
56 | declaration. | |
57 | (dwordU,wordU): Moved typedefs to opcode/cr16.h | |
58 | (cr16_words,cr16_allWords,cr16_currInsn): Added prefix 'cr16_'. | |
5bf135a7 | 59 | |
bab4becb | 60 | For older changes see ChangeLog-2012 |
252b5132 | 61 | \f |
bab4becb | 62 | Copyright (C) 2013 Free Software Foundation, Inc. |
752937aa NC |
63 | |
64 | Copying and distribution of this file, with or without modification, | |
65 | are permitted in any medium without royalty provided the copyright | |
66 | notice and this notice are preserved. | |
67 | ||
252b5132 | 68 | Local Variables: |
2f6d2f85 NC |
69 | mode: change-log |
70 | left-margin: 8 | |
71 | fill-column: 74 | |
252b5132 RH |
72 | version-control: never |
73 | End: |