[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>

	* aclocal.m4: Regenerate.
	* configure: Likewise.
	* Makefile.in: Likewise.

2008-03-13  Alan Modra  <amodra@bigpond.net.au>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* configure: Regenerate.

2008-03-07  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c (powerpc_opcodes): Order and format.

2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	* i386-tbl.h: Regenerated.

2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	x86-64.
	* i386-tbl.h: Regenerated.

2008-02-21  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	and Fword for far indirect jmp. Allow Reg16 and Word for near
	indirect jmp on x86-64. Disallow Fword for lcall.
	* i386-tbl.h: Re-generate.

2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>

	* cr16-opc.c  (cr16_num_optab): Defined

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	* i386-init.h: Regenerated.

2008-02-14  Nick Clifton  <nickc@redhat.com>

	PR binutils/5524
	* configure.in (SHARED_LIBADD): Select the correct host specific
	file extension for shared libraries.
	* configure: Regenerate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-02-11  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	* i386-tbl.h: Re-generate.

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>

	* mips-dis.c: Update copyright.
	(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.

2008-01-29  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c: Support optional L form mtmsr.

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.

2008-01-23  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (Byte): Fix a typo.

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (set_bitfield): Use fail () on error.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (lineno): New.
	(filename): Likewise.
	(set_bitfield): Report filename and line numer on error.
	(process_i386_opcodes): Set filename and update lineno.
	(process_i386_registers): Likewise.

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax 
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c: Update copyright to 2008.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.

2008-01-02  Mark Kettenis  <kettenis@gnu.org>

	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	From Miod Vallat.

For older changes see ChangeLog-2007
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
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Commit	Line	Data
58c85be7 RW	1	2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
	2
	3	* aclocal.m4: Regenerate.
	4	* configure: Likewise.
	5	* Makefile.in: Likewise.
	6
50e7d84b AM	7	2008-03-13 Alan Modra <amodra@bigpond.net.au>
	8
	9	* Makefile.am: Run "make dep-am".
	10	* Makefile.in: Regenerate.
	11	* configure: Regenerate.
	12
de866fcc AM	13	2008-03-07 Alan Modra <amodra@bigpond.net.au>
	14
	15	* ppc-opc.c (powerpc_opcodes): Order and format.
	16
28dbc079 L	17	2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
	18
	19	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	20	* i386-tbl.h: Regenerated.
	21
849830bd L	22	2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
	23
	24	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	25	x86-64.
	26	* i386-tbl.h: Regenerated.
	27
743ddb6b JB	28	2008-02-21 Jan Beulich <jbeulich@novell.com>
	29
	30	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	31	and Fword for far indirect jmp. Allow Reg16 and Word for near
	32	indirect jmp on x86-64. Disallow Fword for lcall.
	33	* i386-tbl.h: Re-generate.
	34
796d5313 NC	35	2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
	36
	37	* cr16-opc.c (cr16_num_optab): Defined
	38
65da13b5 L	39	2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
	40
	41	* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	42	* i386-init.h: Regenerated.
	43
0e336180 NC	44	2008-02-14 Nick Clifton <nickc@redhat.com>
	45
	46	PR binutils/5524
	47	* configure.in (SHARED_LIBADD): Select the correct host specific
	48	file extension for shared libraries.
	49	* configure: Regenerate.
	50
b7240065 JB	51	2008-02-13 Jan Beulich <jbeulich@novell.com>
	52
	53	* i386-opc.h (RegFlat): New.
	54	* i386-reg.tbl (flat): Add.
	55	* i386-tbl.h: Re-generate.
	56
34b772a6 JB	57	2008-02-13 Jan Beulich <jbeulich@novell.com>
	58
	59	* i386-dis.c (a_mode): New.
	60	(cond_jump_mode): Adjust.
	61	(Ma): Change to a_mode.
	62	(intel_operand_size): Handle a_mode.
	63	* i386-opc.tbl: Allow Dword and Qword for bound.
	64	* i386-tbl.h: Re-generate.
	65
a60de03c JB	66	2008-02-13 Jan Beulich <jbeulich@novell.com>
	67
	68	* i386-gen.c (process_i386_registers): Process new fields.
	69	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	70	unsigned char. Add dw2_regnum and Dw2Inval.
	71	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	72	register names.
	73	* i386-tbl.h: Re-generate.
	74
f03fe4c1 L	75	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
f03fe4c1 L	76
4b6bc8eb	77	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
f03fe4c1 L	78	* i386-init.h: Updated.
f03fe4c1 L	79
475a2301 L	80	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
	81
	82	* i386-gen.c (cpu_flags): Add CpuXsave.
	83
	84	* i386-opc.h (CpuXsave): New.
4b6bc8eb	85	(CpuLM): Updated.
475a2301 L	86	(i386_cpu_flags): Add cpuxsave.
	87
	88	* i386-dis.c (MOD_0FAE_REG_4): New.
	89	(RM_0F01_REG_2): Likewise.
	90	(MOD_0FAE_REG_5): Updated.
	91	(RM_0F01_REG_3): Likewise.
	92	(reg_table): Use MOD_0FAE_REG_4.
	93	(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
	94	for xrstor.
	95	(rm_table): Add RM_0F01_REG_2.
	96
	97	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	98	* i386-init.h: Regenerated.
	99	* i386-tbl.h: Likewise.
	100
595785c6	101	2008-02-11 Jan Beulich <jbeulich@novell.com>
041179fc	102
595785c6 JB	103	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	104	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	105	* i386-tbl.h: Re-generate.
	106
bb8541b9 L	107	2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
	108
	109	PR 5715
	110	* configure: Regenerated.
	111
57b592a3 AN	112	2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
	113
	114	* mips-dis.c: Update copyright.
	115	(mips_arch_choices): Add Octeon.
	116	* mips-opc.c: Update copyright.
	117	(IOCT): New macro.
	118	(mips_builtin_opcodes): Add Octeon instruction synciobdma.
	119
930bb4cf AM	120	2008-01-29 Alan Modra <amodra@bigpond.net.au>
	121
	122	* ppc-opc.c: Support optional L form mtmsr.
	123
82c18208 L	124	2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
	125
	126	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
	127
599121aa L	128	2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
	129
	130	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	131	* i386-init.h: Regenerated.
	132
80098f51 TG	133	2008-01-23 Tristan Gingold <gingold@adacore.com>
	134
	135	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	136	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
	137
115c7c25 L	138	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	139
	140	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	141	(cpu_flags): Likewise.
	142
	143	* i386-opc.h (CpuMMX2): Removed.
	144	(CpuSSE): Updated.
	145
	146	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE\|Cpu3dnowA.
	147	* i386-init.h: Regenerated.
	148	* i386-tbl.h: Likewise.
	149
6305a203 L	150	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	151
	152	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	153	CPU_SMX_FLAGS.
	154	* i386-init.h: Regenerated.
	155
fd07a1c8 L	156	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	157
	158	* i386-opc.tbl: Use Qword on movddup.
	159	* i386-tbl.h: Regenerated.
	160
321fd21e L	161	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	162
	163	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	164	* i386-tbl.h: Regenerated.
	165
4ee52178 L	166	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	167
	168	* i386-dis.c (Mx): New.
	169	(PREFIX_0FC3): Likewise.
	170	(PREFIX_0FC7_REG_6): Updated.
	171	(dis386_twobyte): Use PREFIX_0FC3.
	172	(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
	173	Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
	174	movntss.
	175
5c07affc L	176	2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
	177
	178	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	179	(operand_types): Add Mem.
	180
	181	* i386-opc.h (IntelSyntax): New.
	182	* i386-opc.h (Mem): New.
	183	(Byte): Updated.
	184	(Opcode_Modifier_Max): Updated.
	185	(i386_opcode_modifier): Add intelsyntax.
	186	(i386_operand_type): Add mem.
	187
	188	* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
	189	instructions.
	190
	191	* i386-reg.tbl: Add size for accumulator.
	192
	193	* i386-init.h: Regenerated.
	194	* i386-tbl.h: Likewise.
	195
0d6a2f58 L	196	2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
	197
	198	* i386-opc.h (Byte): Fix a typo.
	199
7d5e4556 L	200	2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
	201
	202	PR gas/5534
	203	* i386-gen.c (operand_type_init): Add Dword to
	204	OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
	205	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	206	Qword and Xmmword.
	207	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	208	Xmmword, Unspecified and Anysize.
	209	(set_bitfield): Make Mmword an alias of Qword. Make Oword
	210	an alias of Xmmword.
	211
	212	* i386-opc.h (CheckSize): Removed.
	213	(Byte): Updated.
	214	(Word): Likewise.
	215	(Dword): Likewise.
	216	(Qword): Likewise.
	217	(Xmmword): Likewise.
	218	(FWait): Updated.
	219	(OTMax): Likewise.
	220	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	221	qword and xmmword.
	222	(Fword): New.
	223	(TBYTE): Likewise.
	224	(Unspecified): Likewise.
	225	(Anysize): Likewise.
	226	(i386_operand_type): Add byte, word, dword, fword, qword,
	227	tbyte xmmword, unspecified and anysize.
	228
	229	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	230	Tbyte, Xmmword, Unspecified and Anysize.
	231
	232	* i386-reg.tbl: Add size for accumulator.
	233
	234	* i386-init.h: Regenerated.
	235	* i386-tbl.h: Likewise.
	236
b5b1fc4f L	237	2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
	238
	239	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	240	(REG_0F18): Updated.
	241	(reg_table): Updated.
	242	(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
	243	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
	244
50e8458f L	245	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	246
	247	* i386-gen.c (set_bitfield): Use fail () on error.
	248
3d4d5afa L	249	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	250
	251	* i386-gen.c (lineno): New.
	252	(filename): Likewise.
	253	(set_bitfield): Report filename and line numer on error.
	254	(process_i386_opcodes): Set filename and update lineno.
	255	(process_i386_registers): Likewise.
	256
e1d4d893 L	257	2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
	258
	259	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	260	ATTSyntax.
	261
	262	* i386-opc.h (IntelMnemonic): Renamed to ..
	263	(ATTSyntax): This
	264	(Opcode_Modifier_Max): Updated.
	265	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	266	and intelsyntax.
	267
	268	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	269	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	270	* i386-tbl.h: Regenerated.
	271
6f143e4d L	272	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	273
	274	* i386-gen.c: Update copyright to 2008.
	275	* i386-opc.h: Likewise.
	276	* i386-opc.tbl: Likewise.
	277
	278	* i386-init.h: Regenerated.
	279	* i386-tbl.h: Likewise.
	280
c6add537 L	281	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	282
	283	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	284	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	285	* i386-tbl.h: Regenerated.
	286
3629bb00 L	287	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	288
	289	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	290	CpuSSE4_2_Or_ABM.
	291	(cpu_flags): Likewise.
	292
	293	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	294	(CpuSSE4_2_Or_ABM): Likewise.
	295	(CpuLM): Updated.
	296	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
	297
	298	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	299	Cpu686\|CpuPadLock with CpuSSE4_1\|CpuSSE5, CpuABM\|CpuSSE4_2
	300	and CpuPadLock, respectively.
	301	* i386-init.h: Regenerated.
	302	* i386-tbl.h: Likewise.
	303
24995bd6 L	304	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	305
	306	* i386-gen.c (opcode_modifiers): Remove No_xSuf.
	307
	308	* i386-opc.h (No_xSuf): Removed.
	309	(CheckSize): Updated.
	310
	311	* i386-tbl.h: Regenerated.
	312
e0329a22 L	313	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	314
	315	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	316	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	317	CPU_SSE5_FLAGS.
	318	(cpu_flags): Add CpuSSE4_2_Or_ABM.
	319
	320	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	321	(CpuLM): Updated.
	322	(i386_cpu_flags): Add cpusse4_2_or_abm.
	323
	324	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	325	CpuABM\|CpuSSE4_2 on popcnt.
	326	* i386-init.h: Regenerated.
	327	* i386-tbl.h: Likewise.
	328
f2a9c676 L	329	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	330
	331	* i386-opc.h: Update comments.
	332
d978b5be L	333	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	334
	335	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	336	* i386-opc.h: Likewise.
	337	* i386-opc.tbl: Likewise.
	338
582d5edd L	339	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	340
	341	PR gas/5534
	342	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	343	Byte, Word, Dword, QWord and Xmmword.
	344
	345	* i386-opc.h (No_xSuf): New.
	346	(CheckSize): Likewise.
	347	(Byte): Likewise.
	348	(Word): Likewise.
	349	(Dword): Likewise.
	350	(QWord): Likewise.
	351	(Xmmword): Likewise.
	352	(FWait): Updated.
	353	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	354	Dword, QWord and Xmmword.
	355
	356	* i386-opc.tbl: Add CheckSize\|QWord to movq if IgnoreSize is
	357	used.
	358	* i386-tbl.h: Regenerated.
	359
3fe15143 MK	360	2008-01-02 Mark Kettenis <kettenis@gnu.org>
	361
	362	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	363	From Miod Vallat.
	364
6c7ac64e	365	For older changes see ChangeLog-2007
252b5132 RH	366	\f
252b5132 RH	367	Local Variables:
2f6d2f85 NC	368	mode: change-log
	369	left-margin: 8
	370	fill-column: 74
252b5132 RH	371	version-control: never
252b5132 RH	372	End: