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Remove i860, i960, bout and aout-adobe targets
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
a8eb42a8
AM		 12018-04-11 Alan Modra <amodra@gmail.com>
2
3 * opcodes/i860-dis.c: Delete.
4 * opcodes/i960-dis.c: Delete.
5 * Makefile.am: Remove i860 and i960 support.
6 * configure.ac: Likewise.
7 * disassemble.c: Likewise.
8 * disassemble.h: Likewise.
9 * Makefile.in: Regenerate.
10 * configure: Regenerate.
11 * po/POTFILES.in: Regenerate.
12
caf0678c
L		 132018-04-04 H.J. Lu <hongjiu.lu@intel.com>
14
15 PR binutils/23025
16 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
17 to 0.
18 (print_insn): Clear vex instead of vex.evex.
19
4fb0d2b9
NC		 202018-04-04 Nick Clifton <nickc@redhat.com>
21
22 * po/es.po: Updated Spanish translation.
23
c39e5b26
JB		 242018-03-28 Jan Beulich <jbeulich@suse.com>
25
26 * i386-gen.c (opcode_modifiers): Delete VecESize.
27 * i386-opc.h (VecESize): Delete.
28 (struct i386_opcode_modifier): Delete vecesize.
29 * i386-opc.tbl: Drop VecESize.
30 * i386-tlb.h: Re-generate.
31
8e6e0792
JB		 322018-03-28 Jan Beulich <jbeulich@suse.com>
33
34 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
35 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
36 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
37 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
38 * i386-tlb.h: Re-generate.
39
9f123b91
JB		 402018-03-28 Jan Beulich <jbeulich@suse.com>
41
42 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
43 Fold AVX512 forms
44 * i386-tlb.h: Re-generate.
45
9646c87b
JB		 462018-03-28 Jan Beulich <jbeulich@suse.com>
47
48 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
49 (vex_len_table): Drop Y for vcvt*2si.
50 (putop): Replace plain 'Y' handling by abort().
51
c8d59609
NC		 522018-03-28 Nick Clifton <nickc@redhat.com>
53
54 PR 22988
55 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
56 instructions with only a base address register.
57 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
58 handle AARHC64_OPND_SVE_ADDR_R.
59 (aarch64_print_operand): Likewise.
60 * aarch64-asm-2.c: Regenerate.
61 * aarch64_dis-2.c: Regenerate.
62 * aarch64-opc-2.c: Regenerate.
63
b8c169f3
JB		 642018-03-22 Jan Beulich <jbeulich@suse.com>
65
66 * i386-opc.tbl: Drop VecESize from register only insn forms and
67 memory forms not allowing broadcast.
68 * i386-tlb.h: Re-generate.
69
96bc132a
JB		 702018-03-22 Jan Beulich <jbeulich@suse.com>
71
72 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
73 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
74 sha256*): Drop Disp<N>.
75
9f79e886
JB		 762018-03-22 Jan Beulich <jbeulich@suse.com>
77
78 * i386-dis.c (EbndS, bnd_swap_mode): New.
79 (prefix_table): Use EbndS.
80 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
81 * i386-opc.tbl (bndmov): Move misplaced Load.
82 * i386-tlb.h: Re-generate.
83
d6793fa1
JB		 842018-03-22 Jan Beulich <jbeulich@suse.com>
85
86 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
87 templates allowing memory operands and folded ones for register
88 only flavors.
89 * i386-tlb.h: Re-generate.
90
f7768225
JB		 912018-03-22 Jan Beulich <jbeulich@suse.com>
92
93 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
94 256-bit templates. Drop redundant leftover Disp<N>.
95 * i386-tlb.h: Re-generate.
96
0e35537d
JW		 972018-03-14 Kito Cheng <kito.cheng@gmail.com>
98
99 * riscv-opc.c (riscv_insn_types): New.
100
b4a3689a
NC		 1012018-03-13 Nick Clifton <nickc@redhat.com>
102
103 * po/pt_BR.po: Updated Brazilian Portuguese translation.
104
d3d50934
L		 1052018-03-08 H.J. Lu <hongjiu.lu@intel.com>
106
107 * i386-opc.tbl: Add Optimize to clr.
108 * i386-tbl.h: Regenerated.
109
bd5dea88
L		 1102018-03-08 H.J. Lu <hongjiu.lu@intel.com>
111
112 * i386-gen.c (opcode_modifiers): Remove OldGcc.
113 * i386-opc.h (OldGcc): Removed.
114 (i386_opcode_modifier): Remove oldgcc.
115 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
116 instructions for old (<= 2.8.1) versions of gcc.
117 * i386-tbl.h: Regenerated.
118
e771e7c9
JB		 1192018-03-08 Jan Beulich <jbeulich@suse.com>
120
121 * i386-opc.h (EVEXDYN): New.
122 * i386-opc.tbl: Fold various AVX512VL templates.
123 * i386-tlb.h: Re-generate.
124
ed438a93
JB		 1252018-03-08 Jan Beulich <jbeulich@suse.com>
126
127 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
128 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
129 vpexpandd, vpexpandq): Fold AFX512VF templates.
130 * i386-tlb.h: Re-generate.
131
454172a9
JB		 1322018-03-08 Jan Beulich <jbeulich@suse.com>
133
134 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
135 Fold 128- and 256-bit VEX-encoded templates.
136 * i386-tlb.h: Re-generate.
137
36824150
JB		 1382018-03-08 Jan Beulich <jbeulich@suse.com>
139
140 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
141 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
142 vpexpandd, vpexpandq): Fold AVX512F templates.
143 * i386-tlb.h: Re-generate.
144
e7f5c0a9
JB		 1452018-03-08 Jan Beulich <jbeulich@suse.com>
146
147 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
148 64-bit templates. Drop Disp<N>.
149 * i386-tlb.h: Re-generate.
150
25a4277f
JB		 1512018-03-08 Jan Beulich <jbeulich@suse.com>
152
153 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
154 and 256-bit templates.
155 * i386-tlb.h: Re-generate.
156
d2224064
JB		 1572018-03-08 Jan Beulich <jbeulich@suse.com>
158
159 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
160 * i386-tlb.h: Re-generate.
161
1b193f0b
JB		 1622018-03-08 Jan Beulich <jbeulich@suse.com>
163
164 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
165 Drop NoAVX.
166 * i386-tlb.h: Re-generate.
167
f2f6a710
JB		 1682018-03-08 Jan Beulich <jbeulich@suse.com>
169
170 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
171 * i386-tlb.h: Re-generate.
172
38e314eb
JB		 1732018-03-08 Jan Beulich <jbeulich@suse.com>
174
175 * i386-gen.c (opcode_modifiers): Delete FloatD.
176 * i386-opc.h (FloatD): Delete.
177 (struct i386_opcode_modifier): Delete floatd.
178 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
179 FloatD by D.
180 * i386-tlb.h: Re-generate.
181
d53e6b98
JB		 1822018-03-08 Jan Beulich <jbeulich@suse.com>
183
184 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
185
2907c2f5
JB		 1862018-03-08 Jan Beulich <jbeulich@suse.com>
187
188 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
189 * i386-tlb.h: Re-generate.
190
73053c1f
JB		 1912018-03-08 Jan Beulich <jbeulich@suse.com>
192
193 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
194 forms.
195 * i386-tlb.h: Re-generate.
196
52fe4420
AM		 1972018-03-07 Alan Modra <amodra@gmail.com>
198
199 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
200 bfd_arch_rs6000.
201 * disassemble.h (print_insn_rs6000): Delete.
202 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
203 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
204 (print_insn_rs6000): Delete.
205
a6743a54
AM		 2062018-03-03 Alan Modra <amodra@gmail.com>
207
208 * sysdep.h (opcodes_error_handler): Define.
209 (_bfd_error_handler): Declare.
210 * Makefile.am: Remove stray #.
211 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
212 EDIT" comment.
213 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
214 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
215 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
216 opcodes_error_handler to print errors. Standardize error messages.
217 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
218 and include opintl.h.
219 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
220 * i386-gen.c: Standardize error messages.
221 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
222 * Makefile.in: Regenerate.
223 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
224 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
225 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
226 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
227 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
228 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
229 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
230 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
231 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
232 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
233 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
234 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
235 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
236
8305403a
L		 2372018-03-01 H.J. Lu <hongjiu.lu@intel.com>
238
239 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
240 vpsub[bwdq] instructions.
241 * i386-tbl.h: Regenerated.
242
e184813f
AM		 2432018-03-01 Alan Modra <amodra@gmail.com>
244
245 * configure.ac (ALL_LINGUAS): Sort.
246 * configure: Regenerate.
247
5b616bef
TP		 2482018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
249
250 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
251 macro by assignements.
252
b6f8c7c4
L		 2532018-02-27 H.J. Lu <hongjiu.lu@intel.com>
254
255 PR gas/22871
256 * i386-gen.c (opcode_modifiers): Add Optimize.
257 * i386-opc.h (Optimize): New enum.
258 (i386_opcode_modifier): Add optimize.
259 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
260 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
261 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
262 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
263 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
264 vpxord and vpxorq.
265 * i386-tbl.h: Regenerated.
266
e95b887f
AM		 2672018-02-26 Alan Modra <amodra@gmail.com>
268
269 * crx-dis.c (getregliststring): Allocate a large enough buffer
270 to silence false positive gcc8 warning.
271
0bccfb29
JW		 2722018-02-22 Shea Levy <shea@shealevy.com>
273
274 * disassemble.c (ARCH_riscv): Define if ARCH_all.
275
6b6b6807
L		 2762018-02-22 H.J. Lu <hongjiu.lu@intel.com>
277
278 * i386-opc.tbl: Add {rex},
279 * i386-tbl.h: Regenerated.
280
75f31665
MR		 2812018-02-20 Maciej W. Rozycki <macro@mips.com>
282
283 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
284 (mips16_opcodes): Replace `M' with `m' for "restore".
285
e207bc53
TP		 2862018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
287
288 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
289
87993319
MR		 2902018-02-13 Maciej W. Rozycki <macro@mips.com>
291
292 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
293 variable to `function_index'.
294
68d20676
NC		 2952018-02-13 Nick Clifton <nickc@redhat.com>
296
297 PR 22823
298 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
299 about truncation of printing.
300
d2159fdc
HW		 3012018-02-12 Henry Wong <henry@stuffedcow.net>
302
303 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
304
f174ef9f
NC		 3052018-02-05 Nick Clifton <nickc@redhat.com>
306
307 * po/pt_BR.po: Updated Brazilian Portuguese translation.
308
be3a8dca
IT		 3092018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
310
311 * i386-dis.c (enum): Add pconfig.
312 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
313 (cpu_flags): Add CpuPCONFIG.
314 * i386-opc.h (enum): Add CpuPCONFIG.
315 (i386_cpu_flags): Add cpupconfig.
316 * i386-opc.tbl: Add PCONFIG instruction.
317 * i386-init.h: Regenerate.
318 * i386-tbl.h: Likewise.
319
3233d7d0
IT		 3202018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
321
322 * i386-dis.c (enum): Add PREFIX_0F09.
323 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
324 (cpu_flags): Add CpuWBNOINVD.
325 * i386-opc.h (enum): Add CpuWBNOINVD.
326 (i386_cpu_flags): Add cpuwbnoinvd.
327 * i386-opc.tbl: Add WBNOINVD instruction.
328 * i386-init.h: Regenerate.
329 * i386-tbl.h: Likewise.
330
e925c834
JW		 3312018-01-17 Jim Wilson <jimw@sifive.com>
332
333 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
334
d777820b
IT		 3352018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
336
337 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
338 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
339 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
340 (cpu_flags): Add CpuIBT, CpuSHSTK.
341 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
342 (i386_cpu_flags): Add cpuibt, cpushstk.
343 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
344 * i386-init.h: Regenerate.
345 * i386-tbl.h: Likewise.
346
f6efed01
NC		 3472018-01-16 Nick Clifton <nickc@redhat.com>
348
349 * po/pt_BR.po: Updated Brazilian Portugese translation.
350 * po/de.po: Updated German translation.
351
2721d702
JW		 3522018-01-15 Jim Wilson <jimw@sifive.com>
353
354 * riscv-opc.c (match_c_nop): New.
355 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
356
616dcb87
NC		 3572018-01-15 Nick Clifton <nickc@redhat.com>
358
359 * po/uk.po: Updated Ukranian translation.
360
3957a496
NC		 3612018-01-13 Nick Clifton <nickc@redhat.com>
362
363 * po/opcodes.pot: Regenerated.
364
769c7ea5
NC		 3652018-01-13 Nick Clifton <nickc@redhat.com>
366
367 * configure: Regenerate.
368
faf766e3
NC		 3692018-01-13 Nick Clifton <nickc@redhat.com>
370
371 2.30 branch created.
372
888a89da
IT		 3732018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
374
375 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
376 * i386-tbl.h: Regenerate.
377
cbda583a
JB		 3782018-01-10 Jan Beulich <jbeulich@suse.com>
379
380 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
381 * i386-tbl.h: Re-generate.
382
c9e92278
JB		 3832018-01-10 Jan Beulich <jbeulich@suse.com>
384
385 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
386 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
387 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
388 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
389 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
390 Disp8MemShift of AVX512VL forms.
391 * i386-tbl.h: Re-generate.
392
35fd2b2b
JW		 3932018-01-09 Jim Wilson <jimw@sifive.com>
394
395 * riscv-dis.c (maybe_print_address): If base_reg is zero,
396 then the hi_addr value is zero.
397
91d8b670
JG		 3982018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
399
400 * arm-dis.c (arm_opcodes): Add csdb.
401 (thumb32_opcodes): Add csdb.
402
be2e7d95
JG		 4032018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
404
405 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
406 * aarch64-asm-2.c: Regenerate.
407 * aarch64-dis-2.c: Regenerate.
408 * aarch64-opc-2.c: Regenerate.
409
704a705d
L		 4102018-01-08 H.J. Lu <hongjiu.lu@intel.com>
411
412 PR gas/22681
413 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
414 Remove AVX512 vmovd with 64-bit operands.
415 * i386-tbl.h: Regenerated.
416
35eeb78f
JW		 4172018-01-05 Jim Wilson <jimw@sifive.com>
418
419 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
420 jalr.
421
219d1afa
AM		 4222018-01-03 Alan Modra <amodra@gmail.com>
423
424 Update year range in copyright notice of all files.
425
1508bbf5
JB		 4262018-01-02 Jan Beulich <jbeulich@suse.com>
427
428 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
429 and OPERAND_TYPE_REGZMM entries.
430
1e563868 431For older changes see ChangeLog-2017
3499769a 432\f
1e563868 433Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 434
435Copying and distribution of this file, with or without modification,
436are permitted in any medium without royalty provided the copyright
437notice and this notice are preserved.
438
439Local Variables:
440mode: change-log
441left-margin: 8
442fill-column: 74
443version-control: never
444End:
GDB Binutils - Deliverables
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