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Cleanups after the update to Autoconf 2.64, Automake 1.11.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
81ecdfbb
RW		 12009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
2
af542c2e
RW		 3 * Makefile.am (install-pdf, install-html): Remove.
4 * Makefile.in: Regenerate.
5
81ecdfbb
RW		 6 * Makefile.in: Regenerate.
7 * aclocal.m4: Likewise.
8 * config.in: Likewise.
9 * configure: Likewise.
10
7ba29e2a
NC		 112009-08-06 Michael Eager <eager@eagercon.com>
12
13 * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
14 CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
15 * Makefile.in: Regenerate.
16 * configure.in: Add bfd_microblaze_arch target.
17 * configure: Regenerate.
18 * disassemble.c: Define ARCH_microblaze, return
19 print_insn_microblaze().
20 * microblaze-dis.c: New MicroBlaze disassembler.
21 * microblaze-opc.h: New MicroBlaze opcode definitions.
22 * microblaze-opcm.h: New MicroBlaze opcode types.
23
8a9036a4
L		 242009-07-25 H.J. Lu <hongjiu.lu@intel.com>
25
26 * configure.in: Handle bfd_l1om_arch.
27 * disassemble.c (disassembler): Likewise.
28
29 * configure: Regenerated.
30
31 * i386-dis.c (print_insn): Handle bfd_mach_l1om and
32 bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
33
34 * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
35 Add CPU_L1OM_FLAGS.
36 (cpu_flags): Add CpuL1OM.
37 (set_bitfield): Take an argument to set the value field.
38 (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
39 (process_i386_opcode_modifier): Updated.
40 (process_i386_operand_type): Likewise.
41 * i386-init.h: Regenerated.
42 * i386-tbl.h: Likewise.
43
44 * i386-opc.h (CpuL1OM): New.
45 (CpuXsave): Updated.
46 (i386_cpu_flags): Add cpul1om.
47
309d3373
JB		 482009-07-24 Jan Beulich <jbeulich@novell.com>
49
50 * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
51 frstpm.
52 * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
53 (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
54 (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
55 * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
56 Define.
57 (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
58 and cpufisttp.
59 * i386-opc.tbl: Qualify floating point instructions by their
60 respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
61 and fsincos to be avilable only on 387. Fix fstsw ax to be
62 available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
63 and frstpm.
64 * i386-init.h, i386-tbl.h: Regenerate.
65
7769efb2
NC		 662009-07-20 Nick Clifton <nickc@redhat.com>
67
68 PR 10288
69 * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
70 offset or indexed based addressing mode 3.
71
74bdfecf
NC		 722009-07-14 Nick Clifton <nickc@redhat.com>
73
74 PR 10288
75 * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
76 patterns.
77 (arm_decode_shift): Catch illegal register based shifts.
78 (print_insn_arm): Properly handle negative register r0
79 post-indexed addressing.
80
d1aaab3c
DK		 812009-07-10 Doug Kwan <dougkwan@google.com>
82
83 * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
84 lower 32 bits of long types to make hexadecimal output consistent
85 on both 32-bit and 64-bit hosts.
86
87337981
AM		 872009-07-10 Alan Modra <amodra@bigpond.net.au>
88
89 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
90 * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
91 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
92 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
93 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
94 * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
95 * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
96 * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
97 * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
98 * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
99 * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
100 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
101
1103f72c
NC		 1022009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
103
104 * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
105
78c66db8
NC		 1062009-07-07 Nick Clifton <nickc@redhat.com>
107
108 PR 10288
109 * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
110 addressing modes.
111
22102fb0
DD		 1122009-07-06 DJ Delorie <dj@redhat.com>
113
114 * mep-desc.c: Regenerate.
115 * mep-desc.h: Regenerate.
116 * mep-opc.c: Regenerate.
117 * mep-opc.h: Regenerate.
118
922d8de8
DR		 1192009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
120
121 * i386-opc.h (CpuFMA4): Add CpuFMA4.
122 (i386_cpu_flags): New.
123 * i386-gen.c: Add CPU_FMA4_FLAGS.
124 * i386-opc.tbl: Add FMA4 instructions.
125 * i386-tbl.h: Regenerate.
126 * i386-init.h: Regenerate.
127 * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
128 (OP_XMM_VexW): Ditto.
129 (OP_EX_VexW): Ditto.
130 (VEXI4_Fixup): Ditto.
131 (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
132 (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
133 (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
134 (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
135 (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
136 (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
137 (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
138 (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
139 (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
140 (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
141 (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
142 (get_vex_imm8): New. handle FMA4.
143 (OP_EX_VexReg): Ditto.
144
fe56b6ce
NC		 1452009-06-30 Nick Clifton <nickc@redhat.com>
146
147 PR 10288
148 * arm-dis.c (coprocessor): Print the LDC and STC versions of the
149 LFM and SFM instructions as comments,.
150 Improve consistency of formatting for instructions displayed as
151 comments and decimal values displayed with their hexadecimal
152 equivalents.
153 Formatting tidy ups.
154
05413229
NC		 1552009-06-29 Nick Clifton <nickc@redhat.com>
156
157 PR 10288
158 * arm-dis.c (enum opcode_sentinels): New: Used to mark the
159 boundary between variaant and generic coprocessor instuctions.
160 (coprocessor): Use it.
161 Fix architecture version of MCRR and MRRC instructions.
162 (arm_opcdes): Fix patterns for STRB and STRH instructions.
163 (print_insn_coprocessor): Check architecture and extension masks.
164 Print a hexadecimal version of any decimal constant that is
165 outside of the range of -16 to +32.
166 (print_arm_address): Add a return value of the offset used in the
167 adress, if it is worth printing a hexadecimal version of it.
168 (print_insn_neon): Print a hexadecimal version of any decimal
169 constant that is outside of the range of -16 to +32.
170 (print_insn_arm): Likewise.
171 (print_insn_thumb16): Likewise.
172 (print_insn_thumb32): Likewise.
173
174 PR 10297
175 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
176 of an undefined instruction.
177 (arm_opcodes): Use it.
178 (thumb_opcod): Use it.
179 (thumb32_opc): Use it.
180
378a0c07
DD		 1812009-06-23 DJ Delorie <dj@redhat.com>
182
dab97f24
DD		 183 * mep-desc.c: Regenerate.
184 * mep-desc.h: Regenerate.
185 * mep-dis.c: Regenerate.
186 * mep-ibld.c: Regenerate.
187 * mep-opc.c: Regenerate.
188
378a0c07
DD		 189 * mep-asm.c: Regenerate.
190 * mep-opc.c: Regenerate.
191 * mep-opc.h: Regenerate.
192
aece7d2e
NC		 1932009-06-22 Nick Clifton <nickc@redhat.com>
194
195 * po/fi.po: Updated Finish translation.
196
1998a8e0
AM		 1972009-06-22 Alan Modra <amodra@bigpond.net.au>
198
199 * m32c-asm.c: Regenerate.
200
b33bafa0
AM		 2012009-06-22 Alan Modra <amodra@bigpond.net.au>
202
203 * score-dis.c (print_insn_score48, print_insn_score32): Move default
204 case label to proper lexical block.
205 * score7-dis.c (print_insn_score32): Likewise.
206
ce21feb4
MS		 2072009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
208
209 * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
210 MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
211 * s390-opc.txt (nopr, nop): Use new instruction format.
212
0313a2b8
NC		 2132009-06-18 Nick Clifton <nickc@redhat.com>
214
215 PR 10288
216 * arm-dis.c (print_insn_coprocessor): Check that a user specified
217 ARM architecture supports the matched instruction.
218 (print_insn_arm): Likewise.
219 (select_arm_features): New function. Fills in the fields of an
220 arm_feature_set structure based on a given arm machine number.
221 (print_insn): Initialise an arm_feature_set structure.
222
6db7e006
MR		 2232009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
224
225 * vax-dis.c (is_function_entry): Return success for synthetic
226 symbols too.
227 (is_plt_tail): New function.
228 (print_insn_vax): Decode PLT entry offset longword.
229
522fe561
NC		 2302009-06-15 Nick Clifton <nickc@redhat.com>
231
fe2ceba1
NC		 232 PR 10186
233 * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
234 instruction.
235
522fe561
NC		 236 PR 10173
237 * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
238
1316c8b3
NC		 2392009-06-15 Nick Clifton <nickc@redhat.com>
240
241 PR 10263
242 * arm-dis.c (print_insn): Ignore is_data if the user has requested
243 the disassembly of data as well as instructions.
244
f6475b48
DE		 2452009-06-11 Doug Evans <dje@sebabeach.org>
246
247 * cgen.sh: Handle multiple simultaneous runs for parallel makes.
248
f865a31d
AG		 2492009-06-11 Anthony Green <green@moxielogic.com>
250
251 * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
252 (moxie_form3_opc_info): Add branch instructions.
253 * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
254 encoded instructions.
255
0e7c7f11
AG		 2562009-06-06 Anthony Green <green@moxielogic.com>
257
258 * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
259 * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
260
67a648f1
AM		 2612009-06-04 Alan Modra <amodra@bigpond.net.au>
262
263 * dep-in.sed: Don't use \n in replacement part of s command.
264 * Makefile.am (DEP1): LC_ALL for uniq.
265 * Makefile.in: Regenerate.
266
06c582ac
NC		 2672009-06-02 Nick Clifton <nickc@redhat.com>
268
269 * po/nl.po: Updated Dutch translation.
270
3164099e
TG		 2712009-06-02 Tristan Gingold <gingold@adacore.com>
272
273 * ia64-gen.c (parse_resource_users, print_dependency_table,
274 add_dis_table_ent, finish_distable, insert_bit_table_ent,
275 add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
276 get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
277 insert_completer_entry, print_completer_entry, print_completer_table,
278 opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
279
d285268e
DD		 2802009-05-28 DJ Delorie <dj@redhat.com>
281
282 * mep-asm.c: Regenerate.
283 * mep-desc.c: Regenerate.
284
2f3565a3
DD		 2852009-05-26 DJ Delorie <dj@redhat.com>
286
287 * mep-asm.c: Regenerate.
288 * mep-desc.c: Regenerate.
289 * mep-desc.h: Regenerate.
290 * mep-dis.c: Regenerate.
291 * mep-ibld.c: Regenerate.
292 * mep-opc.c: Regenerate.
293 * mep-opc.h: Regenerate.
294
f12e7348
NC		 2952009-05-26 Nick Clifton <nickc@redhat.com>
296
297 * po/id.po: Updated Indonesian translation.
298 * po/opcodes.pot: Updated template file.
299
9e097a72
AM		 3002009-05-26 Alan Modra <amodra@bigpond.net.au>
301
302 * dep-in.sed: Don't modify .o to .lo here. Output one filename
303 per line with all lines having continuation backslash. Prefix
304 first line with "A", following lines with "B".
305 * Makefile.am (DEP): Don't use dep.sed here.
306 (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
307 dep.sed here on dependencies, sort and uniq.
308 * Makefile.in: Regenerate.
309
4f8318f8
TG		 3102009-05-25 Tristan Gingold <gingold@adacore.com>
311
312 * makefile.vms (OPT): New variable.
313 (CFLAGS): Update compilation flags.
314
1d74713b
DD		 3152009-05-22 DJ Delorie <dj@redhat.com>
316
317 * mep-asm.c: Regenerate.
318 * mep-desc.c: Regenerate.
319 * mep-desc.h: Regenerate.
320 * mep-dis.c: Regenerate.
321 * mep-ibld.c: Regenerate.
322 * mep-opc.c: Regenerate.
323 * mep-opc.h: Regenerate.
324
c1e679ec
DR		 3252009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
326
327 * i386-opc.h (Cpusse5): Delete.
328 (i386_cpu_flags): Delete.
329 * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
330 * i386-opc.tbl: Remove SSE5 instructions.
331 * i386-tbl.h: Regenerate.
332 * i386-init.h: Regenerate.
333 * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
334 (print_drex_arg): Delete.
335 (OP_DREX4): Delete.
336 (OP_DREX3): Delete.
337 (OP_DREX_ICMP): Delete.
338 (OP_DREX_FCMP): Delete.
339 (DREX_*): Delete.
340 (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
341
2b3decb5
AM		 3422009-05-22 Alan Modra <amodra@bigpond.net.au>
343
344 * Makefile.am: Run "make dep-am".
345 * Makefile.in: Regenerate.
346 * po/POTFILES.in: Regenerate.
347
eb956800
DD		 3482009-05-19 DJ Delorie <dj@redhat.com>
349
350 * mep-asm.c: Regenerate.
351 * mep-opc.c: Regenerate.
352
3526b680
DD		 3532009-04-30 DJ Delorie <dj@redhat.com>
354
355 * mep-asm.c: Regenerate.
356 * mep-desc.c: Regenerate.
357 * mep-desc.h: Regenerate.
358 * mep-dis.c: Regenerate.
359 * mep-ibld.c: Regenerate.
360 * mep-opc.c: Regenerate.
361 * mep-opc.h: Regenerate.
362
45be3704
DD		 3632009-04-17 DJ Delorie <dj@redhat.com
364
365 * mep-desc.c: Regenerate.
366 * mep-ibld.c: Regenerate.
367 * mep-opc.c: Regenerate.
368 * mep-opc.h: Regenerate.
369
20135e4c
NC		 3702009-04-15 Anthony Green <green@moxielogic.com>
371
372 * moxie-opc.c, moxie-dis.c: Created.
373 * Makefile.am: Build the moxie source files.
374 * configure.in: Add moxie support.
375 * Makefile.in, configure: Rebuilt.
376 * disassemble.c (disassembler): Add moxie support.
377 (ARCH_moxie): Define.
378
ac5c19e6
JB		 3792009-04-15 Jan Beulich <jbeulich@novell.com>
380
381 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
382 extension to None.
383 (pshab, pshaw, pshad, pshaq): Likewise.
384 * i386-tbl.h: Re-generate.
385
52de720d
DD		 3862009-04-08 DJ Delorie <dj@redhat.com
387
388 * mep-asm.c: Regenerate.
389 * mep-desc.c: Regenerate.
390 * mep-desc.h: Regenerate.
391 * mep-dis.c: Regenerate.
392 * mep-ibld.c: Regenerate.
393 * mep-opc.c: Regenerate.
394 * mep-opc.h: Regenerate.
395
858d7a6d
PB		 3962009-04-07 Peter Bergner <bergner@vnet.ibm.com>
397
398 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
399 "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
400 Reorder entries so the extended mnemonics are listed before tlbilx.
401
70dc4e32
PB		 4022009-04-02 Peter Bergner <bergner@vnet.ibm.com>
403
404 * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
405 due to -many/-Many.
406 (print_insn_powerpc): Make sure we only deprecate instructions using
407 the original dialect and not a modified dialect due to -Many handling.
408 Move the handling of the condition register and default operands to
409 the end of the if/else if/else chain.
410 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
411 instructions from newer processors are listed before older ones.
412 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
413 that have instructions with conflicting opcodes.
414
e401b04c
PB		 4152009-04-01 Peter Bergner <bergner@vnet.ibm.com>
416
417 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
418 E500MC entries.
419
b8f9ee44
CL		 4202009-04-01 Christophe Lyon <christophe.lyon@st.com>
421
422 * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
423
d460e92e
JM		 4242009-03-30 Joseph Myers <joseph@codesourcery.com>
425
426 * arm-dis.c (print_insn): Also check section matches in backwards
427 search for mapping symbol.
428
d34b5006
L		 4292009-03-26 H.J. Lu <hongjiu.lu@intel.com>
430
431 * i386-dis.c (get_valid_dis386): Abort on unhandled table.
432
8d25cc3d
AM		 4332009-03-18 Alan Modra <amodra@bigpond.net.au>
434
3889c459 435 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
8d25cc3d
AM		 436 * Makefile.am: Run "make dep-am".
437 * Makefile.in: Regenerate.
438 * openrisc-opc.c: Regenerate.
439
34dd024a
NC		 4402009-03-10 Nick Clifton <nickc@redhat.com>
441
442 * po/id.po: Updated Indonesian translation.
443
69fe9ce5
AM		 4442009-03-10 Alan Modra <amodra@bigpond.net.au>
445
446 * ppc-dis.c: Include "opintl.h".
447 (struct ppc_mopt, ppc_opts): New.
448 (ppc_parse_cpu): New function.
449 (powerpc_init_dialect): Use it.
450 (print_ppc_disassembler_options): Dump options from ppc_opts.
451 Internationalize message.
452
d11fd249
NC		 4532009-03-06 Nick Clifton <nickc@redhat.com>
454
455 * po/es.po: Updated Spanish translation.
456
51dec227
AM		 4572009-03-04 Alan Modra <amodra@bigpond.net.au>
458
459 PR 6768
460 * configure.in: Test for ld --as-needed support. Link shared
461 libopcodes against libm.
462 * configure: Regenerate.
463
c72ab5f2
PB		 4642009-03-03 Peter Bergner <bergner@vnet.ibm.com>
465
466 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
467 instructions from newer processors are listed before older ones.
468
a1f7ca36
AM		 4692009-03-03 Alan Modra <amodra@bigpond.net.au>
470
471 * Makefile.am: Run "make dep-am".
472 (HFILES): Move lm32-desc.h and lm32-opc.h from..
473 (CFILES): ..here.
474 * Makefile.in: Regenerate.
475
c3b7224a
NC		 4762009-03-02 Qinwei <qinwei@sunnorth.com.cn>
477
478 * score7-dis.c: New file.
479 * Makefile.am: Add dependencies for score7-dis.c.
480 * Makefile.in: Regenerate.
481 * configure.in: Add score7-dis to score files.
482 * configure: Regenerate.
483 * score-dis.c: Add support for score7 architecture.
484 * score-opc.h: Likewise.
485
58e24671
RW		 4862009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
487
488 * configure: Regenerate.
489
d6f574e0
L		 4902009-02-27 H.J. Lu <hongjiu.lu@intel.com>
491
492 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
493
066be9f7
PB		 4942009-02-26 Peter Bergner <bergner@vnet.ibm.com>
495
496 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
497 the power7 and the isel instructions.
498 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
499 (insert_dm, extract_dm): Likewise.
500 (XB6): Update comment to include XX2 form.
501 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
502 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
503 (RemoveXX3DM): Delete.
504 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
505 "mftgpr">: Deprecate for POWER7.
506 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
507 "frsqrte.">: Deprecate the three operand form and enable the two
508 operand form for POWER7 and later.
509 <"wait">: Extend to accept optional parameter. Enable for POWER7.
510 <"waitsrv", "waitimpl">: Add extended opcodes.
511 <"ldbrx", "stdbrx">: Enable for POWER7.
512 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
513 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
514 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
515 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
516 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
517 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
518 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
519 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
520 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
521 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
522 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
523 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
524 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
525 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
526 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
527 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
528 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
529 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
530 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
531 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
532 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
533 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
534 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
535 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
536 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
537 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
538 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
539 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
540 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
541 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
542 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
543 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
544 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
545 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
546 "xxspltw", "xxswapd">: Add VSX opcodes.
547
4c664d7b
L		 5482009-02-23 H.J. Lu <hongjiu.lu@intel.com>
549
550 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
551 (operand_types): Remove Vex_Imm4.
552
553 * i386-opc.h (Vex_Imm4): Removed.
554 (OTMax): Updated.
555 (i386_operand_type): Remove vex_imm4.
556
557 * i386-opc.tbl: Remove Vex_Imm4 comments.
558 * i386-init.h: Regenerated.
559 * i386-tbl.h: Likewise.
560
4ce8808b
RE		 5612009-02-23 Richard Earnshaw <rearnsha@arm.com>
562
563 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
564 vq{r}shr{u}n.s64 insnstructions.
565
0e55be16
PB		 5662009-02-19 Peter Bergner <bergner@vnet.ibm.com>
567
568 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
569 operand to be a float point register (FRT/FRS).
570
b1c9882d
AN		 5712009-02-18 Adam Nemet <anemet@caviumnetworks.com>
572
573 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
574 dmfc2 and dmtc2 before the architecture-level variants.
575
137f2437
NC		 5762009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
577
578 * fr30-opc.c: Regenerate.
579 * frv-opc.c: Regenerate.
580 * ip2k-opc.c: Regenerate.
581 * iq2000-opc.c: Regenerate.
582 * lm32-opc.c: Regenerate.
583 * m32c-opc.c: Regenerate.
584 * m32r-opc.c: Regenerate.
585 * mep-opc.c: Regenerate.
586 * mt-opc.c: Regenerate.
587 * xc16x-opc.c: Regenerate.
588 * xstormy16-opc.c: Regenerate.
589 * tic54x-dis.c (print_instruction): Avoid compiler warning on
590 sprintf call.
591
87298967
NS		 5922009-02-12 Nathan Sidwell <nathan@codesourcery.com>
593
594 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
595
80890a61
PB		 5962009-02-05 Peter Bergner <bergner@vnet.ibm.com>
597
598 * ppc-opc.c: Update copyright year.
599 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
600 ordering for POWER4 and later and use the correct Server ordering.
601
ce2f5b3c
L		 6022009-02-04 H.J. Lu <hongjiu.lu@intel.com>
603
604 AVX Programming Reference (January, 2009)
605 * i386-dis.c (PREFIX_VEX_3A44): New.
606 (VEX_LEN_3A44_P_2): Likewise.
607 (PREFIX_VEX_3A48): Updated.
608 (VEX_LEN_3A4C_P_2): Likewise.
609 (prefix_table): Add PREFIX_VEX_3A44.
610 (vex_table): Likewise.
611 (vex_len_table): Add VEX_LEN_3A44_P_2.
612
613 * i386-opc.tbl: Add PCLMUL + AVX instructions.
614 * i386-tbl.h: Regenerated.
615
52b6b6b9
JM		 6162009-02-03 Sandip Matte <sandip@rmicorp.com>
617
618 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
619 (mips_arch_choices): Add XLR entry.
620 * mips-opc.c (XLR): Define.
621 (mips_builtin_opcodes): Add XLR instructions.
622
31dd3154
JM		 6232009-02-03 Carlos O'Donell <carlos@codesourcery.com>
624
625 * Makefile.am: Add install-pdf target.
626 * po/Make-in: Add install-pdf target.
627 * Makefile.in: Regenerate.
628
c1a0a41f
DD		 6292009-02-02 DJ Delorie <dj@redhat.com>
630
631 * mep-asm.c: Regenerate.
632 * mep-desc.c: Regenerate.
633 * mep-desc.h: Regenerate.
634 * mep-dis.c: Regenerate.
635 * mep-ibld.c: Regenerate.
636 * mep-opc.c: Regenerate.
637 * mep-opc.h: Regenerate.
638
087b80de
JM		 6392009-01-29 Mark Mitchell <mark@codesourcery.com>
640
641 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
642 qsub, and qdsub.
643
159073e6
NC		 6442009-01-28 Chao-ying Fu <fu@mips.com>
645
646 * mips-opc.c (suxc1): Add the flag of FP_D.
647
6f3b91a6
AM		 6482009-01-20 Alan Modra <amodra@bigpond.net.au>
649
650 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
651 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
652 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
653 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
654 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
655 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
656 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
657 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
658
29670fb9
AM		 6592009-01-16 Alan Modra <amodra@bigpond.net.au>
660
661 * configure.in (commonbfdlib): Delete.
662 (SHARED_LIBADD): Add pic libiberty if such is available.
663 * configure: Regenerate.
664 * po/POTFILES.in: Regenerate.
665
21169fcf
PB		 6662009-01-14 Peter Bergner <bergner@vnet.ibm.com>
667
668 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
669 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
670 operand form and enable the four operand form for POWER6 and later.
671 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
672 three operand form for POWER6 and later.
673
4ca47a51
MF		 6742009-01-14 Mike Frysinger <vapier@gentoo.org>
675
676 * bfin-dis.c (OUTS): Use "%s" as format string.
677
8acd5377
L		 6782009-01-13 H.J. Lu <hongjiu.lu@intel.com>
679
680 * i386-gen.c (cpu_flag_init): Remove a white space.
681 (operand_type_init): Likewise.
682
c1ec1875
L		 6832009-01-12 H.J. Lu <hongjiu.lu@intel.com>
684
685 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
686 * i386-tbl.h: Regenerated.
687
c7532693
L		 6882009-01-12 H.J. Lu <hongjiu.lu@intel.com>
689
690 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
691 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
692 subS, xorS and cmpS.
693
bd5295b2
L		 6942009-01-10 H.J. Lu <hongjiu.lu@intel.com>
695
696 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
697 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
698 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
699 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
700 and CpuSYSCALL.
701 (lineno): Removed.
702 (set_bitfield): Take an argument, lineno. Don't report lineno
703 on error if it is -1.
704 (process_i386_cpu_flag): Take an argument, lineno.
705 (process_i386_opcode_modifier): Likewise.
706 (process_i386_operand_type): Likewise.
707 (output_i386_opcode): Likewise.
708 (opcode_hash_entry): Add lineno.
709 (process_i386_opcodes): Updated.
710 (process_i386_registers): Likewise.
711 (process_i386_initializers): Likewise.
712
713 * i386-opc.h (CpuP4): Removed.
714 (CpuK6): Likewise.
715 (CpuK8): Likewise.
716 (CpuClflush): New.
717 (CpuSYSCALL): Likewise.
718 (CpuMMX): Updated.
719 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
720 cpuclflush and cpusyscall.
721
722 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
723 syscall and sysret.
724 * i386-init.h: Regenerated.
725 * i386-tbl.h: Likewise.
726
1b7f3fb0
L		 7272009-01-09 H.J. Lu <hongjiu.lu@intel.com>
728
729 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
730 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
731 (cpu_flags): Add CpuRdtscp.
732 (set_bitfield): Remove CpuSledgehammer check.
733
734 * i386-opc.h (CpuRdtscp): New.
735 (CpuLM): Updated.
736 (i386_cpu_flags): Add cpurdtscp.
737
738 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
739 * i386-init.h: Regenerated.
740 * i386-tbl.h: Likewise.
741
1cb0a767
PB		 7422009-01-09 Peter Bergner <bergner@vnet.ibm.com>
743
744 * ppc-opc.c (PPCNONE): Define.
745 (NOPOWER4): Delete.
746 (powerpc_opcodes): Initialize the new "deprecated" field.
747
168e3097
L		 7482009-01-06 H.J. Lu <hongjiu.lu@intel.com>
749
750 AVX Programming Reference (December, 2008)
751 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
752 (VEX_LEN_E7_P_2_M_0): Likewise.
753 (VEX_LEN_2C_P_1): Updated.
754 (VEX_LEN_E8_P_2): Likewise.
755 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
756 (mod_table): Likewise.
757
758 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
759 * i386-tbl.h: Regenerated.
760
22da050b
L		 7612009-01-05 H.J. Lu <hongjiu.lu@intel.com>
762
763 * i386-gen.c (process_copyright): Update for 2009.
764
765 * i386-init.h: Regenerated.
766 * i386-tbl.h: Likewise.
767
0bfee649 7682009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 769
0bfee649
L		 770 AVX Programming Reference (December, 2008)
771 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 772 (OP_EX_VexW): Likewise.
0bfee649 773 (OP_EX_VexImmW): Likewise.
c0f3af97 774 (OP_XMM_VexW): Likewise.
c0f3af97 775 (VEXI4_Fixup): Likewise.
c0f3af97 776 (VPERMIL2_Fixup): Likewise.
c0f3af97 777 (VexI4): Likewise.
0bfee649
L		 778 (VexFMA): Likewise.
779 (Vex128FMA): Likewise.
c0f3af97
L		 780 (EXVexW): Likewise.
781 (EXdVexW): Likewise.
782 (EXqVexW): Likewise.
0bfee649 783 (EXVexImmW): Likewise.
c0f3af97 784 (XMVexW): Likewise.
c0f3af97 785 (VPERMIL2): Likewise.
0bfee649
L		 786 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
787 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
788 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
789 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
790 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
791 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
792 (get_vex_imm8): Likewise.
793 (OP_EX_VexReg): Likewise.
794 vpermil2_op): Likewise.
795 (EXVexWdq): New.
796 (vex_w_dq_mode): Likewise.
797 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
798 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
799 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
800 (es_reg): Updated.
801 (PREFIX_VEX_38DB): Likewise.
802 (PREFIX_VEX_3A4A): Likewise.
803 (PREFIX_VEX_3A60): Likewise.
804 (PREFIX_VEX_3ADF): Likewise.
805 (VEX_LEN_3ADF_P_2): Likewise.
806 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
807 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
808 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
809 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
810 PREFIX_VEX_3896...PREFIX_VEX_389F,
811 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
812 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 813 (vex_table): Likewise.
0bfee649
L		 814 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
815 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
816 (putop): Support "%XW".
817 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 818
0bfee649 819 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 820
0bfee649
L		 821 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
822 instructions. Add new FMA instructions.
28dbc079
L		 823 * i386-tbl.h: Regenerated.
824
0bfee649 8252009-01-02 Matthias Klose <doko@ubuntu.com>
3fe15143 826
0bfee649
L		 827 * or32-opc.c (or32_print_register, or32_print_immediate,
828 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 829
0bfee649 830For older changes see ChangeLog-2008
252b5132
RH		 831\f
832Local Variables:
2f6d2f85
NC		 833mode: change-log
834left-margin: 8
835fill-column: 74
252b5132
RH		 836version-control: never
837End:
GDB Binutils - Deliverables
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