[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2020-01-27  H.J. Lu  <hongjiu.lu@intel.com>
	    Jan Beulich  <jbeulich@suse.com>

	PR binutils/25445
	* i386-dis.c (MOVSXD_Fixup): New function.
	(movsxd_mode): New enum.
	(x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
	(intel_operand_size): Handle movsxd_mode.
	(OP_E_register): Likewise.
	(OP_G): Likewise.
	* i386-opc.tbl: Remove Rex64 and allow 32-bit destination
	register on movsxd.  Add movsxd with 16-bit destination register
	for AMD64 and Intel64 ISAs.
	* i386-tbl.h: Regenerated.

2020-01-27  Tamar Christina  <tamar.christina@arm.com>

	PR 25403
	* aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
	* aarch64-asm-2.c: Regenerate
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.

2020-01-21  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (sysret): Drop DefaultSize.
	* i386-tbl.h: Re-generate.

2020-01-21  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
	Dword.
	(vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
	* i386-tbl.h: Re-generate.

2020-01-20  Nick Clifton  <nickc@redhat.com>

	* po/de.po: Updated German translation.
	* po/pt_BR.po: Updated Brazilian Portuguese translation.
	* po/uk.po: Updated Ukranian translation.

2020-01-20  Alan Modra  <amodra@gmail.com>

	* hppa-dis.c (fput_const): Remove useless cast.

2020-01-20  Alan Modra  <amodra@gmail.com>

	* arm-dis.c (print_insn_arm): Wrap 'T' value.

2020-01-18  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.
	* po/opcodes.pot: Regenerate.

2020-01-18  Nick Clifton  <nickc@redhat.com>

	Binutils 2.34 branch created.

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* opintl.h: Fix spelling error (seperate).

2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add {vex} pseudo prefix.
	* i386-tbl.h: Regenerated.

2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR 25376
	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	(neon_opcodes): Likewise.
	(select_arm_features): Make sure we enable MVE bits when selecting
	armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
	any architecture.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl: Drop stale comment from XOP section.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	(extractps): Add VexWIG to SSE2AVX forms.
	* i386-tbl.h: Re-generate.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	Size64 from and use VexW1 on SSE2AVX forms.
	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	* i386-tbl.h: Re-generate.

2020-01-15  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_version): Make unsigned long.
	(optab, optab_special, registernames): New file scope vars.
	(tic4x_print_register): Set up registernames rather than
	malloc'd registertable.
	(tic4x_disassemble): Delete optable and optable_special.  Use
	optab and optab_special instead.  Throw away old optab,
	optab_special and registernames when info->mach changes.

2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25377
	* z80-dis.c (suffix): Use .db instruction to generate double
	prefix.

2020-01-14  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
	values to unsigned before shifting.

2020-01-13  Thomas Troeger  <tstroege@gmx.de>

	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	flow instructions.
	(print_insn_thumb16, print_insn_thumb32): Likewise.
	(print_insn): Initialize the insn info.
	* i386-dis.c (print_insn): Initialize the insn info fields, and
	detect jumps.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

	* arc-opc.c (C_NE): Make it required.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

        * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	reserved register name.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
	result of wasm_read_leb128 in a uint64_t and check that bits
	are not lost when copying to other locals.  Use uint32_t for
	most locals.  Use PRId64 when printing int64_t.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c: Formatting.
	* score7-dis.c: Formatting.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c (print_insn_score48): Use unsigned variables for
	unsigned values.  Don't left shift negative values.
	(print_insn_score32): Likewise.
	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_print_register): Remove dead code.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* fr30-ibld.c: Regenerate.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* xgate-dis.c (print_insn): Don't left shift signed value.
	(ripBits): Formatting, use 1u.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	* tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	and XRREG value earlier to avoid a shift with negative exponent.
	* m10200-dis.c (disassemble): Similarly.

2020-01-09  Nick Clifton  <nickc@redhat.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use correct cast.

2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use character constant when checking
	opcode byte value.

2020-01-09  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (SEP_Fixup): New.
	(SEP): Define.
	(dis386_twobyte): Use it for sysenter/sysexit.
	(enum x86_64_isa): Change amd64 enumerator to value 1.
	(OP_J): Compare isa64 against intel64 instead of amd64.
	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	forms.
	* i386-tbl.h: Re-generate.

2020-01-08  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c: Include libiberty.h
	(instr_data_s): Make max_fetched unsigned.
	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	Don't exceed byte_info bounds.
	(output_instr): Make num_bytes unsigned.
	(unpack_instr): Likewise for nibl_count and loop.
	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	idx unsigned.
	* z8k-opc.h: Regenerate.

2020-01-07  Shahab Vahedi  <shahab@synopsys.com>

	* arc-tbl.h (llock): Use 'LLOCK' as class.
	(llockd): Likewise.
	(scond): Use 'SCOND' as class.
	(scondd): Likewise.
	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	(scondd): Likewise.

2020-01-06  Alan Modra  <amodra@gmail.com>

	* m32c-ibld.c: Regenerate.

2020-01-06  Alan Modra  <amodra@gmail.com>

	PR 25344
	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	Peek at next byte to prevent recursion on repeated prefix bytes.
	Ensure uninitialised "mybuf" is not accessed.
	(print_insn_z80): Don't zero n_fetch and n_used here,..
	(print_insn_z80_buf): ..do it here instead.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* m32r-ibld.c: Regenerate.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Use
	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
	forms of SUDOT and USDOT.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
	uzip{1,2}.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
	FMMLA encoding.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>

	* z80-dis.c: Add support for eZ80 and Z80 instructions.

2020-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2019
\f
Copyright (C) 2020 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
bc31405e L	1	2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
	2	Jan Beulich <jbeulich@suse.com>
	3
	4	PR binutils/25445
	5	* i386-dis.c (MOVSXD_Fixup): New function.
	6	(movsxd_mode): New enum.
	7	(x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
	8	(intel_operand_size): Handle movsxd_mode.
	9	(OP_E_register): Likewise.
	10	(OP_G): Likewise.
	11	* i386-opc.tbl: Remove Rex64 and allow 32-bit destination
	12	register on movsxd. Add movsxd with 16-bit destination register
	13	for AMD64 and Intel64 ISAs.
	14	* i386-tbl.h: Regenerated.
	15
7568c93b TC	16	2020-01-27 Tamar Christina <tamar.christina@arm.com>
	17
	18	PR 25403
	19	* aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
	20	* aarch64-asm-2.c: Regenerate
	21	* aarch64-dis-2.c: Likewise.
	22	* aarch64-opc-2.c: Likewise.
	23
c006a730 JB	24	2020-01-21 Jan Beulich <jbeulich@suse.com>
	25
	26	* i386-opc.tbl (sysret): Drop DefaultSize.
	27	* i386-tbl.h: Re-generate.
	28
c906a69a JB	29	2020-01-21 Jan Beulich <jbeulich@suse.com>
	30
	31	* i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
	32	Dword.
	33	(vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
	34	* i386-tbl.h: Re-generate.
	35
26916852 NC	36	2020-01-20 Nick Clifton <nickc@redhat.com>
	37
	38	* po/de.po: Updated German translation.
	39	* po/pt_BR.po: Updated Brazilian Portuguese translation.
	40	* po/uk.po: Updated Ukranian translation.
	41
4d6cbb64 AM	42	2020-01-20 Alan Modra <amodra@gmail.com>
	43
	44	* hppa-dis.c (fput_const): Remove useless cast.
	45
2bddb71a AM	46	2020-01-20 Alan Modra <amodra@gmail.com>
	47
	48	* arm-dis.c (print_insn_arm): Wrap 'T' value.
	49
1b1bb2c6 NC	50	2020-01-18 Nick Clifton <nickc@redhat.com>
	51
	52	* configure: Regenerate.
	53	* po/opcodes.pot: Regenerate.
	54
ae774686 NC	55	2020-01-18 Nick Clifton <nickc@redhat.com>
	56
	57	Binutils 2.34 branch created.
	58
07f1f3aa CB	59	2020-01-17 Christian Biesinger <cbiesinger@google.com>
	60
	61	* opintl.h: Fix spelling error (seperate).
	62
42e04b36 L	63	2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
	64
	65	* i386-opc.tbl: Add {vex} pseudo prefix.
	66	* i386-tbl.h: Regenerated.
	67
2da2eaf4 AV	68	2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
	69
	70	PR 25376
	71	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	72	(neon_opcodes): Likewise.
	73	(select_arm_features): Make sure we enable MVE bits when selecting
	74	armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
	75	any architecture.
	76
d0849eed JB	77	2020-01-16 Jan Beulich <jbeulich@suse.com>
	78
	79	* i386-opc.tbl: Drop stale comment from XOP section.
	80
9cf70a44 JB	81	2020-01-16 Jan Beulich <jbeulich@suse.com>
	82
	83	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	84	(extractps): Add VexWIG to SSE2AVX forms.
	85	* i386-tbl.h: Re-generate.
	86
4814632e JB	87	2020-01-16 Jan Beulich <jbeulich@suse.com>
	88
	89	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	90	Size64 from and use VexW1 on SSE2AVX forms.
	91	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	92	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	93	* i386-tbl.h: Re-generate.
	94
aad09917 AM	95	2020-01-15 Alan Modra <amodra@gmail.com>
	96
	97	* tic4x-dis.c (tic4x_version): Make unsigned long.
	98	(optab, optab_special, registernames): New file scope vars.
	99	(tic4x_print_register): Set up registernames rather than
	100	malloc'd registertable.
	101	(tic4x_disassemble): Delete optable and optable_special. Use
	102	optab and optab_special instead. Throw away old optab,
	103	optab_special and registernames when info->mach changes.
	104
7a6bf3be SB	105	2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
	106
	107	PR 25377
	108	* z80-dis.c (suffix): Use .db instruction to generate double
	109	prefix.
	110
ca1eaac0 AM	111	2020-01-14 Alan Modra <amodra@gmail.com>
	112
	113	* z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
	114	values to unsigned before shifting.
	115
1d67fe3b TT	116	2020-01-13 Thomas Troeger <tstroege@gmx.de>
	117
	118	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	119	flow instructions.
	120	(print_insn_thumb16, print_insn_thumb32): Likewise.
	121	(print_insn): Initialize the insn info.
	122	* i386-dis.c (print_insn): Initialize the insn info fields, and
	123	detect jumps.
	124
5e4f7e05 CZ	125	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	126
	127	* arc-opc.c (C_NE): Make it required.
	128
b9fe6b8a CZ	129	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	130
	131	* opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	132	reserved register name.
	133
90dee485 AM	134	2020-01-13 Alan Modra <amodra@gmail.com>
	135
	136	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	137	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.
	138
febda64f AM	139	2020-01-13 Alan Modra <amodra@gmail.com>
	140
	141	* wasm32-dis.c (print_insn_wasm32): Localise variables. Store
	142	result of wasm_read_leb128 in a uint64_t and check that bits
	143	are not lost when copying to other locals. Use uint32_t for
	144	most locals. Use PRId64 when printing int64_t.
	145
df08b588 AM	146	2020-01-13 Alan Modra <amodra@gmail.com>
	147
	148	* score-dis.c: Formatting.
	149	* score7-dis.c: Formatting.
	150
b2c759ce AM	151	2020-01-13 Alan Modra <amodra@gmail.com>
	152
	153	* score-dis.c (print_insn_score48): Use unsigned variables for
	154	unsigned values. Don't left shift negative values.
	155	(print_insn_score32): Likewise.
	156	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
	157
5496abe1 AM	158	2020-01-13 Alan Modra <amodra@gmail.com>
	159
	160	* tic4x-dis.c (tic4x_print_register): Remove dead code.
	161
202e762b AM	162	2020-01-13 Alan Modra <amodra@gmail.com>
	163
	164	* fr30-ibld.c: Regenerate.
	165
7ef412cf AM	166	2020-01-13 Alan Modra <amodra@gmail.com>
	167
	168	* xgate-dis.c (print_insn): Don't left shift signed value.
	169	(ripBits): Formatting, use 1u.
	170
7f578b95 AM	171	2020-01-10 Alan Modra <amodra@gmail.com>
	172
	173	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	174	* tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
	175
441af85b AM	176	2020-01-10 Alan Modra <amodra@gmail.com>
	177
	178	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	179	and XRREG value earlier to avoid a shift with negative exponent.
	180	* m10200-dis.c (disassemble): Similarly.
	181
bce58db4 NC	182	2020-01-09 Nick Clifton <nickc@redhat.com>
	183
	184	PR 25224
	185	* z80-dis.c (ld_ii_ii): Use correct cast.
	186
40c75bc8 SB	187	2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
	188
	189	PR 25224
	190	* z80-dis.c (ld_ii_ii): Use character constant when checking
	191	opcode byte value.
	192
d835a58b JB	193	2020-01-09 Jan Beulich <jbeulich@suse.com>
	194
	195	* i386-dis.c (SEP_Fixup): New.
	196	(SEP): Define.
	197	(dis386_twobyte): Use it for sysenter/sysexit.
	198	(enum x86_64_isa): Change amd64 enumerator to value 1.
	199	(OP_J): Compare isa64 against intel64 instead of amd64.
	200	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	201	forms.
	202	* i386-tbl.h: Re-generate.
	203
030a2e78 AM	204	2020-01-08 Alan Modra <amodra@gmail.com>
	205
	206	* z8k-dis.c: Include libiberty.h
	207	(instr_data_s): Make max_fetched unsigned.
	208	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	209	Don't exceed byte_info bounds.
	210	(output_instr): Make num_bytes unsigned.
	211	(unpack_instr): Likewise for nibl_count and loop.
	212	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	213	idx unsigned.
	214	* z8k-opc.h: Regenerate.
	215
bb82aefe SV	216	2020-01-07 Shahab Vahedi <shahab@synopsys.com>
	217
	218	* arc-tbl.h (llock): Use 'LLOCK' as class.
	219	(llockd): Likewise.
	220	(scond): Use 'SCOND' as class.
	221	(scondd): Likewise.
	222	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	223	(scondd): Likewise.
	224
cc6aa1a6 AM	225	2020-01-06 Alan Modra <amodra@gmail.com>
	226
	227	* m32c-ibld.c: Regenerate.
	228
660e62b1 AM	229	2020-01-06 Alan Modra <amodra@gmail.com>
	230
	231	PR 25344
	232	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	233	Peek at next byte to prevent recursion on repeated prefix bytes.
	234	Ensure uninitialised "mybuf" is not accessed.
	235	(print_insn_z80): Don't zero n_fetch and n_used here,..
	236	(print_insn_z80_buf): ..do it here instead.
	237
c9ae58fe AM	238	2020-01-04 Alan Modra <amodra@gmail.com>
	239
	240	* m32r-ibld.c: Regenerate.
	241
5f57d4ec AM	242	2020-01-04 Alan Modra <amodra@gmail.com>
	243
	244	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
	245
2c5c1196 AM	246	2020-01-04 Alan Modra <amodra@gmail.com>
	247
	248	* crx-dis.c (match_opcode): Avoid shift left of signed value.
	249
2e98c6c5 AM	250	2020-01-04 Alan Modra <amodra@gmail.com>
	251
	252	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
	253
567dfba2 JB	254	2020-01-03 Jan Beulich <jbeulich@suse.com>
567dfba2 JB	255
5437a02a JB	256	* aarch64-tbl.h (aarch64_opcode_table): Use
	257	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
	258
	259	2020-01-03 Jan Beulich <jbeulich@suse.com>
	260
	261	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2 JB	262	forms of SUDOT and USDOT.
567dfba2 JB	263
8c45011a JB	264	2020-01-03 Jan Beulich <jbeulich@suse.com>
8c45011a JB	265
5437a02a	266	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a JB	267	uzip{1,2}.
	268	* opcodes/aarch64-dis-2.c: Re-generate.
	269
f4950f76 JB	270	2020-01-03 Jan Beulich <jbeulich@suse.com>
f4950f76 JB	271
5437a02a	272	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76 JB	273	FMMLA encoding.
	274	* opcodes/aarch64-dis-2.c: Re-generate.
	275
6655dba2 SB	276	2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
	277
	278	* z80-dis.c: Add support for eZ80 and Z80 instructions.
	279
b14ce8bf AM	280	2020-01-01 Alan Modra <amodra@gmail.com>
	281
	282	Update year range in copyright notice of all files.
	283
0b114740	284	For older changes see ChangeLog-2019
3499769a	285	\f
0b114740	286	Copyright (C) 2020 Free Software Foundation, Inc.
3499769a AM	287
	288	Copying and distribution of this file, with or without modification,
	289	are permitted in any medium without royalty provided the copyright
	290	notice and this notice are preserved.
	291
	292	Local Variables:
	293	mode: change-log
	294	left-margin: 8
	295	fill-column: 74
	296	version-control: never
	297	End: