[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>

	From  Robin Getz  <robin.getz@analog.com>
	* bfin-dis.c (bu32): Typedef.
	(enum const_forms_t): Add c_uimm32 and c_huimm32.
	(constant_formats[]): Add uimm32 and huimm16.
	(fmtconst_val): New.
	(uimm32): Define.
	(huimm32): Define.
	(imm16_val): Define.
	(luimm16_val): Define.
	(struct saved_state): Define.
	(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
	A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
	LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
	(get_allreg): New.
	(decode_LDIMMhalf_0): Print out the whole register value.

2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>

	* aclocal.m4: Regenerate.
	* configure: Likewise.
	* Makefile.in: Likewise.

2008-03-13  Alan Modra  <amodra@bigpond.net.au>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* configure: Regenerate.

2008-03-07  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c (powerpc_opcodes): Order and format.

2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	* i386-tbl.h: Regenerated.

2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	x86-64.
	* i386-tbl.h: Regenerated.

2008-02-21  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	and Fword for far indirect jmp. Allow Reg16 and Word for near
	indirect jmp on x86-64. Disallow Fword for lcall.
	* i386-tbl.h: Re-generate.

2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>

	* cr16-opc.c  (cr16_num_optab): Defined

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	* i386-init.h: Regenerated.

2008-02-14  Nick Clifton  <nickc@redhat.com>

	PR binutils/5524
	* configure.in (SHARED_LIBADD): Select the correct host specific
	file extension for shared libraries.
	* configure: Regenerate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-02-11  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	* i386-tbl.h: Re-generate.

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>

	* mips-dis.c: Update copyright.
	(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.

2008-01-29  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c: Support optional L form mtmsr.

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.

2008-01-23  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (Byte): Fix a typo.

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (set_bitfield): Use fail () on error.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (lineno): New.
	(filename): Likewise.
	(set_bitfield): Report filename and line numer on error.
	(process_i386_opcodes): Set filename and update lineno.
	(process_i386_registers): Likewise.

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax 
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c: Update copyright to 2008.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.

2008-01-02  Mark Kettenis  <kettenis@gnu.org>

	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	From Miod Vallat.

For older changes see ChangeLog-2007
\f
Local Variables:
mode: change-log
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fill-column: 74
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Commit	Line	Data
b21c9cb4 BS	1	2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
	2
	3	From Robin Getz <robin.getz@analog.com>
	4	* bfin-dis.c (bu32): Typedef.
	5	(enum const_forms_t): Add c_uimm32 and c_huimm32.
	6	(constant_formats[]): Add uimm32 and huimm16.
	7	(fmtconst_val): New.
	8	(uimm32): Define.
	9	(huimm32): Define.
	10	(imm16_val): Define.
	11	(luimm16_val): Define.
	12	(struct saved_state): Define.
	13	(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
	14	A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
	15	LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
	16	(get_allreg): New.
	17	(decode_LDIMMhalf_0): Print out the whole register value.
	18
58c85be7 RW	19	2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
	20
	21	* aclocal.m4: Regenerate.
	22	* configure: Likewise.
	23	* Makefile.in: Likewise.
	24
50e7d84b AM	25	2008-03-13 Alan Modra <amodra@bigpond.net.au>
	26
	27	* Makefile.am: Run "make dep-am".
	28	* Makefile.in: Regenerate.
	29	* configure: Regenerate.
	30
de866fcc AM	31	2008-03-07 Alan Modra <amodra@bigpond.net.au>
	32
	33	* ppc-opc.c (powerpc_opcodes): Order and format.
	34
28dbc079 L	35	2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
	36
	37	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	38	* i386-tbl.h: Regenerated.
	39
849830bd L	40	2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
	41
	42	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	43	x86-64.
	44	* i386-tbl.h: Regenerated.
	45
743ddb6b JB	46	2008-02-21 Jan Beulich <jbeulich@novell.com>
	47
	48	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	49	and Fword for far indirect jmp. Allow Reg16 and Word for near
	50	indirect jmp on x86-64. Disallow Fword for lcall.
	51	* i386-tbl.h: Re-generate.
	52
796d5313 NC	53	2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
	54
	55	* cr16-opc.c (cr16_num_optab): Defined
	56
65da13b5 L	57	2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
	58
	59	* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	60	* i386-init.h: Regenerated.
	61
0e336180 NC	62	2008-02-14 Nick Clifton <nickc@redhat.com>
	63
	64	PR binutils/5524
	65	* configure.in (SHARED_LIBADD): Select the correct host specific
	66	file extension for shared libraries.
	67	* configure: Regenerate.
	68
b7240065 JB	69	2008-02-13 Jan Beulich <jbeulich@novell.com>
	70
	71	* i386-opc.h (RegFlat): New.
	72	* i386-reg.tbl (flat): Add.
	73	* i386-tbl.h: Re-generate.
	74
34b772a6 JB	75	2008-02-13 Jan Beulich <jbeulich@novell.com>
	76
	77	* i386-dis.c (a_mode): New.
	78	(cond_jump_mode): Adjust.
	79	(Ma): Change to a_mode.
	80	(intel_operand_size): Handle a_mode.
	81	* i386-opc.tbl: Allow Dword and Qword for bound.
	82	* i386-tbl.h: Re-generate.
	83
a60de03c JB	84	2008-02-13 Jan Beulich <jbeulich@novell.com>
	85
	86	* i386-gen.c (process_i386_registers): Process new fields.
	87	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	88	unsigned char. Add dw2_regnum and Dw2Inval.
	89	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	90	register names.
	91	* i386-tbl.h: Re-generate.
	92
f03fe4c1 L	93	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
f03fe4c1 L	94
4b6bc8eb	95	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
f03fe4c1 L	96	* i386-init.h: Updated.
f03fe4c1 L	97
475a2301 L	98	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
	99
	100	* i386-gen.c (cpu_flags): Add CpuXsave.
	101
	102	* i386-opc.h (CpuXsave): New.
4b6bc8eb	103	(CpuLM): Updated.
475a2301 L	104	(i386_cpu_flags): Add cpuxsave.
	105
	106	* i386-dis.c (MOD_0FAE_REG_4): New.
	107	(RM_0F01_REG_2): Likewise.
	108	(MOD_0FAE_REG_5): Updated.
	109	(RM_0F01_REG_3): Likewise.
	110	(reg_table): Use MOD_0FAE_REG_4.
	111	(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
	112	for xrstor.
	113	(rm_table): Add RM_0F01_REG_2.
	114
	115	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	116	* i386-init.h: Regenerated.
	117	* i386-tbl.h: Likewise.
	118
595785c6	119	2008-02-11 Jan Beulich <jbeulich@novell.com>
041179fc	120
595785c6 JB	121	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	122	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	123	* i386-tbl.h: Re-generate.
	124
bb8541b9 L	125	2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
	126
	127	PR 5715
	128	* configure: Regenerated.
	129
57b592a3 AN	130	2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
	131
	132	* mips-dis.c: Update copyright.
	133	(mips_arch_choices): Add Octeon.
	134	* mips-opc.c: Update copyright.
	135	(IOCT): New macro.
	136	(mips_builtin_opcodes): Add Octeon instruction synciobdma.
	137
930bb4cf AM	138	2008-01-29 Alan Modra <amodra@bigpond.net.au>
	139
	140	* ppc-opc.c: Support optional L form mtmsr.
	141
82c18208 L	142	2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
	143
	144	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
	145
599121aa L	146	2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
	147
	148	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	149	* i386-init.h: Regenerated.
	150
80098f51 TG	151	2008-01-23 Tristan Gingold <gingold@adacore.com>
	152
	153	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	154	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
	155
115c7c25 L	156	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	157
	158	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	159	(cpu_flags): Likewise.
	160
	161	* i386-opc.h (CpuMMX2): Removed.
	162	(CpuSSE): Updated.
	163
	164	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE\|Cpu3dnowA.
	165	* i386-init.h: Regenerated.
	166	* i386-tbl.h: Likewise.
	167
6305a203 L	168	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	169
	170	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	171	CPU_SMX_FLAGS.
	172	* i386-init.h: Regenerated.
	173
fd07a1c8 L	174	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	175
	176	* i386-opc.tbl: Use Qword on movddup.
	177	* i386-tbl.h: Regenerated.
	178
321fd21e L	179	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	180
	181	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	182	* i386-tbl.h: Regenerated.
	183
4ee52178 L	184	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	185
	186	* i386-dis.c (Mx): New.
	187	(PREFIX_0FC3): Likewise.
	188	(PREFIX_0FC7_REG_6): Updated.
	189	(dis386_twobyte): Use PREFIX_0FC3.
	190	(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
	191	Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
	192	movntss.
	193
5c07affc L	194	2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
	195
	196	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	197	(operand_types): Add Mem.
	198
	199	* i386-opc.h (IntelSyntax): New.
	200	* i386-opc.h (Mem): New.
	201	(Byte): Updated.
	202	(Opcode_Modifier_Max): Updated.
	203	(i386_opcode_modifier): Add intelsyntax.
	204	(i386_operand_type): Add mem.
	205
	206	* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
	207	instructions.
	208
	209	* i386-reg.tbl: Add size for accumulator.
	210
	211	* i386-init.h: Regenerated.
	212	* i386-tbl.h: Likewise.
	213
0d6a2f58 L	214	2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
	215
	216	* i386-opc.h (Byte): Fix a typo.
	217
7d5e4556 L	218	2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
	219
	220	PR gas/5534
	221	* i386-gen.c (operand_type_init): Add Dword to
	222	OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
	223	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	224	Qword and Xmmword.
	225	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	226	Xmmword, Unspecified and Anysize.
	227	(set_bitfield): Make Mmword an alias of Qword. Make Oword
	228	an alias of Xmmword.
	229
	230	* i386-opc.h (CheckSize): Removed.
	231	(Byte): Updated.
	232	(Word): Likewise.
	233	(Dword): Likewise.
	234	(Qword): Likewise.
	235	(Xmmword): Likewise.
	236	(FWait): Updated.
	237	(OTMax): Likewise.
	238	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	239	qword and xmmword.
	240	(Fword): New.
	241	(TBYTE): Likewise.
	242	(Unspecified): Likewise.
	243	(Anysize): Likewise.
	244	(i386_operand_type): Add byte, word, dword, fword, qword,
	245	tbyte xmmword, unspecified and anysize.
	246
	247	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	248	Tbyte, Xmmword, Unspecified and Anysize.
	249
	250	* i386-reg.tbl: Add size for accumulator.
	251
	252	* i386-init.h: Regenerated.
	253	* i386-tbl.h: Likewise.
	254
b5b1fc4f L	255	2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
	256
	257	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	258	(REG_0F18): Updated.
	259	(reg_table): Updated.
	260	(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
	261	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
	262
50e8458f L	263	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	264
	265	* i386-gen.c (set_bitfield): Use fail () on error.
	266
3d4d5afa L	267	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	268
	269	* i386-gen.c (lineno): New.
	270	(filename): Likewise.
	271	(set_bitfield): Report filename and line numer on error.
	272	(process_i386_opcodes): Set filename and update lineno.
	273	(process_i386_registers): Likewise.
	274
e1d4d893 L	275	2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
	276
	277	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	278	ATTSyntax.
	279
	280	* i386-opc.h (IntelMnemonic): Renamed to ..
	281	(ATTSyntax): This
	282	(Opcode_Modifier_Max): Updated.
	283	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	284	and intelsyntax.
	285
	286	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	287	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	288	* i386-tbl.h: Regenerated.
	289
6f143e4d L	290	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	291
	292	* i386-gen.c: Update copyright to 2008.
	293	* i386-opc.h: Likewise.
	294	* i386-opc.tbl: Likewise.
	295
	296	* i386-init.h: Regenerated.
	297	* i386-tbl.h: Likewise.
	298
c6add537 L	299	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	300
	301	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	302	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	303	* i386-tbl.h: Regenerated.
	304
3629bb00 L	305	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	306
	307	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	308	CpuSSE4_2_Or_ABM.
	309	(cpu_flags): Likewise.
	310
	311	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	312	(CpuSSE4_2_Or_ABM): Likewise.
	313	(CpuLM): Updated.
	314	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
	315
	316	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	317	Cpu686\|CpuPadLock with CpuSSE4_1\|CpuSSE5, CpuABM\|CpuSSE4_2
	318	and CpuPadLock, respectively.
	319	* i386-init.h: Regenerated.
	320	* i386-tbl.h: Likewise.
	321
24995bd6 L	322	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	323
	324	* i386-gen.c (opcode_modifiers): Remove No_xSuf.
	325
	326	* i386-opc.h (No_xSuf): Removed.
	327	(CheckSize): Updated.
	328
	329	* i386-tbl.h: Regenerated.
	330
e0329a22 L	331	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	332
	333	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	334	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	335	CPU_SSE5_FLAGS.
	336	(cpu_flags): Add CpuSSE4_2_Or_ABM.
	337
	338	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	339	(CpuLM): Updated.
	340	(i386_cpu_flags): Add cpusse4_2_or_abm.
	341
	342	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	343	CpuABM\|CpuSSE4_2 on popcnt.
	344	* i386-init.h: Regenerated.
	345	* i386-tbl.h: Likewise.
	346
f2a9c676 L	347	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	348
	349	* i386-opc.h: Update comments.
	350
d978b5be L	351	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	352
	353	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	354	* i386-opc.h: Likewise.
	355	* i386-opc.tbl: Likewise.
	356
582d5edd L	357	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	358
	359	PR gas/5534
	360	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	361	Byte, Word, Dword, QWord and Xmmword.
	362
	363	* i386-opc.h (No_xSuf): New.
	364	(CheckSize): Likewise.
	365	(Byte): Likewise.
	366	(Word): Likewise.
	367	(Dword): Likewise.
	368	(QWord): Likewise.
	369	(Xmmword): Likewise.
	370	(FWait): Updated.
	371	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	372	Dword, QWord and Xmmword.
	373
	374	* i386-opc.tbl: Add CheckSize\|QWord to movq if IgnoreSize is
	375	used.
	376	* i386-tbl.h: Regenerated.
	377
3fe15143 MK	378	2008-01-02 Mark Kettenis <kettenis@gnu.org>
	379
	380	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	381	From Miod Vallat.
	382
6c7ac64e	383	For older changes see ChangeLog-2007
252b5132 RH	384	\f
252b5132 RH	385	Local Variables:
2f6d2f85 NC	386	mode: change-log
	387	left-margin: 8
	388	fill-column: 74
252b5132 RH	389	version-control: never
252b5132 RH	390	End: