[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	x86-64.
	* i386-tbl.h: Regenerated.

2008-02-21  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	and Fword for far indirect jmp. Allow Reg16 and Word for near
	indirect jmp on x86-64. Disallow Fword for lcall.
	* i386-tbl.h: Re-generate.

2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>

	* cr16-opc.c  (cr16_num_optab): Defined

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	* i386-init.h: Regenerated.

2008-02-14  Nick Clifton  <nickc@redhat.com>

	PR binutils/5524
	* configure.in (SHARED_LIBADD): Select the correct host specific
	file extension for shared libraries.
	* configure: Regenerate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-02-11  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	* i386-tbl.h: Re-generate.

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>

	* mips-dis.c: Update copyright.
	(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.

2008-01-29  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c: Support optional L form mtmsr.

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.

2008-01-23  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (Byte): Fix a typo.

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (set_bitfield): Use fail () on error.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (lineno): New.
	(filename): Likewise.
	(set_bitfield): Report filename and line numer on error.
	(process_i386_opcodes): Set filename and update lineno.
	(process_i386_registers): Likewise.

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax 
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c: Update copyright to 2008.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.

2008-01-02  Mark Kettenis  <kettenis@gnu.org>

	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	From Miod Vallat.

For older changes see ChangeLog-2007
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
849830bd L	1	2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
	2
	3	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	4	x86-64.
	5	* i386-tbl.h: Regenerated.
	6
743ddb6b JB	7	2008-02-21 Jan Beulich <jbeulich@novell.com>
	8
	9	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	10	and Fword for far indirect jmp. Allow Reg16 and Word for near
	11	indirect jmp on x86-64. Disallow Fword for lcall.
	12	* i386-tbl.h: Re-generate.
	13
796d5313 NC	14	2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
	15
	16	* cr16-opc.c (cr16_num_optab): Defined
	17
65da13b5 L	18	2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
	19
	20	* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	21	* i386-init.h: Regenerated.
	22
0e336180 NC	23	2008-02-14 Nick Clifton <nickc@redhat.com>
	24
	25	PR binutils/5524
	26	* configure.in (SHARED_LIBADD): Select the correct host specific
	27	file extension for shared libraries.
	28	* configure: Regenerate.
	29
b7240065 JB	30	2008-02-13 Jan Beulich <jbeulich@novell.com>
	31
	32	* i386-opc.h (RegFlat): New.
	33	* i386-reg.tbl (flat): Add.
	34	* i386-tbl.h: Re-generate.
	35
34b772a6 JB	36	2008-02-13 Jan Beulich <jbeulich@novell.com>
	37
	38	* i386-dis.c (a_mode): New.
	39	(cond_jump_mode): Adjust.
	40	(Ma): Change to a_mode.
	41	(intel_operand_size): Handle a_mode.
	42	* i386-opc.tbl: Allow Dword and Qword for bound.
	43	* i386-tbl.h: Re-generate.
	44
a60de03c JB	45	2008-02-13 Jan Beulich <jbeulich@novell.com>
	46
	47	* i386-gen.c (process_i386_registers): Process new fields.
	48	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	49	unsigned char. Add dw2_regnum and Dw2Inval.
	50	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	51	register names.
	52	* i386-tbl.h: Re-generate.
	53
f03fe4c1 L	54	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
f03fe4c1 L	55
4b6bc8eb	56	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
f03fe4c1 L	57	* i386-init.h: Updated.
f03fe4c1 L	58
475a2301 L	59	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
	60
	61	* i386-gen.c (cpu_flags): Add CpuXsave.
	62
	63	* i386-opc.h (CpuXsave): New.
4b6bc8eb	64	(CpuLM): Updated.
475a2301 L	65	(i386_cpu_flags): Add cpuxsave.
	66
	67	* i386-dis.c (MOD_0FAE_REG_4): New.
	68	(RM_0F01_REG_2): Likewise.
	69	(MOD_0FAE_REG_5): Updated.
	70	(RM_0F01_REG_3): Likewise.
	71	(reg_table): Use MOD_0FAE_REG_4.
	72	(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
	73	for xrstor.
	74	(rm_table): Add RM_0F01_REG_2.
	75
	76	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	77	* i386-init.h: Regenerated.
	78	* i386-tbl.h: Likewise.
	79
595785c6	80	2008-02-11 Jan Beulich <jbeulich@novell.com>
041179fc	81
595785c6 JB	82	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	83	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	84	* i386-tbl.h: Re-generate.
	85
bb8541b9 L	86	2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
	87
	88	PR 5715
	89	* configure: Regenerated.
	90
57b592a3 AN	91	2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
	92
	93	* mips-dis.c: Update copyright.
	94	(mips_arch_choices): Add Octeon.
	95	* mips-opc.c: Update copyright.
	96	(IOCT): New macro.
	97	(mips_builtin_opcodes): Add Octeon instruction synciobdma.
	98
930bb4cf AM	99	2008-01-29 Alan Modra <amodra@bigpond.net.au>
	100
	101	* ppc-opc.c: Support optional L form mtmsr.
	102
82c18208 L	103	2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
	104
	105	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
	106
599121aa L	107	2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
	108
	109	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	110	* i386-init.h: Regenerated.
	111
80098f51 TG	112	2008-01-23 Tristan Gingold <gingold@adacore.com>
	113
	114	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	115	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
	116
115c7c25 L	117	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	118
	119	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	120	(cpu_flags): Likewise.
	121
	122	* i386-opc.h (CpuMMX2): Removed.
	123	(CpuSSE): Updated.
	124
	125	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE\|Cpu3dnowA.
	126	* i386-init.h: Regenerated.
	127	* i386-tbl.h: Likewise.
	128
6305a203 L	129	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	130
	131	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	132	CPU_SMX_FLAGS.
	133	* i386-init.h: Regenerated.
	134
fd07a1c8 L	135	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	136
	137	* i386-opc.tbl: Use Qword on movddup.
	138	* i386-tbl.h: Regenerated.
	139
321fd21e L	140	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	141
	142	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	143	* i386-tbl.h: Regenerated.
	144
4ee52178 L	145	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	146
	147	* i386-dis.c (Mx): New.
	148	(PREFIX_0FC3): Likewise.
	149	(PREFIX_0FC7_REG_6): Updated.
	150	(dis386_twobyte): Use PREFIX_0FC3.
	151	(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
	152	Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
	153	movntss.
	154
5c07affc L	155	2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
	156
	157	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	158	(operand_types): Add Mem.
	159
	160	* i386-opc.h (IntelSyntax): New.
	161	* i386-opc.h (Mem): New.
	162	(Byte): Updated.
	163	(Opcode_Modifier_Max): Updated.
	164	(i386_opcode_modifier): Add intelsyntax.
	165	(i386_operand_type): Add mem.
	166
	167	* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
	168	instructions.
	169
	170	* i386-reg.tbl: Add size for accumulator.
	171
	172	* i386-init.h: Regenerated.
	173	* i386-tbl.h: Likewise.
	174
0d6a2f58 L	175	2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
	176
	177	* i386-opc.h (Byte): Fix a typo.
	178
7d5e4556 L	179	2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
	180
	181	PR gas/5534
	182	* i386-gen.c (operand_type_init): Add Dword to
	183	OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
	184	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	185	Qword and Xmmword.
	186	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	187	Xmmword, Unspecified and Anysize.
	188	(set_bitfield): Make Mmword an alias of Qword. Make Oword
	189	an alias of Xmmword.
	190
	191	* i386-opc.h (CheckSize): Removed.
	192	(Byte): Updated.
	193	(Word): Likewise.
	194	(Dword): Likewise.
	195	(Qword): Likewise.
	196	(Xmmword): Likewise.
	197	(FWait): Updated.
	198	(OTMax): Likewise.
	199	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	200	qword and xmmword.
	201	(Fword): New.
	202	(TBYTE): Likewise.
	203	(Unspecified): Likewise.
	204	(Anysize): Likewise.
	205	(i386_operand_type): Add byte, word, dword, fword, qword,
	206	tbyte xmmword, unspecified and anysize.
	207
	208	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	209	Tbyte, Xmmword, Unspecified and Anysize.
	210
	211	* i386-reg.tbl: Add size for accumulator.
	212
	213	* i386-init.h: Regenerated.
	214	* i386-tbl.h: Likewise.
	215
b5b1fc4f L	216	2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
	217
	218	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	219	(REG_0F18): Updated.
	220	(reg_table): Updated.
	221	(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
	222	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
	223
50e8458f L	224	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	225
	226	* i386-gen.c (set_bitfield): Use fail () on error.
	227
3d4d5afa L	228	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	229
	230	* i386-gen.c (lineno): New.
	231	(filename): Likewise.
	232	(set_bitfield): Report filename and line numer on error.
	233	(process_i386_opcodes): Set filename and update lineno.
	234	(process_i386_registers): Likewise.
	235
e1d4d893 L	236	2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
	237
	238	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	239	ATTSyntax.
	240
	241	* i386-opc.h (IntelMnemonic): Renamed to ..
	242	(ATTSyntax): This
	243	(Opcode_Modifier_Max): Updated.
	244	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	245	and intelsyntax.
	246
	247	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	248	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	249	* i386-tbl.h: Regenerated.
	250
6f143e4d L	251	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	252
	253	* i386-gen.c: Update copyright to 2008.
	254	* i386-opc.h: Likewise.
	255	* i386-opc.tbl: Likewise.
	256
	257	* i386-init.h: Regenerated.
	258	* i386-tbl.h: Likewise.
	259
c6add537 L	260	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	261
	262	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	263	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	264	* i386-tbl.h: Regenerated.
	265
3629bb00 L	266	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	267
	268	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	269	CpuSSE4_2_Or_ABM.
	270	(cpu_flags): Likewise.
	271
	272	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	273	(CpuSSE4_2_Or_ABM): Likewise.
	274	(CpuLM): Updated.
	275	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
	276
	277	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	278	Cpu686\|CpuPadLock with CpuSSE4_1\|CpuSSE5, CpuABM\|CpuSSE4_2
	279	and CpuPadLock, respectively.
	280	* i386-init.h: Regenerated.
	281	* i386-tbl.h: Likewise.
	282
24995bd6 L	283	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	284
	285	* i386-gen.c (opcode_modifiers): Remove No_xSuf.
	286
	287	* i386-opc.h (No_xSuf): Removed.
	288	(CheckSize): Updated.
	289
	290	* i386-tbl.h: Regenerated.
	291
e0329a22 L	292	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	293
	294	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	295	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	296	CPU_SSE5_FLAGS.
	297	(cpu_flags): Add CpuSSE4_2_Or_ABM.
	298
	299	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	300	(CpuLM): Updated.
	301	(i386_cpu_flags): Add cpusse4_2_or_abm.
	302
	303	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	304	CpuABM\|CpuSSE4_2 on popcnt.
	305	* i386-init.h: Regenerated.
	306	* i386-tbl.h: Likewise.
	307
f2a9c676 L	308	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	309
	310	* i386-opc.h: Update comments.
	311
d978b5be L	312	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	313
	314	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	315	* i386-opc.h: Likewise.
	316	* i386-opc.tbl: Likewise.
	317
582d5edd L	318	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	319
	320	PR gas/5534
	321	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	322	Byte, Word, Dword, QWord and Xmmword.
	323
	324	* i386-opc.h (No_xSuf): New.
	325	(CheckSize): Likewise.
	326	(Byte): Likewise.
	327	(Word): Likewise.
	328	(Dword): Likewise.
	329	(QWord): Likewise.
	330	(Xmmword): Likewise.
	331	(FWait): Updated.
	332	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	333	Dword, QWord and Xmmword.
	334
	335	* i386-opc.tbl: Add CheckSize\|QWord to movq if IgnoreSize is
	336	used.
	337	* i386-tbl.h: Regenerated.
	338
3fe15143 MK	339	2008-01-02 Mark Kettenis <kettenis@gnu.org>
	340
	341	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	342	From Miod Vallat.
	343
6c7ac64e	344	For older changes see ChangeLog-2007
252b5132 RH	345	\f
252b5132 RH	346	Local Variables:
2f6d2f85 NC	347	mode: change-log
	348	left-margin: 8
	349	fill-column: 74
252b5132 RH	350	version-control: never
252b5132 RH	351	End: