[deliverable/binutils-gdb.git] / opcodes / aarch64-asm-2.c

/* This file is automatically generated by aarch64-gen.  Do not edit!  */
/* Copyright 2012  Free Software Foundation, Inc.
   Contributed by ARM Ltd.

   This file is part of the GNU opcodes library.

   This library is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; see the file COPYING3. If not,
   see <http://www.gnu.org/licenses/>.  */

#include "sysdep.h"
#include "aarch64-asm.h"


const aarch64_opcode *
aarch64_find_real_opcode (const aarch64_opcode *opcode)
{
  /* Use the index as the key to locate the real opcode.  */
  int key = opcode - aarch64_opcode_table;
  int value;
  switch (key)
    {
    case 3:	/* ngc */
      value = 2;	/* --> sbc.  */
      break;
    case 5:	/* ngcs */
      value = 4;	/* --> sbcs.  */
      break;
    case 8:	/* cmn */
      value = 7;	/* --> adds.  */
      break;
    case 11:	/* cmp */
      value = 10;	/* --> subs.  */
      break;
    case 13:	/* mov */
      value = 12;	/* --> add.  */
      break;
    case 15:	/* cmn */
      value = 14;	/* --> adds.  */
      break;
    case 18:	/* cmp */
      value = 17;	/* --> subs.  */
      break;
    case 21:	/* cmn */
      value = 20;	/* --> adds.  */
      break;
    case 23:	/* neg */
      value = 22;	/* --> sub.  */
      break;
    case 26:	/* negs */
    case 25:	/* cmp */
      value = 24;	/* --> subs.  */
      break;
    case 139:	/* mov */
      value = 138;	/* --> umov.  */
      break;
    case 141:	/* mov */
      value = 140;	/* --> ins.  */
      break;
    case 143:	/* mov */
      value = 142;	/* --> ins.  */
      break;
    case 204:	/* mvn */
      value = 203;	/* --> not.  */
      break;
    case 259:	/* mov */
      value = 258;	/* --> orr.  */
      break;
    case 427:	/* mov */
      value = 426;	/* --> dup.  */
      break;
    case 494:	/* sxtw */
    case 493:	/* sxth */
    case 492:	/* sxtb */
    case 495:	/* asr */
    case 491:	/* sbfx */
    case 490:	/* sbfiz */
      value = 489;	/* --> sbfm.  */
      break;
    case 498:	/* bfxil */
    case 497:	/* bfi */
      value = 496;	/* --> bfm.  */
      break;
    case 503:	/* uxth */
    case 502:	/* uxtb */
    case 505:	/* lsr */
    case 504:	/* lsl */
    case 501:	/* ubfx */
    case 500:	/* ubfiz */
      value = 499;	/* --> ubfm.  */
      break;
    case 523:	/* cset */
    case 522:	/* cinc */
      value = 521;	/* --> csinc.  */
      break;
    case 526:	/* csetm */
    case 525:	/* cinv */
      value = 524;	/* --> csinv.  */
      break;
    case 528:	/* cneg */
      value = 527;	/* --> csneg.  */
      break;
    case 553:	/* lsl */
      value = 552;	/* --> lslv.  */
      break;
    case 555:	/* lsr */
      value = 554;	/* --> lsrv.  */
      break;
    case 557:	/* asr */
      value = 556;	/* --> asrv.  */
      break;
    case 559:	/* ror */
      value = 558;	/* --> rorv.  */
      break;
    case 561:	/* mul */
      value = 560;	/* --> madd.  */
      break;
    case 563:	/* mneg */
      value = 562;	/* --> msub.  */
      break;
    case 565:	/* smull */
      value = 564;	/* --> smaddl.  */
      break;
    case 567:	/* smnegl */
      value = 566;	/* --> smsubl.  */
      break;
    case 570:	/* umull */
      value = 569;	/* --> umaddl.  */
      break;
    case 572:	/* umnegl */
      value = 571;	/* --> umsubl.  */
      break;
    case 583:	/* ror */
      value = 582;	/* --> extr.  */
      break;
    case 683:	/* strb */
      value = 681;	/* --> sturb.  */
      break;
    case 684:	/* ldrb */
      value = 682;	/* --> ldurb.  */
      break;
    case 686:	/* ldrsb */
      value = 685;	/* --> ldursb.  */
      break;
    case 689:	/* str */
      value = 687;	/* --> stur.  */
      break;
    case 690:	/* ldr */
      value = 688;	/* --> ldur.  */
      break;
    case 693:	/* strh */
      value = 691;	/* --> sturh.  */
      break;
    case 694:	/* ldrh */
      value = 692;	/* --> ldurh.  */
      break;
    case 696:	/* ldrsh */
      value = 695;	/* --> ldursh.  */
      break;
    case 699:	/* str */
      value = 697;	/* --> stur.  */
      break;
    case 700:	/* ldr */
      value = 698;	/* --> ldur.  */
      break;
    case 702:	/* ldrsw */
      value = 701;	/* --> ldursw.  */
      break;
    case 704:	/* prfm */
      value = 703;	/* --> prfum.  */
      break;
    case 746:	/* bic */
      value = 745;	/* --> and.  */
      break;
    case 748:	/* mov */
      value = 747;	/* --> orr.  */
      break;
    case 751:	/* tst */
      value = 750;	/* --> ands.  */
      break;
    case 756:	/* uxtw */
    case 755:	/* mov */
      value = 754;	/* --> orr.  */
      break;
    case 758:	/* mvn */
      value = 757;	/* --> orn.  */
      break;
    case 762:	/* tst */
      value = 761;	/* --> ands.  */
      break;
    case 765:	/* mov */
      value = 764;	/* --> movn.  */
      break;
    case 767:	/* mov */
      value = 766;	/* --> movz.  */
      break;
    case 778:	/* sevl */
    case 777:	/* sev */
    case 776:	/* wfi */
    case 775:	/* wfe */
    case 774:	/* yield */
    case 773:	/* nop */
      value = 772;	/* --> hint.  */
      break;
    case 787:	/* tlbi */
    case 786:	/* ic */
    case 785:	/* dc */
    case 784:	/* at */
      value = 783;	/* --> sys.  */
      break;
    default: return NULL;
    }

  return aarch64_opcode_table + value;
}

const char*
aarch64_insert_operand (const aarch64_operand *self,
			   const aarch64_opnd_info *info,
			   aarch64_insn *code, const aarch64_inst *inst)
{
  /* Use the index as the key.  */
  int key = self - aarch64_operands;
  switch (key)
    {
    case 1:
    case 2:
    case 3:
    case 4:
    case 5:
    case 6:
    case 7:
    case 8:
    case 9:
    case 10:
    case 13:
    case 14:
    case 15:
    case 16:
    case 18:
    case 19:
    case 20:
    case 21:
    case 22:
    case 23:
    case 24:
    case 25:
    case 26:
    case 34:
    case 35:
      return aarch64_ins_regno (self, info, code, inst);
    case 11:
      return aarch64_ins_reg_extended (self, info, code, inst);
    case 12:
      return aarch64_ins_reg_shifted (self, info, code, inst);
    case 17:
      return aarch64_ins_ft (self, info, code, inst);
    case 27:
    case 28:
    case 29:
      return aarch64_ins_reglane (self, info, code, inst);
    case 30:
      return aarch64_ins_reglist (self, info, code, inst);
    case 31:
      return aarch64_ins_ldst_reglist (self, info, code, inst);
    case 32:
      return aarch64_ins_ldst_reglist_r (self, info, code, inst);
    case 33:
      return aarch64_ins_ldst_elemlist (self, info, code, inst);
    case 36:
    case 45:
    case 46:
    case 47:
    case 48:
    case 49:
    case 50:
    case 51:
    case 52:
    case 53:
    case 54:
    case 55:
    case 56:
    case 57:
    case 65:
    case 66:
    case 67:
    case 68:
      return aarch64_ins_imm (self, info, code, inst);
    case 37:
    case 38:
      return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
    case 39:
    case 40:
    case 41:
      return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
    case 58:
      return aarch64_ins_limm (self, info, code, inst);
    case 59:
      return aarch64_ins_aimm (self, info, code, inst);
    case 60:
      return aarch64_ins_imm_half (self, info, code, inst);
    case 61:
      return aarch64_ins_fbits (self, info, code, inst);
    case 63:
      return aarch64_ins_cond (self, info, code, inst);
    case 69:
    case 75:
      return aarch64_ins_addr_simple (self, info, code, inst);
    case 70:
      return aarch64_ins_addr_regoff (self, info, code, inst);
    case 71:
    case 72:
    case 73:
      return aarch64_ins_addr_simm (self, info, code, inst);
    case 74:
      return aarch64_ins_addr_uimm12 (self, info, code, inst);
    case 76:
      return aarch64_ins_simd_addr_post (self, info, code, inst);
    case 77:
      return aarch64_ins_sysreg (self, info, code, inst);
    case 78:
      return aarch64_ins_pstatefield (self, info, code, inst);
    case 79:
    case 80:
    case 81:
    case 82:
      return aarch64_ins_sysins_op (self, info, code, inst);
    case 83:
    case 84:
      return aarch64_ins_barrier (self, info, code, inst);
    case 85:
      return aarch64_ins_prfop (self, info, code, inst);
    default: assert (0); abort ();
    }
}
Commit	Line	Data
a06ea964 NC	1	/* This file is automatically generated by aarch64-gen. Do not edit! */
	2	/* Copyright 2012 Free Software Foundation, Inc.
	3	Contributed by ARM Ltd.
	4
	5	This file is part of the GNU opcodes library.
	6
	7	This library is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 3, or (at your option)
	10	any later version.
	11
	12	It is distributed in the hope that it will be useful, but WITHOUT
	13	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	14	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	15	License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program; see the file COPYING3. If not,
	19	see <http://www.gnu.org/licenses/>. */
	20
	21	#include "sysdep.h"
	22	#include "aarch64-asm.h"
	23
	24
	25	const aarch64_opcode *
	26	aarch64_find_real_opcode (const aarch64_opcode *opcode)
	27	{
	28	/* Use the index as the key to locate the real opcode. */
	29	int key = opcode - aarch64_opcode_table;
	30	int value;
	31	switch (key)
	32	{
	33	case 3: /* ngc */
	34	value = 2; /* --> sbc. */
	35	break;
	36	case 5: /* ngcs */
	37	value = 4; /* --> sbcs. */
	38	break;
	39	case 8: /* cmn */
	40	value = 7; /* --> adds. */
	41	break;
	42	case 11: /* cmp */
	43	value = 10; /* --> subs. */
	44	break;
	45	case 13: /* mov */
	46	value = 12; /* --> add. */
	47	break;
	48	case 15: /* cmn */
	49	value = 14; /* --> adds. */
	50	break;
	51	case 18: /* cmp */
	52	value = 17; /* --> subs. */
	53	break;
	54	case 21: /* cmn */
	55	value = 20; /* --> adds. */
	56	break;
	57	case 23: /* neg */
	58	value = 22; /* --> sub. */
	59	break;
	60	case 26: /* negs */
	61	case 25: /* cmp */
	62	value = 24; /* --> subs. */
	63	break;
	64	case 139: /* mov */
65	value = 138; /* --> umov. */
66	break;
67	case 141: /* mov */
68	value = 140; /* --> ins. */
69	break;
70	case 143: /* mov */
71	value = 142; /* --> ins. */
72	break;
73	case 204: /* mvn */
74	value = 203; /* --> not. */
75	break;
76	case 259: /* mov */
77	value = 258; /* --> orr. */
78	break;
79	case 427: /* mov */
80	value = 426; /* --> dup. */
81	break;
82	case 494: /* sxtw */
83	case 493: /* sxth */
84	case 492: /* sxtb */
85	case 495: /* asr */
86	case 491: /* sbfx */
87	case 490: /* sbfiz */
88	value = 489; /* --> sbfm. */
89	break;
90	case 498: /* bfxil */
91	case 497: /* bfi */
92	value = 496; /* --> bfm. */
93	break;
94	case 503: /* uxth */
95	case 502: /* uxtb */
96	case 505: /* lsr */
97	case 504: /* lsl */
98	case 501: /* ubfx */
99	case 500: /* ubfiz */
100	value = 499; /* --> ubfm. */
101	break;
102	case 523: /* cset */
103	case 522: /* cinc */
104	value = 521; /* --> csinc. */
105	break;
106	case 526: /* csetm */
107	case 525: /* cinv */
108	value = 524; /* --> csinv. */
109	break;
110	case 528: /* cneg */
111	value = 527; /* --> csneg. */
112	break;
113	case 553: /* lsl */
114	value = 552; /* --> lslv. */
115	break;
116	case 555: /* lsr */
117	value = 554; /* --> lsrv. */
118	break;
119	case 557: /* asr */
120	value = 556; /* --> asrv. */
121	break;
122	case 559: /* ror */
123	value = 558; /* --> rorv. */
124	break;
125	case 561: /* mul */
126	value = 560; /* --> madd. */
127	break;
128	case 563: /* mneg */
129	value = 562; /* --> msub. */
130	break;
131	case 565: /* smull */
132	value = 564; /* --> smaddl. */
133	break;
134	case 567: /* smnegl */
135	value = 566; /* --> smsubl. */
136	break;
137	case 570: /* umull */
138	value = 569; /* --> umaddl. */
139	break;
140	case 572: /* umnegl */
141	value = 571; /* --> umsubl. */
142	break;
143	case 583: /* ror */
144	value = 582; /* --> extr. */
145	break;
146	case 683: /* strb */
147	value = 681; /* --> sturb. */
148	break;
149	case 684: /* ldrb */
150	value = 682; /* --> ldurb. */
151	break;
152	case 686: /* ldrsb */
153	value = 685; /* --> ldursb. */
154	break;
155	case 689: /* str */
156	value = 687; /* --> stur. */
157	break;
158	case 690: /* ldr */
159	value = 688; /* --> ldur. */
160	break;
161	case 693: /* strh */
162	value = 691; /* --> sturh. */
163	break;
164	case 694: /* ldrh */
165	value = 692; /* --> ldurh. */
166	break;
167	case 696: /* ldrsh */
168	value = 695; /* --> ldursh. */
169	break;
170	case 699: /* str */
171	value = 697; /* --> stur. */
172	break;
173	case 700: /* ldr */
174	value = 698; /* --> ldur. */
175	break;
176	case 702: /* ldrsw */
177	value = 701; /* --> ldursw. */
178	break;
179	case 704: /* prfm */
180	value = 703; /* --> prfum. */
181	break;
182	case 746: /* bic */
183	value = 745; /* --> and. */
184	break;
185	case 748: /* mov */
186	value = 747; /* --> orr. */
187	break;
188	case 751: /* tst */
189	value = 750; /* --> ands. */
190	break;
191	case 756: /* uxtw */
192	case 755: /* mov */
193	value = 754; /* --> orr. */
194	break;
195	case 758: /* mvn */
196	value = 757; /* --> orn. */
197	break;
198	case 762: /* tst */
199	value = 761; /* --> ands. */
200	break;
201	case 765: /* mov */
202	value = 764; /* --> movn. */
203	break;
204	case 767: /* mov */
205	value = 766; /* --> movz. */
206	break;
207	case 778: /* sevl */
208	case 777: /* sev */
209	case 776: /* wfi */
210	case 775: /* wfe */
211	case 774: /* yield */
212	case 773: /* nop */
213	value = 772; /* --> hint. */
214	break;
215	case 787: /* tlbi */
216	case 786: /* ic */
217	case 785: /* dc */
218	case 784: /* at */
219	value = 783; /* --> sys. */
220	break;
221	default: return NULL;
222	}
223
224	return aarch64_opcode_table + value;
225	}
226
227	const char*
228	aarch64_insert_operand (const aarch64_operand *self,
229	const aarch64_opnd_info *info,
230	aarch64_insn code, const aarch64_inst inst)
231	{
232	/* Use the index as the key. */
233	int key = self - aarch64_operands;
234	switch (key)
235	{
236	case 1:
237	case 2:
238	case 3:
239	case 4:
240	case 5:
241	case 6:
242	case 7:
243	case 8:
244	case 9:
245	case 10:
246	case 13:
247	case 14:
248	case 15:
249	case 16:
250	case 18:
251	case 19:
252	case 20:
253	case 21:
254	case 22:
255	case 23:
256	case 24:
257	case 25:
258	case 26:
259	case 34:
260	case 35:
261	return aarch64_ins_regno (self, info, code, inst);
262	case 11:
263	return aarch64_ins_reg_extended (self, info, code, inst);
264	case 12:
265	return aarch64_ins_reg_shifted (self, info, code, inst);
266	case 17:
267	return aarch64_ins_ft (self, info, code, inst);
268	case 27:
269	case 28:
270	case 29:
271	return aarch64_ins_reglane (self, info, code, inst);
272	case 30:
273	return aarch64_ins_reglist (self, info, code, inst);
274	case 31:
275	return aarch64_ins_ldst_reglist (self, info, code, inst);
276	case 32:
277	return aarch64_ins_ldst_reglist_r (self, info, code, inst);
278	case 33:
279	return aarch64_ins_ldst_elemlist (self, info, code, inst);
280	case 36:
281	case 45:
282	case 46:
283	case 47:
284	case 48:
285	case 49:
286	case 50:
287	case 51:
288	case 52:
289	case 53:
290	case 54:
291	case 55:
292	case 56:
293	case 57:
294	case 65:
295	case 66:
296	case 67:
297	case 68:
298	return aarch64_ins_imm (self, info, code, inst);
299	case 37:
300	case 38:
301	return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
302	case 39:
303	case 40:
304	case 41:
305	return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
306	case 58:
307	return aarch64_ins_limm (self, info, code, inst);
308	case 59:
309	return aarch64_ins_aimm (self, info, code, inst);
310	case 60:
311	return aarch64_ins_imm_half (self, info, code, inst);
312	case 61:
313	return aarch64_ins_fbits (self, info, code, inst);
314	case 63:
315	return aarch64_ins_cond (self, info, code, inst);
316	case 69:
317	case 75:
318	return aarch64_ins_addr_simple (self, info, code, inst);
319	case 70:
320	return aarch64_ins_addr_regoff (self, info, code, inst);
321	case 71:
322	case 72:
323	case 73:
324	return aarch64_ins_addr_simm (self, info, code, inst);
325	case 74:
326	return aarch64_ins_addr_uimm12 (self, info, code, inst);
327	case 76:
328	return aarch64_ins_simd_addr_post (self, info, code, inst);
329	case 77:
330	return aarch64_ins_sysreg (self, info, code, inst);
331	case 78:
332	return aarch64_ins_pstatefield (self, info, code, inst);
333	case 79:
334	case 80:
335	case 81:
336	case 82:
337	return aarch64_ins_sysins_op (self, info, code, inst);
338	case 83:
339	case 84:
340	return aarch64_ins_barrier (self, info, code, inst);
341	case 85:
342	return aarch64_ins_prfop (self, info, code, inst);
343	default: assert (0); abort ();
344	}
345	}