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* gas/bfin/shift2.s: Add new tests.
[deliverable/binutils-gdb.git] / opcodes / bfin-dis.c
CommitLineData
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CM		 1/* Disassemble ADI Blackfin Instructions.
2 Copyright 2005 Free Software Foundation, Inc.
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
17 MA 02110-1301, USA. */
18
19#include <stdio.h>
20#include <stdlib.h>
21#include <string.h>
22
23#include "opcode/bfin.h"
24
25#define M_S2RND 1
26#define M_T 2
27#define M_W32 3
28#define M_FU 4
29#define M_TFU 6
30#define M_IS 8
31#define M_ISS2 9
32#define M_IH 11
33#define M_IU 12
34
35#ifndef PRINTF
36#define PRINTF printf
37#endif
38
39#ifndef EXIT
40#define EXIT exit
41#endif
42
43typedef long TIword;
44
b7d48530
NC		 45#define HOST_LONG_WORD_SIZE (sizeof (long) * 8)
46#define XFIELD(w,p,s) (((w) & ((1 << (s)) - 1) << (p)) >> (p))
47#define SIGNEXTEND(v, n) ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n)))
48#define MASKBITS(val, bits) (val & ((1 << bits) - 1))
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CM		 49
50#include "dis-asm.h"
b7d48530 51
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CM		 52typedef enum
53{
54 c_0, c_1, c_4, c_2, c_uimm2, c_uimm3, c_imm3, c_pcrel4,
55 c_imm4, c_uimm4s4, c_uimm4, c_uimm4s2, c_negimm5s4, c_imm5, c_uimm5, c_imm6,
56 c_imm7, c_imm8, c_uimm8, c_pcrel8, c_uimm8s4, c_pcrel8s4, c_lppcrel10, c_pcrel10,
57 c_pcrel12, c_imm16s4, c_luimm16, c_imm16, c_huimm16, c_rimm16, c_imm16s2, c_uimm16s4,
58 c_uimm16, c_pcrel24,
59} const_forms_t;
60
61static struct
62{
63 char *name;
64 int nbits;
65 char reloc;
66 char issigned;
67 char pcrel;
68 char scale;
69 char offset;
70 char negative;
71 char positive;
72} constant_formats[] =
73{
74 { "0", 0, 0, 1, 0, 0, 0, 0, 0},
75 { "1", 0, 0, 1, 0, 0, 0, 0, 0},
76 { "4", 0, 0, 1, 0, 0, 0, 0, 0},
77 { "2", 0, 0, 1, 0, 0, 0, 0, 0},
78 { "uimm2", 2, 0, 0, 0, 0, 0, 0, 0},
79 { "uimm3", 3, 0, 0, 0, 0, 0, 0, 0},
80 { "imm3", 3, 0, 1, 0, 0, 0, 0, 0},
81 { "pcrel4", 4, 1, 0, 1, 1, 0, 0, 0},
82 { "imm4", 4, 0, 1, 0, 0, 0, 0, 0},
83 { "uimm4s4", 4, 0, 0, 0, 2, 0, 0, 1},
84 { "uimm4", 4, 0, 0, 0, 0, 0, 0, 0},
85 { "uimm4s2", 4, 0, 0, 0, 1, 0, 0, 1},
86 { "negimm5s4", 5, 0, 1, 0, 2, 0, 1, 0},
87 { "imm5", 5, 0, 1, 0, 0, 0, 0, 0},
88 { "uimm5", 5, 0, 0, 0, 0, 0, 0, 0},
89 { "imm6", 6, 0, 1, 0, 0, 0, 0, 0},
90 { "imm7", 7, 0, 1, 0, 0, 0, 0, 0},
91 { "imm8", 8, 0, 1, 0, 0, 0, 0, 0},
92 { "uimm8", 8, 0, 0, 0, 0, 0, 0, 0},
93 { "pcrel8", 8, 1, 0, 1, 1, 0, 0, 0},
94 { "uimm8s4", 8, 0, 0, 0, 2, 0, 0, 0},
95 { "pcrel8s4", 8, 1, 1, 1, 2, 0, 0, 0},
96 { "lppcrel10", 10, 1, 0, 1, 1, 0, 0, 0},
97 { "pcrel10", 10, 1, 1, 1, 1, 0, 0, 0},
98 { "pcrel12", 12, 1, 1, 1, 1, 0, 0, 0},
99 { "imm16s4", 16, 0, 1, 0, 2, 0, 0, 0},
100 { "luimm16", 16, 1, 0, 0, 0, 0, 0, 0},
101 { "imm16", 16, 0, 1, 0, 0, 0, 0, 0},
102 { "huimm16", 16, 1, 0, 0, 0, 0, 0, 0},
103 { "rimm16", 16, 1, 1, 0, 0, 0, 0, 0},
104 { "imm16s2", 16, 0, 1, 0, 1, 0, 0, 0},
105 { "uimm16s4", 16, 0, 0, 0, 2, 0, 0, 0},
106 { "uimm16", 16, 0, 0, 0, 0, 0, 0, 0},
107 { "pcrel24", 24, 1, 1, 1, 1, 0, 0, 0}
108};
109
110int _print_insn_bfin (bfd_vma pc, disassemble_info * outf);
111int print_insn_bfin (bfd_vma pc, disassemble_info * outf);
112
113static char *
114fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info * outf)
115{
116 static char buf[60];
117
118 if (constant_formats[cf].reloc)
119 {
120 bfd_vma ea = (((constant_formats[cf].pcrel ? SIGNEXTEND (x, constant_formats[cf].nbits)
121 : x) + constant_formats[cf].offset) << constant_formats[cf].scale);
122 if (constant_formats[cf].pcrel)
123 ea += pc;
124
125 outf->print_address_func (ea, outf);
126 return "";
127 }
128
129 /* Negative constants have an implied sign bit. */
130 if (constant_formats[cf].negative)
131 {
132 int nb = constant_formats[cf].nbits + 1;
b7d48530 133
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CM		 134 x = x | (1 << constant_formats[cf].nbits);
135 x = SIGNEXTEND (x, nb);
136 }
137 else
138 x = constant_formats[cf].issigned ? SIGNEXTEND (x, constant_formats[cf].nbits) : x;
139
140 if (constant_formats[cf].offset)
141 x += constant_formats[cf].offset;
142
143 if (constant_formats[cf].scale)
144 x <<= constant_formats[cf].scale;
145
146 if (constant_formats[cf].issigned && x < 0)
147 sprintf (buf, "%ld", x);
148 else
149 sprintf (buf, "0x%lx", x);
150
151 return buf;
152}
153
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CM		 154enum machine_registers
155{
156 REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7,
157 REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7,
158 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
159 REG_R1_0, REG_R3_2, REG_R5_4, REG_R7_6, REG_P0, REG_P1, REG_P2, REG_P3,
160 REG_P4, REG_P5, REG_SP, REG_FP, REG_A0x, REG_A1x, REG_A0w, REG_A1w,
161 REG_A0, REG_A1, REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1,
162 REG_M2, REG_M3, REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1,
163 REG_L2, REG_L3,
164 REG_AZ, REG_AN, REG_AC0, REG_AC1, REG_AV0, REG_AV1, REG_AV0S, REG_AV1S,
165 REG_AQ, REG_V, REG_VS,
166 REG_sftreset, REG_omode, REG_excause, REG_emucause, REG_idle_req, REG_hwerrcause, REG_CC, REG_LC0,
167 REG_LC1, REG_GP, REG_ASTAT, REG_RETS, REG_LT0, REG_LB0, REG_LT1, REG_LB1,
168 REG_CYCLES, REG_CYCLES2, REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN,
169 REG_RETE, REG_EMUDAT, REG_BR0, REG_BR1, REG_BR2, REG_BR3, REG_BR4, REG_BR5, REG_BR6,
170 REG_BR7, REG_PL0, REG_PL1, REG_PL2, REG_PL3, REG_PL4, REG_PL5, REG_SLP, REG_FLP,
171 REG_PH0, REG_PH1, REG_PH2, REG_PH3, REG_PH4, REG_PH5, REG_SHP, REG_FHP,
172 REG_IL0, REG_IL1, REG_IL2, REG_IL3, REG_ML0, REG_ML1, REG_ML2, REG_ML3,
173 REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3,
174 REG_IH0, REG_IH1, REG_IH2, REG_IH3, REG_MH0, REG_MH1, REG_MH2, REG_MH3,
175 REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3,
176 REG_LASTREG,
177};
178
179enum reg_class
180{
181 rc_dregs_lo, rc_dregs_hi, rc_dregs, rc_dregs_pair, rc_pregs, rc_spfp, rc_dregs_hilo, rc_accum_ext,
182 rc_accum_word, rc_accum, rc_iregs, rc_mregs, rc_bregs, rc_lregs, rc_dpregs, rc_gregs,
183 rc_regs, rc_statbits, rc_ignore_bits, rc_ccstat, rc_counters, rc_dregs2_sysregs1, rc_open, rc_sysregs2,
184 rc_sysregs3, rc_allregs,
185 LIM_REG_CLASSES
186};
187
188static char *reg_names[] =
189{
190 "R0.L", "R1.L", "R2.L", "R3.L", "R4.L", "R5.L", "R6.L", "R7.L",
191 "R0.H", "R1.H", "R2.H", "R3.H", "R4.H", "R5.H", "R6.H", "R7.H",
192 "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
193 "R1:0", "R3:2", "R5:4", "R7:6", "P0", "P1", "P2", "P3",
194 "P4", "P5", "SP", "FP", "A0.x", "A1.x", "A0.w", "A1.w",
195 "A0", "A1", "I0", "I1", "I2", "I3", "M0", "M1",
196 "M2", "M3", "B0", "B1", "B2", "B3", "L0", "L1",
197 "L2", "L3",
198 "AZ", "AN", "AC0", "AC1", "AV0", "AV1", "AV0S", "AV1S",
199 "AQ", "V", "VS",
200 "sftreset", "omode", "excause", "emucause", "idle_req", "hwerrcause", "CC", "LC0",
201 "LC1", "GP", "ASTAT", "RETS", "LT0", "LB0", "LT1", "LB1",
202 "CYCLES", "CYCLES2", "USP", "SEQSTAT", "SYSCFG", "RETI", "RETX", "RETN",
203 "RETE", "EMUDAT",
204 "R0.B", "R1.B", "R2.B", "R3.B", "R4.B", "R5.B", "R6.B", "R7.B",
205 "P0.L", "P1.L", "P2.L", "P3.L", "P4.L", "P5.L", "SP.L", "FP.L",
206 "P0.H", "P1.H", "P2.H", "P3.H", "P4.H", "P5.H", "SP.H", "FP.H",
207 "I0.L", "I1.L", "I2.L", "I3.L", "M0.L", "M1.L", "M2.L", "M3.L",
208 "B0.L", "B1.L", "B2.L", "B3.L", "L0.L", "L1.L", "L2.L", "L3.L",
209 "I0.H", "I1.H", "I2.H", "I3.H", "M0.H", "M1.H", "M2.H", "M3.H",
210 "B0.H", "B1.H", "B2.H", "B3.H", "L0.H", "L1.H", "L2.H", "L3.H",
211 "LASTREG",
212 0
213};
214
215#define REGNAME(x) ((x) < REG_LASTREG ? (reg_names[x]) : "...... Illegal register .......")
216
217/* RL(0..7). */
218static enum machine_registers decode_dregs_lo[] =
219{
220 REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7,
221};
222
b7d48530 223#define dregs_lo(x) REGNAME (decode_dregs_lo[(x) & 7])
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CM		 224
225/* RH(0..7). */
226static enum machine_registers decode_dregs_hi[] =
227{
228 REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7,
229};
230
b7d48530 231#define dregs_hi(x) REGNAME (decode_dregs_hi[(x) & 7])
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CM		 232
233/* R(0..7). */
234static enum machine_registers decode_dregs[] =
235{
236 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
237};
238
b7d48530 239#define dregs(x) REGNAME (decode_dregs[(x) & 7])
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CM		 240
241/* R BYTE(0..7). */
242static enum machine_registers decode_dregs_byte[] =
243{
244 REG_BR0, REG_BR1, REG_BR2, REG_BR3, REG_BR4, REG_BR5, REG_BR6, REG_BR7,
245};
246
b7d48530
NC		 247#define dregs_byte(x) REGNAME (decode_dregs_byte[(x) & 7])
248#define dregs_pair(x) REGNAME (decode_dregs_pair[(x) & 7])
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CM		 249
250/* P(0..5) SP FP. */
251static enum machine_registers decode_pregs[] =
252{
253 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
254};
255
b7d48530
NC		 256#define pregs(x) REGNAME (decode_pregs[(x) & 7])
257#define spfp(x) REGNAME (decode_spfp[(x) & 1])
258#define dregs_hilo(x,i) REGNAME (decode_dregs_hilo[((i) << 3)|x])
259#define accum_ext(x) REGNAME (decode_accum_ext[(x) & 1])
260#define accum_word(x) REGNAME (decode_accum_word[(x) & 1])
261#define accum(x) REGNAME (decode_accum[(x) & 1])
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CM		 262
263/* I(0..3). */
264static enum machine_registers decode_iregs[] =
265{
266 REG_I0, REG_I1, REG_I2, REG_I3,
267};
268
b7d48530 269#define iregs(x) REGNAME (decode_iregs[(x) & 3])
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CM		 270
271/* M(0..3). */
272static enum machine_registers decode_mregs[] =
273{
274 REG_M0, REG_M1, REG_M2, REG_M3,
275};
276
b7d48530
NC		 277#define mregs(x) REGNAME (decode_mregs[(x) & 3])
278#define bregs(x) REGNAME (decode_bregs[(x) & 3])
279#define lregs(x) REGNAME (decode_lregs[(x) & 3])
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CM		 280
281/* dregs pregs. */
282static enum machine_registers decode_dpregs[] =
283{
284 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
285 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
286};
287
b7d48530 288#define dpregs(x) REGNAME (decode_dpregs[(x) & 15])
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CM		 289
290/* [dregs pregs]. */
291static enum machine_registers decode_gregs[] =
292{
293 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
294 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
295};
296
b7d48530 297#define gregs(x,i) REGNAME (decode_gregs[((i) << 3)|x])
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CM		 298
299/* [dregs pregs (iregs mregs) (bregs lregs)]. */
300static enum machine_registers decode_regs[] =
301{
302 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
303 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
304 REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3,
305 REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3,
306};
307
b7d48530 308#define regs(x,i) REGNAME (decode_regs[((i) << 3)|x])
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CM		 309
310/* [dregs pregs (iregs mregs) (bregs lregs) Low Half]. */
311static enum machine_registers decode_regs_lo[] =
312{
313 REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7,
314 REG_PL0, REG_PL1, REG_PL2, REG_PL3, REG_PL4, REG_PL5, REG_SLP, REG_FLP,
315 REG_IL0, REG_IL1, REG_IL2, REG_IL3, REG_ML0, REG_ML1, REG_ML2, REG_ML3,
316 REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3,
317};
318
b7d48530 319#define regs_lo(x,i) REGNAME (decode_regs_lo[((i) << 3)|x])
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CM		 320/* [dregs pregs (iregs mregs) (bregs lregs) High Half]. */
321static enum machine_registers decode_regs_hi[] =
322{
323 REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7,
324 REG_PH0, REG_PH1, REG_PH2, REG_PH3, REG_PH4, REG_PH5, REG_SHP, REG_FHP,
325 REG_IH0, REG_IH1, REG_IH2, REG_IH3, REG_MH0, REG_MH1, REG_LH2, REG_MH3,
326 REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3,
327};
328
b7d48530 329#define regs_hi(x,i) REGNAME (decode_regs_hi[((i) << 3)|x])
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CM		 330
331static enum machine_registers decode_statbits[] =
332{
333 REG_AZ, REG_AN, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_AQ, REG_LASTREG,
334 REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_AC0, REG_AC1, REG_LASTREG, REG_LASTREG,
335 REG_AV0, REG_AV0S, REG_AV1, REG_AV1S, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG,
336 REG_V, REG_VS, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG,
337};
338
b7d48530
NC		 339#define statbits(x) REGNAME (decode_statbits[(x) & 31])
340#define ignore_bits(x) REGNAME (decode_ignore_bits[(x) & 7])
341#define ccstat(x) REGNAME (decode_ccstat[(x) & 0])
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CM		 342
343/* LC0 LC1. */
344static enum machine_registers decode_counters[] =
345{
346 REG_LC0, REG_LC1,
347};
348
b7d48530
NC		 349#define counters(x) REGNAME (decode_counters[(x) & 1])
350#define dregs2_sysregs1(x) REGNAME (decode_dregs2_sysregs1[(x) & 7])
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CM		 351
352/* [dregs pregs (iregs mregs) (bregs lregs)
353 dregs2_sysregs1 open sysregs2 sysregs3]. */
354static enum machine_registers decode_allregs[] =
355{
356 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
357 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
358 REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3,
359 REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3,
360 REG_A0x, REG_A0w, REG_A1x, REG_A1w, REG_GP, REG_LASTREG, REG_ASTAT, REG_RETS,
361 REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG,
362 REG_LC0, REG_LT0, REG_LB0, REG_LC1, REG_LT1, REG_LB1, REG_CYCLES, REG_CYCLES2,
363 REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN, REG_RETE, REG_EMUDAT, REG_LASTREG,
364};
365
b7d48530
NC		 366#define allregs(x,i) REGNAME (decode_allregs[((i) << 3) | x])
367#define uimm16s4(x) fmtconst (c_uimm16s4, x, 0, outf)
368#define pcrel4(x) fmtconst (c_pcrel4, x, pc, outf)
369#define pcrel8(x) fmtconst (c_pcrel8, x, pc, outf)
370#define pcrel8s4(x) fmtconst (c_pcrel8s4, x, pc, outf)
371#define pcrel10(x) fmtconst (c_pcrel10, x, pc, outf)
372#define pcrel12(x) fmtconst (c_pcrel12, x, pc, outf)
373#define negimm5s4(x) fmtconst (c_negimm5s4, x, 0, outf)
374#define rimm16(x) fmtconst (c_rimm16, x, 0, outf)
375#define huimm16(x) fmtconst (c_huimm16, x, 0, outf)
376#define imm16(x) fmtconst (c_imm16, x, 0, outf)
377#define uimm2(x) fmtconst (c_uimm2, x, 0, outf)
378#define uimm3(x) fmtconst (c_uimm3, x, 0, outf)
379#define luimm16(x) fmtconst (c_luimm16, x, 0, outf)
380#define uimm4(x) fmtconst (c_uimm4, x, 0, outf)
381#define uimm5(x) fmtconst (c_uimm5, x, 0, outf)
382#define imm16s2(x) fmtconst (c_imm16s2, x, 0, outf)
383#define uimm8(x) fmtconst (c_uimm8, x, 0, outf)
384#define imm16s4(x) fmtconst (c_imm16s4, x, 0, outf)
385#define uimm4s2(x) fmtconst (c_uimm4s2, x, 0, outf)
386#define uimm4s4(x) fmtconst (c_uimm4s4, x, 0, outf)
387#define lppcrel10(x) fmtconst (c_lppcrel10, x, pc, outf)
388#define imm3(x) fmtconst (c_imm3, x, 0, outf)
389#define imm4(x) fmtconst (c_imm4, x, 0, outf)
390#define uimm8s4(x) fmtconst (c_uimm8s4, x, 0, outf)
391#define imm5(x) fmtconst (c_imm5, x, 0, outf)
392#define imm6(x) fmtconst (c_imm6, x, 0, outf)
393#define imm7(x) fmtconst (c_imm7, x, 0, outf)
394#define imm8(x) fmtconst (c_imm8, x, 0, outf)
395#define pcrel24(x) fmtconst (c_pcrel24, x, pc, outf)
396#define uimm16(x) fmtconst (c_uimm16, x, 0, outf)
4b7f6baa
CM		 397
398/* (arch.pm)arch_disassembler_functions. */
4b7f6baa 399#ifndef OUTS
b7d48530 400#define OUTS(p, txt) ((p) ? (((txt)[0]) ? (p->fprintf_func)(p->stream, txt) :0) :0)
4b7f6baa
CM		 401#endif
402
4b7f6baa
CM		 403static void
404amod0 (int s0, int x0, disassemble_info *outf)
405{
b7d48530
NC		 406 if (s0 == 1 && x0 == 0)
407 OUTS (outf, "(S)");
4b7f6baa 408 else if (s0 == 0 && x0 == 1)
b7d48530 409 OUTS (outf, "(CO)");
4b7f6baa 410 else if (s0 == 1 && x0 == 1)
b7d48530 411 OUTS (outf, "(SCO)");
4b7f6baa
CM		 412}
413
414static void
415amod1 (int s0, int x0, disassemble_info *outf)
416{
417 if (s0 == 0 && x0 == 0)
b7d48530 418 OUTS (outf, "(NS)");
4b7f6baa 419 else if (s0 == 1 && x0 == 0)
b7d48530 420 OUTS (outf, "(S)");
4b7f6baa
CM		 421}
422
423static void
424amod0amod2 (int s0, int x0, int aop0, disassemble_info *outf)
425{
b7d48530
NC		 426 if (s0 == 1 && x0 == 0 && aop0 == 0)
427 OUTS (outf, "(S)");
4b7f6baa 428 else if (s0 == 0 && x0 == 1 && aop0 == 0)
b7d48530 429 OUTS (outf, "(CO)");
4b7f6baa 430 else if (s0 == 1 && x0 == 1 && aop0 == 0)
b7d48530 431 OUTS (outf, "(SCO)");
4b7f6baa 432 else if (s0 == 0 && x0 == 0 && aop0 == 2)
b7d48530 433 OUTS (outf, "(ASR)");
4b7f6baa 434 else if (s0 == 1 && x0 == 0 && aop0 == 2)
b7d48530 435 OUTS (outf, "(S,ASR)");
4b7f6baa 436 else if (s0 == 0 && x0 == 1 && aop0 == 2)
b7d48530 437 OUTS (outf, "(CO,ASR)");
4b7f6baa 438 else if (s0 == 1 && x0 == 1 && aop0 == 2)
b7d48530 439 OUTS (outf, "(SCO,ASR)");
4b7f6baa 440 else if (s0 == 0 && x0 == 0 && aop0 == 3)
b7d48530 441 OUTS (outf, "(ASL)");
4b7f6baa 442 else if (s0 == 1 && x0 == 0 && aop0 == 3)
b7d48530 443 OUTS (outf, "(S,ASL)");
4b7f6baa 444 else if (s0 == 0 && x0 == 1 && aop0 == 3)
b7d48530 445 OUTS (outf, "(CO,ASL)");
4b7f6baa 446 else if (s0 == 1 && x0 == 1 && aop0 == 3)
b7d48530 447 OUTS (outf, "(SCO,ASL)");
4b7f6baa
CM		 448}
449
450static void
451searchmod (int r0, disassemble_info *outf)
452{
b7d48530
NC		 453 if (r0 == 0)
454 OUTS (outf, "GT");
455 else if (r0 == 1)
456 OUTS (outf, "GE");
457 else if (r0 == 2)
458 OUTS (outf, "LT");
459 else if (r0 == 3)
460 OUTS (outf, "LE");
4b7f6baa
CM		 461}
462
463static void
464aligndir (int r0, disassemble_info *outf)
465{
b7d48530
NC		 466 if (r0 == 1)
467 OUTS (outf, "(R)");
4b7f6baa
CM		 468}
469
470static int
471decode_multfunc (int h0, int h1, int src0, int src1, disassemble_info * outf)
472{
473 char *s0, *s1;
474
475 if (h0)
476 s0 = dregs_hi (src0);
477 else
478 s0 = dregs_lo (src0);
479
480 if (h1)
481 s1 = dregs_hi (src1);
482 else
483 s1 = dregs_lo (src1);
484
485 OUTS (outf, s0);
486 OUTS (outf, " * ");
487 OUTS (outf, s1);
488 return 0;
489}
490
491static int
492decode_macfunc (int which, int op, int h0, int h1, int src0, int src1, disassemble_info * outf)
493{
494 char *a;
495 char *sop = "<unknown op>";
496
497 if (which)
498 a = "a1";
499 else
500 a = "a0";
501
502 if (op == 3)
503 {
504 OUTS (outf, a);
505 return 0;
506 }
507
508 switch (op)
509 {
b7d48530
NC		 510 case 0: sop = "="; break;
511 case 1: sop = "+="; break;
512 case 2: sop = "-="; break;
513 default: break;
4b7f6baa
CM		 514 }
515
516 OUTS (outf, a);
517 OUTS (outf, " ");
518 OUTS (outf, sop);
519 OUTS (outf, " ");
520 decode_multfunc (h0, h1, src0, src1, outf);
521
522 return 0;
523}
524
525static void
526decode_optmode (int mod, int MM, disassemble_info *outf)
527{
528 if (mod == 0 && MM == 0)
529 return;
530
531 OUTS (outf, " (");
532
533 if (MM && !mod)
534 {
535 OUTS (outf, "M)");
536 return;
537 }
538
539 if (MM)
540 OUTS (outf, "M, ");
b7d48530 541
4b7f6baa
CM		 542 if (mod == M_S2RND)
543 OUTS (outf, "S2RND");
544 else if (mod == M_T)
545 OUTS (outf, "T");
546 else if (mod == M_W32)
547 OUTS (outf, "W32");
548 else if (mod == M_FU)
549 OUTS (outf, "FU");
550 else if (mod == M_TFU)
551 OUTS (outf, "TFU");
552 else if (mod == M_IS)
553 OUTS (outf, "IS");
554 else if (mod == M_ISS2)
555 OUTS (outf, "ISS2");
556 else if (mod == M_IH)
557 OUTS (outf, "IH");
558 else if (mod == M_IU)
559 OUTS (outf, "IU");
560 else
561 abort ();
562
563 OUTS (outf, ")");
564}
b7d48530 565
4b7f6baa
CM		 566static int
567decode_ProgCtrl_0 (TIword iw0, disassemble_info *outf)
568{
b7d48530
NC		 569 /* ProgCtrl
570 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
571 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........|
572 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 573 int poprnd = ((iw0 >> ProgCtrl_poprnd_bits) & ProgCtrl_poprnd_mask);
574 int prgfunc = ((iw0 >> ProgCtrl_prgfunc_bits) & ProgCtrl_prgfunc_mask);
575
576 if (prgfunc == 0 && poprnd == 0)
b7d48530 577 OUTS (outf, "NOP");
4b7f6baa 578 else if (prgfunc == 1 && poprnd == 0)
b7d48530 579 OUTS (outf, "RTS");
4b7f6baa 580 else if (prgfunc == 1 && poprnd == 1)
b7d48530 581 OUTS (outf, "RTI");
4b7f6baa 582 else if (prgfunc == 1 && poprnd == 2)
b7d48530 583 OUTS (outf, "RTX");
4b7f6baa 584 else if (prgfunc == 1 && poprnd == 3)
b7d48530 585 OUTS (outf, "RTN");
4b7f6baa 586 else if (prgfunc == 1 && poprnd == 4)
b7d48530 587 OUTS (outf, "RTE");
4b7f6baa 588 else if (prgfunc == 2 && poprnd == 0)
b7d48530 589 OUTS (outf, "IDLE");
4b7f6baa 590 else if (prgfunc == 2 && poprnd == 3)
b7d48530 591 OUTS (outf, "CSYNC");
4b7f6baa 592 else if (prgfunc == 2 && poprnd == 4)
b7d48530 593 OUTS (outf, "SSYNC");
4b7f6baa 594 else if (prgfunc == 2 && poprnd == 5)
b7d48530 595 OUTS (outf, "EMUEXCPT");
4b7f6baa
CM		 596 else if (prgfunc == 3)
597 {
4b7f6baa
CM		 598 OUTS (outf, "CLI ");
599 OUTS (outf, dregs (poprnd));
4b7f6baa
CM		 600 }
601 else if (prgfunc == 4)
602 {
4b7f6baa
CM		 603 OUTS (outf, "STI ");
604 OUTS (outf, dregs (poprnd));
4b7f6baa
CM		 605 }
606 else if (prgfunc == 5)
607 {
4b7f6baa
CM		 608 OUTS (outf, "JUMP (");
609 OUTS (outf, pregs (poprnd));
610 OUTS (outf, ")");
4b7f6baa
CM		 611 }
612 else if (prgfunc == 6)
613 {
4b7f6baa
CM		 614 OUTS (outf, "CALL (");
615 OUTS (outf, pregs (poprnd));
616 OUTS (outf, ")");
4b7f6baa
CM		 617 }
618 else if (prgfunc == 7)
619 {
4b7f6baa
CM		 620 OUTS (outf, "CALL (PC+");
621 OUTS (outf, pregs (poprnd));
622 OUTS (outf, ")");
4b7f6baa
CM		 623 }
624 else if (prgfunc == 8)
625 {
4b7f6baa
CM		 626 OUTS (outf, "JUMP (PC+");
627 OUTS (outf, pregs (poprnd));
628 OUTS (outf, ")");
4b7f6baa
CM		 629 }
630 else if (prgfunc == 9)
631 {
4b7f6baa
CM		 632 OUTS (outf, "RAISE ");
633 OUTS (outf, uimm4 (poprnd));
4b7f6baa
CM		 634 }
635 else if (prgfunc == 10)
636 {
4b7f6baa
CM		 637 OUTS (outf, "EXCPT ");
638 OUTS (outf, uimm4 (poprnd));
4b7f6baa
CM		 639 }
640 else if (prgfunc == 11)
641 {
4b7f6baa
CM		 642 OUTS (outf, "TESTSET (");
643 OUTS (outf, pregs (poprnd));
644 OUTS (outf, ")");
4b7f6baa
CM		 645 }
646 else
b7d48530
NC		 647 return 0;
648 return 2;
4b7f6baa
CM		 649}
650
651static int
652decode_CaCTRL_0 (TIword iw0, disassemble_info *outf)
653{
b7d48530
NC		 654 /* CaCTRL
655 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
656 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......|
657 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 658 int a = ((iw0 >> CaCTRL_a_bits) & CaCTRL_a_mask);
659 int op = ((iw0 >> CaCTRL_op_bits) & CaCTRL_op_mask);
660 int reg = ((iw0 >> CaCTRL_reg_bits) & CaCTRL_reg_mask);
661
662 if (a == 0 && op == 0)
663 {
4b7f6baa
CM		 664 OUTS (outf, "PREFETCH[");
665 OUTS (outf, pregs (reg));
666 OUTS (outf, "]");
4b7f6baa
CM		 667 }
668 else if (a == 0 && op == 1)
669 {
4b7f6baa
CM		 670 OUTS (outf, "FLUSHINV[");
671 OUTS (outf, pregs (reg));
672 OUTS (outf, "]");
4b7f6baa
CM		 673 }
674 else if (a == 0 && op == 2)
675 {
4b7f6baa
CM		 676 OUTS (outf, "FLUSH[");
677 OUTS (outf, pregs (reg));
678 OUTS (outf, "]");
4b7f6baa
CM		 679 }
680 else if (a == 0 && op == 3)
681 {
4b7f6baa
CM		 682 OUTS (outf, "IFLUSH[");
683 OUTS (outf, pregs (reg));
684 OUTS (outf, "]");
4b7f6baa
CM		 685 }
686 else if (a == 1 && op == 0)
687 {
4b7f6baa
CM		 688 OUTS (outf, "PREFETCH[");
689 OUTS (outf, pregs (reg));
690 OUTS (outf, "++]");
4b7f6baa
CM		 691 }
692 else if (a == 1 && op == 1)
693 {
4b7f6baa
CM		 694 OUTS (outf, "FLUSHINV[");
695 OUTS (outf, pregs (reg));
696 OUTS (outf, "++]");
4b7f6baa
CM		 697 }
698 else if (a == 1 && op == 2)
699 {
4b7f6baa
CM		 700 OUTS (outf, "FLUSH[");
701 OUTS (outf, pregs (reg));
702 OUTS (outf, "++]");
4b7f6baa
CM		 703 }
704 else if (a == 1 && op == 3)
705 {
4b7f6baa
CM		 706 OUTS (outf, "IFLUSH[");
707 OUTS (outf, pregs (reg));
708 OUTS (outf, "++]");
4b7f6baa
CM		 709 }
710 else
b7d48530
NC		 711 return 0;
712 return 2;
4b7f6baa
CM		 713}
714
715static int
716decode_PushPopReg_0 (TIword iw0, disassemble_info *outf)
717{
b7d48530
NC		 718 /* PushPopReg
719 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
720 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......|
721 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 722 int W = ((iw0 >> PushPopReg_W_bits) & PushPopReg_W_mask);
723 int grp = ((iw0 >> PushPopReg_grp_bits) & PushPopReg_grp_mask);
724 int reg = ((iw0 >> PushPopReg_reg_bits) & PushPopReg_reg_mask);
725
726 if (W == 0)
727 {
4b7f6baa
CM		 728 OUTS (outf, allregs (reg, grp));
729 OUTS (outf, " = [SP++]");
4b7f6baa
CM		 730 }
731 else if (W == 1)
732 {
4b7f6baa
CM		 733 OUTS (outf, "[--SP] = ");
734 OUTS (outf, allregs (reg, grp));
4b7f6baa
CM		 735 }
736 else
b7d48530
NC		 737 return 0;
738 return 2;
4b7f6baa
CM		 739}
740
741static int
742decode_PushPopMultiple_0 (TIword iw0, disassemble_info *outf)
743{
b7d48530
NC		 744 /* PushPopMultiple
745 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
746 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........|
747 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 748 int p = ((iw0 >> PushPopMultiple_p_bits) & PushPopMultiple_p_mask);
749 int d = ((iw0 >> PushPopMultiple_d_bits) & PushPopMultiple_d_mask);
750 int W = ((iw0 >> PushPopMultiple_W_bits) & PushPopMultiple_W_mask);
751 int dr = ((iw0 >> PushPopMultiple_dr_bits) & PushPopMultiple_dr_mask);
752 int pr = ((iw0 >> PushPopMultiple_pr_bits) & PushPopMultiple_pr_mask);
4b7f6baa 753 char ps[5], ds[5];
b7d48530 754
4b7f6baa
CM		 755 sprintf (ps, "%d", pr);
756 sprintf (ds, "%d", dr);
757
758 if (W == 1 && d == 1 && p == 1)
759 {
4b7f6baa
CM		 760 OUTS (outf, "[--SP] = (R7:");
761 OUTS (outf, ds);
762 OUTS (outf, ", P5:");
763 OUTS (outf, ps);
764 OUTS (outf, ")");
4b7f6baa
CM		 765 }
766 else if (W == 1 && d == 1 && p == 0)
767 {
4b7f6baa
CM		 768 OUTS (outf, "[--SP] = (R7:");
769 OUTS (outf, ds);
770 OUTS (outf, ")");
4b7f6baa
CM		 771 }
772 else if (W == 1 && d == 0 && p == 1)
773 {
4b7f6baa
CM		 774 OUTS (outf, "[--SP] = (P5:");
775 OUTS (outf, ps);
776 OUTS (outf, ")");
4b7f6baa
CM		 777 }
778 else if (W == 0 && d == 1 && p == 1)
779 {
4b7f6baa
CM		 780 OUTS (outf, "(R7:");
781 OUTS (outf, ds);
782 OUTS (outf, ", P5:");
783 OUTS (outf, ps);
784 OUTS (outf, ") = [SP++]");
4b7f6baa
CM		 785 }
786 else if (W == 0 && d == 1 && p == 0)
787 {
4b7f6baa
CM		 788 OUTS (outf, "(R7:");
789 OUTS (outf, ds);
790 OUTS (outf, ") = [SP++]");
4b7f6baa
CM		 791 }
792 else if (W == 0 && d == 0 && p == 1)
793 {
4b7f6baa
CM		 794 OUTS (outf, "(P5:");
795 OUTS (outf, ps);
796 OUTS (outf, ") = [SP++]");
4b7f6baa
CM		 797 }
798 else
b7d48530
NC		 799 return 0;
800 return 2;
4b7f6baa
CM		 801}
802
803static int
804decode_ccMV_0 (TIword iw0, disassemble_info *outf)
805{
b7d48530
NC		 806 /* ccMV
807 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
808 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......|
809 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 810 int s = ((iw0 >> CCmv_s_bits) & CCmv_s_mask);
811 int d = ((iw0 >> CCmv_d_bits) & CCmv_d_mask);
812 int T = ((iw0 >> CCmv_T_bits) & CCmv_T_mask);
813 int src = ((iw0 >> CCmv_src_bits) & CCmv_src_mask);
814 int dst = ((iw0 >> CCmv_dst_bits) & CCmv_dst_mask);
815
816 if (T == 1)
817 {
4b7f6baa
CM		 818 OUTS (outf, "IF CC ");
819 OUTS (outf, gregs (dst, d));
820 OUTS (outf, " = ");
821 OUTS (outf, gregs (src, s));
4b7f6baa
CM		 822 }
823 else if (T == 0)
824 {
4b7f6baa
CM		 825 OUTS (outf, "IF ! CC ");
826 OUTS (outf, gregs (dst, d));
827 OUTS (outf, " = ");
828 OUTS (outf, gregs (src, s));
4b7f6baa
CM		 829 }
830 else
b7d48530
NC		 831 return 0;
832 return 2;
4b7f6baa
CM		 833}
834
835static int
836decode_CCflag_0 (TIword iw0, disassemble_info *outf)
837{
b7d48530
NC		 838 /* CCflag
839 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
840 | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........|
841 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 842 int x = ((iw0 >> CCflag_x_bits) & CCflag_x_mask);
843 int y = ((iw0 >> CCflag_y_bits) & CCflag_y_mask);
844 int I = ((iw0 >> CCflag_I_bits) & CCflag_I_mask);
845 int G = ((iw0 >> CCflag_G_bits) & CCflag_G_mask);
846 int opc = ((iw0 >> CCflag_opc_bits) & CCflag_opc_mask);
847
848 if (opc == 0 && I == 0 && G == 0)
849 {
4b7f6baa
CM		 850 OUTS (outf, "CC=");
851 OUTS (outf, dregs (x));
852 OUTS (outf, "==");
853 OUTS (outf, dregs (y));
4b7f6baa
CM		 854 }
855 else if (opc == 1 && I == 0 && G == 0)
856 {
4b7f6baa
CM		 857 OUTS (outf, "CC=");
858 OUTS (outf, dregs (x));
859 OUTS (outf, "<");
860 OUTS (outf, dregs (y));
4b7f6baa
CM		 861 }
862 else if (opc == 2 && I == 0 && G == 0)
863 {
4b7f6baa
CM		 864 OUTS (outf, "CC=");
865 OUTS (outf, dregs (x));
866 OUTS (outf, "<=");
867 OUTS (outf, dregs (y));
4b7f6baa
CM		 868 }
869 else if (opc == 3 && I == 0 && G == 0)
870 {
4b7f6baa
CM		 871 OUTS (outf, "CC=");
872 OUTS (outf, dregs (x));
873 OUTS (outf, "<");
874 OUTS (outf, dregs (y));
875 OUTS (outf, "(IU)");
4b7f6baa
CM		 876 }
877 else if (opc == 4 && I == 0 && G == 0)
878 {
4b7f6baa
CM		 879 OUTS (outf, "CC=");
880 OUTS (outf, dregs (x));
881 OUTS (outf, "<=");
882 OUTS (outf, dregs (y));
883 OUTS (outf, "(IU)");
4b7f6baa
CM		 884 }
885 else if (opc == 0 && I == 1 && G == 0)
886 {
4b7f6baa
CM		 887 OUTS (outf, "CC=");
888 OUTS (outf, dregs (x));
889 OUTS (outf, "==");
890 OUTS (outf, imm3 (y));
4b7f6baa
CM		 891 }
892 else if (opc == 1 && I == 1 && G == 0)
893 {
4b7f6baa
CM		 894 OUTS (outf, "CC=");
895 OUTS (outf, dregs (x));
896 OUTS (outf, "<");
897 OUTS (outf, imm3 (y));
4b7f6baa
CM		 898 }
899 else if (opc == 2 && I == 1 && G == 0)
900 {
4b7f6baa
CM		 901 OUTS (outf, "CC=");
902 OUTS (outf, dregs (x));
903 OUTS (outf, "<=");
904 OUTS (outf, imm3 (y));
4b7f6baa
CM		 905 }
906 else if (opc == 3 && I == 1 && G == 0)
907 {
4b7f6baa
CM		 908 OUTS (outf, "CC=");
909 OUTS (outf, dregs (x));
910 OUTS (outf, "<");
911 OUTS (outf, uimm3 (y));
912 OUTS (outf, "(IU)");
4b7f6baa
CM		 913 }
914 else if (opc == 4 && I == 1 && G == 0)
915 {
4b7f6baa
CM		 916 OUTS (outf, "CC=");
917 OUTS (outf, dregs (x));
918 OUTS (outf, "<=");
919 OUTS (outf, uimm3 (y));
920 OUTS (outf, "(IU)");
4b7f6baa
CM		 921 }
922 else if (opc == 0 && I == 0 && G == 1)
923 {
4b7f6baa
CM		 924 OUTS (outf, "CC=");
925 OUTS (outf, pregs (x));
926 OUTS (outf, "==");
927 OUTS (outf, pregs (y));
4b7f6baa
CM		 928 }
929 else if (opc == 1 && I == 0 && G == 1)
930 {
4b7f6baa
CM		 931 OUTS (outf, "CC=");
932 OUTS (outf, pregs (x));
933 OUTS (outf, "<");
934 OUTS (outf, pregs (y));
4b7f6baa
CM		 935 }
936 else if (opc == 2 && I == 0 && G == 1)
937 {
4b7f6baa
CM		 938 OUTS (outf, "CC=");
939 OUTS (outf, pregs (x));
940 OUTS (outf, "<=");
941 OUTS (outf, pregs (y));
4b7f6baa
CM		 942 }
943 else if (opc == 3 && I == 0 && G == 1)
944 {
4b7f6baa
CM		 945 OUTS (outf, "CC=");
946 OUTS (outf, pregs (x));
947 OUTS (outf, "<");
948 OUTS (outf, pregs (y));
949 OUTS (outf, "(IU)");
4b7f6baa
CM		 950 }
951 else if (opc == 4 && I == 0 && G == 1)
952 {
4b7f6baa
CM		 953 OUTS (outf, "CC=");
954 OUTS (outf, pregs (x));
955 OUTS (outf, "<=");
956 OUTS (outf, pregs (y));
957 OUTS (outf, "(IU)");
4b7f6baa
CM		 958 }
959 else if (opc == 0 && I == 1 && G == 1)
960 {
4b7f6baa
CM		 961 OUTS (outf, "CC=");
962 OUTS (outf, pregs (x));
963 OUTS (outf, "==");
964 OUTS (outf, imm3 (y));
4b7f6baa
CM		 965 }
966 else if (opc == 1 && I == 1 && G == 1)
967 {
4b7f6baa
CM		 968 OUTS (outf, "CC=");
969 OUTS (outf, pregs (x));
970 OUTS (outf, "<");
971 OUTS (outf, imm3 (y));
4b7f6baa
CM		 972 }
973 else if (opc == 2 && I == 1 && G == 1)
974 {
4b7f6baa
CM		 975 OUTS (outf, "CC=");
976 OUTS (outf, pregs (x));
977 OUTS (outf, "<=");
978 OUTS (outf, imm3 (y));
4b7f6baa
CM		 979 }
980 else if (opc == 3 && I == 1 && G == 1)
981 {
4b7f6baa
CM		 982 OUTS (outf, "CC=");
983 OUTS (outf, pregs (x));
984 OUTS (outf, "<");
985 OUTS (outf, uimm3 (y));
986 OUTS (outf, "(IU)");
4b7f6baa
CM		 987 }
988 else if (opc == 4 && I == 1 && G == 1)
989 {
4b7f6baa
CM		 990 OUTS (outf, "CC=");
991 OUTS (outf, pregs (x));
992 OUTS (outf, "<=");
993 OUTS (outf, uimm3 (y));
994 OUTS (outf, "(IU)");
4b7f6baa
CM		 995 }
996 else if (opc == 5 && I == 0 && G == 0)
b7d48530
NC		 997 OUTS (outf, "CC=A0==A1");
998
4b7f6baa 999 else if (opc == 6 && I == 0 && G == 0)
b7d48530
NC		 1000 OUTS (outf, "CC=A0<A1");
1001
4b7f6baa 1002 else if (opc == 7 && I == 0 && G == 0)
b7d48530
NC		 1003 OUTS (outf, "CC=A0<=A1");
1004
4b7f6baa 1005 else
b7d48530
NC		 1006 return 0;
1007 return 2;
4b7f6baa
CM		 1008}
1009
1010static int
1011decode_CC2dreg_0 (TIword iw0, disassemble_info *outf)
1012{
b7d48530
NC		 1013 /* CC2dreg
1014 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1015 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......|
1016 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1017 int op = ((iw0 >> CC2dreg_op_bits) & CC2dreg_op_mask);
1018 int reg = ((iw0 >> CC2dreg_reg_bits) & CC2dreg_reg_mask);
1019
1020 if (op == 0)
1021 {
4b7f6baa
CM		 1022 OUTS (outf, dregs (reg));
1023 OUTS (outf, "=CC");
4b7f6baa
CM		 1024 }
1025 else if (op == 1)
1026 {
4b7f6baa
CM		 1027 OUTS (outf, "CC=");
1028 OUTS (outf, dregs (reg));
4b7f6baa
CM		 1029 }
1030 else if (op == 3)
b7d48530 1031 OUTS (outf, "CC=!CC");
4b7f6baa 1032 else
b7d48530
NC		 1033 return 0;
1034
1035 return 2;
4b7f6baa
CM		 1036}
1037
1038static int
1039decode_CC2stat_0 (TIword iw0, disassemble_info *outf)
1040{
b7d48530
NC		 1041 /* CC2stat
1042 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1043 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............|
1044 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1045 int D = ((iw0 >> CC2stat_D_bits) & CC2stat_D_mask);
1046 int op = ((iw0 >> CC2stat_op_bits) & CC2stat_op_mask);
1047 int cbit = ((iw0 >> CC2stat_cbit_bits) & CC2stat_cbit_mask);
1048
1049 if (op == 0 && D == 0)
1050 {
4b7f6baa
CM		 1051 OUTS (outf, "CC = ");
1052 OUTS (outf, statbits (cbit));
4b7f6baa
CM		 1053 }
1054 else if (op == 1 && D == 0)
1055 {
4b7f6baa
CM		 1056 OUTS (outf, "CC|=");
1057 OUTS (outf, statbits (cbit));
4b7f6baa
CM		 1058 }
1059 else if (op == 2 && D == 0)
1060 {
4b7f6baa
CM		 1061 OUTS (outf, "CC&=");
1062 OUTS (outf, statbits (cbit));
4b7f6baa
CM		 1063 }
1064 else if (op == 3 && D == 0)
1065 {
4b7f6baa
CM		 1066 OUTS (outf, "CC^=");
1067 OUTS (outf, statbits (cbit));
4b7f6baa
CM		 1068 }
1069 else if (op == 0 && D == 1)
1070 {
4b7f6baa
CM		 1071 OUTS (outf, statbits (cbit));
1072 OUTS (outf, "=CC");
4b7f6baa
CM		 1073 }
1074 else if (op == 1 && D == 1)
1075 {
4b7f6baa
CM		 1076 OUTS (outf, statbits (cbit));
1077 OUTS (outf, "|=CC");
4b7f6baa
CM		 1078 }
1079 else if (op == 2 && D == 1)
1080 {
4b7f6baa
CM		 1081 OUTS (outf, statbits (cbit));
1082 OUTS (outf, "&=CC");
4b7f6baa
CM		 1083 }
1084 else if (op == 3 && D == 1)
1085 {
4b7f6baa
CM		 1086 OUTS (outf, statbits (cbit));
1087 OUTS (outf, "^=CC");
4b7f6baa
CM		 1088 }
1089 else
b7d48530
NC		 1090 return 0;
1091
1092 return 2;
4b7f6baa
CM		 1093}
1094
1095static int
1096decode_BRCC_0 (TIword iw0, bfd_vma pc, disassemble_info *outf)
1097{
b7d48530
NC		 1098 /* BRCC
1099 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1100 | 0 | 0 | 0 | 1 |.T.|.B.|.offset................................|
1101 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1102 int B = ((iw0 >> BRCC_B_bits) & BRCC_B_mask);
1103 int T = ((iw0 >> BRCC_T_bits) & BRCC_T_mask);
1104 int offset = ((iw0 >> BRCC_offset_bits) & BRCC_offset_mask);
1105
1106 if (T == 1 && B == 1)
1107 {
4b7f6baa
CM		 1108 OUTS (outf, "IF CC JUMP ");
1109 OUTS (outf, pcrel10 (offset));
1110 OUTS (outf, "(BP)");
4b7f6baa
CM		 1111 }
1112 else if (T == 0 && B == 1)
1113 {
4b7f6baa
CM		 1114 OUTS (outf, "IF ! CC JUMP ");
1115 OUTS (outf, pcrel10 (offset));
1116 OUTS (outf, "(BP)");
4b7f6baa
CM		 1117 }
1118 else if (T == 1)
1119 {
4b7f6baa
CM		 1120 OUTS (outf, "IF CC JUMP ");
1121 OUTS (outf, pcrel10 (offset));
4b7f6baa
CM		 1122 }
1123 else if (T == 0)
1124 {
4b7f6baa
CM		 1125 OUTS (outf, "IF ! CC JUMP ");
1126 OUTS (outf, pcrel10 (offset));
4b7f6baa
CM		 1127 }
1128 else
b7d48530
NC		 1129 return 0;
1130
1131 return 2;
4b7f6baa
CM		 1132}
1133
1134static int
1135decode_UJUMP_0 (TIword iw0, bfd_vma pc, disassemble_info *outf)
1136{
b7d48530
NC		 1137 /* UJUMP
1138 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1139 | 0 | 0 | 1 | 0 |.offset........................................|
1140 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1141 int offset = ((iw0 >> UJump_offset_bits) & UJump_offset_mask);
1142
4b7f6baa
CM		 1143 OUTS (outf, "JUMP.S ");
1144 OUTS (outf, pcrel12 (offset));
b7d48530 1145 return 2;
4b7f6baa
CM		 1146}
1147
1148static int
1149decode_REGMV_0 (TIword iw0, disassemble_info *outf)
1150{
b7d48530
NC		 1151 /* REGMV
1152 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1153 | 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......|
1154 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1155 int gs = ((iw0 >> RegMv_gs_bits) & RegMv_gs_mask);
1156 int gd = ((iw0 >> RegMv_gd_bits) & RegMv_gd_mask);
1157 int src = ((iw0 >> RegMv_src_bits) & RegMv_src_mask);
1158 int dst = ((iw0 >> RegMv_dst_bits) & RegMv_dst_mask);
1159
4b7f6baa
CM		 1160 OUTS (outf, allregs (dst, gd));
1161 OUTS (outf, "=");
1162 OUTS (outf, allregs (src, gs));
b7d48530 1163 return 2;
4b7f6baa
CM		 1164}
1165
1166static int
1167decode_ALU2op_0 (TIword iw0, disassemble_info *outf)
1168{
b7d48530
NC		 1169 /* ALU2op
1170 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1171 | 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......|
1172 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1173 int src = ((iw0 >> ALU2op_src_bits) & ALU2op_src_mask);
1174 int opc = ((iw0 >> ALU2op_opc_bits) & ALU2op_opc_mask);
1175 int dst = ((iw0 >> ALU2op_dst_bits) & ALU2op_dst_mask);
1176
1177 if (opc == 0)
1178 {
4b7f6baa
CM		 1179 OUTS (outf, dregs (dst));
1180 OUTS (outf, ">>>=");
1181 OUTS (outf, dregs (src));
4b7f6baa
CM		 1182 }
1183 else if (opc == 1)
1184 {
4b7f6baa
CM		 1185 OUTS (outf, dregs (dst));
1186 OUTS (outf, ">>=");
1187 OUTS (outf, dregs (src));
4b7f6baa
CM		 1188 }
1189 else if (opc == 2)
1190 {
4b7f6baa
CM		 1191 OUTS (outf, dregs (dst));
1192 OUTS (outf, "<<=");
1193 OUTS (outf, dregs (src));
4b7f6baa
CM		 1194 }
1195 else if (opc == 3)
1196 {
4b7f6baa
CM		 1197 OUTS (outf, dregs (dst));
1198 OUTS (outf, "*=");
1199 OUTS (outf, dregs (src));
4b7f6baa
CM		 1200 }
1201 else if (opc == 4)
1202 {
4b7f6baa
CM		 1203 OUTS (outf, dregs (dst));
1204 OUTS (outf, "=(");
1205 OUTS (outf, dregs (dst));
1206 OUTS (outf, "+");
1207 OUTS (outf, dregs (src));
1208 OUTS (outf, ")<<1");
4b7f6baa
CM		 1209 }
1210 else if (opc == 5)
1211 {
4b7f6baa
CM		 1212 OUTS (outf, dregs (dst));
1213 OUTS (outf, "=(");
1214 OUTS (outf, dregs (dst));
1215 OUTS (outf, "+");
1216 OUTS (outf, dregs (src));
1217 OUTS (outf, ")<<2");
4b7f6baa
CM		 1218 }
1219 else if (opc == 8)
1220 {
4b7f6baa
CM		 1221 OUTS (outf, "DIVQ(");
1222 OUTS (outf, dregs (dst));
1223 OUTS (outf, ",");
1224 OUTS (outf, dregs (src));
1225 OUTS (outf, ")");
4b7f6baa
CM		 1226 }
1227 else if (opc == 9)
1228 {
4b7f6baa
CM		 1229 OUTS (outf, "DIVS(");
1230 OUTS (outf, dregs (dst));
1231 OUTS (outf, ",");
1232 OUTS (outf, dregs (src));
1233 OUTS (outf, ")");
4b7f6baa
CM		 1234 }
1235 else if (opc == 10)
1236 {
4b7f6baa
CM		 1237 OUTS (outf, dregs (dst));
1238 OUTS (outf, "=");
1239 OUTS (outf, dregs_lo (src));
1240 OUTS (outf, "(X)");
4b7f6baa
CM		 1241 }
1242 else if (opc == 11)
1243 {
4b7f6baa
CM		 1244 OUTS (outf, dregs (dst));
1245 OUTS (outf, "=");
1246 OUTS (outf, dregs_lo (src));
1247 OUTS (outf, "(Z)");
4b7f6baa
CM		 1248 }
1249 else if (opc == 12)
1250 {
4b7f6baa
CM		 1251 OUTS (outf, dregs (dst));
1252 OUTS (outf, "=");
1253 OUTS (outf, dregs_byte (src));
1254 OUTS (outf, "(X)");
4b7f6baa
CM		 1255 }
1256 else if (opc == 13)
1257 {
4b7f6baa
CM		 1258 OUTS (outf, dregs (dst));
1259 OUTS (outf, "=");
1260 OUTS (outf, dregs_byte (src));
1261 OUTS (outf, "(Z)");
4b7f6baa
CM		 1262 }
1263 else if (opc == 14)
1264 {
4b7f6baa
CM		 1265 OUTS (outf, dregs (dst));
1266 OUTS (outf, "=-");
1267 OUTS (outf, dregs (src));
4b7f6baa
CM		 1268 }
1269 else if (opc == 15)
1270 {
4b7f6baa
CM		 1271 OUTS (outf, dregs (dst));
1272 OUTS (outf, "=~");
1273 OUTS (outf, dregs (src));
4b7f6baa
CM		 1274 }
1275 else
b7d48530
NC		 1276 return 0;
1277
1278 return 2;
4b7f6baa
CM		 1279}
1280
1281static int
1282decode_PTR2op_0 (TIword iw0, disassemble_info *outf)
1283{
b7d48530
NC		 1284 /* PTR2op
1285 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1286 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......|
1287 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1288 int src = ((iw0 >> PTR2op_src_bits) & PTR2op_dst_mask);
1289 int opc = ((iw0 >> PTR2op_opc_bits) & PTR2op_opc_mask);
1290 int dst = ((iw0 >> PTR2op_dst_bits) & PTR2op_dst_mask);
1291
1292 if (opc == 0)
1293 {
4b7f6baa
CM		 1294 OUTS (outf, pregs (dst));
1295 OUTS (outf, "-=");
1296 OUTS (outf, pregs (src));
4b7f6baa
CM		 1297 }
1298 else if (opc == 1)
1299 {
4b7f6baa
CM		 1300 OUTS (outf, pregs (dst));
1301 OUTS (outf, "=");
1302 OUTS (outf, pregs (src));
1303 OUTS (outf, "<<2");
4b7f6baa
CM		 1304 }
1305 else if (opc == 3)
1306 {
4b7f6baa
CM		 1307 OUTS (outf, pregs (dst));
1308 OUTS (outf, "=");
1309 OUTS (outf, pregs (src));
1310 OUTS (outf, ">>2");
4b7f6baa
CM		 1311 }
1312 else if (opc == 4)
1313 {
4b7f6baa
CM		 1314 OUTS (outf, pregs (dst));
1315 OUTS (outf, "=");
1316 OUTS (outf, pregs (src));
1317 OUTS (outf, ">>1");
4b7f6baa
CM		 1318 }
1319 else if (opc == 5)
1320 {
4b7f6baa
CM		 1321 OUTS (outf, pregs (dst));
1322 OUTS (outf, "+=");
1323 OUTS (outf, pregs (src));
1324 OUTS (outf, "(BREV)");
4b7f6baa
CM		 1325 }
1326 else if (opc == 6)
1327 {
4b7f6baa
CM		 1328 OUTS (outf, pregs (dst));
1329 OUTS (outf, "=(");
1330 OUTS (outf, pregs (dst));
1331 OUTS (outf, "+");
1332 OUTS (outf, pregs (src));
1333 OUTS (outf, ")<<1");
4b7f6baa
CM		 1334 }
1335 else if (opc == 7)
1336 {
4b7f6baa
CM		 1337 OUTS (outf, pregs (dst));
1338 OUTS (outf, "=(");
1339 OUTS (outf, pregs (dst));
1340 OUTS (outf, "+");
1341 OUTS (outf, pregs (src));
1342 OUTS (outf, ")<<2");
4b7f6baa
CM		 1343 }
1344 else
b7d48530
NC		 1345 return 0;
1346
1347 return 2;
4b7f6baa
CM		 1348}
1349
1350static int
1351decode_LOGI2op_0 (TIword iw0, disassemble_info *outf)
1352{
b7d48530
NC		 1353 /* LOGI2op
1354 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1355 | 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......|
1356 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1357 int src = ((iw0 >> LOGI2op_src_bits) & LOGI2op_src_mask);
1358 int opc = ((iw0 >> LOGI2op_opc_bits) & LOGI2op_opc_mask);
1359 int dst = ((iw0 >> LOGI2op_dst_bits) & LOGI2op_dst_mask);
1360
1361 if (opc == 0)
1362 {
4b7f6baa
CM		 1363 OUTS (outf, "CC = ! BITTST (");
1364 OUTS (outf, dregs (dst));
1365 OUTS (outf, ",");
1366 OUTS (outf, uimm5 (src));
1367 OUTS (outf, ")");
4b7f6baa
CM		 1368 }
1369 else if (opc == 1)
1370 {
4b7f6baa
CM		 1371 OUTS (outf, "CC = BITTST (");
1372 OUTS (outf, dregs (dst));
1373 OUTS (outf, ",");
1374 OUTS (outf, uimm5 (src));
1375 OUTS (outf, ")");
4b7f6baa
CM		 1376 }
1377 else if (opc == 2)
1378 {
4b7f6baa
CM		 1379 OUTS (outf, "BITSET (");
1380 OUTS (outf, dregs (dst));
1381 OUTS (outf, ",");
1382 OUTS (outf, uimm5 (src));
1383 OUTS (outf, ")");
4b7f6baa
CM		 1384 }
1385 else if (opc == 3)
1386 {
4b7f6baa
CM		 1387 OUTS (outf, "BITTGL (");
1388 OUTS (outf, dregs (dst));
1389 OUTS (outf, ",");
1390 OUTS (outf, uimm5 (src));
1391 OUTS (outf, ")");
4b7f6baa
CM		 1392 }
1393 else if (opc == 4)
1394 {
4b7f6baa
CM		 1395 OUTS (outf, "BITCLR (");
1396 OUTS (outf, dregs (dst));
1397 OUTS (outf, ",");
1398 OUTS (outf, uimm5 (src));
1399 OUTS (outf, ")");
4b7f6baa
CM		 1400 }
1401 else if (opc == 5)
1402 {
4b7f6baa
CM		 1403 OUTS (outf, dregs (dst));
1404 OUTS (outf, ">>>=");
1405 OUTS (outf, uimm5 (src));
4b7f6baa
CM		 1406 }
1407 else if (opc == 6)
1408 {
4b7f6baa
CM		 1409 OUTS (outf, dregs (dst));
1410 OUTS (outf, ">>=");
1411 OUTS (outf, uimm5 (src));
4b7f6baa
CM		 1412 }
1413 else if (opc == 7)
1414 {
4b7f6baa
CM		 1415 OUTS (outf, dregs (dst));
1416 OUTS (outf, "<<=");
1417 OUTS (outf, uimm5 (src));
4b7f6baa
CM		 1418 }
1419 else
b7d48530
NC		 1420 return 0;
1421
1422 return 2;
4b7f6baa
CM		 1423}
1424
1425static int
1426decode_COMP3op_0 (TIword iw0, disassemble_info *outf)
1427{
b7d48530
NC		 1428 /* COMP3op
1429 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1430 | 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......|
1431 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1432 int opc = ((iw0 >> COMP3op_opc_bits) & COMP3op_opc_mask);
1433 int dst = ((iw0 >> COMP3op_dst_bits) & COMP3op_dst_mask);
1434 int src0 = ((iw0 >> COMP3op_src0_bits) & COMP3op_src0_mask);
1435 int src1 = ((iw0 >> COMP3op_src1_bits) & COMP3op_src1_mask);
1436
1437 if (opc == 5 && src1 == src0)
1438 {
4b7f6baa
CM		 1439 OUTS (outf, pregs (dst));
1440 OUTS (outf, "=");
1441 OUTS (outf, pregs (src0));
1442 OUTS (outf, "<<1");
4b7f6baa
CM		 1443 }
1444 else if (opc == 1)
1445 {
4b7f6baa
CM		 1446 OUTS (outf, dregs (dst));
1447 OUTS (outf, "=");
1448 OUTS (outf, dregs (src0));
1449 OUTS (outf, "-");
1450 OUTS (outf, dregs (src1));
4b7f6baa
CM		 1451 }
1452 else if (opc == 2)
1453 {
4b7f6baa
CM		 1454 OUTS (outf, dregs (dst));
1455 OUTS (outf, "=");
1456 OUTS (outf, dregs (src0));
1457 OUTS (outf, "&");
1458 OUTS (outf, dregs (src1));
4b7f6baa
CM		 1459 }
1460 else if (opc == 3)
1461 {
4b7f6baa
CM		 1462 OUTS (outf, dregs (dst));
1463 OUTS (outf, "=");
1464 OUTS (outf, dregs (src0));
1465 OUTS (outf, "|");
1466 OUTS (outf, dregs (src1));
4b7f6baa
CM		 1467 }
1468 else if (opc == 4)
1469 {
4b7f6baa
CM		 1470 OUTS (outf, dregs (dst));
1471 OUTS (outf, "=");
1472 OUTS (outf, dregs (src0));
1473 OUTS (outf, "^");
1474 OUTS (outf, dregs (src1));
4b7f6baa
CM		 1475 }
1476 else if (opc == 5)
1477 {
4b7f6baa
CM		 1478 OUTS (outf, pregs (dst));
1479 OUTS (outf, "=");
1480 OUTS (outf, pregs (src0));
1481 OUTS (outf, "+");
1482 OUTS (outf, pregs (src1));
4b7f6baa
CM		 1483 }
1484 else if (opc == 6)
1485 {
4b7f6baa
CM		 1486 OUTS (outf, pregs (dst));
1487 OUTS (outf, "=");
1488 OUTS (outf, pregs (src0));
1489 OUTS (outf, "+(");
1490 OUTS (outf, pregs (src1));
1491 OUTS (outf, "<<1)");
4b7f6baa
CM		 1492 }
1493 else if (opc == 7)
1494 {
4b7f6baa
CM		 1495 OUTS (outf, pregs (dst));
1496 OUTS (outf, "=");
1497 OUTS (outf, pregs (src0));
1498 OUTS (outf, "+(");
1499 OUTS (outf, pregs (src1));
1500 OUTS (outf, "<<2)");
4b7f6baa
CM		 1501 }
1502 else if (opc == 0)
1503 {
4b7f6baa
CM		 1504 OUTS (outf, dregs (dst));
1505 OUTS (outf, "=");
1506 OUTS (outf, dregs (src0));
1507 OUTS (outf, "+");
1508 OUTS (outf, dregs (src1));
4b7f6baa
CM		 1509 }
1510 else
b7d48530
NC		 1511 return 0;
1512
1513 return 2;
4b7f6baa
CM		 1514}
1515
1516static int
1517decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf)
1518{
b7d48530
NC		 1519 /* COMPI2opD
1520 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1521 | 0 | 1 | 1 | 0 | 0 |.op|..src......................|.dst.......|
1522 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1523 int op = ((iw0 >> COMPI2opD_op_bits) & COMPI2opD_op_mask);
1524 int dst = ((iw0 >> COMPI2opD_dst_bits) & COMPI2opD_dst_mask);
1525 int src = ((iw0 >> COMPI2opD_src_bits) & COMPI2opD_src_mask);
1526
1527 if (op == 0)
1528 {
4b7f6baa
CM		 1529 OUTS (outf, dregs (dst));
1530 OUTS (outf, "=");
1531 OUTS (outf, imm7 (src));
1532 OUTS (outf, "(x)");
4b7f6baa
CM		 1533 }
1534 else if (op == 1)
1535 {
4b7f6baa
CM		 1536 OUTS (outf, dregs (dst));
1537 OUTS (outf, "+=");
1538 OUTS (outf, imm7 (src));
4b7f6baa
CM		 1539 }
1540 else
b7d48530
NC		 1541 return 0;
1542
1543 return 2;
4b7f6baa
CM		 1544}
1545
1546static int
1547decode_COMPI2opP_0 (TIword iw0, disassemble_info *outf)
1548{
b7d48530
NC		 1549 /* COMPI2opP
1550 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1551 | 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......|
1552 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1553 int op = ((iw0 >> COMPI2opP_op_bits) & COMPI2opP_op_mask);
1554 int src = ((iw0 >> COMPI2opP_src_bits) & COMPI2opP_src_mask);
1555 int dst = ((iw0 >> COMPI2opP_dst_bits) & COMPI2opP_dst_mask);
1556
1557 if (op == 0)
1558 {
4b7f6baa
CM		 1559 OUTS (outf, pregs (dst));
1560 OUTS (outf, "=");
1561 OUTS (outf, imm7 (src));
4b7f6baa
CM		 1562 }
1563 else if (op == 1)
1564 {
4b7f6baa
CM		 1565 OUTS (outf, pregs (dst));
1566 OUTS (outf, "+=");
1567 OUTS (outf, imm7 (src));
4b7f6baa
CM		 1568 }
1569 else
b7d48530
NC		 1570 return 0;
1571
1572 return 2;
4b7f6baa
CM		 1573}
1574
1575static int
1576decode_LDSTpmod_0 (TIword iw0, disassemble_info *outf)
1577{
b7d48530
NC		 1578 /* LDSTpmod
1579 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1580 | 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......|
1581 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1582 int W = ((iw0 >> LDSTpmod_W_bits) & LDSTpmod_W_mask);
1583 int aop = ((iw0 >> LDSTpmod_aop_bits) & LDSTpmod_aop_mask);
1584 int idx = ((iw0 >> LDSTpmod_idx_bits) & LDSTpmod_idx_mask);
1585 int ptr = ((iw0 >> LDSTpmod_ptr_bits) & LDSTpmod_ptr_mask);
1586 int reg = ((iw0 >> LDSTpmod_reg_bits) & LDSTpmod_reg_mask);
1587
1588 if (aop == 1 && W == 0 && idx == ptr)
1589 {
4b7f6baa
CM		 1590 OUTS (outf, dregs_lo (reg));
1591 OUTS (outf, "=W[");
1592 OUTS (outf, pregs (ptr));
1593 OUTS (outf, "]");
4b7f6baa
CM		 1594 }
1595 else if (aop == 2 && W == 0 && idx == ptr)
1596 {
4b7f6baa
CM		 1597 OUTS (outf, dregs_hi (reg));
1598 OUTS (outf, "=W[");
1599 OUTS (outf, pregs (ptr));
1600 OUTS (outf, "]");
4b7f6baa
CM		 1601 }
1602 else if (aop == 1 && W == 1 && idx == ptr)
1603 {
4b7f6baa
CM		 1604 OUTS (outf, "W[");
1605 OUTS (outf, pregs (ptr));
1606 OUTS (outf, "]=");
1607 OUTS (outf, dregs_lo (reg));
4b7f6baa
CM		 1608 }
1609 else if (aop == 2 && W == 1 && idx == ptr)
1610 {
4b7f6baa
CM		 1611 OUTS (outf, "W[");
1612 OUTS (outf, pregs (ptr));
1613 OUTS (outf, "]=");
1614 OUTS (outf, dregs_hi (reg));
4b7f6baa
CM		 1615 }
1616 else if (aop == 0 && W == 0)
1617 {
4b7f6baa
CM		 1618 OUTS (outf, dregs (reg));
1619 OUTS (outf, "=[");
1620 OUTS (outf, pregs (ptr));
1621 OUTS (outf, "++");
1622 OUTS (outf, pregs (idx));
1623 OUTS (outf, "]");
4b7f6baa
CM		 1624 }
1625 else if (aop == 1 && W == 0)
1626 {
4b7f6baa
CM		 1627 OUTS (outf, dregs_lo (reg));
1628 OUTS (outf, "=W[");
1629 OUTS (outf, pregs (ptr));
1630 OUTS (outf, "++");
1631 OUTS (outf, pregs (idx));
1632 OUTS (outf, "]");
4b7f6baa
CM		 1633 }
1634 else if (aop == 2 && W == 0)
1635 {
4b7f6baa
CM		 1636 OUTS (outf, dregs_hi (reg));
1637 OUTS (outf, "=W[");
1638 OUTS (outf, pregs (ptr));
1639 OUTS (outf, "++");
1640 OUTS (outf, pregs (idx));
1641 OUTS (outf, "]");
4b7f6baa
CM		 1642 }
1643 else if (aop == 3 && W == 0)
1644 {
4b7f6baa
CM		 1645 OUTS (outf, dregs (reg));
1646 OUTS (outf, "=W[");
1647 OUTS (outf, pregs (ptr));
1648 OUTS (outf, "++");
1649 OUTS (outf, pregs (idx));
1650 OUTS (outf, "] (Z)");
4b7f6baa
CM		 1651 }
1652 else if (aop == 3 && W == 1)
1653 {
4b7f6baa
CM		 1654 OUTS (outf, dregs (reg));
1655 OUTS (outf, "=W[");
1656 OUTS (outf, pregs (ptr));
1657 OUTS (outf, "++");
1658 OUTS (outf, pregs (idx));
1659 OUTS (outf, "](X)");
4b7f6baa
CM		 1660 }
1661 else if (aop == 0 && W == 1)
1662 {
4b7f6baa
CM		 1663 OUTS (outf, "[");
1664 OUTS (outf, pregs (ptr));
1665 OUTS (outf, "++");
1666 OUTS (outf, pregs (idx));
1667 OUTS (outf, "]=");
1668 OUTS (outf, dregs (reg));
4b7f6baa
CM		 1669 }
1670 else if (aop == 1 && W == 1)
1671 {
4b7f6baa
CM		 1672 OUTS (outf, "W[");
1673 OUTS (outf, pregs (ptr));
1674 OUTS (outf, "++");
1675 OUTS (outf, pregs (idx));
1676 OUTS (outf, "]=");
1677 OUTS (outf, dregs_lo (reg));
4b7f6baa
CM		 1678 }
1679 else if (aop == 2 && W == 1)
1680 {
4b7f6baa
CM		 1681 OUTS (outf, "W[");
1682 OUTS (outf, pregs (ptr));
1683 OUTS (outf, "++");
1684 OUTS (outf, pregs (idx));
1685 OUTS (outf, "]=");
1686 OUTS (outf, dregs_hi (reg));
4b7f6baa
CM		 1687 }
1688 else
b7d48530
NC		 1689 return 0;
1690
1691 return 2;
4b7f6baa
CM		 1692}
1693
1694static int
1695decode_dagMODim_0 (TIword iw0, disassemble_info *outf)
1696{
b7d48530
NC		 1697 /* dagMODim
1698 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1699 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....|
1700 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1701 int i = ((iw0 >> DagMODim_i_bits) & DagMODim_i_mask);
1702 int m = ((iw0 >> DagMODim_m_bits) & DagMODim_m_mask);
1703 int br = ((iw0 >> DagMODim_br_bits) & DagMODim_br_mask);
1704 int op = ((iw0 >> DagMODim_op_bits) & DagMODim_op_mask);
1705
1706 if (op == 0 && br == 1)
1707 {
4b7f6baa
CM		 1708 OUTS (outf, iregs (i));
1709 OUTS (outf, "+=");
1710 OUTS (outf, mregs (m));
1711 OUTS (outf, "(BREV)");
4b7f6baa
CM		 1712 }
1713 else if (op == 0)
1714 {
4b7f6baa
CM		 1715 OUTS (outf, iregs (i));
1716 OUTS (outf, "+=");
1717 OUTS (outf, mregs (m));
4b7f6baa
CM		 1718 }
1719 else if (op == 1)
1720 {
4b7f6baa
CM		 1721 OUTS (outf, iregs (i));
1722 OUTS (outf, "-=");
1723 OUTS (outf, mregs (m));
4b7f6baa
CM		 1724 }
1725 else
b7d48530
NC		 1726 return 0;
1727
1728 return 2;
4b7f6baa
CM		 1729}
1730
1731static int
1732decode_dagMODik_0 (TIword iw0, disassemble_info *outf)
1733{
b7d48530
NC		 1734 /* dagMODik
1735 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1736 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....|
1737 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1738 int i = ((iw0 >> DagMODik_i_bits) & DagMODik_i_mask);
1739 int op = ((iw0 >> DagMODik_op_bits) & DagMODik_op_mask);
1740
1741 if (op == 0)
1742 {
4b7f6baa
CM		 1743 OUTS (outf, iregs (i));
1744 OUTS (outf, "+=2");
4b7f6baa
CM		 1745 }
1746 else if (op == 1)
1747 {
4b7f6baa
CM		 1748 OUTS (outf, iregs (i));
1749 OUTS (outf, "-=2");
4b7f6baa
CM		 1750 }
1751 else if (op == 2)
1752 {
4b7f6baa
CM		 1753 OUTS (outf, iregs (i));
1754 OUTS (outf, "+=4");
4b7f6baa
CM		 1755 }
1756 else if (op == 3)
1757 {
4b7f6baa
CM		 1758 OUTS (outf, iregs (i));
1759 OUTS (outf, "-=4");
4b7f6baa
CM		 1760 }
1761 else
b7d48530
NC		 1762 return 0;
1763
1764 return 2;
4b7f6baa
CM		 1765}
1766
1767static int
1768decode_dspLDST_0 (TIword iw0, disassemble_info *outf)
1769{
b7d48530
NC		 1770 /* dspLDST
1771 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1772 | 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......|
1773 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1774 int i = ((iw0 >> DspLDST_i_bits) & DspLDST_i_mask);
1775 int m = ((iw0 >> DspLDST_m_bits) & DspLDST_m_mask);
1776 int W = ((iw0 >> DspLDST_W_bits) & DspLDST_W_mask);
1777 int aop = ((iw0 >> DspLDST_aop_bits) & DspLDST_aop_mask);
1778 int reg = ((iw0 >> DspLDST_reg_bits) & DspLDST_reg_mask);
1779
1780 if (aop == 0 && W == 0 && m == 0)
1781 {
4b7f6baa
CM		 1782 OUTS (outf, dregs (reg));
1783 OUTS (outf, "=[");
1784 OUTS (outf, iregs (i));
1785 OUTS (outf, "++]");
4b7f6baa
CM		 1786 }
1787 else if (aop == 0 && W == 0 && m == 1)
1788 {
4b7f6baa
CM		 1789 OUTS (outf, dregs_lo (reg));
1790 OUTS (outf, "=W[");
1791 OUTS (outf, iregs (i));
1792 OUTS (outf, "++]");
4b7f6baa
CM		 1793 }
1794 else if (aop == 0 && W == 0 && m == 2)
1795 {
4b7f6baa
CM		 1796 OUTS (outf, dregs_hi (reg));
1797 OUTS (outf, "=W[");
1798 OUTS (outf, iregs (i));
1799 OUTS (outf, "++]");
4b7f6baa
CM		 1800 }
1801 else if (aop == 1 && W == 0 && m == 0)
1802 {
4b7f6baa
CM		 1803 OUTS (outf, dregs (reg));
1804 OUTS (outf, "=[");
1805 OUTS (outf, iregs (i));
1806 OUTS (outf, "--]");
4b7f6baa
CM		 1807 }
1808 else if (aop == 1 && W == 0 && m == 1)
1809 {
4b7f6baa
CM		 1810 OUTS (outf, dregs_lo (reg));
1811 OUTS (outf, "=W[");
1812 OUTS (outf, iregs (i));
1813 OUTS (outf, "--]");
4b7f6baa
CM		 1814 }
1815 else if (aop == 1 && W == 0 && m == 2)
1816 {
4b7f6baa
CM		 1817 OUTS (outf, dregs_hi (reg));
1818 OUTS (outf, "=W[");
1819 OUTS (outf, iregs (i));
1820 OUTS (outf, "--]");
4b7f6baa
CM		 1821 }
1822 else if (aop == 2 && W == 0 && m == 0)
1823 {
4b7f6baa
CM		 1824 OUTS (outf, dregs (reg));
1825 OUTS (outf, "=[");
1826 OUTS (outf, iregs (i));
1827 OUTS (outf, "]");
4b7f6baa
CM		 1828 }
1829 else if (aop == 2 && W == 0 && m == 1)
1830 {
4b7f6baa
CM		 1831 OUTS (outf, dregs_lo (reg));
1832 OUTS (outf, "=W[");
1833 OUTS (outf, iregs (i));
1834 OUTS (outf, "]");
4b7f6baa
CM		 1835 }
1836 else if (aop == 2 && W == 0 && m == 2)
1837 {
4b7f6baa
CM		 1838 OUTS (outf, dregs_hi (reg));
1839 OUTS (outf, "=W[");
1840 OUTS (outf, iregs (i));
1841 OUTS (outf, "]");
4b7f6baa
CM		 1842 }
1843 else if (aop == 0 && W == 1 && m == 0)
1844 {
4b7f6baa
CM		 1845 OUTS (outf, "[");
1846 OUTS (outf, iregs (i));
1847 OUTS (outf, "++]=");
1848 OUTS (outf, dregs (reg));
4b7f6baa
CM		 1849 }
1850 else if (aop == 0 && W == 1 && m == 1)
1851 {
4b7f6baa
CM		 1852 OUTS (outf, "W[");
1853 OUTS (outf, iregs (i));
1854 OUTS (outf, "++]=");
1855 OUTS (outf, dregs_lo (reg));
4b7f6baa
CM		 1856 }
1857 else if (aop == 0 && W == 1 && m == 2)
1858 {
4b7f6baa
CM		 1859 OUTS (outf, "W[");
1860 OUTS (outf, iregs (i));
1861 OUTS (outf, "++]=");
1862 OUTS (outf, dregs_hi (reg));
4b7f6baa
CM		 1863 }
1864 else if (aop == 1 && W == 1 && m == 0)
1865 {
4b7f6baa
CM		 1866 OUTS (outf, "[");
1867 OUTS (outf, iregs (i));
1868 OUTS (outf, "--]=");
1869 OUTS (outf, dregs (reg));
4b7f6baa
CM		 1870 }
1871 else if (aop == 1 && W == 1 && m == 1)
1872 {
4b7f6baa
CM		 1873 OUTS (outf, "W[");
1874 OUTS (outf, iregs (i));
1875 OUTS (outf, "--]=");
1876 OUTS (outf, dregs_lo (reg));
4b7f6baa
CM		 1877 }
1878 else if (aop == 1 && W == 1 && m == 2)
1879 {
4b7f6baa
CM		 1880 OUTS (outf, "W[");
1881 OUTS (outf, iregs (i));
1882 OUTS (outf, "--]=");
1883 OUTS (outf, dregs_hi (reg));
4b7f6baa
CM		 1884 }
1885 else if (aop == 2 && W == 1 && m == 0)
1886 {
4b7f6baa
CM		 1887 OUTS (outf, "[");
1888 OUTS (outf, iregs (i));
1889 OUTS (outf, "]=");
1890 OUTS (outf, dregs (reg));
4b7f6baa
CM		 1891 }
1892 else if (aop == 2 && W == 1 && m == 1)
1893 {
4b7f6baa
CM		 1894 OUTS (outf, "W[");
1895 OUTS (outf, iregs (i));
1896 OUTS (outf, "]=");
1897 OUTS (outf, dregs_lo (reg));
4b7f6baa
CM		 1898 }
1899 else if (aop == 2 && W == 1 && m == 2)
1900 {
4b7f6baa
CM		 1901 OUTS (outf, "W[");
1902 OUTS (outf, iregs (i));
1903 OUTS (outf, "]=");
1904 OUTS (outf, dregs_hi (reg));
4b7f6baa
CM		 1905 }
1906 else if (aop == 3 && W == 0)
1907 {
4b7f6baa
CM		 1908 OUTS (outf, dregs (reg));
1909 OUTS (outf, "=[");
1910 OUTS (outf, iregs (i));
1911 OUTS (outf, "++");
1912 OUTS (outf, mregs (m));
1913 OUTS (outf, "]");
4b7f6baa
CM		 1914 }
1915 else if (aop == 3 && W == 1)
1916 {
4b7f6baa
CM		 1917 OUTS (outf, "[");
1918 OUTS (outf, iregs (i));
1919 OUTS (outf, "++");
1920 OUTS (outf, mregs (m));
1921 OUTS (outf, "]=");
1922 OUTS (outf, dregs (reg));
4b7f6baa
CM		 1923 }
1924 else
b7d48530
NC		 1925 return 0;
1926
1927 return 2;
4b7f6baa
CM		 1928}
1929
1930static int
1931decode_LDST_0 (TIword iw0, disassemble_info *outf)
1932{
b7d48530
NC		 1933 /* LDST
1934 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1935 | 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......|
1936 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 1937 int Z = ((iw0 >> LDST_Z_bits) & LDST_Z_mask);
1938 int W = ((iw0 >> LDST_W_bits) & LDST_W_mask);
1939 int sz = ((iw0 >> LDST_sz_bits) & LDST_sz_mask);
1940 int aop = ((iw0 >> LDST_aop_bits) & LDST_aop_mask);
1941 int reg = ((iw0 >> LDST_reg_bits) & LDST_reg_mask);
1942 int ptr = ((iw0 >> LDST_ptr_bits) & LDST_ptr_mask);
1943
1944 if (aop == 0 && sz == 0 && Z == 0 && W == 0)
1945 {
4b7f6baa
CM		 1946 OUTS (outf, dregs (reg));
1947 OUTS (outf, "=[");
1948 OUTS (outf, pregs (ptr));
1949 OUTS (outf, "++]");
4b7f6baa
CM		 1950 }
1951 else if (aop == 0 && sz == 0 && Z == 1 && W == 0)
1952 {
4b7f6baa
CM		 1953 OUTS (outf, pregs (reg));
1954 OUTS (outf, "=[");
1955 OUTS (outf, pregs (ptr));
1956 OUTS (outf, "++]");
4b7f6baa
CM		 1957 }
1958 else if (aop == 0 && sz == 1 && Z == 0 && W == 0)
1959 {
4b7f6baa
CM		 1960 OUTS (outf, dregs (reg));
1961 OUTS (outf, "=W[");
1962 OUTS (outf, pregs (ptr));
1963 OUTS (outf, "++] (Z)");
4b7f6baa
CM		 1964 }
1965 else if (aop == 0 && sz == 1 && Z == 1 && W == 0)
1966 {
4b7f6baa
CM		 1967 OUTS (outf, dregs (reg));
1968 OUTS (outf, "=W[");
1969 OUTS (outf, pregs (ptr));
1970 OUTS (outf, "++](X)");
4b7f6baa
CM		 1971 }
1972 else if (aop == 0 && sz == 2 && Z == 0 && W == 0)
1973 {
4b7f6baa
CM		 1974 OUTS (outf, dregs (reg));
1975 OUTS (outf, "=B[");
1976 OUTS (outf, pregs (ptr));
1977 OUTS (outf, "++] (Z)");
4b7f6baa
CM		 1978 }
1979 else if (aop == 0 && sz == 2 && Z == 1 && W == 0)
1980 {
4b7f6baa
CM		 1981 OUTS (outf, dregs (reg));
1982 OUTS (outf, "=B[");
1983 OUTS (outf, pregs (ptr));
1984 OUTS (outf, "++](X)");
4b7f6baa
CM		 1985 }
1986 else if (aop == 1 && sz == 0 && Z == 0 && W == 0)
1987 {
4b7f6baa
CM		 1988 OUTS (outf, dregs (reg));
1989 OUTS (outf, "=[");
1990 OUTS (outf, pregs (ptr));
1991 OUTS (outf, "--]");
4b7f6baa
CM		 1992 }
1993 else if (aop == 1 && sz == 0 && Z == 1 && W == 0)
1994 {
4b7f6baa
CM		 1995 OUTS (outf, pregs (reg));
1996 OUTS (outf, "=[");
1997 OUTS (outf, pregs (ptr));
1998 OUTS (outf, "--]");
4b7f6baa
CM		 1999 }
2000 else if (aop == 1 && sz == 1 && Z == 0 && W == 0)
2001 {
4b7f6baa
CM		 2002 OUTS (outf, dregs (reg));
2003 OUTS (outf, "=W[");
2004 OUTS (outf, pregs (ptr));
2005 OUTS (outf, "--] (Z)");
4b7f6baa
CM		 2006 }
2007 else if (aop == 1 && sz == 1 && Z == 1 && W == 0)
2008 {
4b7f6baa
CM		 2009 OUTS (outf, dregs (reg));
2010 OUTS (outf, "=W[");
2011 OUTS (outf, pregs (ptr));
2012 OUTS (outf, "--](X)");
4b7f6baa
CM		 2013 }
2014 else if (aop == 1 && sz == 2 && Z == 0 && W == 0)
2015 {
4b7f6baa
CM		 2016 OUTS (outf, dregs (reg));
2017 OUTS (outf, "=B[");
2018 OUTS (outf, pregs (ptr));
2019 OUTS (outf, "--] (Z)");
4b7f6baa
CM		 2020 }
2021 else if (aop == 1 && sz == 2 && Z == 1 && W == 0)
2022 {
4b7f6baa
CM		 2023 OUTS (outf, dregs (reg));
2024 OUTS (outf, "=B[");
2025 OUTS (outf, pregs (ptr));
2026 OUTS (outf, "--](X)");
4b7f6baa
CM		 2027 }
2028 else if (aop == 2 && sz == 0 && Z == 0 && W == 0)
2029 {
4b7f6baa
CM		 2030 OUTS (outf, dregs (reg));
2031 OUTS (outf, "=[");
2032 OUTS (outf, pregs (ptr));
2033 OUTS (outf, "]");
4b7f6baa
CM		 2034 }
2035 else if (aop == 2 && sz == 0 && Z == 1 && W == 0)
2036 {
4b7f6baa
CM		 2037 OUTS (outf, pregs (reg));
2038 OUTS (outf, "=[");
2039 OUTS (outf, pregs (ptr));
2040 OUTS (outf, "]");
4b7f6baa
CM		 2041 }
2042 else if (aop == 2 && sz == 1 && Z == 0 && W == 0)
2043 {
4b7f6baa
CM		 2044 OUTS (outf, dregs (reg));
2045 OUTS (outf, "=W[");
2046 OUTS (outf, pregs (ptr));
2047 OUTS (outf, "] (Z)");
4b7f6baa
CM		 2048 }
2049 else if (aop == 2 && sz == 1 && Z == 1 && W == 0)
2050 {
4b7f6baa
CM		 2051 OUTS (outf, dregs (reg));
2052 OUTS (outf, "=W[");
2053 OUTS (outf, pregs (ptr));
2054 OUTS (outf, "](X)");
4b7f6baa
CM		 2055 }
2056 else if (aop == 2 && sz == 2 && Z == 0 && W == 0)
2057 {
4b7f6baa
CM		 2058 OUTS (outf, dregs (reg));
2059 OUTS (outf, "=B[");
2060 OUTS (outf, pregs (ptr));
2061 OUTS (outf, "] (Z)");
4b7f6baa
CM		 2062 }
2063 else if (aop == 2 && sz == 2 && Z == 1 && W == 0)
2064 {
4b7f6baa
CM		 2065 OUTS (outf, dregs (reg));
2066 OUTS (outf, "=B[");
2067 OUTS (outf, pregs (ptr));
2068 OUTS (outf, "](X)");
4b7f6baa
CM		 2069 }
2070 else if (aop == 0 && sz == 0 && Z == 0 && W == 1)
2071 {
4b7f6baa
CM		 2072 OUTS (outf, "[");
2073 OUTS (outf, pregs (ptr));
2074 OUTS (outf, "++]=");
2075 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2076 }
2077 else if (aop == 0 && sz == 0 && Z == 1 && W == 1)
2078 {
4b7f6baa
CM		 2079 OUTS (outf, "[");
2080 OUTS (outf, pregs (ptr));
2081 OUTS (outf, "++]=");
2082 OUTS (outf, pregs (reg));
4b7f6baa
CM		 2083 }
2084 else if (aop == 0 && sz == 1 && Z == 0 && W == 1)
2085 {
4b7f6baa
CM		 2086 OUTS (outf, "W[");
2087 OUTS (outf, pregs (ptr));
2088 OUTS (outf, "++]=");
2089 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2090 }
2091 else if (aop == 0 && sz == 2 && Z == 0 && W == 1)
2092 {
4b7f6baa
CM		 2093 OUTS (outf, "B[");
2094 OUTS (outf, pregs (ptr));
2095 OUTS (outf, "++]=");
2096 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2097 }
2098 else if (aop == 1 && sz == 0 && Z == 0 && W == 1)
2099 {
4b7f6baa
CM		 2100 OUTS (outf, "[");
2101 OUTS (outf, pregs (ptr));
2102 OUTS (outf, "--]=");
2103 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2104 }
2105 else if (aop == 1 && sz == 0 && Z == 1 && W == 1)
2106 {
4b7f6baa
CM		 2107 OUTS (outf, "[");
2108 OUTS (outf, pregs (ptr));
2109 OUTS (outf, "--]=");
2110 OUTS (outf, pregs (reg));
4b7f6baa
CM		 2111 }
2112 else if (aop == 1 && sz == 1 && Z == 0 && W == 1)
2113 {
4b7f6baa
CM		 2114 OUTS (outf, "W[");
2115 OUTS (outf, pregs (ptr));
2116 OUTS (outf, "--]=");
2117 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2118 }
2119 else if (aop == 1 && sz == 2 && Z == 0 && W == 1)
2120 {
4b7f6baa
CM		 2121 OUTS (outf, "B[");
2122 OUTS (outf, pregs (ptr));
2123 OUTS (outf, "--]=");
2124 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2125 }
2126 else if (aop == 2 && sz == 0 && Z == 0 && W == 1)
2127 {
4b7f6baa
CM		 2128 OUTS (outf, "[");
2129 OUTS (outf, pregs (ptr));
2130 OUTS (outf, "]=");
2131 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2132 }
2133 else if (aop == 2 && sz == 0 && Z == 1 && W == 1)
2134 {
4b7f6baa
CM		 2135 OUTS (outf, "[");
2136 OUTS (outf, pregs (ptr));
2137 OUTS (outf, "]=");
2138 OUTS (outf, pregs (reg));
4b7f6baa
CM		 2139 }
2140 else if (aop == 2 && sz == 1 && Z == 0 && W == 1)
2141 {
4b7f6baa
CM		 2142 OUTS (outf, "W[");
2143 OUTS (outf, pregs (ptr));
2144 OUTS (outf, "]=");
2145 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2146 }
2147 else if (aop == 2 && sz == 2 && Z == 0 && W == 1)
2148 {
4b7f6baa
CM		 2149 OUTS (outf, "B[");
2150 OUTS (outf, pregs (ptr));
2151 OUTS (outf, "]=");
2152 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2153 }
2154 else
b7d48530
NC		 2155 return 0;
2156
2157 return 2;
4b7f6baa
CM		 2158}
2159
2160static int
2161decode_LDSTiiFP_0 (TIword iw0, disassemble_info *outf)
2162{
b7d48530
NC		 2163 /* LDSTiiFP
2164 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2165 | 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........|
2166 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 2167 int reg = ((iw0 >> LDSTiiFP_reg_bits) & LDSTiiFP_reg_mask);
2168 int offset = ((iw0 >> LDSTiiFP_offset_bits) & LDSTiiFP_offset_mask);
2169 int W = ((iw0 >> LDSTiiFP_W_bits) & LDSTiiFP_W_mask);
2170
2171 if (W == 0)
2172 {
4b7f6baa
CM		 2173 OUTS (outf, dpregs (reg));
2174 OUTS (outf, "=[FP");
2175 OUTS (outf, negimm5s4 (offset));
2176 OUTS (outf, "]");
4b7f6baa
CM		 2177 }
2178 else if (W == 1)
2179 {
4b7f6baa
CM		 2180 OUTS (outf, "[FP");
2181 OUTS (outf, negimm5s4 (offset));
2182 OUTS (outf, "]=");
2183 OUTS (outf, dpregs (reg));
4b7f6baa
CM		 2184 }
2185 else
b7d48530
NC		 2186 return 0;
2187
2188 return 2;
4b7f6baa
CM		 2189}
2190
2191static int
2192decode_LDSTii_0 (TIword iw0, disassemble_info *outf)
2193{
b7d48530
NC		 2194 /* LDSTii
2195 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2196 | 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......|
2197 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 2198 int reg = ((iw0 >> LDSTii_reg_bit) & LDSTii_reg_mask);
2199 int ptr = ((iw0 >> LDSTii_ptr_bit) & LDSTii_ptr_mask);
2200 int offset = ((iw0 >> LDSTii_offset_bit) & LDSTii_offset_mask);
2201 int op = ((iw0 >> LDSTii_op_bit) & LDSTii_op_mask);
2202 int W = ((iw0 >> LDSTii_W_bit) & LDSTii_W_mask);
2203
2204 if (W == 0 && op == 0)
2205 {
4b7f6baa
CM		 2206 OUTS (outf, dregs (reg));
2207 OUTS (outf, "=[");
2208 OUTS (outf, pregs (ptr));
2209 OUTS (outf, "+");
2210 OUTS (outf, uimm4s4 (offset));
2211 OUTS (outf, "]");
4b7f6baa
CM		 2212 }
2213 else if (W == 0 && op == 1)
2214 {
4b7f6baa
CM		 2215 OUTS (outf, dregs (reg));
2216 OUTS (outf, "=W[");
2217 OUTS (outf, pregs (ptr));
2218 OUTS (outf, "+");
2219 OUTS (outf, uimm4s2 (offset));
2220 OUTS (outf, "] (Z)");
4b7f6baa
CM		 2221 }
2222 else if (W == 0 && op == 2)
2223 {
4b7f6baa
CM		 2224 OUTS (outf, dregs (reg));
2225 OUTS (outf, "=W[");
2226 OUTS (outf, pregs (ptr));
2227 OUTS (outf, "+");
2228 OUTS (outf, uimm4s2 (offset));
2229 OUTS (outf, "](X)");
4b7f6baa
CM		 2230 }
2231 else if (W == 0 && op == 3)
2232 {
4b7f6baa
CM		 2233 OUTS (outf, pregs (reg));
2234 OUTS (outf, "=[");
2235 OUTS (outf, pregs (ptr));
2236 OUTS (outf, "+");
2237 OUTS (outf, uimm4s4 (offset));
2238 OUTS (outf, "]");
4b7f6baa
CM		 2239 }
2240 else if (W == 1 && op == 0)
2241 {
4b7f6baa
CM		 2242 OUTS (outf, "[");
2243 OUTS (outf, pregs (ptr));
2244 OUTS (outf, "+");
2245 OUTS (outf, uimm4s4 (offset));
2246 OUTS (outf, "]=");
2247 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2248 }
2249 else if (W == 1 && op == 1)
2250 {
4b7f6baa
CM		 2251 OUTS (outf, "W");
2252 OUTS (outf, "[");
2253 OUTS (outf, pregs (ptr));
2254 OUTS (outf, "+");
2255 OUTS (outf, uimm4s2 (offset));
2256 OUTS (outf, "]");
2257 OUTS (outf, "=");
2258 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2259 }
2260 else if (W == 1 && op == 3)
2261 {
4b7f6baa
CM		 2262 OUTS (outf, "[");
2263 OUTS (outf, pregs (ptr));
2264 OUTS (outf, "+");
2265 OUTS (outf, uimm4s4 (offset));
2266 OUTS (outf, "]=");
2267 OUTS (outf, pregs (reg));
4b7f6baa
CM		 2268 }
2269 else
b7d48530
NC		 2270 return 0;
2271
2272 return 2;
4b7f6baa
CM		 2273}
2274
2275static int
2276decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf)
2277{
b7d48530
NC		 2278 /* LoopSetup
2279 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2280 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......|
2281 |.reg...........| - | - |.eoffset...............................|
2282 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 2283 int c = ((iw0 >> (LoopSetup_c_bits - 16)) & LoopSetup_c_mask);
2284 int reg = ((iw1 >> LoopSetup_reg_bits) & LoopSetup_reg_mask);
2285 int rop = ((iw0 >> (LoopSetup_rop_bits - 16)) & LoopSetup_rop_mask);
2286 int soffset = ((iw0 >> (LoopSetup_soffset_bits - 16)) & LoopSetup_soffset_mask);
2287 int eoffset = ((iw1 >> LoopSetup_eoffset_bits) & LoopSetup_eoffset_mask);
2288
2289 if (rop == 0)
2290 {
4b7f6baa
CM		 2291 OUTS (outf, "LSETUP");
2292 OUTS (outf, "(");
2293 OUTS (outf, pcrel4 (soffset));
2294 OUTS (outf, ",");
2295 OUTS (outf, lppcrel10 (eoffset));
2296 OUTS (outf, ")");
2297 OUTS (outf, counters (c));
4b7f6baa
CM		 2298 }
2299 else if (rop == 1)
2300 {
4b7f6baa
CM		 2301 OUTS (outf, "LSETUP");
2302 OUTS (outf, "(");
2303 OUTS (outf, pcrel4 (soffset));
2304 OUTS (outf, ",");
2305 OUTS (outf, lppcrel10 (eoffset));
2306 OUTS (outf, ")");
2307 OUTS (outf, counters (c));
2308 OUTS (outf, "=");
2309 OUTS (outf, pregs (reg));
4b7f6baa
CM		 2310 }
2311 else if (rop == 3)
2312 {
4b7f6baa
CM		 2313 OUTS (outf, "LSETUP");
2314 OUTS (outf, "(");
2315 OUTS (outf, pcrel4 (soffset));
2316 OUTS (outf, ",");
2317 OUTS (outf, lppcrel10 (eoffset));
2318 OUTS (outf, ")");
2319 OUTS (outf, counters (c));
2320 OUTS (outf, "=");
2321 OUTS (outf, pregs (reg));
2322 OUTS (outf, ">>1");
4b7f6baa
CM		 2323 }
2324 else
b7d48530
NC		 2325 return 0;
2326
2327 return 4;
4b7f6baa
CM		 2328}
2329
2330static int
2331decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf)
2332{
b7d48530
NC		 2333 /* LDIMMhalf
2334 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2335 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......|
2336 |.hword.........................................................|
2337 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 2338 int H = ((iw0 >> (LDIMMhalf_H_bits - 16)) & LDIMMhalf_H_mask);
2339 int Z = ((iw0 >> (LDIMMhalf_Z_bits - 16)) & LDIMMhalf_Z_mask);
2340 int S = ((iw0 >> (LDIMMhalf_S_bits - 16)) & LDIMMhalf_S_mask);
2341 int reg = ((iw0 >> (LDIMMhalf_reg_bits - 16)) & LDIMMhalf_reg_mask);
2342 int grp = ((iw0 >> (LDIMMhalf_grp_bits - 16)) & LDIMMhalf_grp_mask);
2343 int hword = ((iw1 >> LDIMMhalf_hword_bits) & LDIMMhalf_hword_mask);
2344
2345 if (grp == 0 && H == 0 && S == 0 && Z == 0)
2346 {
4b7f6baa
CM		 2347 OUTS (outf, dregs_lo (reg));
2348 OUTS (outf, "=");
2349 OUTS (outf, imm16 (hword));
4b7f6baa
CM		 2350 }
2351 else if (grp == 0 && H == 1 && S == 0 && Z == 0)
2352 {
4b7f6baa
CM		 2353 OUTS (outf, dregs_hi (reg));
2354 OUTS (outf, "=");
2355 OUTS (outf, imm16 (hword));
4b7f6baa
CM		 2356 }
2357 else if (grp == 0 && H == 0 && S == 1 && Z == 0)
2358 {
4b7f6baa
CM		 2359 OUTS (outf, dregs (reg));
2360 OUTS (outf, "=");
2361 OUTS (outf, imm16 (hword));
2362 OUTS (outf, " (X)");
4b7f6baa
CM		 2363 }
2364 else if (H == 0 && S == 1 && Z == 0)
2365 {
4b7f6baa
CM		 2366 OUTS (outf, regs (reg, grp));
2367 OUTS (outf, "=");
2368 OUTS (outf, imm16 (hword));
2369 OUTS (outf, " (X)");
4b7f6baa
CM		 2370 }
2371 else if (H == 0 && S == 0 && Z == 1)
2372 {
4b7f6baa
CM		 2373 OUTS (outf, regs (reg, grp));
2374 OUTS (outf, "=");
2375 OUTS (outf, luimm16 (hword));
2376 OUTS (outf, "(Z)");
4b7f6baa
CM		 2377 }
2378 else if (H == 0 && S == 0 && Z == 0)
2379 {
4b7f6baa
CM		 2380 OUTS (outf, regs_lo (reg, grp));
2381 OUTS (outf, "=");
2382 OUTS (outf, luimm16 (hword));
4b7f6baa
CM		 2383 }
2384 else if (H == 1 && S == 0 && Z == 0)
2385 {
4b7f6baa
CM		 2386 OUTS (outf, regs_hi (reg, grp));
2387 OUTS (outf, "=");
2388 OUTS (outf, huimm16 (hword));
4b7f6baa
CM		 2389 }
2390 else
b7d48530
NC		 2391 return 0;
2392
2393 return 4;
4b7f6baa
CM		 2394}
2395
2396static int
2397decode_CALLa_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf)
2398{
b7d48530
NC		 2399 /* CALLa
2400 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2401 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................|
2402 |.lsw...........................................................|
2403 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 2404 int S = ((iw0 >> (CALLa_S_bits - 16)) & CALLa_S_mask);
2405 int lsw = ((iw1 >> 0) & 0xffff);
2406 int msw = ((iw0 >> 0) & 0xff);
2407
2408 if (S == 1)
b7d48530 2409 OUTS (outf, "CALL ");
4b7f6baa 2410 else if (S == 0)
b7d48530 2411 OUTS (outf, "JUMP.L ");
4b7f6baa 2412 else
b7d48530
NC		 2413 return 0;
2414
2415 OUTS (outf, pcrel24 (((msw) << 16) | (lsw)));
2416 return 4;
4b7f6baa
CM		 2417}
2418
2419static int
2420decode_LDSTidxI_0 (TIword iw0, TIword iw1, disassemble_info *outf)
2421{
b7d48530
NC		 2422 /* LDSTidxI
2423 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2424 | 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......|
2425 |.offset........................................................|
2426 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 2427 int Z = ((iw0 >> (LDSTidxI_Z_bits - 16)) & LDSTidxI_Z_mask);
2428 int W = ((iw0 >> (LDSTidxI_W_bits - 16)) & LDSTidxI_W_mask);
2429 int sz = ((iw0 >> (LDSTidxI_sz_bits - 16)) & LDSTidxI_sz_mask);
2430 int reg = ((iw0 >> (LDSTidxI_reg_bits - 16)) & LDSTidxI_reg_mask);
2431 int ptr = ((iw0 >> (LDSTidxI_ptr_bits - 16)) & LDSTidxI_ptr_mask);
2432 int offset = ((iw1 >> LDSTidxI_offset_bits) & LDSTidxI_offset_mask);
2433
2434 if (W == 0 && sz == 0 && Z == 0)
2435 {
4b7f6baa
CM		 2436 OUTS (outf, dregs (reg));
2437 OUTS (outf, "=[");
2438 OUTS (outf, pregs (ptr));
2439 OUTS (outf, "+");
2440 OUTS (outf, imm16s4 (offset));
2441 OUTS (outf, "]");
4b7f6baa
CM		 2442 }
2443 else if (W == 0 && sz == 0 && Z == 1)
2444 {
4b7f6baa
CM		 2445 OUTS (outf, pregs (reg));
2446 OUTS (outf, "=[");
2447 OUTS (outf, pregs (ptr));
2448 OUTS (outf, "+");
2449 OUTS (outf, imm16s4 (offset));
2450 OUTS (outf, "]");
4b7f6baa
CM		 2451 }
2452 else if (W == 0 && sz == 1 && Z == 0)
2453 {
4b7f6baa
CM		 2454 OUTS (outf, dregs (reg));
2455 OUTS (outf, "=W[");
2456 OUTS (outf, pregs (ptr));
2457 OUTS (outf, "+");
2458 OUTS (outf, imm16s2 (offset));
2459 OUTS (outf, "] (Z)");
4b7f6baa
CM		 2460 }
2461 else if (W == 0 && sz == 1 && Z == 1)
2462 {
4b7f6baa
CM		 2463 OUTS (outf, dregs (reg));
2464 OUTS (outf, "=W[");
2465 OUTS (outf, pregs (ptr));
2466 OUTS (outf, "+");
2467 OUTS (outf, imm16s2 (offset));
2468 OUTS (outf, "](X)");
4b7f6baa
CM		 2469 }
2470 else if (W == 0 && sz == 2 && Z == 0)
2471 {
4b7f6baa
CM		 2472 OUTS (outf, dregs (reg));
2473 OUTS (outf, "=B[");
2474 OUTS (outf, pregs (ptr));
2475 OUTS (outf, "+");
2476 OUTS (outf, imm16 (offset));
2477 OUTS (outf, "] (Z)");
4b7f6baa
CM		 2478 }
2479 else if (W == 0 && sz == 2 && Z == 1)
2480 {
4b7f6baa
CM		 2481 OUTS (outf, dregs (reg));
2482 OUTS (outf, "=B[");
2483 OUTS (outf, pregs (ptr));
2484 OUTS (outf, "+");
2485 OUTS (outf, imm16 (offset));
2486 OUTS (outf, "](X)");
4b7f6baa
CM		 2487 }
2488 else if (W == 1 && sz == 0 && Z == 0)
2489 {
4b7f6baa
CM		 2490 OUTS (outf, "[");
2491 OUTS (outf, pregs (ptr));
2492 OUTS (outf, "+");
2493 OUTS (outf, imm16s4 (offset));
2494 OUTS (outf, "]=");
2495 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2496 }
2497 else if (W == 1 && sz == 0 && Z == 1)
2498 {
4b7f6baa
CM		 2499 OUTS (outf, "[");
2500 OUTS (outf, pregs (ptr));
2501 OUTS (outf, "+");
2502 OUTS (outf, imm16s4 (offset));
2503 OUTS (outf, "]=");
2504 OUTS (outf, pregs (reg));
4b7f6baa
CM		 2505 }
2506 else if (W == 1 && sz == 1 && Z == 0)
2507 {
4b7f6baa
CM		 2508 OUTS (outf, "W[");
2509 OUTS (outf, pregs (ptr));
2510 OUTS (outf, "+");
2511 OUTS (outf, imm16s2 (offset));
2512 OUTS (outf, "]=");
2513 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2514 }
2515 else if (W == 1 && sz == 2 && Z == 0)
2516 {
4b7f6baa
CM		 2517 OUTS (outf, "B[");
2518 OUTS (outf, pregs (ptr));
2519 OUTS (outf, "+");
2520 OUTS (outf, imm16 (offset));
2521 OUTS (outf, "]=");
2522 OUTS (outf, dregs (reg));
4b7f6baa
CM		 2523 }
2524 else
b7d48530
NC		 2525 return 0;
2526
2527 return 4;
4b7f6baa
CM		 2528}
2529
2530static int
2531decode_linkage_0 (TIword iw0, TIword iw1, disassemble_info *outf)
2532{
b7d48530
NC		 2533 /* linkage
2534 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2535 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.|
2536 |.framesize.....................................................|
2537 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 2538 int R = ((iw0 >> (Linkage_R_bits - 16)) & Linkage_R_mask);
2539 int framesize = ((iw1 >> Linkage_framesize_bits) & Linkage_framesize_mask);
2540
2541 if (R == 0)
2542 {
4b7f6baa
CM		 2543 OUTS (outf, "LINK ");
2544 OUTS (outf, uimm16s4 (framesize));
4b7f6baa
CM		 2545 }
2546 else if (R == 1)
b7d48530 2547 OUTS (outf, "UNLINK");
4b7f6baa 2548 else
b7d48530
NC		 2549 return 0;
2550
2551 return 4;
4b7f6baa
CM		 2552}
2553
2554static int
2555decode_dsp32mac_0 (TIword iw0, TIword iw1, disassemble_info *outf)
2556{
b7d48530
NC		 2557 /* dsp32mac
2558 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2559 | 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...|
2560 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..|
2561 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2562 int op1 = ((iw0 >> (DSP32Mac_op1_bits - 16)) & DSP32Mac_op1_mask);
2563 int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask);
2564 int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask);
2565 int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask);
4b7f6baa 2566 int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask);
b7d48530 2567 int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask);
4b7f6baa
CM		 2568 int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask);
2569 int src1 = ((iw1 >> DSP32Mac_src1_bits) & DSP32Mac_src1_mask);
b7d48530
NC		 2570 int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask);
2571 int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask);
2572 int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask);
2573 int op0 = ((iw1 >> DSP32Mac_op0_bits) & DSP32Mac_op0_mask);
2574 int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask);
2575 int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask);
4b7f6baa
CM		 2576
2577 if (w0 == 0 && w1 == 0 && op1 == 3 && op0 == 3)
2578 return 0;
2579
2580 if (op1 == 3 && MM)
2581 return 0;
2582
2583 if ((w1 || w0) && mmod == M_W32)
2584 return 0;
2585
2586 if (((1 << mmod) & (P ? 0x31b : 0x1b5f)) == 0)
2587 return 0;
2588
2589 if (w1 == 1 || op1 != 3)
2590 {
2591 if (w1)
2592 OUTS (outf, P ? dregs (dst + 1) : dregs_hi (dst));
2593
2594 if (op1 == 3)
2595 OUTS (outf, " = A1");
2596 else
2597 {
2598 if (w1)
2599 OUTS (outf, " = (");
2600 decode_macfunc (1, op1, h01, h11, src0, src1, outf);
2601 if (w1)
2602 OUTS (outf, ")");
2603 }
2604
2605 if (w0 == 1 || op0 != 3)
2606 {
2607 if (MM)
2608 OUTS (outf, " (M)");
2609 MM = 0;
2610 OUTS (outf, ", ");
2611 }
2612 }
2613
2614 if (w0 == 1 || op0 != 3)
2615 {
2616 if (w0)
2617 OUTS (outf, P ? dregs (dst) : dregs_lo (dst));
2618
2619 if (op0 == 3)
2620 OUTS (outf, " = A0");
2621 else
2622 {
2623 if (w0)
2624 OUTS (outf, " = (");
2625 decode_macfunc (0, op0, h00, h10, src0, src1, outf);
2626 if (w0)
2627 OUTS (outf, ")");
2628 }
2629 }
2630
2631 decode_optmode (mmod, MM, outf);
2632
2633 return 4;
2634}
2635
2636static int
2637decode_dsp32mult_0 (TIword iw0, TIword iw1, disassemble_info *outf)
2638{
b7d48530
NC		 2639 /* dsp32mult
2640 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2641 | 1 | 1 | 0 | 0 |.M.| 0 | 1 |.mmod..........|.MM|.P.|.w1|.op1...|
2642 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..|
2643 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2644 int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask);
2645 int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask);
2646 int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask);
4b7f6baa 2647 int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask);
b7d48530 2648 int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask);
4b7f6baa
CM		 2649 int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask);
2650 int src1 = ((iw1 >> DSP32Mac_src1_bits) & DSP32Mac_src1_mask);
b7d48530
NC		 2651 int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask);
2652 int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask);
2653 int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask);
2654 int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask);
2655 int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask);
4b7f6baa
CM		 2656
2657 if (w1 == 0 && w0 == 0)
2658 return 0;
b7d48530 2659
4b7f6baa
CM		 2660 if (((1 << mmod) & (P ? 0x313 : 0x1b57)) == 0)
2661 return 0;
b7d48530 2662
4b7f6baa
CM		 2663 if (w1)
2664 {
2665 OUTS (outf, P ? dregs (dst | 1) : dregs_hi (dst));
2666 OUTS (outf, " = ");
2667 decode_multfunc (h01, h11, src0, src1, outf);
2668
2669 if (w0)
2670 {
2671 if (MM)
2672 OUTS (outf, " (M)");
2673 MM = 0;
2674 OUTS (outf, ", ");
2675 }
2676 }
2677
2678 if (w0)
2679 {
2680 OUTS (outf, dregs (dst));
2681 OUTS (outf, " = ");
2682 decode_multfunc (h00, h10, src0, src1, outf);
2683 }
2684
2685 decode_optmode (mmod, MM, outf);
2686 return 4;
2687}
2688
2689static int
2690decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf)
2691{
b7d48530
NC		 2692 /* dsp32alu
2693 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2694 | 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............|
2695 |.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......|
2696 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 2697 int s = ((iw1 >> DSP32Alu_s_bits) & DSP32Alu_s_mask);
2698 int x = ((iw1 >> DSP32Alu_x_bits) & DSP32Alu_x_mask);
2699 int aop = ((iw1 >> DSP32Alu_aop_bits) & DSP32Alu_aop_mask);
2700 int src0 = ((iw1 >> DSP32Alu_src0_bits) & DSP32Alu_src0_mask);
2701 int src1 = ((iw1 >> DSP32Alu_src1_bits) & DSP32Alu_src1_mask);
2702 int dst0 = ((iw1 >> DSP32Alu_dst0_bits) & DSP32Alu_dst0_mask);
2703 int dst1 = ((iw1 >> DSP32Alu_dst1_bits) & DSP32Alu_dst1_mask);
2704 int HL = ((iw0 >> (DSP32Alu_HL_bits - 16)) & DSP32Alu_HL_mask);
2705 int aopcde = ((iw0 >> (DSP32Alu_aopcde_bits - 16)) & DSP32Alu_aopcde_mask);
2706
2707 if (aop == 0 && aopcde == 9 && HL == 0 && s == 0)
2708 {
4b7f6baa
CM		 2709 OUTS (outf, "A0.L=");
2710 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 2711 }
2712 else if (aop == 2 && aopcde == 9 && HL == 1 && s == 0)
2713 {
4b7f6baa
CM		 2714 OUTS (outf, "A1.H=");
2715 OUTS (outf, dregs_hi (src0));
4b7f6baa
CM		 2716 }
2717 else if (aop == 2 && aopcde == 9 && HL == 0 && s == 0)
2718 {
4b7f6baa
CM		 2719 OUTS (outf, "A1.L=");
2720 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 2721 }
2722 else if (aop == 0 && aopcde == 9 && HL == 1 && s == 0)
2723 {
4b7f6baa
CM		 2724 OUTS (outf, "A0.H=");
2725 OUTS (outf, dregs_hi (src0));
4b7f6baa
CM		 2726 }
2727 else if (x == 1 && HL == 1 && aop == 3 && aopcde == 5)
2728 {
4b7f6baa
CM		 2729 OUTS (outf, dregs_hi (dst0));
2730 OUTS (outf, "=");
2731 OUTS (outf, dregs (src0));
2732 OUTS (outf, "-");
2733 OUTS (outf, dregs (src1));
2734 OUTS (outf, "(RND20)");
4b7f6baa
CM		 2735 }
2736 else if (x == 1 && HL == 1 && aop == 2 && aopcde == 5)
2737 {
4b7f6baa
CM		 2738 OUTS (outf, dregs_hi (dst0));
2739 OUTS (outf, "=");
2740 OUTS (outf, dregs (src0));
2741 OUTS (outf, "+");
2742 OUTS (outf, dregs (src1));
2743 OUTS (outf, "(RND20)");
4b7f6baa
CM		 2744 }
2745 else if (x == 0 && HL == 0 && aop == 1 && aopcde == 5)
2746 {
4b7f6baa
CM		 2747 OUTS (outf, dregs_lo (dst0));
2748 OUTS (outf, "=");
2749 OUTS (outf, dregs (src0));
2750 OUTS (outf, "-");
2751 OUTS (outf, dregs (src1));
2752 OUTS (outf, "(RND12)");
4b7f6baa
CM		 2753 }
2754 else if (x == 0 && HL == 0 && aop == 0 && aopcde == 5)
2755 {
4b7f6baa
CM		 2756 OUTS (outf, dregs_lo (dst0));
2757 OUTS (outf, "=");
2758 OUTS (outf, dregs (src0));
2759 OUTS (outf, "+");
2760 OUTS (outf, dregs (src1));
2761 OUTS (outf, "(RND12)");
4b7f6baa
CM		 2762 }
2763 else if (x == 1 && HL == 0 && aop == 3 && aopcde == 5)
2764 {
4b7f6baa
CM		 2765 OUTS (outf, dregs_lo (dst0));
2766 OUTS (outf, "=");
2767 OUTS (outf, dregs (src0));
2768 OUTS (outf, "-");
2769 OUTS (outf, dregs (src1));
2770 OUTS (outf, "(RND20)");
4b7f6baa
CM		 2771 }
2772 else if (x == 0 && HL == 1 && aop == 0 && aopcde == 5)
2773 {
4b7f6baa
CM		 2774 OUTS (outf, dregs_hi (dst0));
2775 OUTS (outf, "=");
2776 OUTS (outf, dregs (src0));
2777 OUTS (outf, "+");
2778 OUTS (outf, dregs (src1));
2779 OUTS (outf, "(RND12)");
4b7f6baa
CM		 2780 }
2781 else if (x == 1 && HL == 0 && aop == 2 && aopcde == 5)
2782 {
4b7f6baa
CM		 2783 OUTS (outf, dregs_lo (dst0));
2784 OUTS (outf, "=");
2785 OUTS (outf, dregs (src0));
2786 OUTS (outf, "+");
2787 OUTS (outf, dregs (src1));
2788 OUTS (outf, "(RND20)");
4b7f6baa
CM		 2789 }
2790 else if (x == 0 && HL == 1 && aop == 1 && aopcde == 5)
2791 {
4b7f6baa
CM		 2792 OUTS (outf, dregs_hi (dst0));
2793 OUTS (outf, "=");
2794 OUTS (outf, dregs (src0));
2795 OUTS (outf, "-");
2796 OUTS (outf, dregs (src1));
2797 OUTS (outf, "(RND12)");
4b7f6baa
CM		 2798 }
2799 else if (HL == 1 && aop == 0 && aopcde == 2)
2800 {
4b7f6baa
CM		 2801 OUTS (outf, dregs_hi (dst0));
2802 OUTS (outf, "=");
2803 OUTS (outf, dregs_lo (src0));
2804 OUTS (outf, "+");
2805 OUTS (outf, dregs_lo (src1));
2806 OUTS (outf, " ");
2807 amod1 (s, x, outf);
4b7f6baa
CM		 2808 }
2809 else if (HL == 1 && aop == 1 && aopcde == 2)
2810 {
4b7f6baa
CM		 2811 OUTS (outf, dregs_hi (dst0));
2812 OUTS (outf, "=");
2813 OUTS (outf, dregs_lo (src0));
2814 OUTS (outf, "+");
2815 OUTS (outf, dregs_hi (src1));
2816 OUTS (outf, " ");
2817 amod1 (s, x, outf);
4b7f6baa
CM		 2818 }
2819 else if (HL == 1 && aop == 2 && aopcde == 2)
2820 {
4b7f6baa
CM		 2821 OUTS (outf, dregs_hi (dst0));
2822 OUTS (outf, "=");
2823 OUTS (outf, dregs_hi (src0));
2824 OUTS (outf, "+");
2825 OUTS (outf, dregs_lo (src1));
2826 OUTS (outf, " ");
2827 amod1 (s, x, outf);
4b7f6baa
CM		 2828 }
2829 else if (HL == 1 && aop == 3 && aopcde == 2)
2830 {
4b7f6baa
CM		 2831 OUTS (outf, dregs_hi (dst0));
2832 OUTS (outf, "=");
2833 OUTS (outf, dregs_hi (src0));
2834 OUTS (outf, "+");
2835 OUTS (outf, dregs_hi (src1));
2836 OUTS (outf, " ");
2837 amod1 (s, x, outf);
4b7f6baa
CM		 2838 }
2839 else if (HL == 0 && aop == 0 && aopcde == 3)
2840 {
4b7f6baa
CM		 2841 OUTS (outf, dregs_lo (dst0));
2842 OUTS (outf, "=");
2843 OUTS (outf, dregs_lo (src0));
2844 OUTS (outf, "-");
2845 OUTS (outf, dregs_lo (src1));
2846 OUTS (outf, " ");
2847 amod1 (s, x, outf);
4b7f6baa
CM		 2848 }
2849 else if (HL == 0 && aop == 1 && aopcde == 3)
2850 {
4b7f6baa
CM		 2851 OUTS (outf, dregs_lo (dst0));
2852 OUTS (outf, "=");
2853 OUTS (outf, dregs_lo (src0));
2854 OUTS (outf, "-");
2855 OUTS (outf, dregs_hi (src1));
2856 OUTS (outf, " ");
2857 amod1 (s, x, outf);
4b7f6baa
CM		 2858 }
2859 else if (HL == 0 && aop == 3 && aopcde == 2)
2860 {
4b7f6baa
CM		 2861 OUTS (outf, dregs_lo (dst0));
2862 OUTS (outf, "=");
2863 OUTS (outf, dregs_hi (src0));
2864 OUTS (outf, "+");
2865 OUTS (outf, dregs_hi (src1));
2866 OUTS (outf, " ");
2867 amod1 (s, x, outf);
4b7f6baa
CM		 2868 }
2869 else if (HL == 1 && aop == 0 && aopcde == 3)
2870 {
4b7f6baa
CM		 2871 OUTS (outf, dregs_hi (dst0));
2872 OUTS (outf, "=");
2873 OUTS (outf, dregs_lo (src0));
2874 OUTS (outf, "-");
2875 OUTS (outf, dregs_lo (src1));
2876 OUTS (outf, " ");
2877 amod1 (s, x, outf);
4b7f6baa
CM		 2878 }
2879 else if (HL == 1 && aop == 1 && aopcde == 3)
2880 {
4b7f6baa
CM		 2881 OUTS (outf, dregs_hi (dst0));
2882 OUTS (outf, "=");
2883 OUTS (outf, dregs_lo (src0));
2884 OUTS (outf, "-");
2885 OUTS (outf, dregs_hi (src1));
2886 OUTS (outf, " ");
2887 amod1 (s, x, outf);
4b7f6baa
CM		 2888 }
2889 else if (HL == 1 && aop == 2 && aopcde == 3)
2890 {
4b7f6baa
CM		 2891 OUTS (outf, dregs_hi (dst0));
2892 OUTS (outf, "=");
2893 OUTS (outf, dregs_hi (src0));
2894 OUTS (outf, "-");
2895 OUTS (outf, dregs_lo (src1));
2896 OUTS (outf, " ");
2897 amod1 (s, x, outf);
4b7f6baa
CM		 2898 }
2899 else if (HL == 1 && aop == 3 && aopcde == 3)
2900 {
4b7f6baa
CM		 2901 OUTS (outf, dregs_hi (dst0));
2902 OUTS (outf, "=");
2903 OUTS (outf, dregs_hi (src0));
2904 OUTS (outf, "-");
2905 OUTS (outf, dregs_hi (src1));
2906 OUTS (outf, " ");
2907 amod1 (s, x, outf);
4b7f6baa
CM		 2908 }
2909 else if (HL == 0 && aop == 2 && aopcde == 2)
2910 {
4b7f6baa
CM		 2911 OUTS (outf, dregs_lo (dst0));
2912 OUTS (outf, "=");
2913 OUTS (outf, dregs_hi (src0));
2914 OUTS (outf, "+");
2915 OUTS (outf, dregs_lo (src1));
2916 OUTS (outf, " ");
2917 amod1 (s, x, outf);
4b7f6baa
CM		 2918 }
2919 else if (HL == 0 && aop == 1 && aopcde == 2)
2920 {
4b7f6baa
CM		 2921 OUTS (outf, dregs_lo (dst0));
2922 OUTS (outf, "=");
2923 OUTS (outf, dregs_lo (src0));
2924 OUTS (outf, "+");
2925 OUTS (outf, dregs_hi (src1));
2926 OUTS (outf, " ");
2927 amod1 (s, x, outf);
4b7f6baa
CM		 2928 }
2929 else if (HL == 0 && aop == 2 && aopcde == 3)
2930 {
4b7f6baa
CM		 2931 OUTS (outf, dregs_lo (dst0));
2932 OUTS (outf, "=");
2933 OUTS (outf, dregs_hi (src0));
2934 OUTS (outf, "-");
2935 OUTS (outf, dregs_lo (src1));
2936 OUTS (outf, " ");
2937 amod1 (s, x, outf);
4b7f6baa
CM		 2938 }
2939 else if (HL == 0 && aop == 3 && aopcde == 3)
2940 {
4b7f6baa
CM		 2941 OUTS (outf, dregs_lo (dst0));
2942 OUTS (outf, "=");
2943 OUTS (outf, dregs_hi (src0));
2944 OUTS (outf, "-");
2945 OUTS (outf, dregs_hi (src1));
2946 OUTS (outf, " ");
2947 amod1 (s, x, outf);
4b7f6baa
CM		 2948 }
2949 else if (HL == 0 && aop == 0 && aopcde == 2)
2950 {
4b7f6baa
CM		 2951 OUTS (outf, dregs_lo (dst0));
2952 OUTS (outf, "=");
2953 OUTS (outf, dregs_lo (src0));
2954 OUTS (outf, "+");
2955 OUTS (outf, dregs_lo (src1));
2956 OUTS (outf, " ");
2957 amod1 (s, x, outf);
4b7f6baa
CM		 2958 }
2959 else if (aop == 0 && aopcde == 9 && s == 1)
2960 {
4b7f6baa
CM		 2961 OUTS (outf, "A0=");
2962 OUTS (outf, dregs (src0));
4b7f6baa
CM		 2963 }
2964 else if (aop == 3 && aopcde == 11 && s == 0)
b7d48530
NC		 2965 OUTS (outf, "A0-=A1");
2966
4b7f6baa 2967 else if (aop == 3 && aopcde == 11 && s == 1)
b7d48530
NC		 2968 OUTS (outf, "A0-=A1(W32)");
2969
4b7f6baa
CM		 2970 else if (aop == 3 && aopcde == 22 && HL == 1)
2971 {
4b7f6baa
CM		 2972 OUTS (outf, dregs (dst0));
2973 OUTS (outf, "=BYTEOP2M(");
2974 OUTS (outf, dregs (src0 + 1));
2975 OUTS (outf, ":");
2976 OUTS (outf, imm5 (src0));
2977 OUTS (outf, ",");
2978 OUTS (outf, dregs (src1 + 1));
2979 OUTS (outf, ":");
2980 OUTS (outf, imm5 (src1));
2981 OUTS (outf, ")(TH");
2982 if (s == 1)
2983 OUTS (outf, ", R)");
2984 else
2985 OUTS (outf, ")");
4b7f6baa
CM		 2986 }
2987 else if (aop == 3 && aopcde == 22 && HL == 0)
2988 {
4b7f6baa
CM		 2989 OUTS (outf, dregs (dst0));
2990 OUTS (outf, "=BYTEOP2M(");
2991 OUTS (outf, dregs (src0 + 1));
2992 OUTS (outf, ":");
2993 OUTS (outf, imm5 (src0));
2994 OUTS (outf, ",");
2995 OUTS (outf, dregs (src1 + 1));
2996 OUTS (outf, ":");
2997 OUTS (outf, imm5 (src1));
2998 OUTS (outf, ")(TL");
2999 if (s == 1)
3000 OUTS (outf, ", R)");
3001 else
3002 OUTS (outf, ")");
4b7f6baa
CM		 3003 }
3004 else if (aop == 2 && aopcde == 22 && HL == 1)
3005 {
4b7f6baa
CM		 3006 OUTS (outf, dregs (dst0));
3007 OUTS (outf, "=BYTEOP2M(");
3008 OUTS (outf, dregs (src0 + 1));
3009 OUTS (outf, ":");
3010 OUTS (outf, imm5 (src0));
3011 OUTS (outf, ",");
3012 OUTS (outf, dregs (src1 + 1));
3013 OUTS (outf, ":");
3014 OUTS (outf, imm5 (src1));
3015 OUTS (outf, ")(RNDH");
3016 if (s == 1)
3017 OUTS (outf, ", R)");
3018 else
3019 OUTS (outf, ")");
4b7f6baa
CM		 3020 }
3021 else if (aop == 2 && aopcde == 22 && HL == 0)
3022 {
4b7f6baa
CM		 3023 OUTS (outf, dregs (dst0));
3024 OUTS (outf, "=BYTEOP2M(");
3025 OUTS (outf, dregs (src0 + 1));
3026 OUTS (outf, ":");
3027 OUTS (outf, imm5 (src0));
3028 OUTS (outf, ",");
3029 OUTS (outf, dregs (src1 + 1));
3030 OUTS (outf, ":");
3031 OUTS (outf, imm5 (src1));
3032 OUTS (outf, ")(RNDL");
3033 if (s == 1)
3034 OUTS (outf, ", R)");
3035 else
3036 OUTS (outf, ")");
4b7f6baa
CM		 3037 }
3038 else if (aop == 1 && aopcde == 22 && HL == 1)
3039 {
4b7f6baa
CM		 3040 OUTS (outf, dregs (dst0));
3041 OUTS (outf, "=BYTEOP2P(");
3042 OUTS (outf, dregs (src0 + 1));
3043 OUTS (outf, ":");
3044 OUTS (outf, imm5 (src0));
3045 OUTS (outf, ",");
3046 OUTS (outf, dregs (src1 + 1));
3047 OUTS (outf, ":");
3048 OUTS (outf, imm5 (src1));
3049 OUTS (outf, ")(TH");
3050 if (s == 1)
3051 OUTS (outf, ", R)");
3052 else
3053 OUTS (outf, ")");
4b7f6baa
CM		 3054 }
3055 else if (aop == 1 && aopcde == 22 && HL == 0)
3056 {
4b7f6baa
CM		 3057 OUTS (outf, dregs (dst0));
3058 OUTS (outf, "=BYTEOP2P(");
3059 OUTS (outf, dregs (src0 + 1));
3060 OUTS (outf, ":");
3061 OUTS (outf, imm5 (src0));
3062 OUTS (outf, ",");
3063 OUTS (outf, dregs (src1 + 1));
3064 OUTS (outf, ":");
3065 OUTS (outf, imm5 (src1));
3066 OUTS (outf, ")(TL");
3067 if (s == 1)
3068 OUTS (outf, ", R)");
3069 else
3070 OUTS (outf, ")");
4b7f6baa
CM		 3071 }
3072 else if (aop == 0 && aopcde == 22 && HL == 1)
3073 {
4b7f6baa
CM		 3074 OUTS (outf, dregs (dst0));
3075 OUTS (outf, "=BYTEOP2P(");
3076 OUTS (outf, dregs (src0 + 1));
3077 OUTS (outf, ":");
3078 OUTS (outf, imm5 (src0));
3079 OUTS (outf, ",");
3080 OUTS (outf, dregs (src1 + 1));
3081 OUTS (outf, ":");
3082 OUTS (outf, imm5 (src1));
3083 OUTS (outf, ")(RNDH");
3084 if (s == 1)
3085 OUTS (outf, ", R)");
3086 else
3087 OUTS (outf, ")");
4b7f6baa
CM		 3088 }
3089 else if (aop == 0 && aopcde == 22 && HL == 0)
3090 {
4b7f6baa
CM		 3091 OUTS (outf, dregs (dst0));
3092 OUTS (outf, "=BYTEOP2P(");
3093 OUTS (outf, dregs (src0 + 1));
3094 OUTS (outf, ":");
3095 OUTS (outf, imm5 (src0));
3096 OUTS (outf, ",");
3097 OUTS (outf, dregs (src1 + 1));
3098 OUTS (outf, ":");
3099 OUTS (outf, imm5 (src1));
3100 OUTS (outf, ")(RNDL");
3101 if (s == 1)
3102 OUTS (outf, ", R)");
3103 else
3104 OUTS (outf, ")");
4b7f6baa
CM		 3105 }
3106 else if (aop == 0 && s == 0 && aopcde == 8)
b7d48530
NC		 3107 OUTS (outf, "A0=0");
3108
4b7f6baa 3109 else if (aop == 0 && s == 1 && aopcde == 8)
b7d48530
NC		 3110 OUTS (outf, "A0=A0(S)");
3111
4b7f6baa 3112 else if (aop == 1 && s == 0 && aopcde == 8)
b7d48530
NC		 3113 OUTS (outf, "A1=0");
3114
4b7f6baa 3115 else if (aop == 1 && s == 1 && aopcde == 8)
b7d48530
NC		 3116 OUTS (outf, "A1=A1(S)");
3117
4b7f6baa 3118 else if (aop == 2 && s == 0 && aopcde == 8)
b7d48530
NC		 3119 OUTS (outf, "A1=A0=0");
3120
4b7f6baa 3121 else if (aop == 2 && s == 1 && aopcde == 8)
b7d48530
NC		 3122 OUTS (outf, "A1=A1(S),A0=A0(S)");
3123
4b7f6baa 3124 else if (aop == 3 && s == 0 && aopcde == 8)
b7d48530
NC		 3125 OUTS (outf, "A0=A1");
3126
4b7f6baa 3127 else if (aop == 3 && s == 1 && aopcde == 8)
b7d48530
NC		 3128 OUTS (outf, "A1=A0");
3129
4b7f6baa
CM		 3130 else if (aop == 1 && aopcde == 9 && s == 0)
3131 {
4b7f6baa
CM		 3132 OUTS (outf, "A0.x=");
3133 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3134 }
3135 else if (aop == 1 && HL == 0 && aopcde == 11)
3136 {
4b7f6baa
CM		 3137 OUTS (outf, dregs_lo (dst0));
3138 OUTS (outf, "=(A0+=A1)");
4b7f6baa
CM		 3139 }
3140 else if (aop == 3 && HL == 0 && aopcde == 16)
b7d48530
NC		 3141 OUTS (outf, "A1= ABS A0,A0= ABS A0");
3142
4b7f6baa
CM		 3143 else if (aop == 0 && aopcde == 23 && HL == 1)
3144 {
4b7f6baa
CM		 3145 OUTS (outf, dregs (dst0));
3146 OUTS (outf, "=BYTEOP3P(");
3147 OUTS (outf, dregs (src0 + 1));
3148 OUTS (outf, ":");
3149 OUTS (outf, imm5 (src0));
3150 OUTS (outf, ",");
3151 OUTS (outf, dregs (src1 + 1));
3152 OUTS (outf, ":");
3153 OUTS (outf, imm5 (src1));
3154 OUTS (outf, ")(HI");
3155 if (s == 1)
3156 OUTS (outf, ", R)");
3157 else
3158 OUTS (outf, ")");
4b7f6baa
CM		 3159 }
3160 else if (aop == 3 && aopcde == 9 && s == 0)
3161 {
4b7f6baa
CM		 3162 OUTS (outf, "A1.x=");
3163 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3164 }
3165 else if (aop == 1 && HL == 1 && aopcde == 16)
b7d48530
NC		 3166 OUTS (outf, "A1= ABS A1");
3167
4b7f6baa 3168 else if (aop == 0 && HL == 1 && aopcde == 16)
b7d48530
NC		 3169 OUTS (outf, "A1= ABS A0");
3170
4b7f6baa
CM		 3171 else if (aop == 2 && aopcde == 9 && s == 1)
3172 {
4b7f6baa
CM		 3173 OUTS (outf, "A1=");
3174 OUTS (outf, dregs (src0));
4b7f6baa
CM		 3175 }
3176 else if (HL == 0 && aop == 3 && aopcde == 12)
3177 {
4b7f6baa
CM		 3178 OUTS (outf, dregs_lo (dst0));
3179 OUTS (outf, "=");
3180 OUTS (outf, dregs (src0));
3181 OUTS (outf, "(RND)");
4b7f6baa
CM		 3182 }
3183 else if (aop == 1 && HL == 0 && aopcde == 16)
b7d48530
NC		 3184 OUTS (outf, "A0= ABS A1");
3185
4b7f6baa 3186 else if (aop == 0 && HL == 0 && aopcde == 16)
b7d48530
NC		 3187 OUTS (outf, "A0= ABS A0");
3188
4b7f6baa
CM		 3189 else if (aop == 3 && HL == 0 && aopcde == 15)
3190 {
4b7f6baa
CM		 3191 OUTS (outf, dregs (dst0));
3192 OUTS (outf, "=-");
3193 OUTS (outf, dregs (src0));
3194 OUTS (outf, "(V)");
4b7f6baa
CM		 3195 }
3196 else if (aop == 3 && s == 1 && HL == 0 && aopcde == 7)
3197 {
4b7f6baa
CM		 3198 OUTS (outf, dregs (dst0));
3199 OUTS (outf, "=-");
3200 OUTS (outf, dregs (src0));
3201 OUTS (outf, "(S)");
4b7f6baa
CM		 3202 }
3203 else if (aop == 3 && s == 0 && HL == 0 && aopcde == 7)
3204 {
4b7f6baa
CM		 3205 OUTS (outf, dregs (dst0));
3206 OUTS (outf, "=-");
3207 OUTS (outf, dregs (src0));
3208 OUTS (outf, "(NS)");
4b7f6baa
CM		 3209 }
3210 else if (aop == 1 && HL == 1 && aopcde == 11)
3211 {
4b7f6baa
CM		 3212 OUTS (outf, dregs_hi (dst0));
3213 OUTS (outf, "=(A0+=A1)");
4b7f6baa
CM		 3214 }
3215 else if (aop == 2 && aopcde == 11 && s == 0)
b7d48530
NC		 3216 OUTS (outf, "A0+=A1");
3217
4b7f6baa 3218 else if (aop == 2 && aopcde == 11 && s == 1)
b7d48530
NC		 3219 OUTS (outf, "A0+=A1(W32)");
3220
4b7f6baa 3221 else if (aop == 3 && HL == 0 && aopcde == 14)
b7d48530
NC		 3222 OUTS (outf, "A1=-A1,A0=-A0");
3223
4b7f6baa
CM		 3224 else if (HL == 1 && aop == 3 && aopcde == 12)
3225 {
4b7f6baa
CM		 3226 OUTS (outf, dregs_hi (dst0));
3227 OUTS (outf, "=");
3228 OUTS (outf, dregs (src0));
3229 OUTS (outf, "(RND)");
4b7f6baa
CM		 3230 }
3231 else if (aop == 0 && aopcde == 23 && HL == 0)
3232 {
4b7f6baa
CM		 3233 OUTS (outf, dregs (dst0));
3234 OUTS (outf, "=BYTEOP3P(");
3235 OUTS (outf, dregs (src0 + 1));
3236 OUTS (outf, ":");
3237 OUTS (outf, imm5 (src0));
3238 OUTS (outf, ",");
3239 OUTS (outf, dregs (src1 + 1));
3240 OUTS (outf, ":");
3241 OUTS (outf, imm5 (src1));
3242 OUTS (outf, ")(LO");
3243 if (s == 1)
3244 OUTS (outf, ", R)");
3245 else
3246 OUTS (outf, ")");
4b7f6baa
CM		 3247 }
3248 else if (aop == 0 && HL == 0 && aopcde == 14)
b7d48530
NC		 3249 OUTS (outf, "A0=-A0");
3250
4b7f6baa 3251 else if (aop == 1 && HL == 0 && aopcde == 14)
b7d48530
NC		 3252 OUTS (outf, "A0=-A1");
3253
4b7f6baa 3254 else if (aop == 0 && HL == 1 && aopcde == 14)
b7d48530
NC		 3255 OUTS (outf, "A1=-A0");
3256
4b7f6baa 3257 else if (aop == 1 && HL == 1 && aopcde == 14)
b7d48530
NC		 3258 OUTS (outf, "A1=-A1");
3259
4b7f6baa
CM		 3260 else if (aop == 0 && aopcde == 12)
3261 {
4b7f6baa
CM		 3262 OUTS (outf, dregs_hi (dst0));
3263 OUTS (outf, "=");
3264 OUTS (outf, dregs_lo (dst0));
3265 OUTS (outf, "=SIGN(");
3266 OUTS (outf, dregs_hi (src0));
3267 OUTS (outf, ")*");
3268 OUTS (outf, dregs_hi (src1));
3269 OUTS (outf, "+SIGN(");
3270 OUTS (outf, dregs_lo (src0));
3271 OUTS (outf, ")*");
3272 OUTS (outf, dregs_lo (src1));
3273 OUTS (outf, ")");
4b7f6baa
CM		 3274 }
3275 else if (aop == 2 && aopcde == 0)
3276 {
4b7f6baa
CM		 3277 OUTS (outf, dregs (dst0));
3278 OUTS (outf, "=");
3279 OUTS (outf, dregs (src0));
3280 OUTS (outf, "-|+");
3281 OUTS (outf, dregs (src1));
3282 OUTS (outf, " ");
3283 amod0 (s, x, outf);
4b7f6baa
CM		 3284 }
3285 else if (aop == 1 && aopcde == 12)
3286 {
4b7f6baa
CM		 3287 OUTS (outf, dregs (dst1));
3288 OUTS (outf, "=A1.L+A1.H,");
3289 OUTS (outf, dregs (dst0));
3290 OUTS (outf, "=A0.L+A0.H");
4b7f6baa
CM		 3291 }
3292 else if (aop == 2 && aopcde == 4)
3293 {
4b7f6baa
CM		 3294 OUTS (outf, dregs (dst1));
3295 OUTS (outf, "=");
3296 OUTS (outf, dregs (src0));
3297 OUTS (outf, "+");
3298 OUTS (outf, dregs (src1));
3299 OUTS (outf, ",");
3300 OUTS (outf, dregs (dst0));
3301 OUTS (outf, "=");
3302 OUTS (outf, dregs (src0));
3303 OUTS (outf, "-");
3304 OUTS (outf, dregs (src1));
3305 OUTS (outf, " ");
3306 amod1 (s, x, outf);
4b7f6baa
CM		 3307 }
3308 else if (HL == 0 && aopcde == 1)
3309 {
4b7f6baa
CM		 3310 OUTS (outf, dregs (dst1));
3311 OUTS (outf, "=");
3312 OUTS (outf, dregs (src0));
3313 OUTS (outf, "+|+");
3314 OUTS (outf, dregs (src1));
3315 OUTS (outf, ",");
3316 OUTS (outf, dregs (dst0));
3317 OUTS (outf, "=");
3318 OUTS (outf, dregs (src0));
3319 OUTS (outf, "-|-");
3320 OUTS (outf, dregs (src1));
3321 amod0amod2 (s, x, aop, outf);
4b7f6baa
CM		 3322 }
3323 else if (aop == 0 && aopcde == 11)
3324 {
4b7f6baa
CM		 3325 OUTS (outf, dregs (dst0));
3326 OUTS (outf, "=(A0+=A1)");
4b7f6baa
CM		 3327 }
3328 else if (aop == 0 && aopcde == 10)
3329 {
4b7f6baa
CM		 3330 OUTS (outf, dregs_lo (dst0));
3331 OUTS (outf, "=A0.x");
4b7f6baa
CM		 3332 }
3333 else if (aop == 1 && aopcde == 10)
3334 {
4b7f6baa
CM		 3335 OUTS (outf, dregs_lo (dst0));
3336 OUTS (outf, "=A1.x");
4b7f6baa
CM		 3337 }
3338 else if (aop == 1 && aopcde == 0)
3339 {
4b7f6baa
CM		 3340 OUTS (outf, dregs (dst0));
3341 OUTS (outf, "=");
3342 OUTS (outf, dregs (src0));
3343 OUTS (outf, "+|-");
3344 OUTS (outf, dregs (src1));
3345 OUTS (outf, " ");
3346 amod0 (s, x, outf);
4b7f6baa
CM		 3347 }
3348 else if (aop == 3 && aopcde == 0)
3349 {
4b7f6baa
CM		 3350 OUTS (outf, dregs (dst0));
3351 OUTS (outf, "=");
3352 OUTS (outf, dregs (src0));
3353 OUTS (outf, "-|-");
3354 OUTS (outf, dregs (src1));
3355 OUTS (outf, " ");
3356 amod0 (s, x, outf);
4b7f6baa
CM		 3357 }
3358 else if (aop == 1 && aopcde == 4)
3359 {
4b7f6baa
CM		 3360 OUTS (outf, dregs (dst0));
3361 OUTS (outf, "=");
3362 OUTS (outf, dregs (src0));
3363 OUTS (outf, "-");
3364 OUTS (outf, dregs (src1));
3365 OUTS (outf, " ");
3366 amod1 (s, x, outf);
4b7f6baa
CM		 3367 }
3368 else if (aop == 0 && aopcde == 17)
3369 {
4b7f6baa
CM		 3370 OUTS (outf, dregs (dst1));
3371 OUTS (outf, "=A1+A0,");
3372 OUTS (outf, dregs (dst0));
3373 OUTS (outf, "=A1-A0 ");
3374 amod1 (s, x, outf);
4b7f6baa
CM		 3375 }
3376 else if (aop == 1 && aopcde == 17)
3377 {
4b7f6baa
CM		 3378 OUTS (outf, dregs (dst1));
3379 OUTS (outf, "=A0+A1,");
3380 OUTS (outf, dregs (dst0));
3381 OUTS (outf, "=A0-A1 ");
3382 amod1 (s, x, outf);
4b7f6baa
CM		 3383 }
3384 else if (aop == 0 && aopcde == 18)
3385 {
4b7f6baa
CM		 3386 OUTS (outf, "SAA(");
3387 OUTS (outf, dregs (src0 + 1));
3388 OUTS (outf, ":");
3389 OUTS (outf, imm5 (src0));
3390 OUTS (outf, ",");
3391 OUTS (outf, dregs (src1 + 1));
3392 OUTS (outf, ":");
3393 OUTS (outf, imm5 (src1));
3394 OUTS (outf, ") ");
3395 aligndir (s, outf);
4b7f6baa
CM		 3396 }
3397 else if (aop == 3 && aopcde == 18)
b7d48530
NC		 3398 OUTS (outf, "DISALGNEXCPT");
3399
4b7f6baa
CM		 3400 else if (aop == 0 && aopcde == 20)
3401 {
4b7f6baa
CM		 3402 OUTS (outf, dregs (dst0));
3403 OUTS (outf, "=BYTEOP1P(");
3404 OUTS (outf, dregs (src0 + 1));
3405 OUTS (outf, ":");
3406 OUTS (outf, imm5 (src0));
3407 OUTS (outf, ",");
3408 OUTS (outf, dregs (src1 + 1));
3409 OUTS (outf, ":");
3410 OUTS (outf, imm5 (src1));
3411 OUTS (outf, ")");
3412 aligndir (s, outf);
4b7f6baa
CM		 3413 }
3414 else if (aop == 1 && aopcde == 20)
3415 {
4b7f6baa
CM		 3416 OUTS (outf, dregs (dst0));
3417 OUTS (outf, "=BYTEOP1P(");
3418 OUTS (outf, dregs (src0 + 1));
3419 OUTS (outf, ":");
3420 OUTS (outf, imm5 (src0));
3421 OUTS (outf, ",");
3422 OUTS (outf, dregs (src1 + 1));
3423 OUTS (outf, ":");
3424 OUTS (outf, imm5 (src1));
3425 OUTS (outf, ")(T");
3426 if (s == 1)
3427 OUTS (outf, ", R)");
3428 else
3429 OUTS (outf, ")");
4b7f6baa
CM		 3430 }
3431 else if (aop == 0 && aopcde == 21)
3432 {
4b7f6baa
CM		 3433 OUTS (outf, "(");
3434 OUTS (outf, dregs (dst1));
3435 OUTS (outf, ",");
3436 OUTS (outf, dregs (dst0));
3437 OUTS (outf, ")=BYTEOP16P(");
3438 OUTS (outf, dregs (src0 + 1));
3439 OUTS (outf, ":");
3440 OUTS (outf, imm5 (src0));
3441 OUTS (outf, ",");
3442 OUTS (outf, dregs (src1 + 1));
3443 OUTS (outf, ":");
3444 OUTS (outf, imm5 (src1));
3445 OUTS (outf, ") ");
3446 aligndir (s, outf);
4b7f6baa
CM		 3447 }
3448 else if (aop == 1 && aopcde == 21)
3449 {
4b7f6baa
CM		 3450 OUTS (outf, "(");
3451 OUTS (outf, dregs (dst1));
3452 OUTS (outf, ",");
3453 OUTS (outf, dregs (dst0));
3454 OUTS (outf, ")=BYTEOP16M(");
3455 OUTS (outf, dregs (src0 + 1));
3456 OUTS (outf, ":");
3457 OUTS (outf, imm5 (src0));
3458 OUTS (outf, ",");
3459 OUTS (outf, dregs (src1 + 1));
3460 OUTS (outf, ":");
3461 OUTS (outf, imm5 (src1));
3462 OUTS (outf, ") ");
3463 aligndir (s, outf);
4b7f6baa
CM		 3464 }
3465 else if (aop == 2 && aopcde == 7)
3466 {
4b7f6baa
CM		 3467 OUTS (outf, dregs (dst0));
3468 OUTS (outf, "= ABS ");
3469 OUTS (outf, dregs (src0));
4b7f6baa
CM		 3470 }
3471 else if (aop == 1 && aopcde == 7)
3472 {
4b7f6baa
CM		 3473 OUTS (outf, dregs (dst0));
3474 OUTS (outf, "=MIN(");
3475 OUTS (outf, dregs (src0));
3476 OUTS (outf, ",");
3477 OUTS (outf, dregs (src1));
3478 OUTS (outf, ")");
4b7f6baa
CM		 3479 }
3480 else if (aop == 0 && aopcde == 7)
3481 {
4b7f6baa
CM		 3482 OUTS (outf, dregs (dst0));
3483 OUTS (outf, "=MAX(");
3484 OUTS (outf, dregs (src0));
3485 OUTS (outf, ",");
3486 OUTS (outf, dregs (src1));
3487 OUTS (outf, ")");
4b7f6baa
CM		 3488 }
3489 else if (aop == 2 && aopcde == 6)
3490 {
4b7f6baa
CM		 3491 OUTS (outf, dregs (dst0));
3492 OUTS (outf, "= ABS ");
3493 OUTS (outf, dregs (src0));
3494 OUTS (outf, "(V)");
4b7f6baa
CM		 3495 }
3496 else if (aop == 1 && aopcde == 6)
3497 {
4b7f6baa
CM		 3498 OUTS (outf, dregs (dst0));
3499 OUTS (outf, "=MIN(");
3500 OUTS (outf, dregs (src0));
3501 OUTS (outf, ",");
3502 OUTS (outf, dregs (src1));
3503 OUTS (outf, ")(V)");
4b7f6baa
CM		 3504 }
3505 else if (aop == 0 && aopcde == 6)
3506 {
4b7f6baa
CM		 3507 OUTS (outf, dregs (dst0));
3508 OUTS (outf, "=MAX(");
3509 OUTS (outf, dregs (src0));
3510 OUTS (outf, ",");
3511 OUTS (outf, dregs (src1));
3512 OUTS (outf, ")(V)");
4b7f6baa
CM		 3513 }
3514 else if (HL == 1 && aopcde == 1)
3515 {
4b7f6baa
CM		 3516 OUTS (outf, dregs (dst1));
3517 OUTS (outf, "=");
3518 OUTS (outf, dregs (src0));
3519 OUTS (outf, "+|-");
3520 OUTS (outf, dregs (src1));
3521 OUTS (outf, ",");
3522 OUTS (outf, dregs (dst0));
3523 OUTS (outf, "=");
3524 OUTS (outf, dregs (src0));
3525 OUTS (outf, "-|+");
3526 OUTS (outf, dregs (src1));
3527 amod0amod2 (s, x, aop, outf);
4b7f6baa
CM		 3528 }
3529 else if (aop == 0 && aopcde == 4)
3530 {
4b7f6baa
CM		 3531 OUTS (outf, dregs (dst0));
3532 OUTS (outf, "=");
3533 OUTS (outf, dregs (src0));
3534 OUTS (outf, "+");
3535 OUTS (outf, dregs (src1));
3536 OUTS (outf, " ");
3537 amod1 (s, x, outf);
4b7f6baa
CM		 3538 }
3539 else if (aop == 0 && aopcde == 0)
3540 {
4b7f6baa
CM		 3541 OUTS (outf, dregs (dst0));
3542 OUTS (outf, "=");
3543 OUTS (outf, dregs (src0));
3544 OUTS (outf, "+|+");
3545 OUTS (outf, dregs (src1));
3546 OUTS (outf, " ");
3547 amod0 (s, x, outf);
4b7f6baa
CM		 3548 }
3549 else if (aop == 0 && aopcde == 24)
3550 {
4b7f6baa
CM		 3551 OUTS (outf, dregs (dst0));
3552 OUTS (outf, "=BYTEPACK(");
3553 OUTS (outf, dregs (src0));
3554 OUTS (outf, ",");
3555 OUTS (outf, dregs (src1));
3556 OUTS (outf, ")");
4b7f6baa
CM		 3557 }
3558 else if (aop == 1 && aopcde == 24)
3559 {
4b7f6baa
CM		 3560 OUTS (outf, "(");
3561 OUTS (outf, dregs (dst1));
3562 OUTS (outf, ",");
3563 OUTS (outf, dregs (dst0));
3564 OUTS (outf, ") = BYTEUNPACK ");
3565 OUTS (outf, dregs (src0 + 1));
3566 OUTS (outf, ":");
3567 OUTS (outf, imm5 (src0));
3568 OUTS (outf, " ");
3569 aligndir (s, outf);
4b7f6baa
CM		 3570 }
3571 else if (aopcde == 13)
3572 {
4b7f6baa
CM		 3573 OUTS (outf, "(");
3574 OUTS (outf, dregs (dst1));
3575 OUTS (outf, ",");
3576 OUTS (outf, dregs (dst0));
3577 OUTS (outf, ") = SEARCH ");
3578 OUTS (outf, dregs (src0));
3579 OUTS (outf, "(");
3580 searchmod (aop, outf);
3581 OUTS (outf, ")");
4b7f6baa
CM		 3582 }
3583 else
b7d48530
NC		 3584 return 0;
3585
3586 return 4;
4b7f6baa
CM		 3587}
3588
3589static int
3590decode_dsp32shift_0 (TIword iw0, TIword iw1, disassemble_info *outf)
3591{
b7d48530
NC		 3592 /* dsp32shift
3593 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3594 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............|
3595 |.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......|
3596 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 3597 int HLs = ((iw1 >> DSP32Shift_HLs_bits) & DSP32Shift_HLs_mask);
3598 int sop = ((iw1 >> DSP32Shift_sop_bits) & DSP32Shift_sop_mask);
3599 int src0 = ((iw1 >> DSP32Shift_src0_bits) & DSP32Shift_src0_mask);
3600 int src1 = ((iw1 >> DSP32Shift_src1_bits) & DSP32Shift_src1_mask);
3601 int dst0 = ((iw1 >> DSP32Shift_dst0_bits) & DSP32Shift_dst0_mask);
3602 int sopcde = ((iw0 >> (DSP32Shift_sopcde_bits - 16)) & DSP32Shift_sopcde_mask);
3603 const char *acc01 = (HLs & 1) == 0 ? "A0" : "A1";
3604
4b7f6baa
CM		 3605 if (HLs == 0 && sop == 0 && sopcde == 0)
3606 {
4b7f6baa
CM		 3607 OUTS (outf, dregs_lo (dst0));
3608 OUTS (outf, "= ASHIFT ");
3609 OUTS (outf, dregs_lo (src1));
3610 OUTS (outf, " BY ");
3611 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3612 }
3613 else if (HLs == 1 && sop == 0 && sopcde == 0)
3614 {
4b7f6baa
CM		 3615 OUTS (outf, dregs_lo (dst0));
3616 OUTS (outf, "= ASHIFT ");
3617 OUTS (outf, dregs_hi (src1));
3618 OUTS (outf, " BY ");
3619 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3620 }
3621 else if (HLs == 2 && sop == 0 && sopcde == 0)
3622 {
4b7f6baa
CM		 3623 OUTS (outf, dregs_hi (dst0));
3624 OUTS (outf, "= ASHIFT ");
3625 OUTS (outf, dregs_lo (src1));
3626 OUTS (outf, " BY ");
3627 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3628 }
3629 else if (HLs == 3 && sop == 0 && sopcde == 0)
3630 {
4b7f6baa
CM		 3631 OUTS (outf, dregs_hi (dst0));
3632 OUTS (outf, "= ASHIFT ");
3633 OUTS (outf, dregs_hi (src1));
3634 OUTS (outf, " BY ");
3635 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3636 }
3637 else if (HLs == 0 && sop == 1 && sopcde == 0)
3638 {
4b7f6baa
CM		 3639 OUTS (outf, dregs_lo (dst0));
3640 OUTS (outf, "= ASHIFT ");
3641 OUTS (outf, dregs_lo (src1));
3642 OUTS (outf, " BY ");
3643 OUTS (outf, dregs_lo (src0));
3644 OUTS (outf, "(S)");
4b7f6baa
CM		 3645 }
3646 else if (HLs == 1 && sop == 1 && sopcde == 0)
3647 {
4b7f6baa
CM		 3648 OUTS (outf, dregs_lo (dst0));
3649 OUTS (outf, "= ASHIFT ");
3650 OUTS (outf, dregs_hi (src1));
3651 OUTS (outf, " BY ");
3652 OUTS (outf, dregs_lo (src0));
3653 OUTS (outf, "(S)");
4b7f6baa
CM		 3654 }
3655 else if (HLs == 2 && sop == 1 && sopcde == 0)
3656 {
4b7f6baa
CM		 3657 OUTS (outf, dregs_hi (dst0));
3658 OUTS (outf, "= ASHIFT ");
3659 OUTS (outf, dregs_lo (src1));
3660 OUTS (outf, " BY ");
3661 OUTS (outf, dregs_lo (src0));
3662 OUTS (outf, "(S)");
4b7f6baa
CM		 3663 }
3664 else if (HLs == 3 && sop == 1 && sopcde == 0)
3665 {
4b7f6baa
CM		 3666 OUTS (outf, dregs_hi (dst0));
3667 OUTS (outf, "= ASHIFT ");
3668 OUTS (outf, dregs_hi (src1));
3669 OUTS (outf, " BY ");
3670 OUTS (outf, dregs_lo (src0));
3671 OUTS (outf, "(S)");
4b7f6baa
CM		 3672 }
3673 else if (sop == 2 && sopcde == 0)
3674 {
4b7f6baa
CM		 3675 OUTS (outf, (HLs & 2) == 0 ? dregs_lo (dst0) : dregs_hi (dst0));
3676 OUTS (outf, "= LSHIFT ");
3677 OUTS (outf, (HLs & 1) == 0 ? dregs_lo (src1) : dregs_hi (src1));
3678 OUTS (outf, " BY ");
3679 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3680 }
3681 else if (sop == 0 && sopcde == 3)
3682 {
4b7f6baa
CM		 3683 OUTS (outf, acc01);
3684 OUTS (outf, "= ASHIFT ");
3685 OUTS (outf, acc01);
3686 OUTS (outf, " BY ");
3687 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3688 }
3689 else if (sop == 1 && sopcde == 3)
3690 {
4b7f6baa
CM		 3691 OUTS (outf, acc01);
3692 OUTS (outf, "= LSHIFT ");
3693 OUTS (outf, acc01);
3694 OUTS (outf, " BY ");
3695 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3696 }
3697 else if (sop == 2 && sopcde == 3)
3698 {
4b7f6baa
CM		 3699 OUTS (outf, acc01);
3700 OUTS (outf, "= ROT ");
3701 OUTS (outf, acc01);
3702 OUTS (outf, " BY ");
3703 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3704 }
3705 else if (sop == 3 && sopcde == 3)
3706 {
4b7f6baa
CM		 3707 OUTS (outf, dregs (dst0));
3708 OUTS (outf, "= ROT ");
3709 OUTS (outf, dregs (src1));
3710 OUTS (outf, " BY ");
3711 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3712 }
3713 else if (sop == 1 && sopcde == 1)
3714 {
4b7f6baa
CM		 3715 OUTS (outf, dregs (dst0));
3716 OUTS (outf, "= ASHIFT ");
3717 OUTS (outf, dregs (src1));
3718 OUTS (outf, " BY ");
3719 OUTS (outf, dregs_lo (src0));
3720 OUTS (outf, "(V,S)");
4b7f6baa
CM		 3721 }
3722 else if (sop == 0 && sopcde == 1)
3723 {
4b7f6baa
CM		 3724 OUTS (outf, dregs (dst0));
3725 OUTS (outf, "= ASHIFT ");
3726 OUTS (outf, dregs (src1));
3727 OUTS (outf, " BY ");
3728 OUTS (outf, dregs_lo (src0));
3729 OUTS (outf, "(V)");
4b7f6baa
CM		 3730 }
3731 else if (sop == 0 && sopcde == 2)
3732 {
4b7f6baa
CM		 3733 OUTS (outf, dregs (dst0));
3734 OUTS (outf, "= ASHIFT ");
3735 OUTS (outf, dregs (src1));
3736 OUTS (outf, " BY ");
3737 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3738 }
3739 else if (sop == 1 && sopcde == 2)
3740 {
4b7f6baa
CM		 3741 OUTS (outf, dregs (dst0));
3742 OUTS (outf, "= ASHIFT ");
3743 OUTS (outf, dregs (src1));
3744 OUTS (outf, " BY ");
3745 OUTS (outf, dregs_lo (src0));
3746 OUTS (outf, "(S)");
4b7f6baa
CM		 3747 }
3748 else if (sop == 2 && sopcde == 2)
3749 {
4b7f6baa
CM		 3750 OUTS (outf, dregs (dst0));
3751 OUTS (outf, "=SHIFT ");
3752 OUTS (outf, dregs (src1));
3753 OUTS (outf, " BY ");
3754 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3755 }
3756 else if (sop == 3 && sopcde == 2)
3757 {
4b7f6baa
CM		 3758 OUTS (outf, dregs (dst0));
3759 OUTS (outf, "= ROT ");
3760 OUTS (outf, dregs (src1));
3761 OUTS (outf, " BY ");
3762 OUTS (outf, dregs_lo (src0));
4b7f6baa
CM		 3763 }
3764 else if (sop == 2 && sopcde == 1)
3765 {
4b7f6baa
CM		 3766 OUTS (outf, dregs (dst0));
3767 OUTS (outf, "=SHIFT ");
3768 OUTS (outf, dregs (src1));
3769 OUTS (outf, " BY ");
3770 OUTS (outf, dregs_lo (src0));
3771 OUTS (outf, "(V)");
4b7f6baa
CM		 3772 }
3773 else if (sop == 0 && sopcde == 4)
3774 {
4b7f6baa
CM		 3775 OUTS (outf, dregs (dst0));
3776 OUTS (outf, "=PACK");
3777 OUTS (outf, "(");
3778 OUTS (outf, dregs_lo (src1));
3779 OUTS (outf, ",");
3780 OUTS (outf, dregs_lo (src0));
3781 OUTS (outf, ")");
4b7f6baa
CM		 3782 }
3783 else if (sop == 1 && sopcde == 4)
3784 {
4b7f6baa
CM		 3785 OUTS (outf, dregs (dst0));
3786 OUTS (outf, "=PACK(");
3787 OUTS (outf, dregs_lo (src1));
3788 OUTS (outf, ",");
3789 OUTS (outf, dregs_hi (src0));
3790 OUTS (outf, ")");
4b7f6baa
CM		 3791 }
3792 else if (sop == 2 && sopcde == 4)
3793 {
4b7f6baa
CM		 3794 OUTS (outf, dregs (dst0));
3795 OUTS (outf, "=PACK(");
3796 OUTS (outf, dregs_hi (src1));
3797 OUTS (outf, ",");
3798 OUTS (outf, dregs_lo (src0));
3799 OUTS (outf, ")");
4b7f6baa
CM		 3800 }
3801 else if (sop == 3 && sopcde == 4)
3802 {
4b7f6baa
CM		 3803 OUTS (outf, dregs (dst0));
3804 OUTS (outf, "=PACK(");
3805 OUTS (outf, dregs_hi (src1));
3806 OUTS (outf, ",");
3807 OUTS (outf, dregs_hi (src0));
3808 OUTS (outf, ")");
4b7f6baa
CM		 3809 }
3810 else if (sop == 0 && sopcde == 5)
3811 {
4b7f6baa
CM		 3812 OUTS (outf, dregs_lo (dst0));
3813 OUTS (outf, "=SIGNBITS ");
3814 OUTS (outf, dregs (src1));
4b7f6baa
CM		 3815 }
3816 else if (sop == 1 && sopcde == 5)
3817 {
4b7f6baa
CM		 3818 OUTS (outf, dregs_lo (dst0));
3819 OUTS (outf, "=SIGNBITS ");
3820 OUTS (outf, dregs_lo (src1));
4b7f6baa
CM		 3821 }
3822 else if (sop == 2 && sopcde == 5)
3823 {
4b7f6baa
CM		 3824 OUTS (outf, dregs_lo (dst0));
3825 OUTS (outf, "=SIGNBITS ");
3826 OUTS (outf, dregs_hi (src1));
4b7f6baa
CM		 3827 }
3828 else if (sop == 0 && sopcde == 6)
3829 {
4b7f6baa
CM		 3830 OUTS (outf, dregs_lo (dst0));
3831 OUTS (outf, "=SIGNBITS A0");
4b7f6baa
CM		 3832 }
3833 else if (sop == 1 && sopcde == 6)
3834 {
4b7f6baa
CM		 3835 OUTS (outf, dregs_lo (dst0));
3836 OUTS (outf, "=SIGNBITS A1");
4b7f6baa
CM		 3837 }
3838 else if (sop == 3 && sopcde == 6)
3839 {
4b7f6baa
CM		 3840 OUTS (outf, dregs_lo (dst0));
3841 OUTS (outf, "=ONES ");
3842 OUTS (outf, dregs (src1));
4b7f6baa
CM		 3843 }
3844 else if (sop == 0 && sopcde == 7)
3845 {
4b7f6baa
CM		 3846 OUTS (outf, dregs_lo (dst0));
3847 OUTS (outf, "=EXPADJ (");
3848 OUTS (outf, dregs (src1));
3849 OUTS (outf, ",");
3850 OUTS (outf, dregs_lo (src0));
3851 OUTS (outf, ")");
4b7f6baa
CM		 3852 }
3853 else if (sop == 1 && sopcde == 7)
3854 {
4b7f6baa
CM		 3855 OUTS (outf, dregs_lo (dst0));
3856 OUTS (outf, "=EXPADJ (");
3857 OUTS (outf, dregs (src1));
3858 OUTS (outf, ",");
3859 OUTS (outf, dregs_lo (src0));
3860 OUTS (outf, ") (V)");
4b7f6baa
CM		 3861 }
3862 else if (sop == 2 && sopcde == 7)
3863 {
4b7f6baa
CM		 3864 OUTS (outf, dregs_lo (dst0));
3865 OUTS (outf, "=EXPADJ (");
3866 OUTS (outf, dregs_lo (src1));
3867 OUTS (outf, ",");
3868 OUTS (outf, dregs_lo (src0));
3869 OUTS (outf, ")");
4b7f6baa
CM		 3870 }
3871 else if (sop == 3 && sopcde == 7)
3872 {
4b7f6baa
CM		 3873 OUTS (outf, dregs_lo (dst0));
3874 OUTS (outf, "=EXPADJ (");
3875 OUTS (outf, dregs_hi (src1));
3876 OUTS (outf, ",");
3877 OUTS (outf, dregs_lo (src0));
3878 OUTS (outf, ")");
4b7f6baa
CM		 3879 }
3880 else if (sop == 0 && sopcde == 8)
3881 {
4b7f6baa
CM		 3882 OUTS (outf, "BITMUX (");
3883 OUTS (outf, dregs (src0));
3884 OUTS (outf, ",");
3885 OUTS (outf, dregs (src1));
3886 OUTS (outf, ",A0 )(ASR)");
4b7f6baa
CM		 3887 }
3888 else if (sop == 1 && sopcde == 8)
3889 {
4b7f6baa
CM		 3890 OUTS (outf, "BITMUX (");
3891 OUTS (outf, dregs (src0));
3892 OUTS (outf, ",");
3893 OUTS (outf, dregs (src1));
3894 OUTS (outf, ",A0 )(ASL)");
4b7f6baa
CM		 3895 }
3896 else if (sop == 0 && sopcde == 9)
3897 {
4b7f6baa
CM		 3898 OUTS (outf, dregs_lo (dst0));
3899 OUTS (outf, "=VIT_MAX (");
3900 OUTS (outf, dregs (src1));
3901 OUTS (outf, ") (ASL)");
4b7f6baa
CM		 3902 }
3903 else if (sop == 1 && sopcde == 9)
3904 {
4b7f6baa
CM		 3905 OUTS (outf, dregs_lo (dst0));
3906 OUTS (outf, "=VIT_MAX (");
3907 OUTS (outf, dregs (src1));
3908 OUTS (outf, ") (ASR)");
4b7f6baa
CM		 3909 }
3910 else if (sop == 2 && sopcde == 9)
3911 {
4b7f6baa
CM		 3912 OUTS (outf, dregs (dst0));
3913 OUTS (outf, "=VIT_MAX(");
3914 OUTS (outf, dregs (src1));
3915 OUTS (outf, ",");
3916 OUTS (outf, dregs (src0));
3917 OUTS (outf, ")(ASL)");
4b7f6baa
CM		 3918 }
3919 else if (sop == 3 && sopcde == 9)
3920 {
4b7f6baa
CM		 3921 OUTS (outf, dregs (dst0));
3922 OUTS (outf, "=VIT_MAX(");
3923 OUTS (outf, dregs (src1));
3924 OUTS (outf, ",");
3925 OUTS (outf, dregs (src0));
3926 OUTS (outf, ")(ASR)");
4b7f6baa
CM		 3927 }
3928 else if (sop == 0 && sopcde == 10)
3929 {
4b7f6baa
CM		 3930 OUTS (outf, dregs (dst0));
3931 OUTS (outf, "=EXTRACT(");
3932 OUTS (outf, dregs (src1));
3933 OUTS (outf, ",");
3934 OUTS (outf, dregs_lo (src0));
3935 OUTS (outf, ") (Z)");
4b7f6baa
CM		 3936 }
3937 else if (sop == 1 && sopcde == 10)
3938 {
4b7f6baa
CM		 3939 OUTS (outf, dregs (dst0));
3940 OUTS (outf, "=EXTRACT(");
3941 OUTS (outf, dregs (src1));
3942 OUTS (outf, ",");
3943 OUTS (outf, dregs_lo (src0));
3944 OUTS (outf, ")(X)");
4b7f6baa
CM		 3945 }
3946 else if (sop == 2 && sopcde == 10)
3947 {
4b7f6baa
CM		 3948 OUTS (outf, dregs (dst0));
3949 OUTS (outf, "=DEPOSIT(");
3950 OUTS (outf, dregs (src1));
3951 OUTS (outf, ",");
3952 OUTS (outf, dregs (src0));
3953 OUTS (outf, ")");
4b7f6baa
CM		 3954 }
3955 else if (sop == 3 && sopcde == 10)
3956 {
4b7f6baa
CM		 3957 OUTS (outf, dregs (dst0));
3958 OUTS (outf, "=DEPOSIT(");
3959 OUTS (outf, dregs (src1));
3960 OUTS (outf, ",");
3961 OUTS (outf, dregs (src0));
3962 OUTS (outf, ")(X)");
4b7f6baa
CM		 3963 }
3964 else if (sop == 0 && sopcde == 11)
3965 {
4b7f6baa
CM		 3966 OUTS (outf, dregs_lo (dst0));
3967 OUTS (outf, "=CC=BXORSHIFT(A0,");
3968 OUTS (outf, dregs (src0));
3969 OUTS (outf, ")");
4b7f6baa
CM		 3970 }
3971 else if (sop == 1 && sopcde == 11)
3972 {
4b7f6baa
CM		 3973 OUTS (outf, dregs_lo (dst0));
3974 OUTS (outf, "=CC=BXOR(A0,");
3975 OUTS (outf, dregs (src0));
3976 OUTS (outf, ")");
4b7f6baa
CM		 3977 }
3978 else if (sop == 0 && sopcde == 12)
b7d48530
NC		 3979 OUTS (outf, "A0=BXORSHIFT(A0,A1 ,CC)");
3980
4b7f6baa
CM		 3981 else if (sop == 1 && sopcde == 12)
3982 {
4b7f6baa
CM		 3983 OUTS (outf, dregs_lo (dst0));
3984 OUTS (outf, "=CC=BXOR( A0,A1 ,CC )");
4b7f6baa
CM		 3985 }
3986 else if (sop == 0 && sopcde == 13)
3987 {
4b7f6baa
CM		 3988 OUTS (outf, dregs (dst0));
3989 OUTS (outf, "=ALIGN8(");
3990 OUTS (outf, dregs (src1));
3991 OUTS (outf, ",");
3992 OUTS (outf, dregs (src0));
3993 OUTS (outf, ")");
4b7f6baa
CM		 3994 }
3995 else if (sop == 1 && sopcde == 13)
3996 {
4b7f6baa
CM		 3997 OUTS (outf, dregs (dst0));
3998 OUTS (outf, "=ALIGN16(");
3999 OUTS (outf, dregs (src1));
4000 OUTS (outf, ",");
4001 OUTS (outf, dregs (src0));
4002 OUTS (outf, ")");
4b7f6baa
CM		 4003 }
4004 else if (sop == 2 && sopcde == 13)
4005 {
4b7f6baa
CM		 4006 OUTS (outf, dregs (dst0));
4007 OUTS (outf, "=ALIGN24(");
4008 OUTS (outf, dregs (src1));
4009 OUTS (outf, ",");
4010 OUTS (outf, dregs (src0));
4011 OUTS (outf, ")");
4b7f6baa
CM		 4012 }
4013 else
b7d48530
NC		 4014 return 0;
4015
4016 return 4;
4b7f6baa
CM		 4017}
4018
4019static int
4020decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf)
4021{
b7d48530
NC		 4022 /* dsp32shiftimm
4023 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
4024 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............|
4025 |.sop...|.HLs...|.dst0......|.immag.................|.src1......|
4026 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4027 int src1 = ((iw1 >> DSP32ShiftImm_src1_bits) & DSP32ShiftImm_src1_mask);
4028 int sop = ((iw1 >> DSP32ShiftImm_sop_bits) & DSP32ShiftImm_sop_mask);
4029 int bit8 = ((iw1 >> 8) & 0x1);
4030 int immag = ((iw1 >> DSP32ShiftImm_immag_bits) & DSP32ShiftImm_immag_mask);
4b7f6baa 4031 int newimmag = (-(iw1 >> DSP32ShiftImm_immag_bits) & DSP32ShiftImm_immag_mask);
b7d48530
NC		 4032 int dst0 = ((iw1 >> DSP32ShiftImm_dst0_bits) & DSP32ShiftImm_dst0_mask);
4033 int sopcde = ((iw0 >> (DSP32ShiftImm_sopcde_bits - 16)) & DSP32ShiftImm_sopcde_mask);
4034 int HLs = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask);
4b7f6baa
CM		 4035
4036
4037 if (HLs == 0 && sop == 0 && sopcde == 0)
4038 {
4b7f6baa
CM		 4039 OUTS (outf, dregs_lo (dst0));
4040 OUTS (outf, "=");
4041 OUTS (outf, dregs_lo (src1));
4042 OUTS (outf, ">>>");
4043 OUTS (outf, uimm4 (newimmag));
4b7f6baa
CM		 4044 }
4045 else if (HLs == 1 && sop == 0 && sopcde == 0)
4046 {
4b7f6baa
CM		 4047 OUTS (outf, dregs_lo (dst0));
4048 OUTS (outf, "=");
4049 OUTS (outf, dregs_hi (src1));
4050 OUTS (outf, ">>>");
4051 OUTS (outf, uimm4 (newimmag));
4b7f6baa
CM		 4052 }
4053 else if (HLs == 2 && sop == 0 && sopcde == 0)
4054 {
4b7f6baa
CM		 4055 OUTS (outf, dregs_hi (dst0));
4056 OUTS (outf, "=");
4057 OUTS (outf, dregs_lo (src1));
4058 OUTS (outf, ">>>");
4059 OUTS (outf, uimm4 (newimmag));
4b7f6baa
CM		 4060 }
4061 else if (HLs == 3 && sop == 0 && sopcde == 0)
4062 {
4b7f6baa
CM		 4063 OUTS (outf, dregs_hi (dst0));
4064 OUTS (outf, "=");
4065 OUTS (outf, dregs_hi (src1));
4066 OUTS (outf, ">>>");
4067 OUTS (outf, uimm4 (newimmag));
4b7f6baa
CM		 4068 }
4069 else if (HLs == 0 && sop == 1 && sopcde == 0)
4070 {
4b7f6baa
CM		 4071 OUTS (outf, dregs_lo (dst0));
4072 OUTS (outf, "=");
4073 OUTS (outf, dregs_lo (src1));
4074 OUTS (outf, "<<");
4075 OUTS (outf, uimm4 (immag));
4076 OUTS (outf, "(S)");
4b7f6baa
CM		 4077 }
4078 else if (HLs == 1 && sop == 1 && sopcde == 0)
4079 {
4b7f6baa
CM		 4080 OUTS (outf, dregs_lo (dst0));
4081 OUTS (outf, "=");
4082 OUTS (outf, dregs_hi (src1));
4083 OUTS (outf, "<<");
4084 OUTS (outf, uimm4 (immag));
4085 OUTS (outf, "(S)");
4b7f6baa
CM		 4086 }
4087 else if (HLs == 2 && sop == 1 && sopcde == 0)
4088 {
4b7f6baa
CM		 4089 OUTS (outf, dregs_hi (dst0));
4090 OUTS (outf, "=");
4091 OUTS (outf, dregs_lo (src1));
4092 OUTS (outf, "<<");
4093 OUTS (outf, uimm4 (immag));
4094 OUTS (outf, "(S)");
4b7f6baa
CM		 4095 }
4096 else if (HLs == 3 && sop == 1 && sopcde == 0)
4097 {
4b7f6baa
CM		 4098 OUTS (outf, dregs_hi (dst0));
4099 OUTS (outf, "=");
4100 OUTS (outf, dregs_hi (src1));
4101 OUTS (outf, "<<");
4102 OUTS (outf, uimm4 (immag));
4103 OUTS (outf, "(S)");
4b7f6baa
CM		 4104 }
4105 else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 0)
4106 {
4b7f6baa
CM		 4107 OUTS (outf, dregs_lo (dst0));
4108 OUTS (outf, "=");
4109 OUTS (outf, dregs_lo (src1));
4110 OUTS (outf, "<<");
4111 OUTS (outf, uimm4 (immag));
4b7f6baa
CM		 4112 }
4113 else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 1)
4114 {
4b7f6baa
CM		 4115 OUTS (outf, dregs_lo (dst0));
4116 OUTS (outf, "=");
4117 OUTS (outf, dregs_lo (src1));
4118 OUTS (outf, ">>");
4119 OUTS (outf, uimm4 (newimmag));
4b7f6baa
CM		 4120 }
4121 else if (HLs == 1 && sop == 2 && sopcde == 0)
4122 {
4b7f6baa
CM		 4123 OUTS (outf, dregs_lo (dst0));
4124 OUTS (outf, "=");
4125 OUTS (outf, dregs_hi (src1));
4126 OUTS (outf, ">>");
4127 OUTS (outf, uimm4 (newimmag));
4b7f6baa
CM		 4128 }
4129 else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 1)
4130 {
4b7f6baa
CM		 4131 OUTS (outf, dregs_hi (dst0));
4132 OUTS (outf, "=");
4133 OUTS (outf, dregs_lo (src1));
4134 OUTS (outf, ">>");
4135 OUTS (outf, uimm4 (newimmag));
4b7f6baa
CM		 4136 }
4137 else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 0)
4138 {
4b7f6baa
CM		 4139 OUTS (outf, dregs_hi (dst0));
4140 OUTS (outf, "=");
4141 OUTS (outf, dregs_lo (src1));
4142 OUTS (outf, "<<");
4143 OUTS (outf, uimm4 (immag));
4b7f6baa
CM		 4144 }
4145 else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 1)
4146 {
4b7f6baa
CM		 4147 OUTS (outf, dregs_hi (dst0));
4148 OUTS (outf, "=");
4149 OUTS (outf, dregs_hi (src1));
4150 OUTS (outf, ">>");
4151 OUTS (outf, uimm4 (newimmag));
4b7f6baa
CM		 4152 }
4153 else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 0)
4154 {
4b7f6baa
CM		 4155 OUTS (outf, dregs_hi (dst0));
4156 OUTS (outf, "=");
4157 OUTS (outf, dregs_hi (src1));
4158 OUTS (outf, "<<");
4159 OUTS (outf, uimm4 (immag));
4b7f6baa
CM		 4160 }
4161 else if (sop == 2 && sopcde == 3 && HLs == 1)
4162 {
4b7f6baa
CM		 4163 OUTS (outf, "A1= ROT A1 BY ");
4164 OUTS (outf, imm6 (immag));
4b7f6baa
CM		 4165 }
4166 else if (sop == 0 && sopcde == 3 && HLs == 0 && bit8 == 0)
4167 {
4b7f6baa
CM		 4168 OUTS (outf, "A0=A0<<");
4169 OUTS (outf, uimm5 (immag));
4b7f6baa
CM		 4170 }
4171 else if (sop == 0 && sopcde == 3 && HLs == 0 && bit8 == 1)
4172 {
4b7f6baa
CM		 4173 OUTS (outf, "A0=A0>>>");
4174 OUTS (outf, uimm5 (newimmag));
4b7f6baa
CM		 4175 }
4176 else if (sop == 0 && sopcde == 3 && HLs == 1 && bit8 == 0)
4177 {
4b7f6baa
CM		 4178 OUTS (outf, "A1=A1<<");
4179 OUTS (outf, uimm5 (immag));
4b7f6baa
CM		 4180 }
4181 else if (sop == 0 && sopcde == 3 && HLs == 1 && bit8 == 1)
4182 {
4b7f6baa
CM		 4183 OUTS (outf, "A1=A1>>>");
4184 OUTS (outf, uimm5 (newimmag));
4b7f6baa
CM		 4185 }
4186 else if (sop == 1 && sopcde == 3 && HLs == 0)
4187 {
4b7f6baa
CM		 4188 OUTS (outf, "A0=A0>>");
4189 OUTS (outf, uimm5 (newimmag));
4b7f6baa
CM		 4190 }
4191 else if (sop == 1 && sopcde == 3 && HLs == 1)
4192 {
4b7f6baa
CM		 4193 OUTS (outf, "A1=A1>>");
4194 OUTS (outf, uimm5 (newimmag));
4b7f6baa
CM		 4195 }
4196 else if (sop == 2 && sopcde == 3 && HLs == 0)
4197 {
4b7f6baa
CM		 4198 OUTS (outf, "A0= ROT A0 BY ");
4199 OUTS (outf, imm6 (immag));
4b7f6baa
CM		 4200 }
4201 else if (sop == 1 && sopcde == 1 && bit8 == 0)
4202 {
4b7f6baa
CM		 4203 OUTS (outf, dregs (dst0));
4204 OUTS (outf, "=");
4205 OUTS (outf, dregs (src1));
4206 OUTS (outf, "<<");
4207 OUTS (outf, uimm5 (immag));
4208 OUTS (outf, " (V, S)");
4b7f6baa
CM		 4209 }
4210 else if (sop == 1 && sopcde == 1 && bit8 == 1)
4211 {
4b7f6baa
CM		 4212 OUTS (outf, dregs (dst0));
4213 OUTS (outf, "=");
4214 OUTS (outf, dregs (src1));
4215 OUTS (outf, ">>>");
4216 OUTS (outf, imm5 (-immag));
4217 OUTS (outf, " (V)");
4b7f6baa
CM		 4218 }
4219 else if (sop == 2 && sopcde == 1 && bit8 == 1)
4220 {
4b7f6baa
CM		 4221 OUTS (outf, dregs (dst0));
4222 OUTS (outf, "=");
4223 OUTS (outf, dregs (src1));
4224 OUTS (outf, " >> ");
4225 OUTS (outf, uimm5 (newimmag));
4226 OUTS (outf, " (V)");
4b7f6baa
CM		 4227 }
4228 else if (sop == 2 && sopcde == 1 && bit8 == 0)
4229 {
4b7f6baa
CM		 4230 OUTS (outf, dregs (dst0));
4231 OUTS (outf, "=");
4232 OUTS (outf, dregs (src1));
4233 OUTS (outf, "<<");
4234 OUTS (outf, imm5 (immag));
4235 OUTS (outf, " (V)");
4b7f6baa
CM		 4236 }
4237 else if (sop == 0 && sopcde == 1)
4238 {
4b7f6baa
CM		 4239 OUTS (outf, dregs (dst0));
4240 OUTS (outf, "=");
4241 OUTS (outf, dregs (src1));
4242 OUTS (outf, ">>>");
4243 OUTS (outf, uimm5 (newimmag));
4244 OUTS (outf, " (V)");
4b7f6baa
CM		 4245 }
4246 else if (sop == 1 && sopcde == 2)
4247 {
4b7f6baa
CM		 4248 OUTS (outf, dregs (dst0));
4249 OUTS (outf, "=");
4250 OUTS (outf, dregs (src1));
4251 OUTS (outf, "<<");
4252 OUTS (outf, uimm5 (immag));
4253 OUTS (outf, "(S)");
4b7f6baa
CM		 4254 }
4255 else if (sop == 2 && sopcde == 2 && bit8 == 1)
4256 {
4b7f6baa
CM		 4257 OUTS (outf, dregs (dst0));
4258 OUTS (outf, "=");
4259 OUTS (outf, dregs (src1));
4260 OUTS (outf, ">>");
4261 OUTS (outf, uimm5 (newimmag));
4b7f6baa
CM		 4262 }
4263 else if (sop == 2 && sopcde == 2 && bit8 == 0)
4264 {
4b7f6baa
CM		 4265 OUTS (outf, dregs (dst0));
4266 OUTS (outf, "=");
4267 OUTS (outf, dregs (src1));
4268 OUTS (outf, "<<");
4269 OUTS (outf, uimm5 (immag));
4b7f6baa
CM		 4270 }
4271 else if (sop == 3 && sopcde == 2)
4272 {
4b7f6baa
CM		 4273 OUTS (outf, dregs (dst0));
4274 OUTS (outf, "= ROT ");
4275 OUTS (outf, dregs (src1));
4276 OUTS (outf, " BY ");
4277 OUTS (outf, imm6 (immag));
4b7f6baa
CM		 4278 }
4279 else if (sop == 0 && sopcde == 2)
4280 {
4b7f6baa
CM		 4281 OUTS (outf, dregs (dst0));
4282 OUTS (outf, "=");
4283 OUTS (outf, dregs (src1));
4284 OUTS (outf, ">>>");
4285 OUTS (outf, uimm5 (newimmag));
4b7f6baa
CM		 4286 }
4287 else
b7d48530
NC		 4288 return 0;
4289
4290 return 4;
4b7f6baa
CM		 4291}
4292
4293static int
4294decode_pseudoDEBUG_0 (TIword iw0, disassemble_info *outf)
4295{
b7d48530
NC		 4296 /* pseudoDEBUG
4297 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
4298 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......|
4299 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa
CM		 4300 int fn = ((iw0 >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask);
4301 int grp = ((iw0 >> PseudoDbg_grp_bits) & PseudoDbg_grp_mask);
4302 int reg = ((iw0 >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask);
4303
4304 if (reg == 0 && fn == 3)
b7d48530
NC		 4305 OUTS (outf, "DBG A0");
4306
4b7f6baa 4307 else if (reg == 1 && fn == 3)
b7d48530
NC		 4308 OUTS (outf, "DBG A1");
4309
4b7f6baa 4310 else if (reg == 3 && fn == 3)
b7d48530
NC		 4311 OUTS (outf, "ABORT");
4312
4b7f6baa 4313 else if (reg == 4 && fn == 3)
b7d48530
NC		 4314 OUTS (outf, "HLT");
4315
4b7f6baa 4316 else if (reg == 5 && fn == 3)
b7d48530
NC		 4317 OUTS (outf, "DBGHALT");
4318
4b7f6baa
CM		 4319 else if (reg == 6 && fn == 3)
4320 {
4b7f6baa
CM		 4321 OUTS (outf, "DBGCMPLX(");
4322 OUTS (outf, dregs (grp));
4323 OUTS (outf, ")");
4b7f6baa
CM		 4324 }
4325 else if (reg == 7 && fn == 3)
b7d48530
NC		 4326 OUTS (outf, "DBG");
4327
4b7f6baa
CM		 4328 else if (grp == 0 && fn == 2)
4329 {
4b7f6baa
CM		 4330 OUTS (outf, "OUTC");
4331 OUTS (outf, dregs (reg));
4b7f6baa
CM		 4332 }
4333 else if (fn == 0)
4334 {
4b7f6baa
CM		 4335 OUTS (outf, "DBG");
4336 OUTS (outf, allregs (reg, grp));
4b7f6baa
CM		 4337 }
4338 else if (fn == 1)
4339 {
4b7f6baa
CM		 4340 OUTS (outf, "PRNT");
4341 OUTS (outf, allregs (reg, grp));
4b7f6baa
CM		 4342 }
4343 else
b7d48530
NC		 4344 return 0;
4345
4346 return 2;
4b7f6baa
CM		 4347}
4348
4349static int
4350decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf)
4351{
b7d48530
NC		 4352 /* pseudodbg_assert
4353 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
4354 | 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...|
4355 |.expected......................................................|
4356 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4b7f6baa 4357 int expected = ((iw1 >> PseudoDbg_Assert_expected_bits) & PseudoDbg_Assert_expected_mask);
b7d48530
NC		 4358 int dbgop = ((iw0 >> (PseudoDbg_Assert_dbgop_bits - 16)) & PseudoDbg_Assert_dbgop_mask);
4359 int regtest = ((iw0 >> (PseudoDbg_Assert_regtest_bits - 16)) & PseudoDbg_Assert_regtest_mask);
4b7f6baa
CM		 4360
4361 if (dbgop == 0)
4362 {
4b7f6baa
CM		 4363 OUTS (outf, "DBGA(");
4364 OUTS (outf, dregs_lo (regtest));
4365 OUTS (outf, ",");
4366 OUTS (outf, uimm16 (expected));
4367 OUTS (outf, ")");
4b7f6baa
CM		 4368 }
4369 else if (dbgop == 1)
4370 {
4b7f6baa
CM		 4371 OUTS (outf, "DBGA(");
4372 OUTS (outf, dregs_hi (regtest));
4373 OUTS (outf, ",");
4374 OUTS (outf, uimm16 (expected));
4375 OUTS (outf, ")");
4b7f6baa
CM		 4376 }
4377 else if (dbgop == 2)
4378 {
4b7f6baa
CM		 4379 OUTS (outf, "DBGAL(");
4380 OUTS (outf, dregs (regtest));
4381 OUTS (outf, ",");
4382 OUTS (outf, uimm16 (expected));
4383 OUTS (outf, ")");
4b7f6baa
CM		 4384 }
4385 else if (dbgop == 3)
4386 {
4b7f6baa
CM		 4387 OUTS (outf, "DBGAH(");
4388 OUTS (outf, dregs (regtest));
4389 OUTS (outf, ",");
4390 OUTS (outf, uimm16 (expected));
4391 OUTS (outf, ")");
4b7f6baa
CM		 4392 }
4393 else
b7d48530
NC		 4394 return 0;
4395 return 4;
4b7f6baa
CM		 4396}
4397
4398int
4399_print_insn_bfin (bfd_vma pc, disassemble_info *outf)
4400{
4b7f6baa
CM		 4401 bfd_byte buf[4];
4402 TIword iw0;
4403 TIword iw1;
4404 int status;
b7d48530
NC		 4405 int rv = 0;
4406
4b7f6baa
CM		 4407 status = (*outf->read_memory_func) (pc & ~0x1, buf, 2, outf);
4408 status = (*outf->read_memory_func) ((pc + 2) & ~0x1, buf + 2, 2, outf);
4409
4410 iw0 = bfd_getl16 (buf);
4411 iw1 = bfd_getl16 (buf + 2);
4412
4413 if ((iw0 & 0xf7ff) == 0xc003 && iw1 == 0x1800)
4414 {
4415 OUTS (outf, "mnop");
4416 return 4;
4417 }
4418 else if ((iw0 & 0xff00) == 0x0000)
b7d48530 4419 rv = decode_ProgCtrl_0 (iw0, outf);
4b7f6baa 4420 else if ((iw0 & 0xffc0) == 0x0240)
b7d48530 4421 rv = decode_CaCTRL_0 (iw0, outf);
4b7f6baa 4422 else if ((iw0 & 0xff80) == 0x0100)
b7d48530 4423 rv = decode_PushPopReg_0 (iw0, outf);
4b7f6baa 4424 else if ((iw0 & 0xfe00) == 0x0400)
b7d48530 4425 rv = decode_PushPopMultiple_0 (iw0, outf);
4b7f6baa 4426 else if ((iw0 & 0xfe00) == 0x0600)
b7d48530 4427 rv = decode_ccMV_0 (iw0, outf);
4b7f6baa 4428 else if ((iw0 & 0xf800) == 0x0800)
b7d48530 4429 rv = decode_CCflag_0 (iw0, outf);
4b7f6baa 4430 else if ((iw0 & 0xffe0) == 0x0200)
b7d48530 4431 rv = decode_CC2dreg_0 (iw0, outf);
4b7f6baa 4432 else if ((iw0 & 0xff00) == 0x0300)
b7d48530 4433 rv = decode_CC2stat_0 (iw0, outf);
4b7f6baa 4434 else if ((iw0 & 0xf000) == 0x1000)
b7d48530 4435 rv = decode_BRCC_0 (iw0, pc, outf);
4b7f6baa 4436 else if ((iw0 & 0xf000) == 0x2000)
b7d48530 4437 rv = decode_UJUMP_0 (iw0, pc, outf);
4b7f6baa 4438 else if ((iw0 & 0xf000) == 0x3000)
b7d48530 4439 rv = decode_REGMV_0 (iw0, outf);
4b7f6baa 4440 else if ((iw0 & 0xfc00) == 0x4000)
b7d48530 4441 rv = decode_ALU2op_0 (iw0, outf);
4b7f6baa 4442 else if ((iw0 & 0xfe00) == 0x4400)
b7d48530 4443 rv = decode_PTR2op_0 (iw0, outf);
4b7f6baa 4444 else if ((iw0 & 0xf800) == 0x4800)
b7d48530 4445 rv = decode_LOGI2op_0 (iw0, outf);
4b7f6baa 4446 else if ((iw0 & 0xf000) == 0x5000)
b7d48530 4447 rv = decode_COMP3op_0 (iw0, outf);
4b7f6baa 4448 else if ((iw0 & 0xf800) == 0x6000)
b7d48530 4449 rv = decode_COMPI2opD_0 (iw0, outf);
4b7f6baa 4450 else if ((iw0 & 0xf800) == 0x6800)
b7d48530 4451 rv = decode_COMPI2opP_0 (iw0, outf);
4b7f6baa 4452 else if ((iw0 & 0xf000) == 0x8000)
b7d48530 4453 rv = decode_LDSTpmod_0 (iw0, outf);
4b7f6baa 4454 else if ((iw0 & 0xff60) == 0x9e60)
b7d48530 4455 rv = decode_dagMODim_0 (iw0, outf);
4b7f6baa 4456 else if ((iw0 & 0xfff0) == 0x9f60)
b7d48530 4457 rv = decode_dagMODik_0 (iw0, outf);
4b7f6baa 4458 else if ((iw0 & 0xfc00) == 0x9c00)
b7d48530 4459 rv = decode_dspLDST_0 (iw0, outf);
4b7f6baa 4460 else if ((iw0 & 0xf000) == 0x9000)
b7d48530 4461 rv = decode_LDST_0 (iw0, outf);
4b7f6baa 4462 else if ((iw0 & 0xfc00) == 0xb800)
b7d48530 4463 rv = decode_LDSTiiFP_0 (iw0, outf);
4b7f6baa 4464 else if ((iw0 & 0xe000) == 0xA000)
b7d48530 4465 rv = decode_LDSTii_0 (iw0, outf);
4b7f6baa 4466 else if ((iw0 & 0xff80) == 0xe080 && (iw1 & 0x0C00) == 0x0000)
b7d48530 4467 rv = decode_LoopSetup_0 (iw0, iw1, pc, outf);
4b7f6baa 4468 else if ((iw0 & 0xff00) == 0xe100 && (iw1 & 0x0000) == 0x0000)
b7d48530 4469 rv = decode_LDIMMhalf_0 (iw0, iw1, outf);
4b7f6baa 4470 else if ((iw0 & 0xfe00) == 0xe200 && (iw1 & 0x0000) == 0x0000)
b7d48530 4471 rv = decode_CALLa_0 (iw0, iw1, pc, outf);
4b7f6baa 4472 else if ((iw0 & 0xfc00) == 0xe400 && (iw1 & 0x0000) == 0x0000)
b7d48530 4473 rv = decode_LDSTidxI_0 (iw0, iw1, outf);
4b7f6baa 4474 else if ((iw0 & 0xfffe) == 0xe800 && (iw1 & 0x0000) == 0x0000)
b7d48530 4475 rv = decode_linkage_0 (iw0, iw1, outf);
4b7f6baa 4476 else if ((iw0 & 0xf600) == 0xc000 && (iw1 & 0x0000) == 0x0000)
b7d48530 4477 rv = decode_dsp32mac_0 (iw0, iw1, outf);
4b7f6baa 4478 else if ((iw0 & 0xf600) == 0xc200 && (iw1 & 0x0000) == 0x0000)
b7d48530 4479 rv = decode_dsp32mult_0 (iw0, iw1, outf);
4b7f6baa 4480 else if ((iw0 & 0xf7c0) == 0xc400 && (iw1 & 0x0000) == 0x0000)
b7d48530 4481 rv = decode_dsp32alu_0 (iw0, iw1, outf);
4b7f6baa 4482 else if ((iw0 & 0xf780) == 0xc600 && (iw1 & 0x01c0) == 0x0000)
b7d48530 4483 rv = decode_dsp32shift_0 (iw0, iw1, outf);
4b7f6baa 4484 else if ((iw0 & 0xf780) == 0xc680 && (iw1 & 0x0000) == 0x0000)
b7d48530 4485 rv = decode_dsp32shiftimm_0 (iw0, iw1, outf);
4b7f6baa 4486 else if ((iw0 & 0xff00) == 0xf800)
b7d48530 4487 rv = decode_pseudoDEBUG_0 (iw0, outf);
4b7f6baa 4488#if 0
4b7f6baa 4489 else if ((iw0 & 0xFF00) == 0xF900)
b7d48530 4490 rv = decode_pseudoOChar_0 (iw0, iw1, pc, outf);
4b7f6baa 4491#endif
4b7f6baa 4492 else if ((iw0 & 0xFFC0) == 0xf000 && (iw1 & 0x0000) == 0x0000)
b7d48530 4493 rv = decode_pseudodbg_assert_0 (iw0, iw1, outf);
4b7f6baa 4494
b7d48530 4495 return rv;
4b7f6baa
CM		 4496}
4497
4498
4499int
4500print_insn_bfin (bfd_vma pc, disassemble_info *outf)
4501{
471e4e36
JZ		 4502 bfd_byte buf[2];
4503 unsigned short iw0;
4504 int status;
4b7f6baa 4505 int count = 0;
471e4e36
JZ		 4506
4507 status = (*outf->read_memory_func) (pc & ~0x01, buf, 2, outf);
4508 iw0 = bfd_getl16 (buf);
4b7f6baa
CM		 4509
4510 count += _print_insn_bfin (pc, outf);
471e4e36 4511
4b7f6baa 4512 /* Proper display of multiple issue instructions. */
471e4e36 4513
4b7f6baa 4514 if ((iw0 & 0xc000) == 0xc000 && (iw0 & BIT_MULTI_INS)
b7d48530 4515 && ((iw0 & 0xe800) != 0xe800 /* Not Linkage. */ ))
4b7f6baa
CM		 4516 {
4517 outf->fprintf_func (outf->stream, " || ");
4518 count += _print_insn_bfin (pc + 4, outf);
4519 outf->fprintf_func (outf->stream, " || ");
4520 count += _print_insn_bfin (pc + 6, outf);
4521 }
4522 if (count == 0)
4523 {
4524 outf->fprintf_func (outf->stream, "ILLEGAL");
4525 return 2;
4526 }
4527 outf->fprintf_func (outf->stream, ";");
4528 return count;
4529}
GDB Binutils - Deliverables
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