Fix compile time warnings in cgen-generated files
[deliverable/binutils-gdb.git] / opcodes / cgen-dis.in
CommitLineData
f6e6b40f
BE
1/* Disassembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5- the resultant file is machine generated, cgen-dis.in isn't
6
060d22b0 7Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
f6e6b40f
BE
8
9This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11This program is free software; you can redistribute it and/or modify
12it under the terms of the GNU General Public License as published by
13the Free Software Foundation; either version 2, or (at your option)
14any later version.
15
16This program is distributed in the hope that it will be useful,
17but WITHOUT ANY WARRANTY; without even the implied warranty of
18MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19GNU General Public License for more details.
20
21You should have received a copy of the GNU General Public License
22along with this program; if not, write to the Free Software Foundation, Inc.,
2359 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
29#include <stdio.h>
30#include "ansidecl.h"
31#include "dis-asm.h"
32#include "bfd.h"
33#include "symcat.h"
34#include "@prefix@-desc.h"
35#include "@prefix@-opc.h"
36#include "opintl.h"
37
38/* Default text to print if an instruction isn't recognized. */
39#define UNKNOWN_INSN_MSG _("*unknown*")
40
41static void print_normal
42 PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int));
43static void print_address
44 PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int));
45static void print_keyword
46 PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int));
47static void print_insn_normal
48 PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *,
49 bfd_vma, int));
0e2ee3ca
NC
50static int print_insn
51 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned));
f6e6b40f
BE
52static int default_print_insn
53 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
0e2ee3ca
NC
54static int read_insn
55 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int,
56 CGEN_EXTRACT_INFO *, unsigned long *));
f6e6b40f
BE
57\f
58/* -- disassembler routines inserted here */
59\f
60/* Default print handler. */
61
62static void
63print_normal (cd, dis_info, value, attrs, pc, length)
f6e6b40f 64 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
f6e6b40f
BE
65 PTR dis_info;
66 long value;
67 unsigned int attrs;
f6e6b40f
BE
68 bfd_vma pc ATTRIBUTE_UNUSED;
69 int length ATTRIBUTE_UNUSED;
f6e6b40f
BE
70{
71 disassemble_info *info = (disassemble_info *) dis_info;
72
73#ifdef CGEN_PRINT_NORMAL
74 CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
75#endif
76
77 /* Print the operand as directed by the attributes. */
78 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
79 ; /* nothing to do */
80 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
81 (*info->fprintf_func) (info->stream, "%ld", value);
82 else
83 (*info->fprintf_func) (info->stream, "0x%lx", value);
84}
85
86/* Default address handler. */
87
88static void
89print_address (cd, dis_info, value, attrs, pc, length)
f6e6b40f 90 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
f6e6b40f
BE
91 PTR dis_info;
92 bfd_vma value;
93 unsigned int attrs;
f6e6b40f
BE
94 bfd_vma pc ATTRIBUTE_UNUSED;
95 int length ATTRIBUTE_UNUSED;
f6e6b40f
BE
96{
97 disassemble_info *info = (disassemble_info *) dis_info;
98
99#ifdef CGEN_PRINT_ADDRESS
100 CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
101#endif
102
103 /* Print the operand as directed by the attributes. */
104 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
105 ; /* nothing to do */
106 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
107 (*info->print_address_func) (value, info);
108 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
109 (*info->print_address_func) (value, info);
110 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
111 (*info->fprintf_func) (info->stream, "%ld", (long) value);
112 else
113 (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
114}
115
116/* Keyword print handler. */
117
118static void
119print_keyword (cd, dis_info, keyword_table, value, attrs)
120 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
121 PTR dis_info;
122 CGEN_KEYWORD *keyword_table;
123 long value;
124 unsigned int attrs ATTRIBUTE_UNUSED;
125{
126 disassemble_info *info = (disassemble_info *) dis_info;
127 const CGEN_KEYWORD_ENTRY *ke;
128
129 ke = cgen_keyword_lookup_value (keyword_table, value);
130 if (ke != NULL)
131 (*info->fprintf_func) (info->stream, "%s", ke->name);
132 else
133 (*info->fprintf_func) (info->stream, "???");
134}
135\f
136/* Default insn printer.
137
138 DIS_INFO is defined as `PTR' so the disassembler needn't know anything
139 about disassemble_info. */
140
141static void
142print_insn_normal (cd, dis_info, insn, fields, pc, length)
143 CGEN_CPU_DESC cd;
144 PTR dis_info;
145 const CGEN_INSN *insn;
146 CGEN_FIELDS *fields;
147 bfd_vma pc;
148 int length;
149{
150 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
151 disassemble_info *info = (disassemble_info *) dis_info;
4a9f416d 152 const CGEN_SYNTAX_CHAR_TYPE *syn;
f6e6b40f
BE
153
154 CGEN_INIT_PRINT (cd);
155
156 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
157 {
158 if (CGEN_SYNTAX_MNEMONIC_P (*syn))
159 {
160 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
161 continue;
162 }
163 if (CGEN_SYNTAX_CHAR_P (*syn))
164 {
165 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
166 continue;
167 }
168
169 /* We have an operand. */
170 @arch@_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
171 fields, CGEN_INSN_ATTRS (insn), pc, length);
172 }
173}
174\f
6bb95a0f
DB
175/* Subroutine of print_insn. Reads an insn into the given buffers and updates
176 the extract info.
177 Returns 0 if all is well, non-zero otherwise. */
0e2ee3ca 178
f6e6b40f 179static int
6bb95a0f 180read_insn (cd, pc, info, buf, buflen, ex_info, insn_value)
0e2ee3ca 181 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
f6e6b40f
BE
182 bfd_vma pc;
183 disassemble_info *info;
184 char *buf;
185 int buflen;
6bb95a0f
DB
186 CGEN_EXTRACT_INFO *ex_info;
187 unsigned long *insn_value;
f6e6b40f 188{
6bb95a0f
DB
189 int status = (*info->read_memory_func) (pc, buf, buflen, info);
190 if (status != 0)
191 {
192 (*info->memory_error_func) (status, pc, info);
193 return -1;
194 }
f6e6b40f 195
6bb95a0f
DB
196 ex_info->dis_info = info;
197 ex_info->valid = (1 << buflen) - 1;
198 ex_info->insn_bytes = buf;
f6e6b40f 199
7e30bc36 200 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
6bb95a0f
DB
201 return 0;
202}
203
204/* Utility to print an insn.
205 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
206 The result is the size of the insn in bytes or zero for an unknown insn
207 or -1 if an error occurs fetching data (memory_error_func will have
208 been called). */
209
210static int
211print_insn (cd, pc, info, buf, buflen)
212 CGEN_CPU_DESC cd;
213 bfd_vma pc;
214 disassemble_info *info;
215 char *buf;
0e2ee3ca 216 unsigned int buflen;
6bb95a0f 217{
81f6038f 218 CGEN_INSN_INT insn_value;
6bb95a0f
DB
219 const CGEN_INSN_LIST *insn_list;
220 CGEN_EXTRACT_INFO ex_info;
221
52646233 222 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
81f6038f 223 insn_value = cgen_get_insn_value (cd, buf, buflen * 8);
52646233
FCE
224
225 /* Fill in ex_info fields like read_insn would. Don't actually call
226 read_insn, since the incoming buffer is already read (and possibly
227 modified a la m32r). */
228 ex_info.valid = (1 << buflen) - 1;
229 ex_info.dis_info = info;
230 ex_info.insn_bytes = buf;
6bb95a0f 231
f6e6b40f
BE
232 /* The instructions are stored in hash lists.
233 Pick the first one and keep trying until we find the right one. */
234
235 insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value);
236 while (insn_list != NULL)
237 {
238 const CGEN_INSN *insn = insn_list->insn;
239 CGEN_FIELDS fields;
240 int length;
52646233 241 unsigned long insn_value_cropped;
f6e6b40f
BE
242
243#ifdef CGEN_VALIDATE_INSN_SUPPORTED
0e2ee3ca 244 /* Not needed as insn shouldn't be in hash lists if not supported. */
f6e6b40f
BE
245 /* Supported by this cpu? */
246 if (! @arch@_cgen_insn_supported (cd, insn))
247 {
248 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
249 continue;
250 }
251#endif
252
253 /* Basic bit mask must be correct. */
254 /* ??? May wish to allow target to defer this check until the extract
255 handler. */
52646233
FCE
256
257 /* Base size may exceed this instruction's size. Extract the
258 relevant part from the buffer. */
0e2ee3ca
NC
259 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
260 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
52646233
FCE
261 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
262 info->endian == BFD_ENDIAN_BIG);
263 else
264 insn_value_cropped = insn_value;
265
266 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
f6e6b40f
BE
267 == CGEN_INSN_BASE_VALUE (insn))
268 {
269 /* Printing is handled in two passes. The first pass parses the
270 machine insn and extracts the fields. The second pass prints
271 them. */
272
1ffd7d02
DB
273 /* Make sure the entire insn is loaded into insn_value, if it
274 can fit. */
0e2ee3ca
NC
275 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
276 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
6bb95a0f
DB
277 {
278 unsigned long full_insn_value;
279 int rc = read_insn (cd, pc, info, buf,
280 CGEN_INSN_BITSIZE (insn) / 8,
281 & ex_info, & full_insn_value);
282 if (rc != 0)
283 return rc;
284 length = CGEN_EXTRACT_FN (cd, insn)
285 (cd, insn, &ex_info, full_insn_value, &fields, pc);
286 }
287 else
1ffd7d02 288 length = CGEN_EXTRACT_FN (cd, insn)
84fd0d38 289 (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
6bb95a0f 290
f6e6b40f
BE
291 /* length < 0 -> error */
292 if (length < 0)
293 return length;
294 if (length > 0)
295 {
296 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
297 /* length is in bits, result is in bytes */
298 return length / 8;
299 }
300 }
301
302 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
303 }
304
305 return 0;
306}
307
308/* Default value for CGEN_PRINT_INSN.
309 The result is the size of the insn in bytes or zero for an unknown insn
310 or -1 if an error occured fetching bytes. */
311
312#ifndef CGEN_PRINT_INSN
313#define CGEN_PRINT_INSN default_print_insn
314#endif
315
316static int
317default_print_insn (cd, pc, info)
318 CGEN_CPU_DESC cd;
319 bfd_vma pc;
320 disassemble_info *info;
321{
322 char buf[CGEN_MAX_INSN_SIZE];
a00ad97d 323 int buflen;
f6e6b40f
BE
324 int status;
325
a00ad97d
FCE
326 /* Attempt to read the base part of the insn. */
327 buflen = cd->base_insn_bitsize / 8;
328 status = (*info->read_memory_func) (pc, buf, buflen, info);
329
330 /* Try again with the minimum part, if min < base. */
331 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
332 {
333 buflen = cd->min_insn_bitsize / 8;
334 status = (*info->read_memory_func) (pc, buf, buflen, info);
335 }
f6e6b40f 336
f6e6b40f
BE
337 if (status != 0)
338 {
339 (*info->memory_error_func) (status, pc, info);
340 return -1;
341 }
342
a00ad97d 343 return print_insn (cd, pc, info, buf, buflen);
f6e6b40f
BE
344}
345
346/* Main entry point.
347 Print one instruction from PC on INFO->STREAM.
348 Return the size of the instruction (in bytes). */
349
350int
351print_insn_@arch@ (pc, info)
352 bfd_vma pc;
353 disassemble_info *info;
354{
355 static CGEN_CPU_DESC cd = 0;
356 static int prev_isa;
357 static int prev_mach;
358 static int prev_endian;
359 int length;
360 int isa,mach;
361 int endian = (info->endian == BFD_ENDIAN_BIG
362 ? CGEN_ENDIAN_BIG
363 : CGEN_ENDIAN_LITTLE);
364 enum bfd_architecture arch;
365
366 /* ??? gdb will set mach but leave the architecture as "unknown" */
367#ifndef CGEN_BFD_ARCH
368#define CGEN_BFD_ARCH bfd_arch_@arch@
369#endif
370 arch = info->arch;
371 if (arch == bfd_arch_unknown)
372 arch = CGEN_BFD_ARCH;
27fca2d8
PM
373
374 /* There's no standard way to compute the machine or isa number
f6e6b40f 375 so we leave it to the target. */
27fca2d8
PM
376#ifdef CGEN_COMPUTE_MACH
377 mach = CGEN_COMPUTE_MACH (info);
378#else
379 mach = info->mach;
380#endif
381
f6e6b40f
BE
382#ifdef CGEN_COMPUTE_ISA
383 isa = CGEN_COMPUTE_ISA (info);
384#else
385 isa = 0;
386#endif
387
f6e6b40f
BE
388 /* If we've switched cpu's, close the current table and open a new one. */
389 if (cd
390 && (isa != prev_isa
391 || mach != prev_mach
392 || endian != prev_endian))
393 {
394 @arch@_cgen_cpu_close (cd);
395 cd = 0;
396 }
397
398 /* If we haven't initialized yet, initialize the opcode table. */
399 if (! cd)
400 {
401 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
402 const char *mach_name;
403
404 if (!arch_type)
405 abort ();
406 mach_name = arch_type->printable_name;
407
408 prev_isa = isa;
409 prev_mach = mach;
410 prev_endian = endian;
411 cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
412 CGEN_CPU_OPEN_BFDMACH, mach_name,
413 CGEN_CPU_OPEN_ENDIAN, prev_endian,
414 CGEN_CPU_OPEN_END);
415 if (!cd)
416 abort ();
417 @arch@_cgen_init_dis (cd);
418 }
419
420 /* We try to have as much common code as possible.
421 But at this point some targets need to take over. */
422 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
423 but if not possible try to move this hook elsewhere rather than
424 have two hooks. */
425 length = CGEN_PRINT_INSN (cd, pc, info);
426 if (length > 0)
427 return length;
428 if (length < 0)
429 return -1;
430
431 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
432 return cd->default_insn_bitsize / 8;
433}
This page took 0.089602 seconds and 4 git commands to generate.