[deliverable/binutils-gdb.git] / opcodes / cgen-dis.in

/* Disassembler interface for targets using CGEN. -*- C -*-
   CGEN: Cpu tools GENerator

THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-dis.in isn't

Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.

This file is part of the GNU Binutils and GDB, the GNU debugger.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

/* ??? Eventually more and more of this stuff can go to cpu-independent files.
   Keep that in mind.  */

#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
#include "dis-asm.h"
#include "bfd.h"
#include "symcat.h"
#include "@prefix@-desc.h"
#include "@prefix@-opc.h"
#include "opintl.h"

/* Default text to print if an instruction isn't recognized.  */
#define UNKNOWN_INSN_MSG _("*unknown*")

static void print_normal
     PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int));
static void print_address
     PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int));
static void print_keyword
     PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int));
static void print_insn_normal
     PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *,
	      bfd_vma, int));
static int print_insn
     PARAMS ((CGEN_CPU_DESC, bfd_vma,  disassemble_info *, char *, unsigned));
static int default_print_insn
     PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
static int read_insn
     PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int,
	      CGEN_EXTRACT_INFO *, unsigned long *));
\f
/* -- disassembler routines inserted here */
\f
/* Default print handler.  */

static void
print_normal (cd, dis_info, value, attrs, pc, length)
     CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
     PTR dis_info;
     long value;
     unsigned int attrs;
     bfd_vma pc ATTRIBUTE_UNUSED;
     int length ATTRIBUTE_UNUSED;
{
  disassemble_info *info = (disassemble_info *) dis_info;

#ifdef CGEN_PRINT_NORMAL
  CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
#endif

  /* Print the operand as directed by the attributes.  */
  if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
    ; /* nothing to do */
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
    (*info->fprintf_func) (info->stream, "%ld", value);
  else
    (*info->fprintf_func) (info->stream, "0x%lx", value);
}

/* Default address handler.  */

static void
print_address (cd, dis_info, value, attrs, pc, length)
     CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
     PTR dis_info;
     bfd_vma value;
     unsigned int attrs;
     bfd_vma pc ATTRIBUTE_UNUSED;
     int length ATTRIBUTE_UNUSED;
{
  disassemble_info *info = (disassemble_info *) dis_info;

#ifdef CGEN_PRINT_ADDRESS
  CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
#endif

  /* Print the operand as directed by the attributes.  */
  if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
    ; /* nothing to do */
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
    (*info->print_address_func) (value, info);
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
    (*info->print_address_func) (value, info);
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
    (*info->fprintf_func) (info->stream, "%ld", (long) value);
  else
    (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
}

/* Keyword print handler.  */

static void
print_keyword (cd, dis_info, keyword_table, value, attrs)
     CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
     PTR dis_info;
     CGEN_KEYWORD *keyword_table;
     long value;
     unsigned int attrs ATTRIBUTE_UNUSED;
{
  disassemble_info *info = (disassemble_info *) dis_info;
  const CGEN_KEYWORD_ENTRY *ke;

  ke = cgen_keyword_lookup_value (keyword_table, value);
  if (ke != NULL)
    (*info->fprintf_func) (info->stream, "%s", ke->name);
  else
    (*info->fprintf_func) (info->stream, "???");
}
\f
/* Default insn printer.

   DIS_INFO is defined as `PTR' so the disassembler needn't know anything
   about disassemble_info.  */

static void
print_insn_normal (cd, dis_info, insn, fields, pc, length)
     CGEN_CPU_DESC cd;
     PTR dis_info;
     const CGEN_INSN *insn;
     CGEN_FIELDS *fields;
     bfd_vma pc;
     int length;
{
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
  disassemble_info *info = (disassemble_info *) dis_info;
  const CGEN_SYNTAX_CHAR_TYPE *syn;

  CGEN_INIT_PRINT (cd);

  for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
    {
      if (CGEN_SYNTAX_MNEMONIC_P (*syn))
	{
	  (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
	  continue;
	}
      if (CGEN_SYNTAX_CHAR_P (*syn))
	{
	  (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
	  continue;
	}

      /* We have an operand.  */
      @arch@_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
				 fields, CGEN_INSN_ATTRS (insn), pc, length);
    }
}
\f
/* Subroutine of print_insn. Reads an insn into the given buffers and updates
   the extract info.
   Returns 0 if all is well, non-zero otherwise.  */

static int
read_insn (cd, pc, info, buf, buflen, ex_info, insn_value)
     CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
     bfd_vma pc;
     disassemble_info *info;
     char *buf;
     int buflen;
     CGEN_EXTRACT_INFO *ex_info;
     unsigned long *insn_value;
{
  int status = (*info->read_memory_func) (pc, buf, buflen, info);
  if (status != 0)
    {
      (*info->memory_error_func) (status, pc, info);
      return -1;
    }

  ex_info->dis_info = info;
  ex_info->valid = (1 << buflen) - 1;
  ex_info->insn_bytes = buf;

  *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
  return 0;
}

/* Utility to print an insn.
   BUF is the base part of the insn, target byte order, BUFLEN bytes long.
   The result is the size of the insn in bytes or zero for an unknown insn
   or -1 if an error occurs fetching data (memory_error_func will have
   been called).  */

static int
print_insn (cd, pc, info, buf, buflen)
     CGEN_CPU_DESC cd;
     bfd_vma pc;
     disassemble_info *info;
     char *buf;
     unsigned int buflen;
{
  CGEN_INSN_INT insn_value;
  const CGEN_INSN_LIST *insn_list;
  CGEN_EXTRACT_INFO ex_info;
  int basesize;

  /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
  basesize = cd->base_insn_bitsize < buflen * 8 ?
                                     cd->base_insn_bitsize : buflen * 8;
  insn_value = cgen_get_insn_value (cd, buf, basesize);


  /* Fill in ex_info fields like read_insn would.  Don't actually call
     read_insn, since the incoming buffer is already read (and possibly
     modified a la m32r).  */
  ex_info.valid = (1 << buflen) - 1;
  ex_info.dis_info = info;
  ex_info.insn_bytes = buf;

  /* The instructions are stored in hash lists.
     Pick the first one and keep trying until we find the right one.  */

  insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value);
  while (insn_list != NULL)
    {
      const CGEN_INSN *insn = insn_list->insn;
      CGEN_FIELDS fields;
      int length;
      unsigned long insn_value_cropped;

#ifdef CGEN_VALIDATE_INSN_SUPPORTED 
      /* Not needed as insn shouldn't be in hash lists if not supported.  */
      /* Supported by this cpu?  */
      if (! @arch@_cgen_insn_supported (cd, insn))
        {
          insn_list = CGEN_DIS_NEXT_INSN (insn_list);
	  continue;
        }
#endif

      /* Basic bit mask must be correct.  */
      /* ??? May wish to allow target to defer this check until the extract
	 handler.  */

      /* Base size may exceed this instruction's size.  Extract the
         relevant part from the buffer. */
      if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
	  (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
	insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 
					   info->endian == BFD_ENDIAN_BIG);
      else
	insn_value_cropped = insn_value;

      if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
	  == CGEN_INSN_BASE_VALUE (insn))
	{
	  /* Printing is handled in two passes.  The first pass parses the
	     machine insn and extracts the fields.  The second pass prints
	     them.  */

	  /* Make sure the entire insn is loaded into insn_value, if it
	     can fit.  */
	  if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
	      (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
	    {
	      unsigned long full_insn_value;
	      int rc = read_insn (cd, pc, info, buf,
				  CGEN_INSN_BITSIZE (insn) / 8,
				  & ex_info, & full_insn_value);
	      if (rc != 0)
		return rc;
	      length = CGEN_EXTRACT_FN (cd, insn)
		(cd, insn, &ex_info, full_insn_value, &fields, pc);
	    }
	  else
	    length = CGEN_EXTRACT_FN (cd, insn)
	      (cd, insn, &ex_info, insn_value_cropped, &fields, pc);

	  /* length < 0 -> error */
	  if (length < 0)
	    return length;
	  if (length > 0)
	    {
	      CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
	      /* length is in bits, result is in bytes */
	      return length / 8;
	    }
	}

      insn_list = CGEN_DIS_NEXT_INSN (insn_list);
    }

  return 0;
}

/* Default value for CGEN_PRINT_INSN.
   The result is the size of the insn in bytes or zero for an unknown insn
   or -1 if an error occured fetching bytes.  */

#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
#endif

static int
default_print_insn (cd, pc, info)
     CGEN_CPU_DESC cd;
     bfd_vma pc;
     disassemble_info *info;
{
  char buf[CGEN_MAX_INSN_SIZE];
  int buflen;
  int status;

  /* Attempt to read the base part of the insn.  */
  buflen = cd->base_insn_bitsize / 8;
  status = (*info->read_memory_func) (pc, buf, buflen, info);

  /* Try again with the minimum part, if min < base.  */
  if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
    {
      buflen = cd->min_insn_bitsize / 8;
      status = (*info->read_memory_func) (pc, buf, buflen, info);
    }

  if (status != 0)
    {
      (*info->memory_error_func) (status, pc, info);
      return -1;
    }

  return print_insn (cd, pc, info, buf, buflen);
}

/* Main entry point.
   Print one instruction from PC on INFO->STREAM.
   Return the size of the instruction (in bytes).  */

int
print_insn_@arch@ (pc, info)
     bfd_vma pc;
     disassemble_info *info;
{
  static CGEN_CPU_DESC cd = 0;
  static int prev_isa;
  static int prev_mach;
  static int prev_endian;
  int length;
  int isa,mach;
  int endian = (info->endian == BFD_ENDIAN_BIG
		? CGEN_ENDIAN_BIG
		: CGEN_ENDIAN_LITTLE);
  enum bfd_architecture arch;

  /* ??? gdb will set mach but leave the architecture as "unknown" */
#ifndef CGEN_BFD_ARCH
#define CGEN_BFD_ARCH bfd_arch_@arch@
#endif
  arch = info->arch;
  if (arch == bfd_arch_unknown)
    arch = CGEN_BFD_ARCH;
   
  /* There's no standard way to compute the machine or isa number
     so we leave it to the target.  */
#ifdef CGEN_COMPUTE_MACH
  mach = CGEN_COMPUTE_MACH (info);
#else
  mach = info->mach;
#endif

#ifdef CGEN_COMPUTE_ISA
  isa = CGEN_COMPUTE_ISA (info);
#else
  isa = 0;
#endif

  /* If we've switched cpu's, close the current table and open a new one.  */
  if (cd
      && (isa != prev_isa
	  || mach != prev_mach
	  || endian != prev_endian))
    {
      @arch@_cgen_cpu_close (cd);
      cd = 0;
    }

  /* If we haven't initialized yet, initialize the opcode table.  */
  if (! cd)
    {
      const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
      const char *mach_name;

      if (!arch_type)
	abort ();
      mach_name = arch_type->printable_name;

      prev_isa = isa;
      prev_mach = mach;
      prev_endian = endian;
      cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
				 CGEN_CPU_OPEN_BFDMACH, mach_name,
				 CGEN_CPU_OPEN_ENDIAN, prev_endian,
				 CGEN_CPU_OPEN_END);
      if (!cd)
	abort ();
      @arch@_cgen_init_dis (cd);
    }

  /* We try to have as much common code as possible.
     But at this point some targets need to take over.  */
  /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
     but if not possible try to move this hook elsewhere rather than
     have two hooks.  */
  length = CGEN_PRINT_INSN (cd, pc, info);
  if (length > 0)
    return length;
  if (length < 0)
    return -1;

  (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
  return cd->default_insn_bitsize / 8;
}
Commit	Line	Data
f6e6b40f BE	1	/* Disassembler interface for targets using CGEN. -- C --
	2	CGEN: Cpu tools GENerator
	3
	4	THIS FILE IS MACHINE GENERATED WITH CGEN.
	5	- the resultant file is machine generated, cgen-dis.in isn't
	6
060d22b0	7	Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
f6e6b40f BE	8
	9	This file is part of the GNU Binutils and GDB, the GNU debugger.
	10
	11	This program is free software; you can redistribute it and/or modify
	12	it under the terms of the GNU General Public License as published by
	13	the Free Software Foundation; either version 2, or (at your option)
	14	any later version.
	15
	16	This program is distributed in the hope that it will be useful,
	17	but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	GNU General Public License for more details.
	20
	21	You should have received a copy of the GNU General Public License
	22	along with this program; if not, write to the Free Software Foundation, Inc.,
	23	59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	24
	25	/* ??? Eventually more and more of this stuff can go to cpu-independent files.
	26	Keep that in mind. */
	27
	28	#include "sysdep.h"
	29	#include <stdio.h>
	30	#include "ansidecl.h"
	31	#include "dis-asm.h"
	32	#include "bfd.h"
	33	#include "symcat.h"
	34	#include "@prefix@-desc.h"
	35	#include "@prefix@-opc.h"
	36	#include "opintl.h"
	37
	38	/* Default text to print if an instruction isn't recognized. */
	39	#define UNKNOWN_INSN_MSG _("unknown")
	40
	41	static void print_normal
	42	PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int));
	43	static void print_address
	44	PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int));
	45	static void print_keyword
	46	PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int));
	47	static void print_insn_normal
	48	PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN , CGEN_FIELDS ,
	49	bfd_vma, int));
0e2ee3ca NC	50	static int print_insn
0e2ee3ca NC	51	PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info , char , unsigned));
f6e6b40f BE	52	static int default_print_insn
f6e6b40f BE	53	PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
0e2ee3ca NC	54	static int read_insn
	55	PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info , char , int,
	56	CGEN_EXTRACT_INFO , unsigned long ));
f6e6b40f BE	57	\f
	58	/* -- disassembler routines inserted here */
	59	\f
	60	/* Default print handler. */
	61
	62	static void
	63	print_normal (cd, dis_info, value, attrs, pc, length)
f6e6b40f	64	CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
f6e6b40f BE	65	PTR dis_info;
	66	long value;
	67	unsigned int attrs;
f6e6b40f BE	68	bfd_vma pc ATTRIBUTE_UNUSED;
f6e6b40f BE	69	int length ATTRIBUTE_UNUSED;
f6e6b40f BE	70	{
	71	disassemble_info info = (disassemble_info ) dis_info;
	72
	73	#ifdef CGEN_PRINT_NORMAL
	74	CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
	75	#endif
	76
	77	/* Print the operand as directed by the attributes. */
	78	if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
	79	; /* nothing to do */
	80	else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
	81	(*info->fprintf_func) (info->stream, "%ld", value);
	82	else
	83	(*info->fprintf_func) (info->stream, "0x%lx", value);
	84	}
	85
	86	/* Default address handler. */
	87
	88	static void
	89	print_address (cd, dis_info, value, attrs, pc, length)
f6e6b40f	90	CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
f6e6b40f BE	91	PTR dis_info;
	92	bfd_vma value;
	93	unsigned int attrs;
f6e6b40f BE	94	bfd_vma pc ATTRIBUTE_UNUSED;
f6e6b40f BE	95	int length ATTRIBUTE_UNUSED;
f6e6b40f BE	96	{
	97	disassemble_info info = (disassemble_info ) dis_info;
	98
	99	#ifdef CGEN_PRINT_ADDRESS
	100	CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
	101	#endif
	102
	103	/* Print the operand as directed by the attributes. */
	104	if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
	105	; /* nothing to do */
	106	else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
	107	(*info->print_address_func) (value, info);
	108	else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
	109	(*info->print_address_func) (value, info);
	110	else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
	111	(*info->fprintf_func) (info->stream, "%ld", (long) value);
	112	else
	113	(*info->fprintf_func) (info->stream, "0x%lx", (long) value);
	114	}
	115
	116	/* Keyword print handler. */
	117
	118	static void
	119	print_keyword (cd, dis_info, keyword_table, value, attrs)
	120	CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
	121	PTR dis_info;
	122	CGEN_KEYWORD *keyword_table;
	123	long value;
	124	unsigned int attrs ATTRIBUTE_UNUSED;
	125	{
	126	disassemble_info info = (disassemble_info ) dis_info;
	127	const CGEN_KEYWORD_ENTRY *ke;
	128
	129	ke = cgen_keyword_lookup_value (keyword_table, value);
	130	if (ke != NULL)
	131	(*info->fprintf_func) (info->stream, "%s", ke->name);
	132	else
	133	(*info->fprintf_func) (info->stream, "???");
	134	}
	135	\f
	136	/* Default insn printer.
	137
	138	DIS_INFO is defined as `PTR' so the disassembler needn't know anything
	139	about disassemble_info. */
	140
	141	static void
	142	print_insn_normal (cd, dis_info, insn, fields, pc, length)
	143	CGEN_CPU_DESC cd;
	144	PTR dis_info;
	145	const CGEN_INSN *insn;
	146	CGEN_FIELDS *fields;
	147	bfd_vma pc;
	148	int length;
	149	{
	150	const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
	151	disassemble_info info = (disassemble_info ) dis_info;
4a9f416d	152	const CGEN_SYNTAX_CHAR_TYPE *syn;
f6e6b40f BE	153
	154	CGEN_INIT_PRINT (cd);
	155
	156	for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
	157	{
	158	if (CGEN_SYNTAX_MNEMONIC_P (*syn))
	159	{
	160	(*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
	161	continue;
	162	}
	163	if (CGEN_SYNTAX_CHAR_P (*syn))
	164	{
	165	(info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (syn));
	166	continue;
	167	}
	168
	169	/* We have an operand. */
	170	@arch@_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
	171	fields, CGEN_INSN_ATTRS (insn), pc, length);
	172	}
	173	}
	174	\f
6bb95a0f DB	175	/* Subroutine of print_insn. Reads an insn into the given buffers and updates
	176	the extract info.
	177	Returns 0 if all is well, non-zero otherwise. */
0e2ee3ca	178
f6e6b40f	179	static int
6bb95a0f	180	read_insn (cd, pc, info, buf, buflen, ex_info, insn_value)
0e2ee3ca	181	CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
f6e6b40f BE	182	bfd_vma pc;
	183	disassemble_info *info;
	184	char *buf;
	185	int buflen;
6bb95a0f DB	186	CGEN_EXTRACT_INFO *ex_info;
6bb95a0f DB	187	unsigned long *insn_value;
f6e6b40f	188	{
6bb95a0f DB	189	int status = (*info->read_memory_func) (pc, buf, buflen, info);
	190	if (status != 0)
	191	{
	192	(*info->memory_error_func) (status, pc, info);
	193	return -1;
	194	}
f6e6b40f	195
6bb95a0f DB	196	ex_info->dis_info = info;
	197	ex_info->valid = (1 << buflen) - 1;
	198	ex_info->insn_bytes = buf;
f6e6b40f	199
7e30bc36	200	insn_value = bfd_get_bits (buf, buflen 8, info->endian == BFD_ENDIAN_BIG);
6bb95a0f DB	201	return 0;
	202	}
	203
	204	/* Utility to print an insn.
	205	BUF is the base part of the insn, target byte order, BUFLEN bytes long.
	206	The result is the size of the insn in bytes or zero for an unknown insn
	207	or -1 if an error occurs fetching data (memory_error_func will have
	208	been called). */
	209
	210	static int
	211	print_insn (cd, pc, info, buf, buflen)
	212	CGEN_CPU_DESC cd;
	213	bfd_vma pc;
	214	disassemble_info *info;
	215	char *buf;
0e2ee3ca	216	unsigned int buflen;
6bb95a0f	217	{
81f6038f	218	CGEN_INSN_INT insn_value;
6bb95a0f DB	219	const CGEN_INSN_LIST *insn_list;
6bb95a0f DB	220	CGEN_EXTRACT_INFO ex_info;
6e9a3f4d	221	int basesize;
6bb95a0f	222
52646233	223	/* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
6e9a3f4d JH	224	basesize = cd->base_insn_bitsize < buflen * 8 ?
	225	cd->base_insn_bitsize : buflen * 8;
	226	insn_value = cgen_get_insn_value (cd, buf, basesize);
	227
52646233 FCE	228
	229	/* Fill in ex_info fields like read_insn would. Don't actually call
	230	read_insn, since the incoming buffer is already read (and possibly
	231	modified a la m32r). */
	232	ex_info.valid = (1 << buflen) - 1;
	233	ex_info.dis_info = info;
	234	ex_info.insn_bytes = buf;
6bb95a0f	235
f6e6b40f BE	236	/* The instructions are stored in hash lists.
	237	Pick the first one and keep trying until we find the right one. */
	238
	239	insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value);
	240	while (insn_list != NULL)
	241	{
	242	const CGEN_INSN *insn = insn_list->insn;
	243	CGEN_FIELDS fields;
	244	int length;
52646233	245	unsigned long insn_value_cropped;
f6e6b40f BE	246
f6e6b40f BE	247	#ifdef CGEN_VALIDATE_INSN_SUPPORTED
0e2ee3ca	248	/* Not needed as insn shouldn't be in hash lists if not supported. */
f6e6b40f BE	249	/* Supported by this cpu? */
	250	if (! @arch@_cgen_insn_supported (cd, insn))
	251	{
	252	insn_list = CGEN_DIS_NEXT_INSN (insn_list);
	253	continue;
	254	}
	255	#endif
	256
	257	/* Basic bit mask must be correct. */
	258	/* ??? May wish to allow target to defer this check until the extract
	259	handler. */
52646233 FCE	260
	261	/* Base size may exceed this instruction's size. Extract the
	262	relevant part from the buffer. */
0e2ee3ca NC	263	if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
0e2ee3ca NC	264	(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
52646233 FCE	265	insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
	266	info->endian == BFD_ENDIAN_BIG);
	267	else
	268	insn_value_cropped = insn_value;
	269
	270	if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
f6e6b40f BE	271	== CGEN_INSN_BASE_VALUE (insn))
	272	{
	273	/* Printing is handled in two passes. The first pass parses the
	274	machine insn and extracts the fields. The second pass prints
	275	them. */
	276
1ffd7d02 DB	277	/* Make sure the entire insn is loaded into insn_value, if it
1ffd7d02 DB	278	can fit. */
0e2ee3ca NC	279	if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
0e2ee3ca NC	280	(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
6bb95a0f DB	281	{
	282	unsigned long full_insn_value;
	283	int rc = read_insn (cd, pc, info, buf,
	284	CGEN_INSN_BITSIZE (insn) / 8,
	285	& ex_info, & full_insn_value);
	286	if (rc != 0)
	287	return rc;
	288	length = CGEN_EXTRACT_FN (cd, insn)
	289	(cd, insn, &ex_info, full_insn_value, &fields, pc);
	290	}
	291	else
1ffd7d02	292	length = CGEN_EXTRACT_FN (cd, insn)
84fd0d38	293	(cd, insn, &ex_info, insn_value_cropped, &fields, pc);
6bb95a0f	294
f6e6b40f BE	295	/* length < 0 -> error */
	296	if (length < 0)
	297	return length;
	298	if (length > 0)
	299	{
	300	CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
	301	/* length is in bits, result is in bytes */
	302	return length / 8;
	303	}
	304	}
	305
	306	insn_list = CGEN_DIS_NEXT_INSN (insn_list);
	307	}
	308
	309	return 0;
	310	}
	311
	312	/* Default value for CGEN_PRINT_INSN.
	313	The result is the size of the insn in bytes or zero for an unknown insn
	314	or -1 if an error occured fetching bytes. */
	315
	316	#ifndef CGEN_PRINT_INSN
	317	#define CGEN_PRINT_INSN default_print_insn
	318	#endif
	319
	320	static int
	321	default_print_insn (cd, pc, info)
	322	CGEN_CPU_DESC cd;
	323	bfd_vma pc;
	324	disassemble_info *info;
	325	{
	326	char buf[CGEN_MAX_INSN_SIZE];
a00ad97d	327	int buflen;
f6e6b40f BE	328	int status;
f6e6b40f BE	329
a00ad97d FCE	330	/* Attempt to read the base part of the insn. */
	331	buflen = cd->base_insn_bitsize / 8;
	332	status = (*info->read_memory_func) (pc, buf, buflen, info);
	333
	334	/* Try again with the minimum part, if min < base. */
	335	if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
	336	{
	337	buflen = cd->min_insn_bitsize / 8;
	338	status = (*info->read_memory_func) (pc, buf, buflen, info);
	339	}
f6e6b40f	340
f6e6b40f BE	341	if (status != 0)
	342	{
	343	(*info->memory_error_func) (status, pc, info);
	344	return -1;
	345	}
	346
a00ad97d	347	return print_insn (cd, pc, info, buf, buflen);
f6e6b40f BE	348	}
	349
	350	/* Main entry point.
	351	Print one instruction from PC on INFO->STREAM.
	352	Return the size of the instruction (in bytes). */
	353
	354	int
	355	print_insn_@arch@ (pc, info)
	356	bfd_vma pc;
	357	disassemble_info *info;
	358	{
	359	static CGEN_CPU_DESC cd = 0;
	360	static int prev_isa;
	361	static int prev_mach;
	362	static int prev_endian;
	363	int length;
	364	int isa,mach;
	365	int endian = (info->endian == BFD_ENDIAN_BIG
	366	? CGEN_ENDIAN_BIG
	367	: CGEN_ENDIAN_LITTLE);
	368	enum bfd_architecture arch;
	369
	370	/* ??? gdb will set mach but leave the architecture as "unknown" */
	371	#ifndef CGEN_BFD_ARCH
	372	#define CGEN_BFD_ARCH bfd_arch_@arch@
	373	#endif
	374	arch = info->arch;
	375	if (arch == bfd_arch_unknown)
	376	arch = CGEN_BFD_ARCH;
27fca2d8 PM	377
27fca2d8 PM	378	/* There's no standard way to compute the machine or isa number
f6e6b40f	379	so we leave it to the target. */
27fca2d8 PM	380	#ifdef CGEN_COMPUTE_MACH
	381	mach = CGEN_COMPUTE_MACH (info);
	382	#else
	383	mach = info->mach;
	384	#endif
	385
f6e6b40f BE	386	#ifdef CGEN_COMPUTE_ISA
	387	isa = CGEN_COMPUTE_ISA (info);
	388	#else
	389	isa = 0;
	390	#endif
	391
f6e6b40f BE	392	/* If we've switched cpu's, close the current table and open a new one. */
	393	if (cd
	394	&& (isa != prev_isa
	395	\|\| mach != prev_mach
	396	\|\| endian != prev_endian))
	397	{
	398	@arch@_cgen_cpu_close (cd);
	399	cd = 0;
	400	}
	401
	402	/* If we haven't initialized yet, initialize the opcode table. */
	403	if (! cd)
	404	{
	405	const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
	406	const char *mach_name;
	407
	408	if (!arch_type)
	409	abort ();
	410	mach_name = arch_type->printable_name;
	411
	412	prev_isa = isa;
	413	prev_mach = mach;
	414	prev_endian = endian;
	415	cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
	416	CGEN_CPU_OPEN_BFDMACH, mach_name,
	417	CGEN_CPU_OPEN_ENDIAN, prev_endian,
	418	CGEN_CPU_OPEN_END);
	419	if (!cd)
	420	abort ();
	421	@arch@_cgen_init_dis (cd);
	422	}
	423
	424	/* We try to have as much common code as possible.
	425	But at this point some targets need to take over. */
	426	/* ??? Some targets may need a hook elsewhere. Try to avoid this,
	427	but if not possible try to move this hook elsewhere rather than
	428	have two hooks. */
	429	length = CGEN_PRINT_INSN (cd, pc, info);
	430	if (length > 0)
	431	return length;
	432	if (length < 0)
	433	return -1;
	434
	435	(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
	436	return cd->default_insn_bitsize / 8;
	437	}