Move common symbol check after bed->common_definition
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
2571583a 2 Copyright (C) 1994-2017 Free Software Foundation, Inc.
252b5132 3
9b201bb5
NC
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7499d566 7 it under the terms of the GNU General Public License as published by
9b201bb5 8 the Free Software Foundation; either version 3 of the License, or
7499d566 9 (at your option) any later version.
252b5132 10
7499d566
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
7499d566
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
9b201bb5
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
0d8dfecf 21#include "sysdep.h"
88c1242d 22#include "disassemble.h"
65b48a81 23#include "safe-ctype.h"
003ca0fd 24#include <assert.h>
252b5132
RH
25
26#ifdef ARCH_all
a06ea964 27#define ARCH_aarch64
252b5132
RH
28#define ARCH_alpha
29#define ARCH_arc
30#define ARCH_arm
adde6300 31#define ARCH_avr
4b7f6baa 32#define ARCH_bfin
3d3d428f 33#define ARCH_cr16
6c95a37f 34#define ARCH_cris
1fe1f39c 35#define ARCH_crx
252b5132
RH
36#define ARCH_d10v
37#define ARCH_d30v
d172d4ba 38#define ARCH_dlx
56b13185 39#define ARCH_epiphany
e729279b
NC
40#define ARCH_fr30
41#define ARCH_frv
3f8107ab 42#define ARCH_ft32
252b5132
RH
43#define ARCH_h8300
44#define ARCH_h8500
45#define ARCH_hppa
5b93d8bb 46#define ARCH_i370
252b5132 47#define ARCH_i386
9d751335 48#define ARCH_i860
252b5132 49#define ARCH_i960
800eeca4 50#define ARCH_ia64
e729279b
NC
51#define ARCH_ip2k
52#define ARCH_iq2000
84e94c90 53#define ARCH_lm32
e729279b 54#define ARCH_m32c
252b5132 55#define ARCH_m32r
60bcf0fa
NC
56#define ARCH_m68hc11
57#define ARCH_m68hc12
e729279b 58#define ARCH_m68k
252b5132
RH
59#define ARCH_m88k
60#define ARCH_mcore
bd2f2e55 61#define ARCH_mep
a3c62988 62#define ARCH_metag
7ba29e2a 63#define ARCH_microblaze
252b5132 64#define ARCH_mips
3c3bdf30 65#define ARCH_mmix
252b5132
RH
66#define ARCH_mn10200
67#define ARCH_mn10300
59b1530d 68#define ARCH_moxie
d031aafb 69#define ARCH_mt
2469cfa2 70#define ARCH_msp430
35c08157 71#define ARCH_nds32
36591ba1 72#define ARCH_nios2
252b5132 73#define ARCH_ns32k
73589c9d 74#define ARCH_or1k
e135f41b 75#define ARCH_pdp11
1e608f98 76#define ARCH_pj
252b5132 77#define ARCH_powerpc
11146849 78#define ARCH_pru
252b5132 79#define ARCH_rs6000
99c513f6 80#define ARCH_rl78
c7927a3c 81#define ARCH_rx
a85d7ed0 82#define ARCH_s390
1c0d3aa6 83#define ARCH_score
252b5132
RH
84#define ARCH_sh
85#define ARCH_sparc
e9f53129 86#define ARCH_spu
252b5132 87#define ARCH_tic30
026df7c5 88#define ARCH_tic4x
5c84d377 89#define ARCH_tic54x
40b36596 90#define ARCH_tic6x
252b5132 91#define ARCH_tic80
aa137e4d
NC
92#define ARCH_tilegx
93#define ARCH_tilepro
252b5132
RH
94#define ARCH_v850
95#define ARCH_vax
1945cfa5 96#define ARCH_visium
252b5132 97#define ARCH_w65
62ecb94c 98#define ARCH_wasm32
93fbbb04 99#define ARCH_xstormy16
d70c5fc7 100#define ARCH_xc16x
f6c1a2d5 101#define ARCH_xgate
e0001a05 102#define ARCH_xtensa
3c9b82ba 103#define ARCH_z80
252b5132 104#define ARCH_z8k
d28847ce 105#define INCLUDE_SHMEDIA
252b5132
RH
106#endif
107
49f58d10
JB
108#ifdef ARCH_m32c
109#include "m32c-desc.h"
110#endif
252b5132
RH
111
112disassembler_ftype
003ca0fd 113disassembler (enum bfd_architecture a, bfd_boolean big, unsigned long mach,
e347efc3 114 bfd *abfd ATTRIBUTE_UNUSED)
252b5132 115{
252b5132
RH
116 disassembler_ftype disassemble;
117
118 switch (a)
119 {
120 /* If you add a case to this table, also add it to the
121 ARCH_all definition right above this function. */
a06ea964
NC
122#ifdef ARCH_aarch64
123 case bfd_arch_aarch64:
124 disassemble = print_insn_aarch64;
125 break;
126#endif
252b5132
RH
127#ifdef ARCH_alpha
128 case bfd_arch_alpha:
129 disassemble = print_insn_alpha;
130 break;
131#endif
132#ifdef ARCH_arc
133 case bfd_arch_arc:
6ca4eb77
AM
134 disassemble = arc_get_disassembler (abfd);
135 break;
252b5132
RH
136#endif
137#ifdef ARCH_arm
138 case bfd_arch_arm:
003ca0fd 139 if (big)
252b5132
RH
140 disassemble = print_insn_big_arm;
141 else
142 disassemble = print_insn_little_arm;
143 break;
144#endif
adde6300
AM
145#ifdef ARCH_avr
146 case bfd_arch_avr:
147 disassemble = print_insn_avr;
148 break;
149#endif
4b7f6baa
CM
150#ifdef ARCH_bfin
151 case bfd_arch_bfin:
152 disassemble = print_insn_bfin;
153 break;
154#endif
3d3d428f
NC
155#ifdef ARCH_cr16
156 case bfd_arch_cr16:
157 disassemble = print_insn_cr16;
158 break;
159#endif
6c95a37f
HPN
160#ifdef ARCH_cris
161 case bfd_arch_cris:
78966507 162 disassemble = cris_get_disassembler (abfd);
6c95a37f 163 break;
1fe1f39c
NC
164#endif
165#ifdef ARCH_crx
166 case bfd_arch_crx:
167 disassemble = print_insn_crx;
168 break;
6c95a37f 169#endif
252b5132
RH
170#ifdef ARCH_d10v
171 case bfd_arch_d10v:
172 disassemble = print_insn_d10v;
173 break;
174#endif
175#ifdef ARCH_d30v
176 case bfd_arch_d30v:
177 disassemble = print_insn_d30v;
178 break;
179#endif
d172d4ba
NC
180#ifdef ARCH_dlx
181 case bfd_arch_dlx:
182 /* As far as I know we only handle big-endian DLX objects. */
183 disassemble = print_insn_dlx;
184 break;
185#endif
252b5132
RH
186#ifdef ARCH_h8300
187 case bfd_arch_h8300:
003ca0fd 188 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
252b5132 189 disassemble = print_insn_h8300h;
003ca0fd
YQ
190 else if (mach == bfd_mach_h8300s
191 || mach == bfd_mach_h8300sn
192 || mach == bfd_mach_h8300sx
193 || mach == bfd_mach_h8300sxn)
252b5132 194 disassemble = print_insn_h8300s;
b7ed8fad 195 else
252b5132
RH
196 disassemble = print_insn_h8300;
197 break;
198#endif
199#ifdef ARCH_h8500
200 case bfd_arch_h8500:
201 disassemble = print_insn_h8500;
202 break;
203#endif
204#ifdef ARCH_hppa
205 case bfd_arch_hppa:
206 disassemble = print_insn_hppa;
207 break;
208#endif
5b93d8bb
AM
209#ifdef ARCH_i370
210 case bfd_arch_i370:
211 disassemble = print_insn_i370;
212 break;
213#endif
252b5132
RH
214#ifdef ARCH_i386
215 case bfd_arch_i386:
7b6d09fb 216 case bfd_arch_iamcu:
8a9036a4 217 case bfd_arch_l1om:
7a9068fe 218 case bfd_arch_k1om:
e396998b 219 disassemble = print_insn_i386;
252b5132
RH
220 break;
221#endif
9d751335
JE
222#ifdef ARCH_i860
223 case bfd_arch_i860:
224 disassemble = print_insn_i860;
225 break;
226#endif
252b5132
RH
227#ifdef ARCH_i960
228 case bfd_arch_i960:
229 disassemble = print_insn_i960;
230 break;
231#endif
800eeca4
JW
232#ifdef ARCH_ia64
233 case bfd_arch_ia64:
234 disassemble = print_insn_ia64;
235 break;
236#endif
a40cbfa3
NC
237#ifdef ARCH_ip2k
238 case bfd_arch_ip2k:
239 disassemble = print_insn_ip2k;
240 break;
241#endif
cfb8c092
NC
242#ifdef ARCH_epiphany
243 case bfd_arch_epiphany:
244 disassemble = print_insn_epiphany;
245 break;
246#endif
252b5132
RH
247#ifdef ARCH_fr30
248 case bfd_arch_fr30:
249 disassemble = print_insn_fr30;
250 break;
251#endif
84e94c90
NC
252#ifdef ARCH_lm32
253 case bfd_arch_lm32:
254 disassemble = print_insn_lm32;
255 break;
256#endif
252b5132
RH
257#ifdef ARCH_m32r
258 case bfd_arch_m32r:
259 disassemble = print_insn_m32r;
260 break;
261#endif
6927f982
NC
262#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
263 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC
264 case bfd_arch_m68hc11:
265 disassemble = print_insn_m68hc11;
266 break;
267 case bfd_arch_m68hc12:
268 disassemble = print_insn_m68hc12;
269 break;
6927f982
NC
270 case bfd_arch_m9s12x:
271 disassemble = print_insn_m9s12x;
272 break;
273 case bfd_arch_m9s12xg:
274 disassemble = print_insn_m9s12xg;
275 break;
60bcf0fa 276#endif
252b5132
RH
277#ifdef ARCH_m68k
278 case bfd_arch_m68k:
279 disassemble = print_insn_m68k;
280 break;
281#endif
282#ifdef ARCH_m88k
283 case bfd_arch_m88k:
284 disassemble = print_insn_m88k;
285 break;
286#endif
d031aafb
NS
287#ifdef ARCH_mt
288 case bfd_arch_mt:
289 disassemble = print_insn_mt;
ac188222
DB
290 break;
291#endif
7ba29e2a
NC
292#ifdef ARCH_microblaze
293 case bfd_arch_microblaze:
294 disassemble = print_insn_microblaze;
295 break;
296#endif
2469cfa2
NC
297#ifdef ARCH_msp430
298 case bfd_arch_msp430:
299 disassemble = print_insn_msp430;
300 break;
301#endif
35c08157
KLC
302#ifdef ARCH_nds32
303 case bfd_arch_nds32:
304 disassemble = print_insn_nds32;
305 break;
306#endif
252b5132
RH
307#ifdef ARCH_ns32k
308 case bfd_arch_ns32k:
309 disassemble = print_insn_ns32k;
310 break;
311#endif
312#ifdef ARCH_mcore
313 case bfd_arch_mcore:
314 disassemble = print_insn_mcore;
315 break;
316#endif
bd2f2e55
DB
317#ifdef ARCH_mep
318 case bfd_arch_mep:
319 disassemble = print_insn_mep;
320 break;
321#endif
a3c62988
NC
322#ifdef ARCH_metag
323 case bfd_arch_metag:
324 disassemble = print_insn_metag;
325 break;
326#endif
252b5132
RH
327#ifdef ARCH_mips
328 case bfd_arch_mips:
003ca0fd 329 if (big)
252b5132
RH
330 disassemble = print_insn_big_mips;
331 else
332 disassemble = print_insn_little_mips;
333 break;
334#endif
3c3bdf30
NC
335#ifdef ARCH_mmix
336 case bfd_arch_mmix:
337 disassemble = print_insn_mmix;
338 break;
339#endif
252b5132
RH
340#ifdef ARCH_mn10200
341 case bfd_arch_mn10200:
342 disassemble = print_insn_mn10200;
343 break;
344#endif
345#ifdef ARCH_mn10300
346 case bfd_arch_mn10300:
347 disassemble = print_insn_mn10300;
348 break;
349#endif
36591ba1
SL
350#ifdef ARCH_nios2
351 case bfd_arch_nios2:
003ca0fd 352 if (big)
36591ba1
SL
353 disassemble = print_insn_big_nios2;
354 else
355 disassemble = print_insn_little_nios2;
356 break;
357#endif
73589c9d
CS
358#ifdef ARCH_or1k
359 case bfd_arch_or1k:
360 disassemble = print_insn_or1k;
3b16e843
NC
361 break;
362#endif
e135f41b
NC
363#ifdef ARCH_pdp11
364 case bfd_arch_pdp11:
365 disassemble = print_insn_pdp11;
366 break;
367#endif
1e608f98
ILT
368#ifdef ARCH_pj
369 case bfd_arch_pj:
370 disassemble = print_insn_pj;
371 break;
372#endif
252b5132
RH
373#ifdef ARCH_powerpc
374 case bfd_arch_powerpc:
003ca0fd 375 if (big)
252b5132
RH
376 disassemble = print_insn_big_powerpc;
377 else
378 disassemble = print_insn_little_powerpc;
379 break;
380#endif
11146849
DD
381#ifdef ARCH_pru
382 case bfd_arch_pru:
383 disassemble = print_insn_pru;
384 break;
385#endif
e23eba97
NC
386#ifdef ARCH_riscv
387 case bfd_arch_riscv:
388 disassemble = print_insn_riscv;
ae4c0df4 389 break;
e23eba97 390#endif
252b5132
RH
391#ifdef ARCH_rs6000
392 case bfd_arch_rs6000:
003ca0fd 393 if (mach == bfd_mach_ppc_620)
7f6d05e8
CP
394 disassemble = print_insn_big_powerpc;
395 else
396 disassemble = print_insn_rs6000;
252b5132
RH
397 break;
398#endif
99c513f6
DD
399#ifdef ARCH_rl78
400 case bfd_arch_rl78:
0952813b 401 disassemble = rl78_get_disassembler (abfd);
99c513f6
DD
402 break;
403#endif
c7927a3c
NC
404#ifdef ARCH_rx
405 case bfd_arch_rx:
406 disassemble = print_insn_rx;
407 break;
408#endif
a85d7ed0
NC
409#ifdef ARCH_s390
410 case bfd_arch_s390:
411 disassemble = print_insn_s390;
412 break;
413#endif
1c0d3aa6
NC
414#ifdef ARCH_score
415 case bfd_arch_score:
003ca0fd 416 if (big)
6ca4eb77 417 disassemble = print_insn_big_score;
1c0d3aa6 418 else
6ca4eb77 419 disassemble = print_insn_little_score;
1c0d3aa6
NC
420 break;
421#endif
252b5132
RH
422#ifdef ARCH_sh
423 case bfd_arch_sh:
1c509ca8 424 disassemble = print_insn_sh;
252b5132
RH
425 break;
426#endif
427#ifdef ARCH_sparc
428 case bfd_arch_sparc:
429 disassemble = print_insn_sparc;
430 break;
431#endif
e9f53129
AM
432#ifdef ARCH_spu
433 case bfd_arch_spu:
434 disassemble = print_insn_spu;
435 break;
436#endif
252b5132
RH
437#ifdef ARCH_tic30
438 case bfd_arch_tic30:
439 disassemble = print_insn_tic30;
440 break;
441#endif
026df7c5
NC
442#ifdef ARCH_tic4x
443 case bfd_arch_tic4x:
444 disassemble = print_insn_tic4x;
445 break;
446#endif
5c84d377
TW
447#ifdef ARCH_tic54x
448 case bfd_arch_tic54x:
449 disassemble = print_insn_tic54x;
450 break;
451#endif
40b36596
JM
452#ifdef ARCH_tic6x
453 case bfd_arch_tic6x:
454 disassemble = print_insn_tic6x;
455 break;
456#endif
252b5132
RH
457#ifdef ARCH_tic80
458 case bfd_arch_tic80:
459 disassemble = print_insn_tic80;
460 break;
461#endif
3f8107ab
AM
462#ifdef ARCH_ft32
463 case bfd_arch_ft32:
464 disassemble = print_insn_ft32;
465 break;
466#endif
252b5132
RH
467#ifdef ARCH_v850
468 case bfd_arch_v850:
de863c74 469 case bfd_arch_v850_rh850:
252b5132
RH
470 disassemble = print_insn_v850;
471 break;
472#endif
473#ifdef ARCH_w65
474 case bfd_arch_w65:
475 disassemble = print_insn_w65;
476 break;
477#endif
62ecb94c
PC
478#ifdef ARCH_wasm32
479 case bfd_arch_wasm32:
480 disassemble = print_insn_wasm32;
481 break;
482#endif
f6c1a2d5
NC
483#ifdef ARCH_xgate
484 case bfd_arch_xgate:
485 disassemble = print_insn_xgate;
486 break;
487#endif
93fbbb04
GK
488#ifdef ARCH_xstormy16
489 case bfd_arch_xstormy16:
490 disassemble = print_insn_xstormy16;
491 break;
492#endif
d70c5fc7
NC
493#ifdef ARCH_xc16x
494 case bfd_arch_xc16x:
495 disassemble = print_insn_xc16x;
496 break;
497#endif
e0001a05
NC
498#ifdef ARCH_xtensa
499 case bfd_arch_xtensa:
500 disassemble = print_insn_xtensa;
501 break;
502#endif
3c9b82ba
NC
503#ifdef ARCH_z80
504 case bfd_arch_z80:
505 disassemble = print_insn_z80;
506 break;
507#endif
252b5132
RH
508#ifdef ARCH_z8k
509 case bfd_arch_z8k:
003ca0fd 510 if (mach == bfd_mach_z8001)
252b5132 511 disassemble = print_insn_z8001;
b7ed8fad 512 else
252b5132
RH
513 disassemble = print_insn_z8002;
514 break;
515#endif
516#ifdef ARCH_vax
517 case bfd_arch_vax:
518 disassemble = print_insn_vax;
519 break;
fd3c93d5 520#endif
1945cfa5
EB
521#ifdef ARCH_visium
522 case bfd_arch_visium:
523 disassemble = print_insn_visium;
524 break;
525#endif
fd3c93d5
DB
526#ifdef ARCH_frv
527 case bfd_arch_frv:
528 disassemble = print_insn_frv;
529 break;
47b1a55a 530#endif
59b1530d
AG
531#ifdef ARCH_moxie
532 case bfd_arch_moxie:
533 disassemble = print_insn_moxie;
534 break;
535#endif
47b1a55a
SC
536#ifdef ARCH_iq2000
537 case bfd_arch_iq2000:
538 disassemble = print_insn_iq2000;
539 break;
49f58d10
JB
540#endif
541#ifdef ARCH_m32c
542 case bfd_arch_m32c:
543 disassemble = print_insn_m32c;
544 break;
aa137e4d
NC
545#endif
546#ifdef ARCH_tilegx
547 case bfd_arch_tilegx:
548 disassemble = print_insn_tilegx;
549 break;
550#endif
551#ifdef ARCH_tilepro
552 case bfd_arch_tilepro:
553 disassemble = print_insn_tilepro;
554 break;
252b5132
RH
555#endif
556 default:
557 return 0;
558 }
559 return disassemble;
560}
94470b23
NC
561
562void
e6c7cdec 563disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
94470b23 564{
a06ea964
NC
565#ifdef ARCH_aarch64
566 print_aarch64_disassembler_options (stream);
567#endif
37fd5ef3
CZ
568#ifdef ARCH_arc
569 print_arc_disassembler_options (stream);
570#endif
58efb6c0
NC
571#ifdef ARCH_arm
572 print_arm_disassembler_options (stream);
573#endif
640c0ccd
CD
574#ifdef ARCH_mips
575 print_mips_disassembler_options (stream);
576#endif
07dd56a9
NC
577#ifdef ARCH_powerpc
578 print_ppc_disassembler_options (stream);
579#endif
e23eba97
NC
580#ifdef ARCH_riscv
581 print_riscv_disassembler_options (stream);
582#endif
f59a29b9
L
583#ifdef ARCH_i386
584 print_i386_disassembler_options (stream);
585#endif
112b7c50
AK
586#ifdef ARCH_s390
587 print_s390_disassembler_options (stream);
588#endif
62ecb94c
PC
589#ifdef ARCH_wasm32
590 print_wasm32_disassembler_options (stream);
591#endif
b7ed8fad 592
94470b23
NC
593 return;
594}
22a398e1
NC
595
596void
597disassemble_init_for_target (struct disassemble_info * info)
598{
599 if (info == NULL)
600 return;
601
602 switch (info->arch)
603 {
a06ea964
NC
604#ifdef ARCH_aarch64
605 case bfd_arch_aarch64:
606 info->symbol_is_valid = aarch64_symbol_is_valid;
607 info->disassembler_needs_relocs = TRUE;
608 break;
609#endif
22a398e1
NC
610#ifdef ARCH_arm
611 case bfd_arch_arm:
612 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 613 info->disassembler_needs_relocs = TRUE;
22a398e1 614 break;
0bcb06d2
AS
615#endif
616#ifdef ARCH_ia64
617 case bfd_arch_ia64:
618 info->skip_zeroes = 16;
619 break;
620#endif
621#ifdef ARCH_tic4x
622 case bfd_arch_tic4x:
623 info->skip_zeroes = 32;
fb53f5a8 624 break;
49f58d10 625#endif
bd2f2e55
DB
626#ifdef ARCH_mep
627 case bfd_arch_mep:
628 info->skip_zeroes = 256;
629 info->skip_zeroes_at_end = 0;
630 break;
631#endif
a3c62988
NC
632#ifdef ARCH_metag
633 case bfd_arch_metag:
634 info->disassembler_needs_relocs = TRUE;
635 break;
636#endif
49f58d10
JB
637#ifdef ARCH_m32c
638 case bfd_arch_m32c:
6ca4eb77
AM
639 /* This processor in fact is little endian. The value set here
640 reflects the way opcodes are written in the cgen description. */
49f58d10 641 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB
642 if (! info->insn_sets)
643 {
644 info->insn_sets = cgen_bitset_create (ISA_MAX);
645 if (info->mach == bfd_mach_m16c)
646 cgen_bitset_set (info->insn_sets, ISA_M16C);
647 else
648 cgen_bitset_set (info->insn_sets, ISA_M32C);
649 }
49f58d10 650 break;
b240011a
AM
651#endif
652#ifdef ARCH_powerpc
653 case bfd_arch_powerpc:
654#endif
655#ifdef ARCH_rs6000
656 case bfd_arch_rs6000:
657#endif
658#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
659 disassemble_init_powerpc (info);
660 break;
65b48a81 661#endif
62ecb94c
PC
662#ifdef ARCH_wasm32
663 case bfd_arch_wasm32:
664 disassemble_init_wasm32 (info);
665 break;
666#endif
65b48a81
PB
667#ifdef ARCH_s390
668 case bfd_arch_s390:
669 disassemble_init_s390 (info);
670 break;
22a398e1
NC
671#endif
672 default:
673 break;
674 }
675}
65b48a81
PB
676
677/* Remove whitespace and consecutive commas from OPTIONS. */
678
679char *
680remove_whitespace_and_extra_commas (char *options)
681{
682 char *str;
683 size_t i, len;
684
685 if (options == NULL)
686 return NULL;
687
688 /* Strip off all trailing whitespace and commas. */
689 for (len = strlen (options); len > 0; len--)
690 {
691 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
692 break;
693 options[len - 1] = '\0';
694 }
695
696 /* Convert all remaining whitespace to commas. */
697 for (i = 0; options[i] != '\0'; i++)
698 if (ISSPACE (options[i]))
699 options[i] = ',';
700
701 /* Remove consecutive commas. */
702 for (str = options; *str != '\0'; str++)
703 if (*str == ',' && (*(str + 1) == ',' || str == options))
704 {
705 char *next = str + 1;
706 while (*next == ',')
707 next++;
708 len = strlen (next);
709 if (str != options)
710 str++;
711 memmove (str, next, len);
712 next[len - (size_t)(next - str)] = '\0';
713 }
714 return (strlen (options) != 0) ? options : NULL;
715}
716
717/* Like STRCMP, but treat ',' the same as '\0' so that we match
718 strings like "foobar" against "foobar,xxyyzz,...". */
719
720int
721disassembler_options_cmp (const char *s1, const char *s2)
722{
723 unsigned char c1, c2;
724
725 do
726 {
727 c1 = (unsigned char) *s1++;
728 if (c1 == ',')
729 c1 = '\0';
730 c2 = (unsigned char) *s2++;
731 if (c2 == ',')
732 c2 = '\0';
733 if (c1 == '\0')
734 return c1 - c2;
735 }
736 while (c1 == c2);
737
738 return c1 - c2;
739}
This page took 0.901028 seconds and 4 git commands to generate.