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FT32 initial support
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
b90efa5b 2 Copyright (C) 1994-2015 Free Software Foundation, Inc.
252b5132 3
9b201bb5
NC		 4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7499d566 7 it under the terms of the GNU General Public License as published by
9b201bb5 8 the Free Software Foundation; either version 3 of the License, or
7499d566 9 (at your option) any later version.
252b5132 10
7499d566
NC		 11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
7499d566
NC		 16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
9b201bb5
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
0d8dfecf 21#include "sysdep.h"
252b5132
RH		 22#include "dis-asm.h"
23
24#ifdef ARCH_all
a06ea964 25#define ARCH_aarch64
252b5132
RH		 26#define ARCH_alpha
27#define ARCH_arc
28#define ARCH_arm
adde6300 29#define ARCH_avr
4b7f6baa 30#define ARCH_bfin
3d3d428f 31#define ARCH_cr16
6c95a37f 32#define ARCH_cris
1fe1f39c 33#define ARCH_crx
252b5132
RH		 34#define ARCH_d10v
35#define ARCH_d30v
d172d4ba 36#define ARCH_dlx
56b13185 37#define ARCH_epiphany
e729279b
NC		 38#define ARCH_fr30
39#define ARCH_frv
3f8107ab 40#define ARCH_ft32
252b5132
RH		 41#define ARCH_h8300
42#define ARCH_h8500
43#define ARCH_hppa
5b93d8bb 44#define ARCH_i370
252b5132 45#define ARCH_i386
9d751335 46#define ARCH_i860
252b5132 47#define ARCH_i960
800eeca4 48#define ARCH_ia64
e729279b
NC		 49#define ARCH_ip2k
50#define ARCH_iq2000
84e94c90 51#define ARCH_lm32
e729279b 52#define ARCH_m32c
252b5132 53#define ARCH_m32r
60bcf0fa
NC		 54#define ARCH_m68hc11
55#define ARCH_m68hc12
e729279b 56#define ARCH_m68k
252b5132
RH		 57#define ARCH_m88k
58#define ARCH_mcore
bd2f2e55 59#define ARCH_mep
a3c62988 60#define ARCH_metag
7ba29e2a 61#define ARCH_microblaze
252b5132 62#define ARCH_mips
3c3bdf30 63#define ARCH_mmix
252b5132
RH		 64#define ARCH_mn10200
65#define ARCH_mn10300
59b1530d 66#define ARCH_moxie
d031aafb 67#define ARCH_mt
2469cfa2 68#define ARCH_msp430
35c08157 69#define ARCH_nds32
36591ba1 70#define ARCH_nios2
252b5132 71#define ARCH_ns32k
73589c9d 72#define ARCH_or1k
e135f41b 73#define ARCH_pdp11
1e608f98 74#define ARCH_pj
252b5132
RH		 75#define ARCH_powerpc
76#define ARCH_rs6000
99c513f6 77#define ARCH_rl78
c7927a3c 78#define ARCH_rx
a85d7ed0 79#define ARCH_s390
1c0d3aa6 80#define ARCH_score
252b5132
RH		 81#define ARCH_sh
82#define ARCH_sparc
e9f53129 83#define ARCH_spu
252b5132 84#define ARCH_tic30
026df7c5 85#define ARCH_tic4x
5c84d377 86#define ARCH_tic54x
40b36596 87#define ARCH_tic6x
252b5132 88#define ARCH_tic80
aa137e4d
NC		 89#define ARCH_tilegx
90#define ARCH_tilepro
252b5132
RH		 91#define ARCH_v850
92#define ARCH_vax
1945cfa5 93#define ARCH_visium
252b5132 94#define ARCH_w65
93fbbb04 95#define ARCH_xstormy16
d70c5fc7 96#define ARCH_xc16x
f6c1a2d5 97#define ARCH_xgate
e0001a05 98#define ARCH_xtensa
3c9b82ba 99#define ARCH_z80
252b5132 100#define ARCH_z8k
d28847ce 101#define INCLUDE_SHMEDIA
252b5132
RH		 102#endif
103
49f58d10
JB		 104#ifdef ARCH_m32c
105#include "m32c-desc.h"
106#endif
252b5132
RH		 107
108disassembler_ftype
109disassembler (abfd)
110 bfd *abfd;
111{
112 enum bfd_architecture a = bfd_get_arch (abfd);
113 disassembler_ftype disassemble;
114
115 switch (a)
116 {
117 /* If you add a case to this table, also add it to the
118 ARCH_all definition right above this function. */
a06ea964
NC		 119#ifdef ARCH_aarch64
120 case bfd_arch_aarch64:
121 disassemble = print_insn_aarch64;
122 break;
123#endif
252b5132
RH		 124#ifdef ARCH_alpha
125 case bfd_arch_alpha:
126 disassemble = print_insn_alpha;
127 break;
128#endif
129#ifdef ARCH_arc
130 case bfd_arch_arc:
6ca4eb77
AM		 131 disassemble = arc_get_disassembler (abfd);
132 break;
252b5132
RH		 133#endif
134#ifdef ARCH_arm
135 case bfd_arch_arm:
136 if (bfd_big_endian (abfd))
137 disassemble = print_insn_big_arm;
138 else
139 disassemble = print_insn_little_arm;
140 break;
141#endif
adde6300
AM		 142#ifdef ARCH_avr
143 case bfd_arch_avr:
144 disassemble = print_insn_avr;
145 break;
146#endif
4b7f6baa
CM		 147#ifdef ARCH_bfin
148 case bfd_arch_bfin:
149 disassemble = print_insn_bfin;
150 break;
151#endif
3d3d428f
NC		 152#ifdef ARCH_cr16
153 case bfd_arch_cr16:
154 disassemble = print_insn_cr16;
155 break;
156#endif
6c95a37f
HPN		 157#ifdef ARCH_cris
158 case bfd_arch_cris:
78966507 159 disassemble = cris_get_disassembler (abfd);
6c95a37f 160 break;
1fe1f39c
NC		 161#endif
162#ifdef ARCH_crx
163 case bfd_arch_crx:
164 disassemble = print_insn_crx;
165 break;
6c95a37f 166#endif
252b5132
RH		 167#ifdef ARCH_d10v
168 case bfd_arch_d10v:
169 disassemble = print_insn_d10v;
170 break;
171#endif
172#ifdef ARCH_d30v
173 case bfd_arch_d30v:
174 disassemble = print_insn_d30v;
175 break;
176#endif
d172d4ba
NC		 177#ifdef ARCH_dlx
178 case bfd_arch_dlx:
179 /* As far as I know we only handle big-endian DLX objects. */
180 disassemble = print_insn_dlx;
181 break;
182#endif
252b5132
RH		 183#ifdef ARCH_h8300
184 case bfd_arch_h8300:
049f8936
NC		 185 if (bfd_get_mach (abfd) == bfd_mach_h8300h
186 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 187 disassemble = print_insn_h8300h;
049f8936 188 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 189 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO		 190 || bfd_get_mach (abfd) == bfd_mach_h8300sx
191 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 192 disassemble = print_insn_h8300s;
b7ed8fad 193 else
252b5132
RH		 194 disassemble = print_insn_h8300;
195 break;
196#endif
197#ifdef ARCH_h8500
198 case bfd_arch_h8500:
199 disassemble = print_insn_h8500;
200 break;
201#endif
202#ifdef ARCH_hppa
203 case bfd_arch_hppa:
204 disassemble = print_insn_hppa;
205 break;
206#endif
5b93d8bb
AM		 207#ifdef ARCH_i370
208 case bfd_arch_i370:
209 disassemble = print_insn_i370;
210 break;
211#endif
252b5132
RH		 212#ifdef ARCH_i386
213 case bfd_arch_i386:
8a9036a4 214 case bfd_arch_l1om:
7a9068fe 215 case bfd_arch_k1om:
e396998b 216 disassemble = print_insn_i386;
252b5132
RH		 217 break;
218#endif
9d751335
JE		 219#ifdef ARCH_i860
220 case bfd_arch_i860:
221 disassemble = print_insn_i860;
222 break;
223#endif
252b5132
RH		 224#ifdef ARCH_i960
225 case bfd_arch_i960:
226 disassemble = print_insn_i960;
227 break;
228#endif
800eeca4
JW		 229#ifdef ARCH_ia64
230 case bfd_arch_ia64:
231 disassemble = print_insn_ia64;
232 break;
233#endif
a40cbfa3
NC		 234#ifdef ARCH_ip2k
235 case bfd_arch_ip2k:
236 disassemble = print_insn_ip2k;
237 break;
238#endif
cfb8c092
NC		 239#ifdef ARCH_epiphany
240 case bfd_arch_epiphany:
241 disassemble = print_insn_epiphany;
242 break;
243#endif
252b5132
RH		 244#ifdef ARCH_fr30
245 case bfd_arch_fr30:
246 disassemble = print_insn_fr30;
247 break;
248#endif
84e94c90
NC		 249#ifdef ARCH_lm32
250 case bfd_arch_lm32:
251 disassemble = print_insn_lm32;
252 break;
253#endif
252b5132
RH		 254#ifdef ARCH_m32r
255 case bfd_arch_m32r:
256 disassemble = print_insn_m32r;
257 break;
258#endif
6927f982
NC		 259#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
260 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC		 261 case bfd_arch_m68hc11:
262 disassemble = print_insn_m68hc11;
263 break;
264 case bfd_arch_m68hc12:
265 disassemble = print_insn_m68hc12;
266 break;
6927f982
NC		 267 case bfd_arch_m9s12x:
268 disassemble = print_insn_m9s12x;
269 break;
270 case bfd_arch_m9s12xg:
271 disassemble = print_insn_m9s12xg;
272 break;
60bcf0fa 273#endif
252b5132
RH		 274#ifdef ARCH_m68k
275 case bfd_arch_m68k:
276 disassemble = print_insn_m68k;
277 break;
278#endif
279#ifdef ARCH_m88k
280 case bfd_arch_m88k:
281 disassemble = print_insn_m88k;
282 break;
283#endif
d031aafb
NS		 284#ifdef ARCH_mt
285 case bfd_arch_mt:
286 disassemble = print_insn_mt;
ac188222
DB		 287 break;
288#endif
7ba29e2a
NC		 289#ifdef ARCH_microblaze
290 case bfd_arch_microblaze:
291 disassemble = print_insn_microblaze;
292 break;
293#endif
2469cfa2
NC		 294#ifdef ARCH_msp430
295 case bfd_arch_msp430:
296 disassemble = print_insn_msp430;
297 break;
298#endif
35c08157
KLC		 299#ifdef ARCH_nds32
300 case bfd_arch_nds32:
301 disassemble = print_insn_nds32;
302 break;
303#endif
252b5132
RH		 304#ifdef ARCH_ns32k
305 case bfd_arch_ns32k:
306 disassemble = print_insn_ns32k;
307 break;
308#endif
309#ifdef ARCH_mcore
310 case bfd_arch_mcore:
311 disassemble = print_insn_mcore;
312 break;
313#endif
bd2f2e55
DB		 314#ifdef ARCH_mep
315 case bfd_arch_mep:
316 disassemble = print_insn_mep;
317 break;
318#endif
a3c62988
NC		 319#ifdef ARCH_metag
320 case bfd_arch_metag:
321 disassemble = print_insn_metag;
322 break;
323#endif
252b5132
RH		 324#ifdef ARCH_mips
325 case bfd_arch_mips:
326 if (bfd_big_endian (abfd))
327 disassemble = print_insn_big_mips;
328 else
329 disassemble = print_insn_little_mips;
330 break;
331#endif
3c3bdf30
NC		 332#ifdef ARCH_mmix
333 case bfd_arch_mmix:
334 disassemble = print_insn_mmix;
335 break;
336#endif
252b5132
RH		 337#ifdef ARCH_mn10200
338 case bfd_arch_mn10200:
339 disassemble = print_insn_mn10200;
340 break;
341#endif
342#ifdef ARCH_mn10300
343 case bfd_arch_mn10300:
344 disassemble = print_insn_mn10300;
345 break;
346#endif
36591ba1
SL		 347#ifdef ARCH_nios2
348 case bfd_arch_nios2:
349 if (bfd_big_endian (abfd))
350 disassemble = print_insn_big_nios2;
351 else
352 disassemble = print_insn_little_nios2;
353 break;
354#endif
73589c9d
CS		 355#ifdef ARCH_or1k
356 case bfd_arch_or1k:
357 disassemble = print_insn_or1k;
3b16e843
NC		 358 break;
359#endif
e135f41b
NC		 360#ifdef ARCH_pdp11
361 case bfd_arch_pdp11:
362 disassemble = print_insn_pdp11;
363 break;
364#endif
1e608f98
ILT		 365#ifdef ARCH_pj
366 case bfd_arch_pj:
367 disassemble = print_insn_pj;
368 break;
369#endif
252b5132
RH		 370#ifdef ARCH_powerpc
371 case bfd_arch_powerpc:
372 if (bfd_big_endian (abfd))
373 disassemble = print_insn_big_powerpc;
374 else
375 disassemble = print_insn_little_powerpc;
376 break;
377#endif
378#ifdef ARCH_rs6000
379 case bfd_arch_rs6000:
39c20e8f 380 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP		 381 disassemble = print_insn_big_powerpc;
382 else
383 disassemble = print_insn_rs6000;
252b5132
RH		 384 break;
385#endif
99c513f6
DD		 386#ifdef ARCH_rl78
387 case bfd_arch_rl78:
388 disassemble = print_insn_rl78;
389 break;
390#endif
c7927a3c
NC		 391#ifdef ARCH_rx
392 case bfd_arch_rx:
393 disassemble = print_insn_rx;
394 break;
395#endif
a85d7ed0
NC		 396#ifdef ARCH_s390
397 case bfd_arch_s390:
398 disassemble = print_insn_s390;
399 break;
400#endif
1c0d3aa6
NC		 401#ifdef ARCH_score
402 case bfd_arch_score:
403 if (bfd_big_endian (abfd))
6ca4eb77 404 disassemble = print_insn_big_score;
1c0d3aa6 405 else
6ca4eb77 406 disassemble = print_insn_little_score;
1c0d3aa6
NC		 407 break;
408#endif
252b5132
RH		 409#ifdef ARCH_sh
410 case bfd_arch_sh:
1c509ca8 411 disassemble = print_insn_sh;
252b5132
RH		 412 break;
413#endif
414#ifdef ARCH_sparc
415 case bfd_arch_sparc:
416 disassemble = print_insn_sparc;
417 break;
418#endif
e9f53129
AM		 419#ifdef ARCH_spu
420 case bfd_arch_spu:
421 disassemble = print_insn_spu;
422 break;
423#endif
252b5132
RH		 424#ifdef ARCH_tic30
425 case bfd_arch_tic30:
426 disassemble = print_insn_tic30;
427 break;
428#endif
026df7c5
NC		 429#ifdef ARCH_tic4x
430 case bfd_arch_tic4x:
431 disassemble = print_insn_tic4x;
432 break;
433#endif
5c84d377
TW		 434#ifdef ARCH_tic54x
435 case bfd_arch_tic54x:
436 disassemble = print_insn_tic54x;
437 break;
438#endif
40b36596
JM		 439#ifdef ARCH_tic6x
440 case bfd_arch_tic6x:
441 disassemble = print_insn_tic6x;
442 break;
443#endif
252b5132
RH		 444#ifdef ARCH_tic80
445 case bfd_arch_tic80:
446 disassemble = print_insn_tic80;
447 break;
448#endif
3f8107ab
AM		 449#ifdef ARCH_ft32
450 case bfd_arch_ft32:
451 disassemble = print_insn_ft32;
452 break;
453#endif
252b5132
RH		 454#ifdef ARCH_v850
455 case bfd_arch_v850:
de863c74 456 case bfd_arch_v850_rh850:
252b5132
RH		 457 disassemble = print_insn_v850;
458 break;
459#endif
460#ifdef ARCH_w65
461 case bfd_arch_w65:
462 disassemble = print_insn_w65;
463 break;
464#endif
f6c1a2d5
NC		 465#ifdef ARCH_xgate
466 case bfd_arch_xgate:
467 disassemble = print_insn_xgate;
468 break;
469#endif
93fbbb04
GK		 470#ifdef ARCH_xstormy16
471 case bfd_arch_xstormy16:
472 disassemble = print_insn_xstormy16;
473 break;
474#endif
d70c5fc7
NC		 475#ifdef ARCH_xc16x
476 case bfd_arch_xc16x:
477 disassemble = print_insn_xc16x;
478 break;
479#endif
e0001a05
NC		 480#ifdef ARCH_xtensa
481 case bfd_arch_xtensa:
482 disassemble = print_insn_xtensa;
483 break;
484#endif
3c9b82ba
NC		 485#ifdef ARCH_z80
486 case bfd_arch_z80:
487 disassemble = print_insn_z80;
488 break;
489#endif
252b5132
RH		 490#ifdef ARCH_z8k
491 case bfd_arch_z8k:
492 if (bfd_get_mach(abfd) == bfd_mach_z8001)
493 disassemble = print_insn_z8001;
b7ed8fad 494 else
252b5132
RH		 495 disassemble = print_insn_z8002;
496 break;
497#endif
498#ifdef ARCH_vax
499 case bfd_arch_vax:
500 disassemble = print_insn_vax;
501 break;
fd3c93d5 502#endif
1945cfa5
EB		 503#ifdef ARCH_visium
504 case bfd_arch_visium:
505 disassemble = print_insn_visium;
506 break;
507#endif
fd3c93d5
DB		 508#ifdef ARCH_frv
509 case bfd_arch_frv:
510 disassemble = print_insn_frv;
511 break;
47b1a55a 512#endif
59b1530d
AG		 513#ifdef ARCH_moxie
514 case bfd_arch_moxie:
515 disassemble = print_insn_moxie;
516 break;
517#endif
47b1a55a
SC		 518#ifdef ARCH_iq2000
519 case bfd_arch_iq2000:
520 disassemble = print_insn_iq2000;
521 break;
49f58d10
JB		 522#endif
523#ifdef ARCH_m32c
524 case bfd_arch_m32c:
525 disassemble = print_insn_m32c;
526 break;
aa137e4d
NC		 527#endif
528#ifdef ARCH_tilegx
529 case bfd_arch_tilegx:
530 disassemble = print_insn_tilegx;
531 break;
532#endif
533#ifdef ARCH_tilepro
534 case bfd_arch_tilepro:
535 disassemble = print_insn_tilepro;
536 break;
252b5132
RH		 537#endif
538 default:
539 return 0;
540 }
541 return disassemble;
542}
94470b23
NC		 543
544void
9aaaa291 545disassembler_usage (stream)
7f32bebc 546 FILE * stream ATTRIBUTE_UNUSED;
94470b23 547{
a06ea964
NC		 548#ifdef ARCH_aarch64
549 print_aarch64_disassembler_options (stream);
550#endif
58efb6c0
NC		 551#ifdef ARCH_arm
552 print_arm_disassembler_options (stream);
553#endif
640c0ccd
CD		 554#ifdef ARCH_mips
555 print_mips_disassembler_options (stream);
556#endif
07dd56a9
NC		 557#ifdef ARCH_powerpc
558 print_ppc_disassembler_options (stream);
559#endif
f59a29b9
L		 560#ifdef ARCH_i386
561 print_i386_disassembler_options (stream);
562#endif
112b7c50
AK		 563#ifdef ARCH_s390
564 print_s390_disassembler_options (stream);
565#endif
b7ed8fad 566
94470b23
NC		 567 return;
568}
22a398e1
NC		 569
570void
571disassemble_init_for_target (struct disassemble_info * info)
572{
573 if (info == NULL)
574 return;
575
576 switch (info->arch)
577 {
a06ea964
NC		 578#ifdef ARCH_aarch64
579 case bfd_arch_aarch64:
580 info->symbol_is_valid = aarch64_symbol_is_valid;
581 info->disassembler_needs_relocs = TRUE;
582 break;
583#endif
22a398e1
NC		 584#ifdef ARCH_arm
585 case bfd_arch_arm:
586 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 587 info->disassembler_needs_relocs = TRUE;
22a398e1 588 break;
0bcb06d2
AS		 589#endif
590#ifdef ARCH_ia64
591 case bfd_arch_ia64:
592 info->skip_zeroes = 16;
593 break;
594#endif
595#ifdef ARCH_tic4x
596 case bfd_arch_tic4x:
597 info->skip_zeroes = 32;
fb53f5a8 598 break;
49f58d10 599#endif
bd2f2e55
DB		 600#ifdef ARCH_mep
601 case bfd_arch_mep:
602 info->skip_zeroes = 256;
603 info->skip_zeroes_at_end = 0;
604 break;
605#endif
a3c62988
NC		 606#ifdef ARCH_metag
607 case bfd_arch_metag:
608 info->disassembler_needs_relocs = TRUE;
609 break;
610#endif
49f58d10
JB		 611#ifdef ARCH_m32c
612 case bfd_arch_m32c:
6ca4eb77
AM		 613 /* This processor in fact is little endian. The value set here
614 reflects the way opcodes are written in the cgen description. */
49f58d10 615 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB		 616 if (! info->insn_sets)
617 {
618 info->insn_sets = cgen_bitset_create (ISA_MAX);
619 if (info->mach == bfd_mach_m16c)
620 cgen_bitset_set (info->insn_sets, ISA_M16C);
621 else
622 cgen_bitset_set (info->insn_sets, ISA_M32C);
623 }
49f58d10 624 break;
b240011a
AM		 625#endif
626#ifdef ARCH_powerpc
627 case bfd_arch_powerpc:
628#endif
629#ifdef ARCH_rs6000
630 case bfd_arch_rs6000:
631#endif
632#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
633 disassemble_init_powerpc (info);
634 break;
22a398e1
NC		 635#endif
636 default:
637 break;
638 }
639}
GDB Binutils - Deliverables
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