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Remove support for the (deprecated) openrisc and or32 configurations and replace
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
4b95cf5c 2 Copyright (C) 1994-2014 Free Software Foundation, Inc.
252b5132 3
9b201bb5
NC		 4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7499d566 7 it under the terms of the GNU General Public License as published by
9b201bb5 8 the Free Software Foundation; either version 3 of the License, or
7499d566 9 (at your option) any later version.
252b5132 10
7499d566
NC		 11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
7499d566
NC		 16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
9b201bb5
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
0d8dfecf 21#include "sysdep.h"
252b5132
RH		 22#include "dis-asm.h"
23
24#ifdef ARCH_all
a06ea964 25#define ARCH_aarch64
252b5132
RH		 26#define ARCH_alpha
27#define ARCH_arc
28#define ARCH_arm
adde6300 29#define ARCH_avr
4b7f6baa 30#define ARCH_bfin
3d3d428f 31#define ARCH_cr16
6c95a37f 32#define ARCH_cris
1fe1f39c 33#define ARCH_crx
252b5132
RH		 34#define ARCH_d10v
35#define ARCH_d30v
d172d4ba 36#define ARCH_dlx
56b13185 37#define ARCH_epiphany
e729279b
NC		 38#define ARCH_fr30
39#define ARCH_frv
252b5132
RH		 40#define ARCH_h8300
41#define ARCH_h8500
42#define ARCH_hppa
5b93d8bb 43#define ARCH_i370
252b5132 44#define ARCH_i386
9d751335 45#define ARCH_i860
252b5132 46#define ARCH_i960
800eeca4 47#define ARCH_ia64
e729279b
NC		 48#define ARCH_ip2k
49#define ARCH_iq2000
84e94c90 50#define ARCH_lm32
e729279b 51#define ARCH_m32c
252b5132 52#define ARCH_m32r
60bcf0fa
NC		 53#define ARCH_m68hc11
54#define ARCH_m68hc12
e729279b 55#define ARCH_m68k
252b5132
RH		 56#define ARCH_m88k
57#define ARCH_mcore
bd2f2e55 58#define ARCH_mep
a3c62988 59#define ARCH_metag
7ba29e2a 60#define ARCH_microblaze
252b5132 61#define ARCH_mips
3c3bdf30 62#define ARCH_mmix
252b5132
RH		 63#define ARCH_mn10200
64#define ARCH_mn10300
59b1530d 65#define ARCH_moxie
d031aafb 66#define ARCH_mt
2469cfa2 67#define ARCH_msp430
35c08157 68#define ARCH_nds32
36591ba1 69#define ARCH_nios2
252b5132 70#define ARCH_ns32k
73589c9d 71#define ARCH_or1k
e135f41b 72#define ARCH_pdp11
1e608f98 73#define ARCH_pj
252b5132
RH		 74#define ARCH_powerpc
75#define ARCH_rs6000
99c513f6 76#define ARCH_rl78
c7927a3c 77#define ARCH_rx
a85d7ed0 78#define ARCH_s390
1c0d3aa6 79#define ARCH_score
252b5132
RH		 80#define ARCH_sh
81#define ARCH_sparc
e9f53129 82#define ARCH_spu
252b5132 83#define ARCH_tic30
026df7c5 84#define ARCH_tic4x
5c84d377 85#define ARCH_tic54x
40b36596 86#define ARCH_tic6x
252b5132 87#define ARCH_tic80
aa137e4d
NC		 88#define ARCH_tilegx
89#define ARCH_tilepro
252b5132
RH		 90#define ARCH_v850
91#define ARCH_vax
92#define ARCH_w65
93fbbb04 93#define ARCH_xstormy16
d70c5fc7 94#define ARCH_xc16x
f6c1a2d5 95#define ARCH_xgate
e0001a05 96#define ARCH_xtensa
3c9b82ba 97#define ARCH_z80
252b5132 98#define ARCH_z8k
d28847ce 99#define INCLUDE_SHMEDIA
252b5132
RH		 100#endif
101
49f58d10
JB		 102#ifdef ARCH_m32c
103#include "m32c-desc.h"
104#endif
252b5132
RH		 105
106disassembler_ftype
107disassembler (abfd)
108 bfd *abfd;
109{
110 enum bfd_architecture a = bfd_get_arch (abfd);
111 disassembler_ftype disassemble;
112
113 switch (a)
114 {
115 /* If you add a case to this table, also add it to the
116 ARCH_all definition right above this function. */
a06ea964
NC		 117#ifdef ARCH_aarch64
118 case bfd_arch_aarch64:
119 disassemble = print_insn_aarch64;
120 break;
121#endif
252b5132
RH		 122#ifdef ARCH_alpha
123 case bfd_arch_alpha:
124 disassemble = print_insn_alpha;
125 break;
126#endif
127#ifdef ARCH_arc
128 case bfd_arch_arc:
6ca4eb77
AM		 129 disassemble = arc_get_disassembler (abfd);
130 break;
252b5132
RH		 131#endif
132#ifdef ARCH_arm
133 case bfd_arch_arm:
134 if (bfd_big_endian (abfd))
135 disassemble = print_insn_big_arm;
136 else
137 disassemble = print_insn_little_arm;
138 break;
139#endif
adde6300
AM		 140#ifdef ARCH_avr
141 case bfd_arch_avr:
142 disassemble = print_insn_avr;
143 break;
144#endif
4b7f6baa
CM		 145#ifdef ARCH_bfin
146 case bfd_arch_bfin:
147 disassemble = print_insn_bfin;
148 break;
149#endif
3d3d428f
NC		 150#ifdef ARCH_cr16
151 case bfd_arch_cr16:
152 disassemble = print_insn_cr16;
153 break;
154#endif
6c95a37f
HPN		 155#ifdef ARCH_cris
156 case bfd_arch_cris:
78966507 157 disassemble = cris_get_disassembler (abfd);
6c95a37f 158 break;
1fe1f39c
NC		 159#endif
160#ifdef ARCH_crx
161 case bfd_arch_crx:
162 disassemble = print_insn_crx;
163 break;
6c95a37f 164#endif
252b5132
RH		 165#ifdef ARCH_d10v
166 case bfd_arch_d10v:
167 disassemble = print_insn_d10v;
168 break;
169#endif
170#ifdef ARCH_d30v
171 case bfd_arch_d30v:
172 disassemble = print_insn_d30v;
173 break;
174#endif
d172d4ba
NC		 175#ifdef ARCH_dlx
176 case bfd_arch_dlx:
177 /* As far as I know we only handle big-endian DLX objects. */
178 disassemble = print_insn_dlx;
179 break;
180#endif
252b5132
RH		 181#ifdef ARCH_h8300
182 case bfd_arch_h8300:
049f8936
NC		 183 if (bfd_get_mach (abfd) == bfd_mach_h8300h
184 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 185 disassemble = print_insn_h8300h;
049f8936 186 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 187 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO		 188 || bfd_get_mach (abfd) == bfd_mach_h8300sx
189 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 190 disassemble = print_insn_h8300s;
b7ed8fad 191 else
252b5132
RH		 192 disassemble = print_insn_h8300;
193 break;
194#endif
195#ifdef ARCH_h8500
196 case bfd_arch_h8500:
197 disassemble = print_insn_h8500;
198 break;
199#endif
200#ifdef ARCH_hppa
201 case bfd_arch_hppa:
202 disassemble = print_insn_hppa;
203 break;
204#endif
5b93d8bb
AM		 205#ifdef ARCH_i370
206 case bfd_arch_i370:
207 disassemble = print_insn_i370;
208 break;
209#endif
252b5132
RH		 210#ifdef ARCH_i386
211 case bfd_arch_i386:
8a9036a4 212 case bfd_arch_l1om:
7a9068fe 213 case bfd_arch_k1om:
e396998b 214 disassemble = print_insn_i386;
252b5132
RH		 215 break;
216#endif
9d751335
JE		 217#ifdef ARCH_i860
218 case bfd_arch_i860:
219 disassemble = print_insn_i860;
220 break;
221#endif
252b5132
RH		 222#ifdef ARCH_i960
223 case bfd_arch_i960:
224 disassemble = print_insn_i960;
225 break;
226#endif
800eeca4
JW		 227#ifdef ARCH_ia64
228 case bfd_arch_ia64:
229 disassemble = print_insn_ia64;
230 break;
231#endif
a40cbfa3
NC		 232#ifdef ARCH_ip2k
233 case bfd_arch_ip2k:
234 disassemble = print_insn_ip2k;
235 break;
236#endif
cfb8c092
NC		 237#ifdef ARCH_epiphany
238 case bfd_arch_epiphany:
239 disassemble = print_insn_epiphany;
240 break;
241#endif
252b5132
RH		 242#ifdef ARCH_fr30
243 case bfd_arch_fr30:
244 disassemble = print_insn_fr30;
245 break;
246#endif
84e94c90
NC		 247#ifdef ARCH_lm32
248 case bfd_arch_lm32:
249 disassemble = print_insn_lm32;
250 break;
251#endif
252b5132
RH		 252#ifdef ARCH_m32r
253 case bfd_arch_m32r:
254 disassemble = print_insn_m32r;
255 break;
256#endif
6927f982
NC		 257#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
258 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC		 259 case bfd_arch_m68hc11:
260 disassemble = print_insn_m68hc11;
261 break;
262 case bfd_arch_m68hc12:
263 disassemble = print_insn_m68hc12;
264 break;
6927f982
NC		 265 case bfd_arch_m9s12x:
266 disassemble = print_insn_m9s12x;
267 break;
268 case bfd_arch_m9s12xg:
269 disassemble = print_insn_m9s12xg;
270 break;
60bcf0fa 271#endif
252b5132
RH		 272#ifdef ARCH_m68k
273 case bfd_arch_m68k:
274 disassemble = print_insn_m68k;
275 break;
276#endif
277#ifdef ARCH_m88k
278 case bfd_arch_m88k:
279 disassemble = print_insn_m88k;
280 break;
281#endif
d031aafb
NS		 282#ifdef ARCH_mt
283 case bfd_arch_mt:
284 disassemble = print_insn_mt;
ac188222
DB		 285 break;
286#endif
7ba29e2a
NC		 287#ifdef ARCH_microblaze
288 case bfd_arch_microblaze:
289 disassemble = print_insn_microblaze;
290 break;
291#endif
2469cfa2
NC		 292#ifdef ARCH_msp430
293 case bfd_arch_msp430:
294 disassemble = print_insn_msp430;
295 break;
296#endif
35c08157
KLC		 297#ifdef ARCH_nds32
298 case bfd_arch_nds32:
299 disassemble = print_insn_nds32;
300 break;
301#endif
252b5132
RH		 302#ifdef ARCH_ns32k
303 case bfd_arch_ns32k:
304 disassemble = print_insn_ns32k;
305 break;
306#endif
307#ifdef ARCH_mcore
308 case bfd_arch_mcore:
309 disassemble = print_insn_mcore;
310 break;
311#endif
bd2f2e55
DB		 312#ifdef ARCH_mep
313 case bfd_arch_mep:
314 disassemble = print_insn_mep;
315 break;
316#endif
a3c62988
NC		 317#ifdef ARCH_metag
318 case bfd_arch_metag:
319 disassemble = print_insn_metag;
320 break;
321#endif
252b5132
RH		 322#ifdef ARCH_mips
323 case bfd_arch_mips:
324 if (bfd_big_endian (abfd))
325 disassemble = print_insn_big_mips;
326 else
327 disassemble = print_insn_little_mips;
328 break;
329#endif
3c3bdf30
NC		 330#ifdef ARCH_mmix
331 case bfd_arch_mmix:
332 disassemble = print_insn_mmix;
333 break;
334#endif
252b5132
RH		 335#ifdef ARCH_mn10200
336 case bfd_arch_mn10200:
337 disassemble = print_insn_mn10200;
338 break;
339#endif
340#ifdef ARCH_mn10300
341 case bfd_arch_mn10300:
342 disassemble = print_insn_mn10300;
343 break;
344#endif
36591ba1
SL		 345#ifdef ARCH_nios2
346 case bfd_arch_nios2:
347 if (bfd_big_endian (abfd))
348 disassemble = print_insn_big_nios2;
349 else
350 disassemble = print_insn_little_nios2;
351 break;
352#endif
73589c9d
CS		 353#ifdef ARCH_or1k
354 case bfd_arch_or1k:
355 disassemble = print_insn_or1k;
3b16e843
NC		 356 break;
357#endif
e135f41b
NC		 358#ifdef ARCH_pdp11
359 case bfd_arch_pdp11:
360 disassemble = print_insn_pdp11;
361 break;
362#endif
1e608f98
ILT		 363#ifdef ARCH_pj
364 case bfd_arch_pj:
365 disassemble = print_insn_pj;
366 break;
367#endif
252b5132
RH		 368#ifdef ARCH_powerpc
369 case bfd_arch_powerpc:
370 if (bfd_big_endian (abfd))
371 disassemble = print_insn_big_powerpc;
372 else
373 disassemble = print_insn_little_powerpc;
374 break;
375#endif
376#ifdef ARCH_rs6000
377 case bfd_arch_rs6000:
39c20e8f 378 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP		 379 disassemble = print_insn_big_powerpc;
380 else
381 disassemble = print_insn_rs6000;
252b5132
RH		 382 break;
383#endif
99c513f6
DD		 384#ifdef ARCH_rl78
385 case bfd_arch_rl78:
386 disassemble = print_insn_rl78;
387 break;
388#endif
c7927a3c
NC		 389#ifdef ARCH_rx
390 case bfd_arch_rx:
391 disassemble = print_insn_rx;
392 break;
393#endif
a85d7ed0
NC		 394#ifdef ARCH_s390
395 case bfd_arch_s390:
396 disassemble = print_insn_s390;
397 break;
398#endif
1c0d3aa6
NC		 399#ifdef ARCH_score
400 case bfd_arch_score:
401 if (bfd_big_endian (abfd))
6ca4eb77 402 disassemble = print_insn_big_score;
1c0d3aa6 403 else
6ca4eb77 404 disassemble = print_insn_little_score;
1c0d3aa6
NC		 405 break;
406#endif
252b5132
RH		 407#ifdef ARCH_sh
408 case bfd_arch_sh:
1c509ca8 409 disassemble = print_insn_sh;
252b5132
RH		 410 break;
411#endif
412#ifdef ARCH_sparc
413 case bfd_arch_sparc:
414 disassemble = print_insn_sparc;
415 break;
416#endif
e9f53129
AM		 417#ifdef ARCH_spu
418 case bfd_arch_spu:
419 disassemble = print_insn_spu;
420 break;
421#endif
252b5132
RH		 422#ifdef ARCH_tic30
423 case bfd_arch_tic30:
424 disassemble = print_insn_tic30;
425 break;
426#endif
026df7c5
NC		 427#ifdef ARCH_tic4x
428 case bfd_arch_tic4x:
429 disassemble = print_insn_tic4x;
430 break;
431#endif
5c84d377
TW		 432#ifdef ARCH_tic54x
433 case bfd_arch_tic54x:
434 disassemble = print_insn_tic54x;
435 break;
436#endif
40b36596
JM		 437#ifdef ARCH_tic6x
438 case bfd_arch_tic6x:
439 disassemble = print_insn_tic6x;
440 break;
441#endif
252b5132
RH		 442#ifdef ARCH_tic80
443 case bfd_arch_tic80:
444 disassemble = print_insn_tic80;
445 break;
446#endif
447#ifdef ARCH_v850
448 case bfd_arch_v850:
de863c74 449 case bfd_arch_v850_rh850:
252b5132
RH		 450 disassemble = print_insn_v850;
451 break;
452#endif
453#ifdef ARCH_w65
454 case bfd_arch_w65:
455 disassemble = print_insn_w65;
456 break;
457#endif
f6c1a2d5
NC		 458#ifdef ARCH_xgate
459 case bfd_arch_xgate:
460 disassemble = print_insn_xgate;
461 break;
462#endif
93fbbb04
GK		 463#ifdef ARCH_xstormy16
464 case bfd_arch_xstormy16:
465 disassemble = print_insn_xstormy16;
466 break;
467#endif
d70c5fc7
NC		 468#ifdef ARCH_xc16x
469 case bfd_arch_xc16x:
470 disassemble = print_insn_xc16x;
471 break;
472#endif
e0001a05
NC		 473#ifdef ARCH_xtensa
474 case bfd_arch_xtensa:
475 disassemble = print_insn_xtensa;
476 break;
477#endif
3c9b82ba
NC		 478#ifdef ARCH_z80
479 case bfd_arch_z80:
480 disassemble = print_insn_z80;
481 break;
482#endif
252b5132
RH		 483#ifdef ARCH_z8k
484 case bfd_arch_z8k:
485 if (bfd_get_mach(abfd) == bfd_mach_z8001)
486 disassemble = print_insn_z8001;
b7ed8fad 487 else
252b5132
RH		 488 disassemble = print_insn_z8002;
489 break;
490#endif
491#ifdef ARCH_vax
492 case bfd_arch_vax:
493 disassemble = print_insn_vax;
494 break;
fd3c93d5
DB		 495#endif
496#ifdef ARCH_frv
497 case bfd_arch_frv:
498 disassemble = print_insn_frv;
499 break;
47b1a55a 500#endif
59b1530d
AG		 501#ifdef ARCH_moxie
502 case bfd_arch_moxie:
503 disassemble = print_insn_moxie;
504 break;
505#endif
47b1a55a
SC		 506#ifdef ARCH_iq2000
507 case bfd_arch_iq2000:
508 disassemble = print_insn_iq2000;
509 break;
49f58d10
JB		 510#endif
511#ifdef ARCH_m32c
512 case bfd_arch_m32c:
513 disassemble = print_insn_m32c;
514 break;
aa137e4d
NC		 515#endif
516#ifdef ARCH_tilegx
517 case bfd_arch_tilegx:
518 disassemble = print_insn_tilegx;
519 break;
520#endif
521#ifdef ARCH_tilepro
522 case bfd_arch_tilepro:
523 disassemble = print_insn_tilepro;
524 break;
252b5132
RH		 525#endif
526 default:
527 return 0;
528 }
529 return disassemble;
530}
94470b23
NC		 531
532void
9aaaa291 533disassembler_usage (stream)
7f32bebc 534 FILE * stream ATTRIBUTE_UNUSED;
94470b23 535{
a06ea964
NC		 536#ifdef ARCH_aarch64
537 print_aarch64_disassembler_options (stream);
538#endif
58efb6c0
NC		 539#ifdef ARCH_arm
540 print_arm_disassembler_options (stream);
541#endif
640c0ccd
CD		 542#ifdef ARCH_mips
543 print_mips_disassembler_options (stream);
544#endif
07dd56a9
NC		 545#ifdef ARCH_powerpc
546 print_ppc_disassembler_options (stream);
547#endif
f59a29b9
L		 548#ifdef ARCH_i386
549 print_i386_disassembler_options (stream);
550#endif
112b7c50
AK		 551#ifdef ARCH_s390
552 print_s390_disassembler_options (stream);
553#endif
b7ed8fad 554
94470b23
NC		 555 return;
556}
22a398e1
NC		 557
558void
559disassemble_init_for_target (struct disassemble_info * info)
560{
561 if (info == NULL)
562 return;
563
564 switch (info->arch)
565 {
a06ea964
NC		 566#ifdef ARCH_aarch64
567 case bfd_arch_aarch64:
568 info->symbol_is_valid = aarch64_symbol_is_valid;
569 info->disassembler_needs_relocs = TRUE;
570 break;
571#endif
22a398e1
NC		 572#ifdef ARCH_arm
573 case bfd_arch_arm:
574 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 575 info->disassembler_needs_relocs = TRUE;
22a398e1 576 break;
0bcb06d2
AS		 577#endif
578#ifdef ARCH_ia64
579 case bfd_arch_ia64:
580 info->skip_zeroes = 16;
581 break;
582#endif
583#ifdef ARCH_tic4x
584 case bfd_arch_tic4x:
585 info->skip_zeroes = 32;
fb53f5a8 586 break;
49f58d10 587#endif
bd2f2e55
DB		 588#ifdef ARCH_mep
589 case bfd_arch_mep:
590 info->skip_zeroes = 256;
591 info->skip_zeroes_at_end = 0;
592 break;
593#endif
a3c62988
NC		 594#ifdef ARCH_metag
595 case bfd_arch_metag:
596 info->disassembler_needs_relocs = TRUE;
597 break;
598#endif
49f58d10
JB		 599#ifdef ARCH_m32c
600 case bfd_arch_m32c:
6ca4eb77
AM		 601 /* This processor in fact is little endian. The value set here
602 reflects the way opcodes are written in the cgen description. */
49f58d10 603 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB		 604 if (! info->insn_sets)
605 {
606 info->insn_sets = cgen_bitset_create (ISA_MAX);
607 if (info->mach == bfd_mach_m16c)
608 cgen_bitset_set (info->insn_sets, ISA_M16C);
609 else
610 cgen_bitset_set (info->insn_sets, ISA_M32C);
611 }
49f58d10 612 break;
b240011a
AM		 613#endif
614#ifdef ARCH_powerpc
615 case bfd_arch_powerpc:
616#endif
617#ifdef ARCH_rs6000
618 case bfd_arch_rs6000:
619#endif
620#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
621 disassemble_init_powerpc (info);
622 break;
22a398e1
NC		 623#endif
624 default:
625 break;
626 }
627}
GDB Binutils - Deliverables
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