PR gas/12854
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
aef6203b 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
40b36596 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132 4
9b201bb5
NC
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
7499d566 8 it under the terms of the GNU General Public License as published by
9b201bb5 9 the Free Software Foundation; either version 3 of the License, or
7499d566 10 (at your option) any later version.
252b5132 11
7499d566
NC
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
252b5132 16
7499d566
NC
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
9b201bb5
NC
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
0d8dfecf 22#include "sysdep.h"
252b5132
RH
23#include "dis-asm.h"
24
25#ifdef ARCH_all
252b5132
RH
26#define ARCH_alpha
27#define ARCH_arc
28#define ARCH_arm
adde6300 29#define ARCH_avr
4b7f6baa 30#define ARCH_bfin
3d3d428f 31#define ARCH_cr16
6c95a37f 32#define ARCH_cris
1fe1f39c 33#define ARCH_crx
252b5132
RH
34#define ARCH_d10v
35#define ARCH_d30v
d172d4ba 36#define ARCH_dlx
e729279b
NC
37#define ARCH_fr30
38#define ARCH_frv
252b5132
RH
39#define ARCH_h8300
40#define ARCH_h8500
41#define ARCH_hppa
5b93d8bb 42#define ARCH_i370
252b5132 43#define ARCH_i386
9d751335 44#define ARCH_i860
252b5132 45#define ARCH_i960
800eeca4 46#define ARCH_ia64
e729279b
NC
47#define ARCH_ip2k
48#define ARCH_iq2000
84e94c90 49#define ARCH_lm32
e729279b 50#define ARCH_m32c
252b5132 51#define ARCH_m32r
60bcf0fa
NC
52#define ARCH_m68hc11
53#define ARCH_m68hc12
e729279b 54#define ARCH_m68k
252b5132
RH
55#define ARCH_m88k
56#define ARCH_mcore
bd2f2e55 57#define ARCH_mep
7ba29e2a 58#define ARCH_microblaze
252b5132 59#define ARCH_mips
3c3bdf30 60#define ARCH_mmix
252b5132
RH
61#define ARCH_mn10200
62#define ARCH_mn10300
59b1530d 63#define ARCH_moxie
d031aafb 64#define ARCH_mt
2469cfa2 65#define ARCH_msp430
252b5132 66#define ARCH_ns32k
87e6d782 67#define ARCH_openrisc
3b16e843 68#define ARCH_or32
e135f41b 69#define ARCH_pdp11
1e608f98 70#define ARCH_pj
252b5132
RH
71#define ARCH_powerpc
72#define ARCH_rs6000
c7927a3c 73#define ARCH_rx
a85d7ed0 74#define ARCH_s390
1c0d3aa6 75#define ARCH_score
252b5132
RH
76#define ARCH_sh
77#define ARCH_sparc
e9f53129 78#define ARCH_spu
252b5132 79#define ARCH_tic30
026df7c5 80#define ARCH_tic4x
5c84d377 81#define ARCH_tic54x
40b36596 82#define ARCH_tic6x
252b5132
RH
83#define ARCH_tic80
84#define ARCH_v850
85#define ARCH_vax
86#define ARCH_w65
93fbbb04 87#define ARCH_xstormy16
d70c5fc7 88#define ARCH_xc16x
e0001a05 89#define ARCH_xtensa
3c9b82ba 90#define ARCH_z80
252b5132 91#define ARCH_z8k
d28847ce 92#define INCLUDE_SHMEDIA
252b5132
RH
93#endif
94
49f58d10
JB
95#ifdef ARCH_m32c
96#include "m32c-desc.h"
97#endif
252b5132
RH
98
99disassembler_ftype
100disassembler (abfd)
101 bfd *abfd;
102{
103 enum bfd_architecture a = bfd_get_arch (abfd);
104 disassembler_ftype disassemble;
105
106 switch (a)
107 {
108 /* If you add a case to this table, also add it to the
109 ARCH_all definition right above this function. */
252b5132
RH
110#ifdef ARCH_alpha
111 case bfd_arch_alpha:
112 disassemble = print_insn_alpha;
113 break;
114#endif
115#ifdef ARCH_arc
116 case bfd_arch_arc:
6ca4eb77
AM
117 disassemble = arc_get_disassembler (abfd);
118 break;
252b5132
RH
119#endif
120#ifdef ARCH_arm
121 case bfd_arch_arm:
122 if (bfd_big_endian (abfd))
123 disassemble = print_insn_big_arm;
124 else
125 disassemble = print_insn_little_arm;
126 break;
127#endif
adde6300
AM
128#ifdef ARCH_avr
129 case bfd_arch_avr:
130 disassemble = print_insn_avr;
131 break;
132#endif
4b7f6baa
CM
133#ifdef ARCH_bfin
134 case bfd_arch_bfin:
135 disassemble = print_insn_bfin;
136 break;
137#endif
3d3d428f
NC
138#ifdef ARCH_cr16
139 case bfd_arch_cr16:
140 disassemble = print_insn_cr16;
141 break;
142#endif
6c95a37f
HPN
143#ifdef ARCH_cris
144 case bfd_arch_cris:
78966507 145 disassemble = cris_get_disassembler (abfd);
6c95a37f 146 break;
1fe1f39c
NC
147#endif
148#ifdef ARCH_crx
149 case bfd_arch_crx:
150 disassemble = print_insn_crx;
151 break;
6c95a37f 152#endif
252b5132
RH
153#ifdef ARCH_d10v
154 case bfd_arch_d10v:
155 disassemble = print_insn_d10v;
156 break;
157#endif
158#ifdef ARCH_d30v
159 case bfd_arch_d30v:
160 disassemble = print_insn_d30v;
161 break;
162#endif
d172d4ba
NC
163#ifdef ARCH_dlx
164 case bfd_arch_dlx:
165 /* As far as I know we only handle big-endian DLX objects. */
166 disassemble = print_insn_dlx;
167 break;
168#endif
252b5132
RH
169#ifdef ARCH_h8300
170 case bfd_arch_h8300:
049f8936
NC
171 if (bfd_get_mach (abfd) == bfd_mach_h8300h
172 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 173 disassemble = print_insn_h8300h;
049f8936 174 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 175 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO
176 || bfd_get_mach (abfd) == bfd_mach_h8300sx
177 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 178 disassemble = print_insn_h8300s;
b7ed8fad 179 else
252b5132
RH
180 disassemble = print_insn_h8300;
181 break;
182#endif
183#ifdef ARCH_h8500
184 case bfd_arch_h8500:
185 disassemble = print_insn_h8500;
186 break;
187#endif
188#ifdef ARCH_hppa
189 case bfd_arch_hppa:
190 disassemble = print_insn_hppa;
191 break;
192#endif
5b93d8bb
AM
193#ifdef ARCH_i370
194 case bfd_arch_i370:
195 disassemble = print_insn_i370;
196 break;
197#endif
252b5132
RH
198#ifdef ARCH_i386
199 case bfd_arch_i386:
8a9036a4 200 case bfd_arch_l1om:
e396998b 201 disassemble = print_insn_i386;
252b5132
RH
202 break;
203#endif
9d751335
JE
204#ifdef ARCH_i860
205 case bfd_arch_i860:
206 disassemble = print_insn_i860;
207 break;
208#endif
252b5132
RH
209#ifdef ARCH_i960
210 case bfd_arch_i960:
211 disassemble = print_insn_i960;
212 break;
213#endif
800eeca4
JW
214#ifdef ARCH_ia64
215 case bfd_arch_ia64:
216 disassemble = print_insn_ia64;
217 break;
218#endif
a40cbfa3
NC
219#ifdef ARCH_ip2k
220 case bfd_arch_ip2k:
221 disassemble = print_insn_ip2k;
222 break;
223#endif
252b5132
RH
224#ifdef ARCH_fr30
225 case bfd_arch_fr30:
226 disassemble = print_insn_fr30;
227 break;
228#endif
84e94c90
NC
229#ifdef ARCH_lm32
230 case bfd_arch_lm32:
231 disassemble = print_insn_lm32;
232 break;
233#endif
252b5132
RH
234#ifdef ARCH_m32r
235 case bfd_arch_m32r:
236 disassemble = print_insn_m32r;
237 break;
238#endif
60bcf0fa
NC
239#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
240 case bfd_arch_m68hc11:
241 disassemble = print_insn_m68hc11;
242 break;
243 case bfd_arch_m68hc12:
244 disassemble = print_insn_m68hc12;
245 break;
246#endif
252b5132
RH
247#ifdef ARCH_m68k
248 case bfd_arch_m68k:
249 disassemble = print_insn_m68k;
250 break;
251#endif
252#ifdef ARCH_m88k
253 case bfd_arch_m88k:
254 disassemble = print_insn_m88k;
255 break;
256#endif
d031aafb
NS
257#ifdef ARCH_mt
258 case bfd_arch_mt:
259 disassemble = print_insn_mt;
ac188222
DB
260 break;
261#endif
7ba29e2a
NC
262#ifdef ARCH_microblaze
263 case bfd_arch_microblaze:
264 disassemble = print_insn_microblaze;
265 break;
266#endif
2469cfa2
NC
267#ifdef ARCH_msp430
268 case bfd_arch_msp430:
269 disassemble = print_insn_msp430;
270 break;
271#endif
252b5132
RH
272#ifdef ARCH_ns32k
273 case bfd_arch_ns32k:
274 disassemble = print_insn_ns32k;
275 break;
276#endif
277#ifdef ARCH_mcore
278 case bfd_arch_mcore:
279 disassemble = print_insn_mcore;
280 break;
281#endif
bd2f2e55
DB
282#ifdef ARCH_mep
283 case bfd_arch_mep:
284 disassemble = print_insn_mep;
285 break;
286#endif
252b5132
RH
287#ifdef ARCH_mips
288 case bfd_arch_mips:
289 if (bfd_big_endian (abfd))
290 disassemble = print_insn_big_mips;
291 else
292 disassemble = print_insn_little_mips;
293 break;
294#endif
3c3bdf30
NC
295#ifdef ARCH_mmix
296 case bfd_arch_mmix:
297 disassemble = print_insn_mmix;
298 break;
299#endif
252b5132
RH
300#ifdef ARCH_mn10200
301 case bfd_arch_mn10200:
302 disassemble = print_insn_mn10200;
303 break;
304#endif
305#ifdef ARCH_mn10300
306 case bfd_arch_mn10300:
307 disassemble = print_insn_mn10300;
308 break;
309#endif
87e6d782
NC
310#ifdef ARCH_openrisc
311 case bfd_arch_openrisc:
312 disassemble = print_insn_openrisc;
313 break;
314#endif
3b16e843
NC
315#ifdef ARCH_or32
316 case bfd_arch_or32:
317 if (bfd_big_endian (abfd))
6ca4eb77 318 disassemble = print_insn_big_or32;
3b16e843 319 else
6ca4eb77 320 disassemble = print_insn_little_or32;
3b16e843
NC
321 break;
322#endif
e135f41b
NC
323#ifdef ARCH_pdp11
324 case bfd_arch_pdp11:
325 disassemble = print_insn_pdp11;
326 break;
327#endif
1e608f98
ILT
328#ifdef ARCH_pj
329 case bfd_arch_pj:
330 disassemble = print_insn_pj;
331 break;
332#endif
252b5132
RH
333#ifdef ARCH_powerpc
334 case bfd_arch_powerpc:
335 if (bfd_big_endian (abfd))
336 disassemble = print_insn_big_powerpc;
337 else
338 disassemble = print_insn_little_powerpc;
339 break;
340#endif
341#ifdef ARCH_rs6000
342 case bfd_arch_rs6000:
39c20e8f 343 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP
344 disassemble = print_insn_big_powerpc;
345 else
346 disassemble = print_insn_rs6000;
252b5132
RH
347 break;
348#endif
c7927a3c
NC
349#ifdef ARCH_rx
350 case bfd_arch_rx:
351 disassemble = print_insn_rx;
352 break;
353#endif
a85d7ed0
NC
354#ifdef ARCH_s390
355 case bfd_arch_s390:
356 disassemble = print_insn_s390;
357 break;
358#endif
1c0d3aa6
NC
359#ifdef ARCH_score
360 case bfd_arch_score:
361 if (bfd_big_endian (abfd))
6ca4eb77 362 disassemble = print_insn_big_score;
1c0d3aa6 363 else
6ca4eb77 364 disassemble = print_insn_little_score;
1c0d3aa6
NC
365 break;
366#endif
252b5132
RH
367#ifdef ARCH_sh
368 case bfd_arch_sh:
1c509ca8 369 disassemble = print_insn_sh;
252b5132
RH
370 break;
371#endif
372#ifdef ARCH_sparc
373 case bfd_arch_sparc:
374 disassemble = print_insn_sparc;
375 break;
376#endif
e9f53129
AM
377#ifdef ARCH_spu
378 case bfd_arch_spu:
379 disassemble = print_insn_spu;
380 break;
381#endif
252b5132
RH
382#ifdef ARCH_tic30
383 case bfd_arch_tic30:
384 disassemble = print_insn_tic30;
385 break;
386#endif
026df7c5
NC
387#ifdef ARCH_tic4x
388 case bfd_arch_tic4x:
389 disassemble = print_insn_tic4x;
390 break;
391#endif
5c84d377
TW
392#ifdef ARCH_tic54x
393 case bfd_arch_tic54x:
394 disassemble = print_insn_tic54x;
395 break;
396#endif
40b36596
JM
397#ifdef ARCH_tic6x
398 case bfd_arch_tic6x:
399 disassemble = print_insn_tic6x;
400 break;
401#endif
252b5132
RH
402#ifdef ARCH_tic80
403 case bfd_arch_tic80:
404 disassemble = print_insn_tic80;
405 break;
406#endif
407#ifdef ARCH_v850
408 case bfd_arch_v850:
409 disassemble = print_insn_v850;
410 break;
411#endif
412#ifdef ARCH_w65
413 case bfd_arch_w65:
414 disassemble = print_insn_w65;
415 break;
416#endif
93fbbb04
GK
417#ifdef ARCH_xstormy16
418 case bfd_arch_xstormy16:
419 disassemble = print_insn_xstormy16;
420 break;
421#endif
d70c5fc7
NC
422#ifdef ARCH_xc16x
423 case bfd_arch_xc16x:
424 disassemble = print_insn_xc16x;
425 break;
426#endif
e0001a05
NC
427#ifdef ARCH_xtensa
428 case bfd_arch_xtensa:
429 disassemble = print_insn_xtensa;
430 break;
431#endif
3c9b82ba
NC
432#ifdef ARCH_z80
433 case bfd_arch_z80:
434 disassemble = print_insn_z80;
435 break;
436#endif
252b5132
RH
437#ifdef ARCH_z8k
438 case bfd_arch_z8k:
439 if (bfd_get_mach(abfd) == bfd_mach_z8001)
440 disassemble = print_insn_z8001;
b7ed8fad 441 else
252b5132
RH
442 disassemble = print_insn_z8002;
443 break;
444#endif
445#ifdef ARCH_vax
446 case bfd_arch_vax:
447 disassemble = print_insn_vax;
448 break;
fd3c93d5
DB
449#endif
450#ifdef ARCH_frv
451 case bfd_arch_frv:
452 disassemble = print_insn_frv;
453 break;
47b1a55a 454#endif
59b1530d
AG
455#ifdef ARCH_moxie
456 case bfd_arch_moxie:
457 disassemble = print_insn_moxie;
458 break;
459#endif
47b1a55a
SC
460#ifdef ARCH_iq2000
461 case bfd_arch_iq2000:
462 disassemble = print_insn_iq2000;
463 break;
49f58d10
JB
464#endif
465#ifdef ARCH_m32c
466 case bfd_arch_m32c:
467 disassemble = print_insn_m32c;
468 break;
252b5132
RH
469#endif
470 default:
471 return 0;
472 }
473 return disassemble;
474}
94470b23
NC
475
476void
9aaaa291 477disassembler_usage (stream)
7f32bebc 478 FILE * stream ATTRIBUTE_UNUSED;
94470b23 479{
58efb6c0
NC
480#ifdef ARCH_arm
481 print_arm_disassembler_options (stream);
482#endif
640c0ccd
CD
483#ifdef ARCH_mips
484 print_mips_disassembler_options (stream);
485#endif
07dd56a9
NC
486#ifdef ARCH_powerpc
487 print_ppc_disassembler_options (stream);
488#endif
f59a29b9
L
489#ifdef ARCH_i386
490 print_i386_disassembler_options (stream);
491#endif
112b7c50
AK
492#ifdef ARCH_s390
493 print_s390_disassembler_options (stream);
494#endif
b7ed8fad 495
94470b23
NC
496 return;
497}
22a398e1
NC
498
499void
500disassemble_init_for_target (struct disassemble_info * info)
501{
502 if (info == NULL)
503 return;
504
505 switch (info->arch)
506 {
507#ifdef ARCH_arm
508 case bfd_arch_arm:
509 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 510 info->disassembler_needs_relocs = TRUE;
22a398e1 511 break;
0bcb06d2
AS
512#endif
513#ifdef ARCH_ia64
514 case bfd_arch_ia64:
515 info->skip_zeroes = 16;
516 break;
517#endif
518#ifdef ARCH_tic4x
519 case bfd_arch_tic4x:
520 info->skip_zeroes = 32;
fb53f5a8 521 break;
49f58d10 522#endif
bd2f2e55
DB
523#ifdef ARCH_mep
524 case bfd_arch_mep:
525 info->skip_zeroes = 256;
526 info->skip_zeroes_at_end = 0;
527 break;
528#endif
49f58d10
JB
529#ifdef ARCH_m32c
530 case bfd_arch_m32c:
6ca4eb77
AM
531 /* This processor in fact is little endian. The value set here
532 reflects the way opcodes are written in the cgen description. */
49f58d10 533 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB
534 if (! info->insn_sets)
535 {
536 info->insn_sets = cgen_bitset_create (ISA_MAX);
537 if (info->mach == bfd_mach_m16c)
538 cgen_bitset_set (info->insn_sets, ISA_M16C);
539 else
540 cgen_bitset_set (info->insn_sets, ISA_M32C);
541 }
49f58d10 542 break;
22a398e1
NC
543#endif
544 default:
545 break;
546 }
547}
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