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[deliverable/binutils-gdb.git] / opcodes / disassemble.c
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252b5132 1/* Select disassembly routine for specified architecture.
b90efa5b 2 Copyright (C) 1994-2015 Free Software Foundation, Inc.
252b5132 3
9b201bb5
NC		 4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7499d566 7 it under the terms of the GNU General Public License as published by
9b201bb5 8 the Free Software Foundation; either version 3 of the License, or
7499d566 9 (at your option) any later version.
252b5132 10
7499d566
NC		 11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
7499d566
NC		 16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
9b201bb5
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
0d8dfecf 21#include "sysdep.h"
252b5132
RH		 22#include "dis-asm.h"
23
24#ifdef ARCH_all
a06ea964 25#define ARCH_aarch64
252b5132
RH		 26#define ARCH_alpha
27#define ARCH_arc
28#define ARCH_arm
adde6300 29#define ARCH_avr
4b7f6baa 30#define ARCH_bfin
3d3d428f 31#define ARCH_cr16
6c95a37f 32#define ARCH_cris
1fe1f39c 33#define ARCH_crx
252b5132
RH		 34#define ARCH_d10v
35#define ARCH_d30v
d172d4ba 36#define ARCH_dlx
56b13185 37#define ARCH_epiphany
e729279b
NC		 38#define ARCH_fr30
39#define ARCH_frv
252b5132
RH		 40#define ARCH_h8300
41#define ARCH_h8500
42#define ARCH_hppa
5b93d8bb 43#define ARCH_i370
252b5132 44#define ARCH_i386
9d751335 45#define ARCH_i860
252b5132 46#define ARCH_i960
800eeca4 47#define ARCH_ia64
e729279b
NC		 48#define ARCH_ip2k
49#define ARCH_iq2000
84e94c90 50#define ARCH_lm32
e729279b 51#define ARCH_m32c
252b5132 52#define ARCH_m32r
60bcf0fa
NC		 53#define ARCH_m68hc11
54#define ARCH_m68hc12
e729279b 55#define ARCH_m68k
252b5132
RH		 56#define ARCH_m88k
57#define ARCH_mcore
bd2f2e55 58#define ARCH_mep
a3c62988 59#define ARCH_metag
7ba29e2a 60#define ARCH_microblaze
252b5132 61#define ARCH_mips
3c3bdf30 62#define ARCH_mmix
252b5132
RH		 63#define ARCH_mn10200
64#define ARCH_mn10300
59b1530d 65#define ARCH_moxie
d031aafb 66#define ARCH_mt
2469cfa2 67#define ARCH_msp430
35c08157 68#define ARCH_nds32
36591ba1 69#define ARCH_nios2
252b5132 70#define ARCH_ns32k
73589c9d 71#define ARCH_or1k
e135f41b 72#define ARCH_pdp11
1e608f98 73#define ARCH_pj
252b5132
RH		 74#define ARCH_powerpc
75#define ARCH_rs6000
99c513f6 76#define ARCH_rl78
c7927a3c 77#define ARCH_rx
a85d7ed0 78#define ARCH_s390
1c0d3aa6 79#define ARCH_score
252b5132
RH		 80#define ARCH_sh
81#define ARCH_sparc
e9f53129 82#define ARCH_spu
252b5132 83#define ARCH_tic30
026df7c5 84#define ARCH_tic4x
5c84d377 85#define ARCH_tic54x
40b36596 86#define ARCH_tic6x
252b5132 87#define ARCH_tic80
aa137e4d
NC		 88#define ARCH_tilegx
89#define ARCH_tilepro
252b5132
RH		 90#define ARCH_v850
91#define ARCH_vax
1945cfa5 92#define ARCH_visium
252b5132 93#define ARCH_w65
93fbbb04 94#define ARCH_xstormy16
d70c5fc7 95#define ARCH_xc16x
f6c1a2d5 96#define ARCH_xgate
e0001a05 97#define ARCH_xtensa
3c9b82ba 98#define ARCH_z80
252b5132 99#define ARCH_z8k
d28847ce 100#define INCLUDE_SHMEDIA
252b5132
RH		 101#endif
102
49f58d10
JB		 103#ifdef ARCH_m32c
104#include "m32c-desc.h"
105#endif
252b5132
RH		 106
107disassembler_ftype
108disassembler (abfd)
109 bfd *abfd;
110{
111 enum bfd_architecture a = bfd_get_arch (abfd);
112 disassembler_ftype disassemble;
113
114 switch (a)
115 {
116 /* If you add a case to this table, also add it to the
117 ARCH_all definition right above this function. */
a06ea964
NC		 118#ifdef ARCH_aarch64
119 case bfd_arch_aarch64:
120 disassemble = print_insn_aarch64;
121 break;
122#endif
252b5132
RH		 123#ifdef ARCH_alpha
124 case bfd_arch_alpha:
125 disassemble = print_insn_alpha;
126 break;
127#endif
128#ifdef ARCH_arc
129 case bfd_arch_arc:
6ca4eb77
AM		 130 disassemble = arc_get_disassembler (abfd);
131 break;
252b5132
RH		 132#endif
133#ifdef ARCH_arm
134 case bfd_arch_arm:
135 if (bfd_big_endian (abfd))
136 disassemble = print_insn_big_arm;
137 else
138 disassemble = print_insn_little_arm;
139 break;
140#endif
adde6300
AM		 141#ifdef ARCH_avr
142 case bfd_arch_avr:
143 disassemble = print_insn_avr;
144 break;
145#endif
4b7f6baa
CM		 146#ifdef ARCH_bfin
147 case bfd_arch_bfin:
148 disassemble = print_insn_bfin;
149 break;
150#endif
3d3d428f
NC		 151#ifdef ARCH_cr16
152 case bfd_arch_cr16:
153 disassemble = print_insn_cr16;
154 break;
155#endif
6c95a37f
HPN		 156#ifdef ARCH_cris
157 case bfd_arch_cris:
78966507 158 disassemble = cris_get_disassembler (abfd);
6c95a37f 159 break;
1fe1f39c
NC		 160#endif
161#ifdef ARCH_crx
162 case bfd_arch_crx:
163 disassemble = print_insn_crx;
164 break;
6c95a37f 165#endif
252b5132
RH		 166#ifdef ARCH_d10v
167 case bfd_arch_d10v:
168 disassemble = print_insn_d10v;
169 break;
170#endif
171#ifdef ARCH_d30v
172 case bfd_arch_d30v:
173 disassemble = print_insn_d30v;
174 break;
175#endif
d172d4ba
NC		 176#ifdef ARCH_dlx
177 case bfd_arch_dlx:
178 /* As far as I know we only handle big-endian DLX objects. */
179 disassemble = print_insn_dlx;
180 break;
181#endif
252b5132
RH		 182#ifdef ARCH_h8300
183 case bfd_arch_h8300:
049f8936
NC		 184 if (bfd_get_mach (abfd) == bfd_mach_h8300h
185 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 186 disassemble = print_insn_h8300h;
049f8936 187 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 188 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO		 189 || bfd_get_mach (abfd) == bfd_mach_h8300sx
190 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 191 disassemble = print_insn_h8300s;
b7ed8fad 192 else
252b5132
RH		 193 disassemble = print_insn_h8300;
194 break;
195#endif
196#ifdef ARCH_h8500
197 case bfd_arch_h8500:
198 disassemble = print_insn_h8500;
199 break;
200#endif
201#ifdef ARCH_hppa
202 case bfd_arch_hppa:
203 disassemble = print_insn_hppa;
204 break;
205#endif
5b93d8bb
AM		 206#ifdef ARCH_i370
207 case bfd_arch_i370:
208 disassemble = print_insn_i370;
209 break;
210#endif
252b5132
RH		 211#ifdef ARCH_i386
212 case bfd_arch_i386:
8a9036a4 213 case bfd_arch_l1om:
7a9068fe 214 case bfd_arch_k1om:
e396998b 215 disassemble = print_insn_i386;
252b5132
RH		 216 break;
217#endif
9d751335
JE		 218#ifdef ARCH_i860
219 case bfd_arch_i860:
220 disassemble = print_insn_i860;
221 break;
222#endif
252b5132
RH		 223#ifdef ARCH_i960
224 case bfd_arch_i960:
225 disassemble = print_insn_i960;
226 break;
227#endif
800eeca4
JW		 228#ifdef ARCH_ia64
229 case bfd_arch_ia64:
230 disassemble = print_insn_ia64;
231 break;
232#endif
a40cbfa3
NC		 233#ifdef ARCH_ip2k
234 case bfd_arch_ip2k:
235 disassemble = print_insn_ip2k;
236 break;
237#endif
cfb8c092
NC		 238#ifdef ARCH_epiphany
239 case bfd_arch_epiphany:
240 disassemble = print_insn_epiphany;
241 break;
242#endif
252b5132
RH		 243#ifdef ARCH_fr30
244 case bfd_arch_fr30:
245 disassemble = print_insn_fr30;
246 break;
247#endif
84e94c90
NC		 248#ifdef ARCH_lm32
249 case bfd_arch_lm32:
250 disassemble = print_insn_lm32;
251 break;
252#endif
252b5132
RH		 253#ifdef ARCH_m32r
254 case bfd_arch_m32r:
255 disassemble = print_insn_m32r;
256 break;
257#endif
6927f982
NC		 258#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
259 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC		 260 case bfd_arch_m68hc11:
261 disassemble = print_insn_m68hc11;
262 break;
263 case bfd_arch_m68hc12:
264 disassemble = print_insn_m68hc12;
265 break;
6927f982
NC		 266 case bfd_arch_m9s12x:
267 disassemble = print_insn_m9s12x;
268 break;
269 case bfd_arch_m9s12xg:
270 disassemble = print_insn_m9s12xg;
271 break;
60bcf0fa 272#endif
252b5132
RH		 273#ifdef ARCH_m68k
274 case bfd_arch_m68k:
275 disassemble = print_insn_m68k;
276 break;
277#endif
278#ifdef ARCH_m88k
279 case bfd_arch_m88k:
280 disassemble = print_insn_m88k;
281 break;
282#endif
d031aafb
NS		 283#ifdef ARCH_mt
284 case bfd_arch_mt:
285 disassemble = print_insn_mt;
ac188222
DB		 286 break;
287#endif
7ba29e2a
NC		 288#ifdef ARCH_microblaze
289 case bfd_arch_microblaze:
290 disassemble = print_insn_microblaze;
291 break;
292#endif
2469cfa2
NC		 293#ifdef ARCH_msp430
294 case bfd_arch_msp430:
295 disassemble = print_insn_msp430;
296 break;
297#endif
35c08157
KLC		 298#ifdef ARCH_nds32
299 case bfd_arch_nds32:
300 disassemble = print_insn_nds32;
301 break;
302#endif
252b5132
RH		 303#ifdef ARCH_ns32k
304 case bfd_arch_ns32k:
305 disassemble = print_insn_ns32k;
306 break;
307#endif
308#ifdef ARCH_mcore
309 case bfd_arch_mcore:
310 disassemble = print_insn_mcore;
311 break;
312#endif
bd2f2e55
DB		 313#ifdef ARCH_mep
314 case bfd_arch_mep:
315 disassemble = print_insn_mep;
316 break;
317#endif
a3c62988
NC		 318#ifdef ARCH_metag
319 case bfd_arch_metag:
320 disassemble = print_insn_metag;
321 break;
322#endif
252b5132
RH		 323#ifdef ARCH_mips
324 case bfd_arch_mips:
325 if (bfd_big_endian (abfd))
326 disassemble = print_insn_big_mips;
327 else
328 disassemble = print_insn_little_mips;
329 break;
330#endif
3c3bdf30
NC		 331#ifdef ARCH_mmix
332 case bfd_arch_mmix:
333 disassemble = print_insn_mmix;
334 break;
335#endif
252b5132
RH		 336#ifdef ARCH_mn10200
337 case bfd_arch_mn10200:
338 disassemble = print_insn_mn10200;
339 break;
340#endif
341#ifdef ARCH_mn10300
342 case bfd_arch_mn10300:
343 disassemble = print_insn_mn10300;
344 break;
345#endif
36591ba1
SL		 346#ifdef ARCH_nios2
347 case bfd_arch_nios2:
348 if (bfd_big_endian (abfd))
349 disassemble = print_insn_big_nios2;
350 else
351 disassemble = print_insn_little_nios2;
352 break;
353#endif
73589c9d
CS		 354#ifdef ARCH_or1k
355 case bfd_arch_or1k:
356 disassemble = print_insn_or1k;
3b16e843
NC		 357 break;
358#endif
e135f41b
NC		 359#ifdef ARCH_pdp11
360 case bfd_arch_pdp11:
361 disassemble = print_insn_pdp11;
362 break;
363#endif
1e608f98
ILT		 364#ifdef ARCH_pj
365 case bfd_arch_pj:
366 disassemble = print_insn_pj;
367 break;
368#endif
252b5132
RH		 369#ifdef ARCH_powerpc
370 case bfd_arch_powerpc:
371 if (bfd_big_endian (abfd))
372 disassemble = print_insn_big_powerpc;
373 else
374 disassemble = print_insn_little_powerpc;
375 break;
376#endif
377#ifdef ARCH_rs6000
378 case bfd_arch_rs6000:
39c20e8f 379 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP		 380 disassemble = print_insn_big_powerpc;
381 else
382 disassemble = print_insn_rs6000;
252b5132
RH		 383 break;
384#endif
99c513f6
DD		 385#ifdef ARCH_rl78
386 case bfd_arch_rl78:
387 disassemble = print_insn_rl78;
388 break;
389#endif
c7927a3c
NC		 390#ifdef ARCH_rx
391 case bfd_arch_rx:
392 disassemble = print_insn_rx;
393 break;
394#endif
a85d7ed0
NC		 395#ifdef ARCH_s390
396 case bfd_arch_s390:
397 disassemble = print_insn_s390;
398 break;
399#endif
1c0d3aa6
NC		 400#ifdef ARCH_score
401 case bfd_arch_score:
402 if (bfd_big_endian (abfd))
6ca4eb77 403 disassemble = print_insn_big_score;
1c0d3aa6 404 else
6ca4eb77 405 disassemble = print_insn_little_score;
1c0d3aa6
NC		 406 break;
407#endif
252b5132
RH		 408#ifdef ARCH_sh
409 case bfd_arch_sh:
1c509ca8 410 disassemble = print_insn_sh;
252b5132
RH		 411 break;
412#endif
413#ifdef ARCH_sparc
414 case bfd_arch_sparc:
415 disassemble = print_insn_sparc;
416 break;
417#endif
e9f53129
AM		 418#ifdef ARCH_spu
419 case bfd_arch_spu:
420 disassemble = print_insn_spu;
421 break;
422#endif
252b5132
RH		 423#ifdef ARCH_tic30
424 case bfd_arch_tic30:
425 disassemble = print_insn_tic30;
426 break;
427#endif
026df7c5
NC		 428#ifdef ARCH_tic4x
429 case bfd_arch_tic4x:
430 disassemble = print_insn_tic4x;
431 break;
432#endif
5c84d377
TW		 433#ifdef ARCH_tic54x
434 case bfd_arch_tic54x:
435 disassemble = print_insn_tic54x;
436 break;
437#endif
40b36596
JM		 438#ifdef ARCH_tic6x
439 case bfd_arch_tic6x:
440 disassemble = print_insn_tic6x;
441 break;
442#endif
252b5132
RH		 443#ifdef ARCH_tic80
444 case bfd_arch_tic80:
445 disassemble = print_insn_tic80;
446 break;
447#endif
448#ifdef ARCH_v850
449 case bfd_arch_v850:
de863c74 450 case bfd_arch_v850_rh850:
252b5132
RH		 451 disassemble = print_insn_v850;
452 break;
453#endif
454#ifdef ARCH_w65
455 case bfd_arch_w65:
456 disassemble = print_insn_w65;
457 break;
458#endif
f6c1a2d5
NC		 459#ifdef ARCH_xgate
460 case bfd_arch_xgate:
461 disassemble = print_insn_xgate;
462 break;
463#endif
93fbbb04
GK		 464#ifdef ARCH_xstormy16
465 case bfd_arch_xstormy16:
466 disassemble = print_insn_xstormy16;
467 break;
468#endif
d70c5fc7
NC		 469#ifdef ARCH_xc16x
470 case bfd_arch_xc16x:
471 disassemble = print_insn_xc16x;
472 break;
473#endif
e0001a05
NC		 474#ifdef ARCH_xtensa
475 case bfd_arch_xtensa:
476 disassemble = print_insn_xtensa;
477 break;
478#endif
3c9b82ba
NC		 479#ifdef ARCH_z80
480 case bfd_arch_z80:
481 disassemble = print_insn_z80;
482 break;
483#endif
252b5132
RH		 484#ifdef ARCH_z8k
485 case bfd_arch_z8k:
486 if (bfd_get_mach(abfd) == bfd_mach_z8001)
487 disassemble = print_insn_z8001;
b7ed8fad 488 else
252b5132
RH		 489 disassemble = print_insn_z8002;
490 break;
491#endif
492#ifdef ARCH_vax
493 case bfd_arch_vax:
494 disassemble = print_insn_vax;
495 break;
fd3c93d5 496#endif
1945cfa5
EB		 497#ifdef ARCH_visium
498 case bfd_arch_visium:
499 disassemble = print_insn_visium;
500 break;
501#endif
fd3c93d5
DB		 502#ifdef ARCH_frv
503 case bfd_arch_frv:
504 disassemble = print_insn_frv;
505 break;
47b1a55a 506#endif
59b1530d
AG		 507#ifdef ARCH_moxie
508 case bfd_arch_moxie:
509 disassemble = print_insn_moxie;
510 break;
511#endif
47b1a55a
SC		 512#ifdef ARCH_iq2000
513 case bfd_arch_iq2000:
514 disassemble = print_insn_iq2000;
515 break;
49f58d10
JB		 516#endif
517#ifdef ARCH_m32c
518 case bfd_arch_m32c:
519 disassemble = print_insn_m32c;
520 break;
aa137e4d
NC		 521#endif
522#ifdef ARCH_tilegx
523 case bfd_arch_tilegx:
524 disassemble = print_insn_tilegx;
525 break;
526#endif
527#ifdef ARCH_tilepro
528 case bfd_arch_tilepro:
529 disassemble = print_insn_tilepro;
530 break;
252b5132
RH		 531#endif
532 default:
533 return 0;
534 }
535 return disassemble;
536}
94470b23
NC		 537
538void
9aaaa291 539disassembler_usage (stream)
7f32bebc 540 FILE * stream ATTRIBUTE_UNUSED;
94470b23 541{
a06ea964
NC		 542#ifdef ARCH_aarch64
543 print_aarch64_disassembler_options (stream);
544#endif
58efb6c0
NC		 545#ifdef ARCH_arm
546 print_arm_disassembler_options (stream);
547#endif
640c0ccd
CD		 548#ifdef ARCH_mips
549 print_mips_disassembler_options (stream);
550#endif
07dd56a9
NC		 551#ifdef ARCH_powerpc
552 print_ppc_disassembler_options (stream);
553#endif
f59a29b9
L		 554#ifdef ARCH_i386
555 print_i386_disassembler_options (stream);
556#endif
112b7c50
AK		 557#ifdef ARCH_s390
558 print_s390_disassembler_options (stream);
559#endif
b7ed8fad 560
94470b23
NC		 561 return;
562}
22a398e1
NC		 563
564void
565disassemble_init_for_target (struct disassemble_info * info)
566{
567 if (info == NULL)
568 return;
569
570 switch (info->arch)
571 {
a06ea964
NC		 572#ifdef ARCH_aarch64
573 case bfd_arch_aarch64:
574 info->symbol_is_valid = aarch64_symbol_is_valid;
575 info->disassembler_needs_relocs = TRUE;
576 break;
577#endif
22a398e1
NC		 578#ifdef ARCH_arm
579 case bfd_arch_arm:
580 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 581 info->disassembler_needs_relocs = TRUE;
22a398e1 582 break;
0bcb06d2
AS		 583#endif
584#ifdef ARCH_ia64
585 case bfd_arch_ia64:
586 info->skip_zeroes = 16;
587 break;
588#endif
589#ifdef ARCH_tic4x
590 case bfd_arch_tic4x:
591 info->skip_zeroes = 32;
fb53f5a8 592 break;
49f58d10 593#endif
bd2f2e55
DB		 594#ifdef ARCH_mep
595 case bfd_arch_mep:
596 info->skip_zeroes = 256;
597 info->skip_zeroes_at_end = 0;
598 break;
599#endif
a3c62988
NC		 600#ifdef ARCH_metag
601 case bfd_arch_metag:
602 info->disassembler_needs_relocs = TRUE;
603 break;
604#endif
49f58d10
JB		 605#ifdef ARCH_m32c
606 case bfd_arch_m32c:
6ca4eb77
AM		 607 /* This processor in fact is little endian. The value set here
608 reflects the way opcodes are written in the cgen description. */
49f58d10 609 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB		 610 if (! info->insn_sets)
611 {
612 info->insn_sets = cgen_bitset_create (ISA_MAX);
613 if (info->mach == bfd_mach_m16c)
614 cgen_bitset_set (info->insn_sets, ISA_M16C);
615 else
616 cgen_bitset_set (info->insn_sets, ISA_M32C);
617 }
49f58d10 618 break;
b240011a
AM		 619#endif
620#ifdef ARCH_powerpc
621 case bfd_arch_powerpc:
622#endif
623#ifdef ARCH_rs6000
624 case bfd_arch_rs6000:
625#endif
626#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
627 disassemble_init_powerpc (info);
628 break;
22a398e1
NC		 629#endif
630 default:
631 break;
632 }
633}
GDB Binutils - Deliverables
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