Add Xtensa port
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
3b16e843 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
5b93d8bb 3 Free Software Foundation, Inc.
252b5132
RH
4
5This program is free software; you can redistribute it and/or modify
6it under the terms of the GNU General Public License as published by
7the Free Software Foundation; either version 2 of the License, or
8(at your option) any later version.
9
10This program is distributed in the hope that it will be useful,
11but WITHOUT ANY WARRANTY; without even the implied warranty of
12MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13GNU General Public License for more details.
14
15You should have received a copy of the GNU General Public License
16along with this program; if not, write to the Free Software
17Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
18
0d8dfecf 19#include "sysdep.h"
252b5132
RH
20#include "dis-asm.h"
21
22#ifdef ARCH_all
23#define ARCH_a29k
24#define ARCH_alpha
25#define ARCH_arc
26#define ARCH_arm
adde6300 27#define ARCH_avr
6c95a37f 28#define ARCH_cris
252b5132
RH
29#define ARCH_d10v
30#define ARCH_d30v
d172d4ba 31#define ARCH_dlx
252b5132
RH
32#define ARCH_h8300
33#define ARCH_h8500
34#define ARCH_hppa
5b93d8bb 35#define ARCH_i370
252b5132 36#define ARCH_i386
9d751335 37#define ARCH_i860
252b5132 38#define ARCH_i960
a40cbfa3 39#define ARCH_ip2k
800eeca4 40#define ARCH_ia64
252b5132
RH
41#define ARCH_fr30
42#define ARCH_m32r
43#define ARCH_m68k
60bcf0fa
NC
44#define ARCH_m68hc11
45#define ARCH_m68hc12
252b5132
RH
46#define ARCH_m88k
47#define ARCH_mcore
48#define ARCH_mips
3c3bdf30 49#define ARCH_mmix
252b5132
RH
50#define ARCH_mn10200
51#define ARCH_mn10300
2469cfa2 52#define ARCH_msp430
252b5132 53#define ARCH_ns32k
87e6d782 54#define ARCH_openrisc
3b16e843 55#define ARCH_or32
e135f41b 56#define ARCH_pdp11
1e608f98 57#define ARCH_pj
252b5132
RH
58#define ARCH_powerpc
59#define ARCH_rs6000
a85d7ed0 60#define ARCH_s390
252b5132
RH
61#define ARCH_sh
62#define ARCH_sparc
63#define ARCH_tic30
026df7c5 64#define ARCH_tic4x
5c84d377 65#define ARCH_tic54x
252b5132
RH
66#define ARCH_tic80
67#define ARCH_v850
68#define ARCH_vax
69#define ARCH_w65
93fbbb04 70#define ARCH_xstormy16
e0001a05 71#define ARCH_xtensa
252b5132 72#define ARCH_z8k
fd3c93d5 73#define ARCH_frv
47b1a55a 74#define ARCH_iq2000
d28847ce 75#define INCLUDE_SHMEDIA
252b5132
RH
76#endif
77
78
79disassembler_ftype
80disassembler (abfd)
81 bfd *abfd;
82{
83 enum bfd_architecture a = bfd_get_arch (abfd);
84 disassembler_ftype disassemble;
85
86 switch (a)
87 {
88 /* If you add a case to this table, also add it to the
89 ARCH_all definition right above this function. */
90#ifdef ARCH_a29k
91 case bfd_arch_a29k:
92 /* As far as I know we only handle big-endian 29k objects. */
93 disassemble = print_insn_big_a29k;
94 break;
95#endif
96#ifdef ARCH_alpha
97 case bfd_arch_alpha:
98 disassemble = print_insn_alpha;
99 break;
100#endif
101#ifdef ARCH_arc
102 case bfd_arch_arc:
103 {
0d2bcfaf 104 disassemble = arc_get_disassembler (abfd);
252b5132
RH
105 break;
106 }
107#endif
108#ifdef ARCH_arm
109 case bfd_arch_arm:
110 if (bfd_big_endian (abfd))
111 disassemble = print_insn_big_arm;
112 else
113 disassemble = print_insn_little_arm;
114 break;
115#endif
adde6300
AM
116#ifdef ARCH_avr
117 case bfd_arch_avr:
118 disassemble = print_insn_avr;
119 break;
120#endif
6c95a37f
HPN
121#ifdef ARCH_cris
122 case bfd_arch_cris:
78966507 123 disassemble = cris_get_disassembler (abfd);
6c95a37f
HPN
124 break;
125#endif
252b5132
RH
126#ifdef ARCH_d10v
127 case bfd_arch_d10v:
128 disassemble = print_insn_d10v;
129 break;
130#endif
131#ifdef ARCH_d30v
132 case bfd_arch_d30v:
133 disassemble = print_insn_d30v;
134 break;
135#endif
d172d4ba
NC
136#ifdef ARCH_dlx
137 case bfd_arch_dlx:
138 /* As far as I know we only handle big-endian DLX objects. */
139 disassemble = print_insn_dlx;
140 break;
141#endif
252b5132
RH
142#ifdef ARCH_h8300
143 case bfd_arch_h8300:
144 if (bfd_get_mach(abfd) == bfd_mach_h8300h)
145 disassemble = print_insn_h8300h;
146 else if (bfd_get_mach(abfd) == bfd_mach_h8300s)
147 disassemble = print_insn_h8300s;
b7ed8fad 148 else
252b5132
RH
149 disassemble = print_insn_h8300;
150 break;
151#endif
152#ifdef ARCH_h8500
153 case bfd_arch_h8500:
154 disassemble = print_insn_h8500;
155 break;
156#endif
157#ifdef ARCH_hppa
158 case bfd_arch_hppa:
159 disassemble = print_insn_hppa;
160 break;
161#endif
5b93d8bb
AM
162#ifdef ARCH_i370
163 case bfd_arch_i370:
164 disassemble = print_insn_i370;
165 break;
166#endif
252b5132
RH
167#ifdef ARCH_i386
168 case bfd_arch_i386:
e396998b 169 disassemble = print_insn_i386;
252b5132
RH
170 break;
171#endif
9d751335
JE
172#ifdef ARCH_i860
173 case bfd_arch_i860:
174 disassemble = print_insn_i860;
175 break;
176#endif
252b5132
RH
177#ifdef ARCH_i960
178 case bfd_arch_i960:
179 disassemble = print_insn_i960;
180 break;
181#endif
800eeca4
JW
182#ifdef ARCH_ia64
183 case bfd_arch_ia64:
184 disassemble = print_insn_ia64;
185 break;
186#endif
a40cbfa3
NC
187#ifdef ARCH_ip2k
188 case bfd_arch_ip2k:
189 disassemble = print_insn_ip2k;
190 break;
191#endif
252b5132
RH
192#ifdef ARCH_fr30
193 case bfd_arch_fr30:
194 disassemble = print_insn_fr30;
195 break;
196#endif
197#ifdef ARCH_m32r
198 case bfd_arch_m32r:
199 disassemble = print_insn_m32r;
200 break;
201#endif
60bcf0fa
NC
202#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
203 case bfd_arch_m68hc11:
204 disassemble = print_insn_m68hc11;
205 break;
206 case bfd_arch_m68hc12:
207 disassemble = print_insn_m68hc12;
208 break;
209#endif
252b5132
RH
210#ifdef ARCH_m68k
211 case bfd_arch_m68k:
212 disassemble = print_insn_m68k;
213 break;
214#endif
215#ifdef ARCH_m88k
216 case bfd_arch_m88k:
217 disassemble = print_insn_m88k;
218 break;
219#endif
2469cfa2
NC
220#ifdef ARCH_msp430
221 case bfd_arch_msp430:
222 disassemble = print_insn_msp430;
223 break;
224#endif
252b5132
RH
225#ifdef ARCH_ns32k
226 case bfd_arch_ns32k:
227 disassemble = print_insn_ns32k;
228 break;
229#endif
230#ifdef ARCH_mcore
231 case bfd_arch_mcore:
232 disassemble = print_insn_mcore;
233 break;
234#endif
235#ifdef ARCH_mips
236 case bfd_arch_mips:
237 if (bfd_big_endian (abfd))
238 disassemble = print_insn_big_mips;
239 else
240 disassemble = print_insn_little_mips;
241 break;
242#endif
3c3bdf30
NC
243#ifdef ARCH_mmix
244 case bfd_arch_mmix:
245 disassemble = print_insn_mmix;
246 break;
247#endif
252b5132
RH
248#ifdef ARCH_mn10200
249 case bfd_arch_mn10200:
250 disassemble = print_insn_mn10200;
251 break;
252#endif
253#ifdef ARCH_mn10300
254 case bfd_arch_mn10300:
255 disassemble = print_insn_mn10300;
256 break;
257#endif
87e6d782
NC
258#ifdef ARCH_openrisc
259 case bfd_arch_openrisc:
260 disassemble = print_insn_openrisc;
261 break;
262#endif
3b16e843
NC
263#ifdef ARCH_or32
264 case bfd_arch_or32:
265 if (bfd_big_endian (abfd))
266 disassemble = print_insn_big_or32;
267 else
268 disassemble = print_insn_little_or32;
269 break;
270#endif
e135f41b
NC
271#ifdef ARCH_pdp11
272 case bfd_arch_pdp11:
273 disassemble = print_insn_pdp11;
274 break;
275#endif
1e608f98
ILT
276#ifdef ARCH_pj
277 case bfd_arch_pj:
278 disassemble = print_insn_pj;
279 break;
280#endif
252b5132
RH
281#ifdef ARCH_powerpc
282 case bfd_arch_powerpc:
283 if (bfd_big_endian (abfd))
284 disassemble = print_insn_big_powerpc;
285 else
286 disassemble = print_insn_little_powerpc;
287 break;
288#endif
289#ifdef ARCH_rs6000
290 case bfd_arch_rs6000:
39c20e8f 291 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP
292 disassemble = print_insn_big_powerpc;
293 else
294 disassemble = print_insn_rs6000;
252b5132
RH
295 break;
296#endif
a85d7ed0
NC
297#ifdef ARCH_s390
298 case bfd_arch_s390:
299 disassemble = print_insn_s390;
300 break;
301#endif
252b5132
RH
302#ifdef ARCH_sh
303 case bfd_arch_sh:
1c509ca8 304 disassemble = print_insn_sh;
252b5132
RH
305 break;
306#endif
307#ifdef ARCH_sparc
308 case bfd_arch_sparc:
309 disassemble = print_insn_sparc;
310 break;
311#endif
312#ifdef ARCH_tic30
313 case bfd_arch_tic30:
314 disassemble = print_insn_tic30;
315 break;
316#endif
026df7c5
NC
317#ifdef ARCH_tic4x
318 case bfd_arch_tic4x:
319 disassemble = print_insn_tic4x;
320 break;
321#endif
5c84d377
TW
322#ifdef ARCH_tic54x
323 case bfd_arch_tic54x:
324 disassemble = print_insn_tic54x;
325 break;
326#endif
252b5132
RH
327#ifdef ARCH_tic80
328 case bfd_arch_tic80:
329 disassemble = print_insn_tic80;
330 break;
331#endif
332#ifdef ARCH_v850
333 case bfd_arch_v850:
334 disassemble = print_insn_v850;
335 break;
336#endif
337#ifdef ARCH_w65
338 case bfd_arch_w65:
339 disassemble = print_insn_w65;
340 break;
341#endif
93fbbb04
GK
342#ifdef ARCH_xstormy16
343 case bfd_arch_xstormy16:
344 disassemble = print_insn_xstormy16;
345 break;
346#endif
e0001a05
NC
347#ifdef ARCH_xtensa
348 case bfd_arch_xtensa:
349 disassemble = print_insn_xtensa;
350 break;
351#endif
252b5132
RH
352#ifdef ARCH_z8k
353 case bfd_arch_z8k:
354 if (bfd_get_mach(abfd) == bfd_mach_z8001)
355 disassemble = print_insn_z8001;
b7ed8fad 356 else
252b5132
RH
357 disassemble = print_insn_z8002;
358 break;
359#endif
360#ifdef ARCH_vax
361 case bfd_arch_vax:
362 disassemble = print_insn_vax;
363 break;
fd3c93d5
DB
364#endif
365#ifdef ARCH_frv
366 case bfd_arch_frv:
367 disassemble = print_insn_frv;
368 break;
47b1a55a
SC
369#endif
370#ifdef ARCH_iq2000
371 case bfd_arch_iq2000:
372 disassemble = print_insn_iq2000;
373 break;
252b5132
RH
374#endif
375 default:
376 return 0;
377 }
378 return disassemble;
379}
94470b23
NC
380
381void
9aaaa291 382disassembler_usage (stream)
7f32bebc 383 FILE * stream ATTRIBUTE_UNUSED;
94470b23 384{
58efb6c0
NC
385#ifdef ARCH_arm
386 print_arm_disassembler_options (stream);
387#endif
640c0ccd
CD
388#ifdef ARCH_mips
389 print_mips_disassembler_options (stream);
390#endif
07dd56a9
NC
391#ifdef ARCH_powerpc
392 print_ppc_disassembler_options (stream);
393#endif
b7ed8fad 394
94470b23
NC
395 return;
396}
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