PR ld/1540
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
aef6203b
AM
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005 Free Software Foundation, Inc.
252b5132 4
7499d566
NC
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
252b5132 9
7499d566
NC
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
252b5132 14
7499d566
NC
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
f4321104 17 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132 18
0d8dfecf 19#include "sysdep.h"
252b5132
RH
20#include "dis-asm.h"
21
22#ifdef ARCH_all
252b5132
RH
23#define ARCH_alpha
24#define ARCH_arc
25#define ARCH_arm
adde6300 26#define ARCH_avr
4b7f6baa 27#define ARCH_bfin
6c95a37f 28#define ARCH_cris
1fe1f39c 29#define ARCH_crx
252b5132
RH
30#define ARCH_d10v
31#define ARCH_d30v
d172d4ba 32#define ARCH_dlx
e729279b
NC
33#define ARCH_fr30
34#define ARCH_frv
252b5132
RH
35#define ARCH_h8300
36#define ARCH_h8500
37#define ARCH_hppa
5b93d8bb 38#define ARCH_i370
252b5132 39#define ARCH_i386
9d751335 40#define ARCH_i860
252b5132 41#define ARCH_i960
800eeca4 42#define ARCH_ia64
e729279b
NC
43#define ARCH_ip2k
44#define ARCH_iq2000
45#define ARCH_m32c
252b5132 46#define ARCH_m32r
60bcf0fa
NC
47#define ARCH_m68hc11
48#define ARCH_m68hc12
e729279b 49#define ARCH_m68k
252b5132 50#define ARCH_m88k
7499d566 51#define ARCH_maxq
252b5132
RH
52#define ARCH_mcore
53#define ARCH_mips
3c3bdf30 54#define ARCH_mmix
252b5132
RH
55#define ARCH_mn10200
56#define ARCH_mn10300
ac188222 57#define ARCH_ms1
2469cfa2 58#define ARCH_msp430
252b5132 59#define ARCH_ns32k
87e6d782 60#define ARCH_openrisc
3b16e843 61#define ARCH_or32
e135f41b 62#define ARCH_pdp11
1e608f98 63#define ARCH_pj
252b5132
RH
64#define ARCH_powerpc
65#define ARCH_rs6000
a85d7ed0 66#define ARCH_s390
252b5132
RH
67#define ARCH_sh
68#define ARCH_sparc
69#define ARCH_tic30
026df7c5 70#define ARCH_tic4x
5c84d377 71#define ARCH_tic54x
252b5132
RH
72#define ARCH_tic80
73#define ARCH_v850
74#define ARCH_vax
75#define ARCH_w65
93fbbb04 76#define ARCH_xstormy16
e0001a05 77#define ARCH_xtensa
252b5132 78#define ARCH_z8k
d28847ce 79#define INCLUDE_SHMEDIA
252b5132
RH
80#endif
81
49f58d10
JB
82#ifdef ARCH_m32c
83#include "m32c-desc.h"
84#endif
252b5132
RH
85
86disassembler_ftype
87disassembler (abfd)
88 bfd *abfd;
89{
90 enum bfd_architecture a = bfd_get_arch (abfd);
91 disassembler_ftype disassemble;
92
93 switch (a)
94 {
95 /* If you add a case to this table, also add it to the
96 ARCH_all definition right above this function. */
252b5132
RH
97#ifdef ARCH_alpha
98 case bfd_arch_alpha:
99 disassemble = print_insn_alpha;
100 break;
101#endif
102#ifdef ARCH_arc
103 case bfd_arch_arc:
104 {
0d2bcfaf 105 disassemble = arc_get_disassembler (abfd);
252b5132
RH
106 break;
107 }
108#endif
109#ifdef ARCH_arm
110 case bfd_arch_arm:
111 if (bfd_big_endian (abfd))
112 disassemble = print_insn_big_arm;
113 else
114 disassemble = print_insn_little_arm;
115 break;
116#endif
adde6300
AM
117#ifdef ARCH_avr
118 case bfd_arch_avr:
119 disassemble = print_insn_avr;
120 break;
121#endif
4b7f6baa
CM
122#ifdef ARCH_bfin
123 case bfd_arch_bfin:
124 disassemble = print_insn_bfin;
125 break;
126#endif
6c95a37f
HPN
127#ifdef ARCH_cris
128 case bfd_arch_cris:
78966507 129 disassemble = cris_get_disassembler (abfd);
6c95a37f 130 break;
1fe1f39c
NC
131#endif
132#ifdef ARCH_crx
133 case bfd_arch_crx:
134 disassemble = print_insn_crx;
135 break;
6c95a37f 136#endif
252b5132
RH
137#ifdef ARCH_d10v
138 case bfd_arch_d10v:
139 disassemble = print_insn_d10v;
140 break;
141#endif
142#ifdef ARCH_d30v
143 case bfd_arch_d30v:
144 disassemble = print_insn_d30v;
145 break;
146#endif
d172d4ba
NC
147#ifdef ARCH_dlx
148 case bfd_arch_dlx:
149 /* As far as I know we only handle big-endian DLX objects. */
150 disassemble = print_insn_dlx;
151 break;
152#endif
252b5132
RH
153#ifdef ARCH_h8300
154 case bfd_arch_h8300:
049f8936
NC
155 if (bfd_get_mach (abfd) == bfd_mach_h8300h
156 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 157 disassemble = print_insn_h8300h;
049f8936 158 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 159 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO
160 || bfd_get_mach (abfd) == bfd_mach_h8300sx
161 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 162 disassemble = print_insn_h8300s;
b7ed8fad 163 else
252b5132
RH
164 disassemble = print_insn_h8300;
165 break;
166#endif
167#ifdef ARCH_h8500
168 case bfd_arch_h8500:
169 disassemble = print_insn_h8500;
170 break;
171#endif
172#ifdef ARCH_hppa
173 case bfd_arch_hppa:
174 disassemble = print_insn_hppa;
175 break;
176#endif
5b93d8bb
AM
177#ifdef ARCH_i370
178 case bfd_arch_i370:
179 disassemble = print_insn_i370;
180 break;
181#endif
252b5132
RH
182#ifdef ARCH_i386
183 case bfd_arch_i386:
e396998b 184 disassemble = print_insn_i386;
252b5132
RH
185 break;
186#endif
9d751335
JE
187#ifdef ARCH_i860
188 case bfd_arch_i860:
189 disassemble = print_insn_i860;
190 break;
191#endif
252b5132
RH
192#ifdef ARCH_i960
193 case bfd_arch_i960:
194 disassemble = print_insn_i960;
195 break;
196#endif
800eeca4
JW
197#ifdef ARCH_ia64
198 case bfd_arch_ia64:
199 disassemble = print_insn_ia64;
200 break;
201#endif
a40cbfa3
NC
202#ifdef ARCH_ip2k
203 case bfd_arch_ip2k:
204 disassemble = print_insn_ip2k;
205 break;
206#endif
252b5132
RH
207#ifdef ARCH_fr30
208 case bfd_arch_fr30:
209 disassemble = print_insn_fr30;
210 break;
211#endif
212#ifdef ARCH_m32r
213 case bfd_arch_m32r:
214 disassemble = print_insn_m32r;
215 break;
216#endif
60bcf0fa
NC
217#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
218 case bfd_arch_m68hc11:
219 disassemble = print_insn_m68hc11;
220 break;
221 case bfd_arch_m68hc12:
222 disassemble = print_insn_m68hc12;
223 break;
224#endif
252b5132
RH
225#ifdef ARCH_m68k
226 case bfd_arch_m68k:
227 disassemble = print_insn_m68k;
228 break;
229#endif
230#ifdef ARCH_m88k
231 case bfd_arch_m88k:
232 disassemble = print_insn_m88k;
233 break;
234#endif
7499d566
NC
235#ifdef ARCH_maxq
236 case bfd_arch_maxq:
237 disassemble = print_insn_maxq_little;
238 break;
239#endif
ac188222
DB
240#ifdef ARCH_ms1
241 case bfd_arch_ms1:
242 disassemble = print_insn_ms1;
243 break;
244#endif
2469cfa2
NC
245#ifdef ARCH_msp430
246 case bfd_arch_msp430:
247 disassemble = print_insn_msp430;
248 break;
249#endif
252b5132
RH
250#ifdef ARCH_ns32k
251 case bfd_arch_ns32k:
252 disassemble = print_insn_ns32k;
253 break;
254#endif
255#ifdef ARCH_mcore
256 case bfd_arch_mcore:
257 disassemble = print_insn_mcore;
258 break;
259#endif
260#ifdef ARCH_mips
261 case bfd_arch_mips:
262 if (bfd_big_endian (abfd))
263 disassemble = print_insn_big_mips;
264 else
265 disassemble = print_insn_little_mips;
266 break;
267#endif
3c3bdf30
NC
268#ifdef ARCH_mmix
269 case bfd_arch_mmix:
270 disassemble = print_insn_mmix;
271 break;
272#endif
252b5132
RH
273#ifdef ARCH_mn10200
274 case bfd_arch_mn10200:
275 disassemble = print_insn_mn10200;
276 break;
277#endif
278#ifdef ARCH_mn10300
279 case bfd_arch_mn10300:
280 disassemble = print_insn_mn10300;
281 break;
282#endif
87e6d782
NC
283#ifdef ARCH_openrisc
284 case bfd_arch_openrisc:
285 disassemble = print_insn_openrisc;
286 break;
287#endif
3b16e843
NC
288#ifdef ARCH_or32
289 case bfd_arch_or32:
290 if (bfd_big_endian (abfd))
291 disassemble = print_insn_big_or32;
292 else
293 disassemble = print_insn_little_or32;
294 break;
295#endif
e135f41b
NC
296#ifdef ARCH_pdp11
297 case bfd_arch_pdp11:
298 disassemble = print_insn_pdp11;
299 break;
300#endif
1e608f98
ILT
301#ifdef ARCH_pj
302 case bfd_arch_pj:
303 disassemble = print_insn_pj;
304 break;
305#endif
252b5132
RH
306#ifdef ARCH_powerpc
307 case bfd_arch_powerpc:
308 if (bfd_big_endian (abfd))
309 disassemble = print_insn_big_powerpc;
310 else
311 disassemble = print_insn_little_powerpc;
312 break;
313#endif
314#ifdef ARCH_rs6000
315 case bfd_arch_rs6000:
39c20e8f 316 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP
317 disassemble = print_insn_big_powerpc;
318 else
319 disassemble = print_insn_rs6000;
252b5132
RH
320 break;
321#endif
a85d7ed0
NC
322#ifdef ARCH_s390
323 case bfd_arch_s390:
324 disassemble = print_insn_s390;
325 break;
326#endif
252b5132
RH
327#ifdef ARCH_sh
328 case bfd_arch_sh:
1c509ca8 329 disassemble = print_insn_sh;
252b5132
RH
330 break;
331#endif
332#ifdef ARCH_sparc
333 case bfd_arch_sparc:
334 disassemble = print_insn_sparc;
335 break;
336#endif
337#ifdef ARCH_tic30
338 case bfd_arch_tic30:
339 disassemble = print_insn_tic30;
340 break;
341#endif
026df7c5
NC
342#ifdef ARCH_tic4x
343 case bfd_arch_tic4x:
344 disassemble = print_insn_tic4x;
345 break;
346#endif
5c84d377
TW
347#ifdef ARCH_tic54x
348 case bfd_arch_tic54x:
349 disassemble = print_insn_tic54x;
350 break;
351#endif
252b5132
RH
352#ifdef ARCH_tic80
353 case bfd_arch_tic80:
354 disassemble = print_insn_tic80;
355 break;
356#endif
357#ifdef ARCH_v850
358 case bfd_arch_v850:
359 disassemble = print_insn_v850;
360 break;
361#endif
362#ifdef ARCH_w65
363 case bfd_arch_w65:
364 disassemble = print_insn_w65;
365 break;
366#endif
93fbbb04
GK
367#ifdef ARCH_xstormy16
368 case bfd_arch_xstormy16:
369 disassemble = print_insn_xstormy16;
370 break;
371#endif
e0001a05
NC
372#ifdef ARCH_xtensa
373 case bfd_arch_xtensa:
374 disassemble = print_insn_xtensa;
375 break;
376#endif
252b5132
RH
377#ifdef ARCH_z8k
378 case bfd_arch_z8k:
379 if (bfd_get_mach(abfd) == bfd_mach_z8001)
380 disassemble = print_insn_z8001;
b7ed8fad 381 else
252b5132
RH
382 disassemble = print_insn_z8002;
383 break;
384#endif
385#ifdef ARCH_vax
386 case bfd_arch_vax:
387 disassemble = print_insn_vax;
388 break;
fd3c93d5
DB
389#endif
390#ifdef ARCH_frv
391 case bfd_arch_frv:
392 disassemble = print_insn_frv;
393 break;
47b1a55a
SC
394#endif
395#ifdef ARCH_iq2000
396 case bfd_arch_iq2000:
397 disassemble = print_insn_iq2000;
398 break;
49f58d10
JB
399#endif
400#ifdef ARCH_m32c
401 case bfd_arch_m32c:
402 disassemble = print_insn_m32c;
403 break;
252b5132
RH
404#endif
405 default:
406 return 0;
407 }
408 return disassemble;
409}
94470b23
NC
410
411void
9aaaa291 412disassembler_usage (stream)
7f32bebc 413 FILE * stream ATTRIBUTE_UNUSED;
94470b23 414{
58efb6c0
NC
415#ifdef ARCH_arm
416 print_arm_disassembler_options (stream);
417#endif
640c0ccd
CD
418#ifdef ARCH_mips
419 print_mips_disassembler_options (stream);
420#endif
07dd56a9
NC
421#ifdef ARCH_powerpc
422 print_ppc_disassembler_options (stream);
423#endif
b7ed8fad 424
94470b23
NC
425 return;
426}
22a398e1
NC
427
428void
429disassemble_init_for_target (struct disassemble_info * info)
430{
431 if (info == NULL)
432 return;
433
434 switch (info->arch)
435 {
436#ifdef ARCH_arm
437 case bfd_arch_arm:
438 info->symbol_is_valid = arm_symbol_is_valid;
439 break;
0bcb06d2
AS
440#endif
441#ifdef ARCH_ia64
442 case bfd_arch_ia64:
443 info->skip_zeroes = 16;
444 break;
445#endif
446#ifdef ARCH_tic4x
447 case bfd_arch_tic4x:
448 info->skip_zeroes = 32;
49f58d10
JB
449#endif
450#ifdef ARCH_m32c
451 case bfd_arch_m32c:
452 info->endian = BFD_ENDIAN_BIG;
453 if (info->mach == bfd_mach_m16c)
760c0f6a 454 info->insn_sets = 1 << ISA_M16C;
49f58d10 455 else
760c0f6a 456 info->insn_sets = 1 << ISA_M32C;
49f58d10 457 break;
22a398e1
NC
458#endif
459 default:
460 break;
461 }
462}
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