projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
* linux-low.c (linux_wait_for_event): Correct comment typos.
[deliverable/binutils-gdb.git] / opcodes / frv-desc.c
CommitLineData
fd3c93d5
DB		 1/* CPU data for frv.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
390ff83f 5Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
fd3c93d5
DB		 6
7This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23*/
24
25#include "sysdep.h"
26#include <stdio.h>
27#include <stdarg.h>
28#include "ansidecl.h"
29#include "bfd.h"
30#include "symcat.h"
31#include "frv-desc.h"
32#include "frv-opc.h"
33#include "opintl.h"
34#include "libiberty.h"
98f70fc4 35#include "xregex.h"
fd3c93d5
DB		 36
37/* Attributes. */
38
39static const CGEN_ATTR_ENTRY bool_attr[] =
40{
41 { "#f", 0 },
42 { "#t", 1 },
43 { 0, 0 }
44};
45
46static const CGEN_ATTR_ENTRY MACH_attr[] =
47{
48 { "base", MACH_BASE },
49 { "frv", MACH_FRV },
50 { "fr500", MACH_FR500 },
51 { "fr400", MACH_FR400 },
52 { "tomcat", MACH_TOMCAT },
53 { "simple", MACH_SIMPLE },
54 { "max", MACH_MAX },
55 { 0, 0 }
56};
57
58static const CGEN_ATTR_ENTRY ISA_attr[] =
59{
60 { "frv", ISA_FRV },
61 { "max", ISA_MAX },
62 { 0, 0 }
63};
64
65static const CGEN_ATTR_ENTRY UNIT_attr[] =
66{
67 { "NIL", UNIT_NIL },
68 { "I0", UNIT_I0 },
69 { "I1", UNIT_I1 },
70 { "I01", UNIT_I01 },
71 { "FM0", UNIT_FM0 },
72 { "FM1", UNIT_FM1 },
73 { "FM01", UNIT_FM01 },
74 { "B0", UNIT_B0 },
75 { "B1", UNIT_B1 },
76 { "B01", UNIT_B01 },
77 { "C", UNIT_C },
78 { "MULT_DIV", UNIT_MULT_DIV },
79 { "LOAD", UNIT_LOAD },
80 { "NUM_UNITS", UNIT_NUM_UNITS },
81 { 0, 0 }
82};
83
84static const CGEN_ATTR_ENTRY FR400_MAJOR_attr[] =
85{
86 { "NONE", FR400_MAJOR_NONE },
87 { "I_1", FR400_MAJOR_I_1 },
88 { "I_2", FR400_MAJOR_I_2 },
89 { "I_3", FR400_MAJOR_I_3 },
90 { "I_4", FR400_MAJOR_I_4 },
91 { "I_5", FR400_MAJOR_I_5 },
92 { "B_1", FR400_MAJOR_B_1 },
93 { "B_2", FR400_MAJOR_B_2 },
94 { "B_3", FR400_MAJOR_B_3 },
95 { "B_4", FR400_MAJOR_B_4 },
96 { "B_5", FR400_MAJOR_B_5 },
97 { "B_6", FR400_MAJOR_B_6 },
98 { "C_1", FR400_MAJOR_C_1 },
99 { "C_2", FR400_MAJOR_C_2 },
100 { "M_1", FR400_MAJOR_M_1 },
101 { "M_2", FR400_MAJOR_M_2 },
102 { 0, 0 }
103};
104
105static const CGEN_ATTR_ENTRY FR500_MAJOR_attr[] =
106{
107 { "NONE", FR500_MAJOR_NONE },
108 { "I_1", FR500_MAJOR_I_1 },
109 { "I_2", FR500_MAJOR_I_2 },
110 { "I_3", FR500_MAJOR_I_3 },
111 { "I_4", FR500_MAJOR_I_4 },
112 { "I_5", FR500_MAJOR_I_5 },
113 { "I_6", FR500_MAJOR_I_6 },
114 { "B_1", FR500_MAJOR_B_1 },
115 { "B_2", FR500_MAJOR_B_2 },
116 { "B_3", FR500_MAJOR_B_3 },
117 { "B_4", FR500_MAJOR_B_4 },
118 { "B_5", FR500_MAJOR_B_5 },
119 { "B_6", FR500_MAJOR_B_6 },
120 { "C_1", FR500_MAJOR_C_1 },
121 { "C_2", FR500_MAJOR_C_2 },
122 { "F_1", FR500_MAJOR_F_1 },
123 { "F_2", FR500_MAJOR_F_2 },
124 { "F_3", FR500_MAJOR_F_3 },
125 { "F_4", FR500_MAJOR_F_4 },
126 { "F_5", FR500_MAJOR_F_5 },
127 { "F_6", FR500_MAJOR_F_6 },
128 { "F_7", FR500_MAJOR_F_7 },
129 { "F_8", FR500_MAJOR_F_8 },
130 { "M_1", FR500_MAJOR_M_1 },
131 { "M_2", FR500_MAJOR_M_2 },
132 { "M_3", FR500_MAJOR_M_3 },
133 { "M_4", FR500_MAJOR_M_4 },
134 { "M_5", FR500_MAJOR_M_5 },
135 { "M_6", FR500_MAJOR_M_6 },
136 { "M_7", FR500_MAJOR_M_7 },
137 { "M_8", FR500_MAJOR_M_8 },
138 { 0, 0 }
139};
140
141const CGEN_ATTR_TABLE frv_cgen_ifield_attr_table[] =
142{
143 { "MACH", & MACH_attr[0], & MACH_attr[0] },
144 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
145 { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
146 { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
147 { "RESERVED", &bool_attr[0], &bool_attr[0] },
148 { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
149 { "SIGNED", &bool_attr[0], &bool_attr[0] },
150 { 0, 0, 0 }
151};
152
153const CGEN_ATTR_TABLE frv_cgen_hardware_attr_table[] =
154{
155 { "MACH", & MACH_attr[0], & MACH_attr[0] },
156 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
157 { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] },
158 { "PC", &bool_attr[0], &bool_attr[0] },
159 { "PROFILE", &bool_attr[0], &bool_attr[0] },
160 { 0, 0, 0 }
161};
162
163const CGEN_ATTR_TABLE frv_cgen_operand_attr_table[] =
164{
165 { "MACH", & MACH_attr[0], & MACH_attr[0] },
166 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
167 { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
168 { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
169 { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
170 { "SIGNED", &bool_attr[0], &bool_attr[0] },
171 { "NEGATIVE", &bool_attr[0], &bool_attr[0] },
172 { "RELAX", &bool_attr[0], &bool_attr[0] },
173 { "SEM-ONLY", &bool_attr[0], &bool_attr[0] },
174 { "HASH-PREFIX", &bool_attr[0], &bool_attr[0] },
175 { 0, 0, 0 }
176};
177
178const CGEN_ATTR_TABLE frv_cgen_insn_attr_table[] =
179{
180 { "MACH", & MACH_attr[0], & MACH_attr[0] },
181 { "UNIT", & UNIT_attr[0], & UNIT_attr[0] },
182 { "FR400-MAJOR", & FR400_MAJOR_attr[0], & FR400_MAJOR_attr[0] },
183 { "FR500-MAJOR", & FR500_MAJOR_attr[0], & FR500_MAJOR_attr[0] },
184 { "ALIAS", &bool_attr[0], &bool_attr[0] },
185 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
186 { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
187 { "COND-CTI", &bool_attr[0], &bool_attr[0] },
188 { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
189 { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
190 { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
191 { "RELAX", &bool_attr[0], &bool_attr[0] },
192 { "NO-DIS", &bool_attr[0], &bool_attr[0] },
193 { "PBB", &bool_attr[0], &bool_attr[0] },
194 { "PRIVILEGED", &bool_attr[0], &bool_attr[0] },
195 { "NON-EXCEPTING", &bool_attr[0], &bool_attr[0] },
196 { "CONDITIONAL", &bool_attr[0], &bool_attr[0] },
197 { "FR-ACCESS", &bool_attr[0], &bool_attr[0] },
198 { "PRESERVE-OVF", &bool_attr[0], &bool_attr[0] },
199 { 0, 0, 0 }
200};
201
202/* Instruction set variants. */
203
204static const CGEN_ISA frv_cgen_isa_table[] = {
205 { "frv", 32, 32, 32, 32 },
206 { 0, 0, 0, 0, 0 }
207};
208
209/* Machine variants. */
210
211static const CGEN_MACH frv_cgen_mach_table[] = {
212 { "frv", "frv", MACH_FRV, 0 },
213 { "fr500", "fr500", MACH_FR500, 0 },
214 { "tomcat", "tomcat", MACH_TOMCAT, 0 },
215 { "fr400", "fr400", MACH_FR400, 0 },
216 { "simple", "simple", MACH_SIMPLE, 0 },
217 { 0, 0, 0, 0 }
218};
219
220static CGEN_KEYWORD_ENTRY frv_cgen_opval_gr_names_entries[] =
221{
222 { "sp", 1, {0, {0}}, 0, 0 },
223 { "fp", 2, {0, {0}}, 0, 0 },
224 { "gr0", 0, {0, {0}}, 0, 0 },
225 { "gr1", 1, {0, {0}}, 0, 0 },
226 { "gr2", 2, {0, {0}}, 0, 0 },
227 { "gr3", 3, {0, {0}}, 0, 0 },
228 { "gr4", 4, {0, {0}}, 0, 0 },
229 { "gr5", 5, {0, {0}}, 0, 0 },
230 { "gr6", 6, {0, {0}}, 0, 0 },
231 { "gr7", 7, {0, {0}}, 0, 0 },
232 { "gr8", 8, {0, {0}}, 0, 0 },
233 { "gr9", 9, {0, {0}}, 0, 0 },
234 { "gr10", 10, {0, {0}}, 0, 0 },
235 { "gr11", 11, {0, {0}}, 0, 0 },
236 { "gr12", 12, {0, {0}}, 0, 0 },
237 { "gr13", 13, {0, {0}}, 0, 0 },
238 { "gr14", 14, {0, {0}}, 0, 0 },
239 { "gr15", 15, {0, {0}}, 0, 0 },
240 { "gr16", 16, {0, {0}}, 0, 0 },
241 { "gr17", 17, {0, {0}}, 0, 0 },
242 { "gr18", 18, {0, {0}}, 0, 0 },
243 { "gr19", 19, {0, {0}}, 0, 0 },
244 { "gr20", 20, {0, {0}}, 0, 0 },
245 { "gr21", 21, {0, {0}}, 0, 0 },
246 { "gr22", 22, {0, {0}}, 0, 0 },
247 { "gr23", 23, {0, {0}}, 0, 0 },
248 { "gr24", 24, {0, {0}}, 0, 0 },
249 { "gr25", 25, {0, {0}}, 0, 0 },
250 { "gr26", 26, {0, {0}}, 0, 0 },
251 { "gr27", 27, {0, {0}}, 0, 0 },
252 { "gr28", 28, {0, {0}}, 0, 0 },
253 { "gr29", 29, {0, {0}}, 0, 0 },
254 { "gr30", 30, {0, {0}}, 0, 0 },
255 { "gr31", 31, {0, {0}}, 0, 0 },
256 { "gr32", 32, {0, {0}}, 0, 0 },
257 { "gr33", 33, {0, {0}}, 0, 0 },
258 { "gr34", 34, {0, {0}}, 0, 0 },
259 { "gr35", 35, {0, {0}}, 0, 0 },
260 { "gr36", 36, {0, {0}}, 0, 0 },
261 { "gr37", 37, {0, {0}}, 0, 0 },
262 { "gr38", 38, {0, {0}}, 0, 0 },
263 { "gr39", 39, {0, {0}}, 0, 0 },
264 { "gr40", 40, {0, {0}}, 0, 0 },
265 { "gr41", 41, {0, {0}}, 0, 0 },
266 { "gr42", 42, {0, {0}}, 0, 0 },
267 { "gr43", 43, {0, {0}}, 0, 0 },
268 { "gr44", 44, {0, {0}}, 0, 0 },
269 { "gr45", 45, {0, {0}}, 0, 0 },
270 { "gr46", 46, {0, {0}}, 0, 0 },
271 { "gr47", 47, {0, {0}}, 0, 0 },
272 { "gr48", 48, {0, {0}}, 0, 0 },
273 { "gr49", 49, {0, {0}}, 0, 0 },
274 { "gr50", 50, {0, {0}}, 0, 0 },
275 { "gr51", 51, {0, {0}}, 0, 0 },
276 { "gr52", 52, {0, {0}}, 0, 0 },
277 { "gr53", 53, {0, {0}}, 0, 0 },
278 { "gr54", 54, {0, {0}}, 0, 0 },
279 { "gr55", 55, {0, {0}}, 0, 0 },
280 { "gr56", 56, {0, {0}}, 0, 0 },
281 { "gr57", 57, {0, {0}}, 0, 0 },
282 { "gr58", 58, {0, {0}}, 0, 0 },
283 { "gr59", 59, {0, {0}}, 0, 0 },
284 { "gr60", 60, {0, {0}}, 0, 0 },
285 { "gr61", 61, {0, {0}}, 0, 0 },
286 { "gr62", 62, {0, {0}}, 0, 0 },
287 { "gr63", 63, {0, {0}}, 0, 0 }
288};
289
290CGEN_KEYWORD frv_cgen_opval_gr_names =
291{
292 & frv_cgen_opval_gr_names_entries[0],
293 66,
294 0, 0, 0, 0, ""
295};
296
297static CGEN_KEYWORD_ENTRY frv_cgen_opval_fr_names_entries[] =
298{
299 { "fr0", 0, {0, {0}}, 0, 0 },
300 { "fr1", 1, {0, {0}}, 0, 0 },
301 { "fr2", 2, {0, {0}}, 0, 0 },
302 { "fr3", 3, {0, {0}}, 0, 0 },
303 { "fr4", 4, {0, {0}}, 0, 0 },
304 { "fr5", 5, {0, {0}}, 0, 0 },
305 { "fr6", 6, {0, {0}}, 0, 0 },
306 { "fr7", 7, {0, {0}}, 0, 0 },
307 { "fr8", 8, {0, {0}}, 0, 0 },
308 { "fr9", 9, {0, {0}}, 0, 0 },
309 { "fr10", 10, {0, {0}}, 0, 0 },
310 { "fr11", 11, {0, {0}}, 0, 0 },
311 { "fr12", 12, {0, {0}}, 0, 0 },
312 { "fr13", 13, {0, {0}}, 0, 0 },
313 { "fr14", 14, {0, {0}}, 0, 0 },
314 { "fr15", 15, {0, {0}}, 0, 0 },
315 { "fr16", 16, {0, {0}}, 0, 0 },
316 { "fr17", 17, {0, {0}}, 0, 0 },
317 { "fr18", 18, {0, {0}}, 0, 0 },
318 { "fr19", 19, {0, {0}}, 0, 0 },
319 { "fr20", 20, {0, {0}}, 0, 0 },
320 { "fr21", 21, {0, {0}}, 0, 0 },
321 { "fr22", 22, {0, {0}}, 0, 0 },
322 { "fr23", 23, {0, {0}}, 0, 0 },
323 { "fr24", 24, {0, {0}}, 0, 0 },
324 { "fr25", 25, {0, {0}}, 0, 0 },
325 { "fr26", 26, {0, {0}}, 0, 0 },
326 { "fr27", 27, {0, {0}}, 0, 0 },
327 { "fr28", 28, {0, {0}}, 0, 0 },
328 { "fr29", 29, {0, {0}}, 0, 0 },
329 { "fr30", 30, {0, {0}}, 0, 0 },
330 { "fr31", 31, {0, {0}}, 0, 0 },
331 { "fr32", 32, {0, {0}}, 0, 0 },
332 { "fr33", 33, {0, {0}}, 0, 0 },
333 { "fr34", 34, {0, {0}}, 0, 0 },
334 { "fr35", 35, {0, {0}}, 0, 0 },
335 { "fr36", 36, {0, {0}}, 0, 0 },
336 { "fr37", 37, {0, {0}}, 0, 0 },
337 { "fr38", 38, {0, {0}}, 0, 0 },
338 { "fr39", 39, {0, {0}}, 0, 0 },
339 { "fr40", 40, {0, {0}}, 0, 0 },
340 { "fr41", 41, {0, {0}}, 0, 0 },
341 { "fr42", 42, {0, {0}}, 0, 0 },
342 { "fr43", 43, {0, {0}}, 0, 0 },
343 { "fr44", 44, {0, {0}}, 0, 0 },
344 { "fr45", 45, {0, {0}}, 0, 0 },
345 { "fr46", 46, {0, {0}}, 0, 0 },
346 { "fr47", 47, {0, {0}}, 0, 0 },
347 { "fr48", 48, {0, {0}}, 0, 0 },
348 { "fr49", 49, {0, {0}}, 0, 0 },
349 { "fr50", 50, {0, {0}}, 0, 0 },
350 { "fr51", 51, {0, {0}}, 0, 0 },
351 { "fr52", 52, {0, {0}}, 0, 0 },
352 { "fr53", 53, {0, {0}}, 0, 0 },
353 { "fr54", 54, {0, {0}}, 0, 0 },
354 { "fr55", 55, {0, {0}}, 0, 0 },
355 { "fr56", 56, {0, {0}}, 0, 0 },
356 { "fr57", 57, {0, {0}}, 0, 0 },
357 { "fr58", 58, {0, {0}}, 0, 0 },
358 { "fr59", 59, {0, {0}}, 0, 0 },
359 { "fr60", 60, {0, {0}}, 0, 0 },
360 { "fr61", 61, {0, {0}}, 0, 0 },
361 { "fr62", 62, {0, {0}}, 0, 0 },
362 { "fr63", 63, {0, {0}}, 0, 0 }
363};
364
365CGEN_KEYWORD frv_cgen_opval_fr_names =
366{
367 & frv_cgen_opval_fr_names_entries[0],
368 64,
369 0, 0, 0, 0, ""
370};
371
372static CGEN_KEYWORD_ENTRY frv_cgen_opval_cpr_names_entries[] =
373{
374 { "cpr0", 0, {0, {0}}, 0, 0 },
375 { "cpr1", 1, {0, {0}}, 0, 0 },
376 { "cpr2", 2, {0, {0}}, 0, 0 },
377 { "cpr3", 3, {0, {0}}, 0, 0 },
378 { "cpr4", 4, {0, {0}}, 0, 0 },
379 { "cpr5", 5, {0, {0}}, 0, 0 },
380 { "cpr6", 6, {0, {0}}, 0, 0 },
381 { "cpr7", 7, {0, {0}}, 0, 0 },
382 { "cpr8", 8, {0, {0}}, 0, 0 },
383 { "cpr9", 9, {0, {0}}, 0, 0 },
384 { "cpr10", 10, {0, {0}}, 0, 0 },
385 { "cpr11", 11, {0, {0}}, 0, 0 },
386 { "cpr12", 12, {0, {0}}, 0, 0 },
387 { "cpr13", 13, {0, {0}}, 0, 0 },
388 { "cpr14", 14, {0, {0}}, 0, 0 },
389 { "cpr15", 15, {0, {0}}, 0, 0 },
390 { "cpr16", 16, {0, {0}}, 0, 0 },
391 { "cpr17", 17, {0, {0}}, 0, 0 },
392 { "cpr18", 18, {0, {0}}, 0, 0 },
393 { "cpr19", 19, {0, {0}}, 0, 0 },
394 { "cpr20", 20, {0, {0}}, 0, 0 },
395 { "cpr21", 21, {0, {0}}, 0, 0 },
396 { "cpr22", 22, {0, {0}}, 0, 0 },
397 { "cpr23", 23, {0, {0}}, 0, 0 },
398 { "cpr24", 24, {0, {0}}, 0, 0 },
399 { "cpr25", 25, {0, {0}}, 0, 0 },
400 { "cpr26", 26, {0, {0}}, 0, 0 },
401 { "cpr27", 27, {0, {0}}, 0, 0 },
402 { "cpr28", 28, {0, {0}}, 0, 0 },
403 { "cpr29", 29, {0, {0}}, 0, 0 },
404 { "cpr30", 30, {0, {0}}, 0, 0 },
405 { "cpr31", 31, {0, {0}}, 0, 0 },
406 { "cpr32", 32, {0, {0}}, 0, 0 },
407 { "cpr33", 33, {0, {0}}, 0, 0 },
408 { "cpr34", 34, {0, {0}}, 0, 0 },
409 { "cpr35", 35, {0, {0}}, 0, 0 },
410 { "cpr36", 36, {0, {0}}, 0, 0 },
411 { "cpr37", 37, {0, {0}}, 0, 0 },
412 { "cpr38", 38, {0, {0}}, 0, 0 },
413 { "cpr39", 39, {0, {0}}, 0, 0 },
414 { "cpr40", 40, {0, {0}}, 0, 0 },
415 { "cpr41", 41, {0, {0}}, 0, 0 },
416 { "cpr42", 42, {0, {0}}, 0, 0 },
417 { "cpr43", 43, {0, {0}}, 0, 0 },
418 { "cpr44", 44, {0, {0}}, 0, 0 },
419 { "cpr45", 45, {0, {0}}, 0, 0 },
420 { "cpr46", 46, {0, {0}}, 0, 0 },
421 { "cpr47", 47, {0, {0}}, 0, 0 },
422 { "cpr48", 48, {0, {0}}, 0, 0 },
423 { "cpr49", 49, {0, {0}}, 0, 0 },
424 { "cpr50", 50, {0, {0}}, 0, 0 },
425 { "cpr51", 51, {0, {0}}, 0, 0 },
426 { "cpr52", 52, {0, {0}}, 0, 0 },
427 { "cpr53", 53, {0, {0}}, 0, 0 },
428 { "cpr54", 54, {0, {0}}, 0, 0 },
429 { "cpr55", 55, {0, {0}}, 0, 0 },
430 { "cpr56", 56, {0, {0}}, 0, 0 },
431 { "cpr57", 57, {0, {0}}, 0, 0 },
432 { "cpr58", 58, {0, {0}}, 0, 0 },
433 { "cpr59", 59, {0, {0}}, 0, 0 },
434 { "cpr60", 60, {0, {0}}, 0, 0 },
435 { "cpr61", 61, {0, {0}}, 0, 0 },
436 { "cpr62", 62, {0, {0}}, 0, 0 },
437 { "cpr63", 63, {0, {0}}, 0, 0 }
438};
439
440CGEN_KEYWORD frv_cgen_opval_cpr_names =
441{
442 & frv_cgen_opval_cpr_names_entries[0],
443 64,
444 0, 0, 0, 0, ""
445};
446
447static CGEN_KEYWORD_ENTRY frv_cgen_opval_spr_names_entries[] =
448{
449 { "psr", 0, {0, {0}}, 0, 0 },
450 { "pcsr", 1, {0, {0}}, 0, 0 },
451 { "bpcsr", 2, {0, {0}}, 0, 0 },
452 { "tbr", 3, {0, {0}}, 0, 0 },
453 { "bpsr", 4, {0, {0}}, 0, 0 },
454 { "hsr0", 16, {0, {0}}, 0, 0 },
455 { "hsr1", 17, {0, {0}}, 0, 0 },
456 { "hsr2", 18, {0, {0}}, 0, 0 },
457 { "hsr3", 19, {0, {0}}, 0, 0 },
458 { "hsr4", 20, {0, {0}}, 0, 0 },
459 { "hsr5", 21, {0, {0}}, 0, 0 },
460 { "hsr6", 22, {0, {0}}, 0, 0 },
461 { "hsr7", 23, {0, {0}}, 0, 0 },
462 { "hsr8", 24, {0, {0}}, 0, 0 },
463 { "hsr9", 25, {0, {0}}, 0, 0 },
464 { "hsr10", 26, {0, {0}}, 0, 0 },
465 { "hsr11", 27, {0, {0}}, 0, 0 },
466 { "hsr12", 28, {0, {0}}, 0, 0 },
467 { "hsr13", 29, {0, {0}}, 0, 0 },
468 { "hsr14", 30, {0, {0}}, 0, 0 },
469 { "hsr15", 31, {0, {0}}, 0, 0 },
470 { "hsr16", 32, {0, {0}}, 0, 0 },
471 { "hsr17", 33, {0, {0}}, 0, 0 },
472 { "hsr18", 34, {0, {0}}, 0, 0 },
473 { "hsr19", 35, {0, {0}}, 0, 0 },
474 { "hsr20", 36, {0, {0}}, 0, 0 },
475 { "hsr21", 37, {0, {0}}, 0, 0 },
476 { "hsr22", 38, {0, {0}}, 0, 0 },
477 { "hsr23", 39, {0, {0}}, 0, 0 },
478 { "hsr24", 40, {0, {0}}, 0, 0 },
479 { "hsr25", 41, {0, {0}}, 0, 0 },
480 { "hsr26", 42, {0, {0}}, 0, 0 },
481 { "hsr27", 43, {0, {0}}, 0, 0 },
482 { "hsr28", 44, {0, {0}}, 0, 0 },
483 { "hsr29", 45, {0, {0}}, 0, 0 },
484 { "hsr30", 46, {0, {0}}, 0, 0 },
485 { "hsr31", 47, {0, {0}}, 0, 0 },
486 { "hsr32", 48, {0, {0}}, 0, 0 },
487 { "hsr33", 49, {0, {0}}, 0, 0 },
488 { "hsr34", 50, {0, {0}}, 0, 0 },
489 { "hsr35", 51, {0, {0}}, 0, 0 },
490 { "hsr36", 52, {0, {0}}, 0, 0 },
491 { "hsr37", 53, {0, {0}}, 0, 0 },
492 { "hsr38", 54, {0, {0}}, 0, 0 },
493 { "hsr39", 55, {0, {0}}, 0, 0 },
494 { "hsr40", 56, {0, {0}}, 0, 0 },
495 { "hsr41", 57, {0, {0}}, 0, 0 },
496 { "hsr42", 58, {0, {0}}, 0, 0 },
497 { "hsr43", 59, {0, {0}}, 0, 0 },
498 { "hsr44", 60, {0, {0}}, 0, 0 },
499 { "hsr45", 61, {0, {0}}, 0, 0 },
500 { "hsr46", 62, {0, {0}}, 0, 0 },
501 { "hsr47", 63, {0, {0}}, 0, 0 },
502 { "hsr48", 64, {0, {0}}, 0, 0 },
503 { "hsr49", 65, {0, {0}}, 0, 0 },
504 { "hsr50", 66, {0, {0}}, 0, 0 },
505 { "hsr51", 67, {0, {0}}, 0, 0 },
506 { "hsr52", 68, {0, {0}}, 0, 0 },
507 { "hsr53", 69, {0, {0}}, 0, 0 },
508 { "hsr54", 70, {0, {0}}, 0, 0 },
509 { "hsr55", 71, {0, {0}}, 0, 0 },
510 { "hsr56", 72, {0, {0}}, 0, 0 },
511 { "hsr57", 73, {0, {0}}, 0, 0 },
512 { "hsr58", 74, {0, {0}}, 0, 0 },
513 { "hsr59", 75, {0, {0}}, 0, 0 },
514 { "hsr60", 76, {0, {0}}, 0, 0 },
515 { "hsr61", 77, {0, {0}}, 0, 0 },
516 { "hsr62", 78, {0, {0}}, 0, 0 },
517 { "hsr63", 79, {0, {0}}, 0, 0 },
518 { "ccr", 256, {0, {0}}, 0, 0 },
519 { "cccr", 263, {0, {0}}, 0, 0 },
520 { "lr", 272, {0, {0}}, 0, 0 },
521 { "lcr", 273, {0, {0}}, 0, 0 },
522 { "isr", 288, {0, {0}}, 0, 0 },
523 { "neear0", 352, {0, {0}}, 0, 0 },
524 { "neear1", 353, {0, {0}}, 0, 0 },
525 { "neear2", 354, {0, {0}}, 0, 0 },
526 { "neear3", 355, {0, {0}}, 0, 0 },
527 { "neear4", 356, {0, {0}}, 0, 0 },
528 { "neear5", 357, {0, {0}}, 0, 0 },
529 { "neear6", 358, {0, {0}}, 0, 0 },
530 { "neear7", 359, {0, {0}}, 0, 0 },
531 { "neear8", 360, {0, {0}}, 0, 0 },
532 { "neear9", 361, {0, {0}}, 0, 0 },
533 { "neear10", 362, {0, {0}}, 0, 0 },
534 { "neear11", 363, {0, {0}}, 0, 0 },
535 { "neear12", 364, {0, {0}}, 0, 0 },
536 { "neear13", 365, {0, {0}}, 0, 0 },
537 { "neear14", 366, {0, {0}}, 0, 0 },
538 { "neear15", 367, {0, {0}}, 0, 0 },
539 { "neear16", 368, {0, {0}}, 0, 0 },
540 { "neear17", 369, {0, {0}}, 0, 0 },
541 { "neear18", 370, {0, {0}}, 0, 0 },
542 { "neear19", 371, {0, {0}}, 0, 0 },
543 { "neear20", 372, {0, {0}}, 0, 0 },
544 { "neear21", 373, {0, {0}}, 0, 0 },
545 { "neear22", 374, {0, {0}}, 0, 0 },
546 { "neear23", 375, {0, {0}}, 0, 0 },
547 { "neear24", 376, {0, {0}}, 0, 0 },
548 { "neear25", 377, {0, {0}}, 0, 0 },
549 { "neear26", 378, {0, {0}}, 0, 0 },
550 { "neear27", 379, {0, {0}}, 0, 0 },
551 { "neear28", 380, {0, {0}}, 0, 0 },
552 { "neear29", 381, {0, {0}}, 0, 0 },
553 { "neear30", 382, {0, {0}}, 0, 0 },
554 { "neear31", 383, {0, {0}}, 0, 0 },
555 { "nesr0", 384, {0, {0}}, 0, 0 },
556 { "nesr1", 385, {0, {0}}, 0, 0 },
557 { "nesr2", 386, {0, {0}}, 0, 0 },
558 { "nesr3", 387, {0, {0}}, 0, 0 },
559 { "nesr4", 388, {0, {0}}, 0, 0 },
560 { "nesr5", 389, {0, {0}}, 0, 0 },
561 { "nesr6", 390, {0, {0}}, 0, 0 },
562 { "nesr7", 391, {0, {0}}, 0, 0 },
563 { "nesr8", 392, {0, {0}}, 0, 0 },
564 { "nesr9", 393, {0, {0}}, 0, 0 },
565 { "nesr10", 394, {0, {0}}, 0, 0 },
566 { "nesr11", 395, {0, {0}}, 0, 0 },
567 { "nesr12", 396, {0, {0}}, 0, 0 },
568 { "nesr13", 397, {0, {0}}, 0, 0 },
569 { "nesr14", 398, {0, {0}}, 0, 0 },
570 { "nesr15", 399, {0, {0}}, 0, 0 },
571 { "nesr16", 400, {0, {0}}, 0, 0 },
572 { "nesr17", 401, {0, {0}}, 0, 0 },
573 { "nesr18", 402, {0, {0}}, 0, 0 },
574 { "nesr19", 403, {0, {0}}, 0, 0 },
575 { "nesr20", 404, {0, {0}}, 0, 0 },
576 { "nesr21", 405, {0, {0}}, 0, 0 },
577 { "nesr22", 406, {0, {0}}, 0, 0 },
578 { "nesr23", 407, {0, {0}}, 0, 0 },
579 { "nesr24", 408, {0, {0}}, 0, 0 },
580 { "nesr25", 409, {0, {0}}, 0, 0 },
581 { "nesr26", 410, {0, {0}}, 0, 0 },
582 { "nesr27", 411, {0, {0}}, 0, 0 },
583 { "nesr28", 412, {0, {0}}, 0, 0 },
584 { "nesr29", 413, {0, {0}}, 0, 0 },
585 { "nesr30", 414, {0, {0}}, 0, 0 },
586 { "nesr31", 415, {0, {0}}, 0, 0 },
587 { "necr", 416, {0, {0}}, 0, 0 },
588 { "gner0", 432, {0, {0}}, 0, 0 },
589 { "gner1", 433, {0, {0}}, 0, 0 },
590 { "fner0", 434, {0, {0}}, 0, 0 },
591 { "fner1", 435, {0, {0}}, 0, 0 },
592 { "epcr0", 512, {0, {0}}, 0, 0 },
593 { "epcr1", 513, {0, {0}}, 0, 0 },
594 { "epcr2", 514, {0, {0}}, 0, 0 },
595 { "epcr3", 515, {0, {0}}, 0, 0 },
596 { "epcr4", 516, {0, {0}}, 0, 0 },
597 { "epcr5", 517, {0, {0}}, 0, 0 },
598 { "epcr6", 518, {0, {0}}, 0, 0 },
599 { "epcr7", 519, {0, {0}}, 0, 0 },
600 { "epcr8", 520, {0, {0}}, 0, 0 },
601 { "epcr9", 521, {0, {0}}, 0, 0 },
602 { "epcr10", 522, {0, {0}}, 0, 0 },
603 { "epcr11", 523, {0, {0}}, 0, 0 },
604 { "epcr12", 524, {0, {0}}, 0, 0 },
605 { "epcr13", 525, {0, {0}}, 0, 0 },
606 { "epcr14", 526, {0, {0}}, 0, 0 },
607 { "epcr15", 527, {0, {0}}, 0, 0 },
608 { "epcr16", 528, {0, {0}}, 0, 0 },
609 { "epcr17", 529, {0, {0}}, 0, 0 },
610 { "epcr18", 530, {0, {0}}, 0, 0 },
611 { "epcr19", 531, {0, {0}}, 0, 0 },
612 { "epcr20", 532, {0, {0}}, 0, 0 },
613 { "epcr21", 533, {0, {0}}, 0, 0 },
614 { "epcr22", 534, {0, {0}}, 0, 0 },
615 { "epcr23", 535, {0, {0}}, 0, 0 },
616 { "epcr24", 536, {0, {0}}, 0, 0 },
617 { "epcr25", 537, {0, {0}}, 0, 0 },
618 { "epcr26", 538, {0, {0}}, 0, 0 },
619 { "epcr27", 539, {0, {0}}, 0, 0 },
620 { "epcr28", 540, {0, {0}}, 0, 0 },
621 { "epcr29", 541, {0, {0}}, 0, 0 },
622 { "epcr30", 542, {0, {0}}, 0, 0 },
623 { "epcr31", 543, {0, {0}}, 0, 0 },
624 { "epcr32", 544, {0, {0}}, 0, 0 },
625 { "epcr33", 545, {0, {0}}, 0, 0 },
626 { "epcr34", 546, {0, {0}}, 0, 0 },
627 { "epcr35", 547, {0, {0}}, 0, 0 },
628 { "epcr36", 548, {0, {0}}, 0, 0 },
629 { "epcr37", 549, {0, {0}}, 0, 0 },
630 { "epcr38", 550, {0, {0}}, 0, 0 },
631 { "epcr39", 551, {0, {0}}, 0, 0 },
632 { "epcr40", 552, {0, {0}}, 0, 0 },
633 { "epcr41", 553, {0, {0}}, 0, 0 },
634 { "epcr42", 554, {0, {0}}, 0, 0 },
635 { "epcr43", 555, {0, {0}}, 0, 0 },
636 { "epcr44", 556, {0, {0}}, 0, 0 },
637 { "epcr45", 557, {0, {0}}, 0, 0 },
638 { "epcr46", 558, {0, {0}}, 0, 0 },
639 { "epcr47", 559, {0, {0}}, 0, 0 },
640 { "epcr48", 560, {0, {0}}, 0, 0 },
641 { "epcr49", 561, {0, {0}}, 0, 0 },
642 { "epcr50", 562, {0, {0}}, 0, 0 },
643 { "epcr51", 563, {0, {0}}, 0, 0 },
644 { "epcr52", 564, {0, {0}}, 0, 0 },
645 { "epcr53", 565, {0, {0}}, 0, 0 },
646 { "epcr54", 566, {0, {0}}, 0, 0 },
647 { "epcr55", 567, {0, {0}}, 0, 0 },
648 { "epcr56", 568, {0, {0}}, 0, 0 },
649 { "epcr57", 569, {0, {0}}, 0, 0 },
650 { "epcr58", 570, {0, {0}}, 0, 0 },
651 { "epcr59", 571, {0, {0}}, 0, 0 },
652 { "epcr60", 572, {0, {0}}, 0, 0 },
653 { "epcr61", 573, {0, {0}}, 0, 0 },
654 { "epcr62", 574, {0, {0}}, 0, 0 },
655 { "epcr63", 575, {0, {0}}, 0, 0 },
656 { "esr0", 576, {0, {0}}, 0, 0 },
657 { "esr1", 577, {0, {0}}, 0, 0 },
658 { "esr2", 578, {0, {0}}, 0, 0 },
659 { "esr3", 579, {0, {0}}, 0, 0 },
660 { "esr4", 580, {0, {0}}, 0, 0 },
661 { "esr5", 581, {0, {0}}, 0, 0 },
662 { "esr6", 582, {0, {0}}, 0, 0 },
663 { "esr7", 583, {0, {0}}, 0, 0 },
664 { "esr8", 584, {0, {0}}, 0, 0 },
665 { "esr9", 585, {0, {0}}, 0, 0 },
666 { "esr10", 586, {0, {0}}, 0, 0 },
667 { "esr11", 587, {0, {0}}, 0, 0 },
668 { "esr12", 588, {0, {0}}, 0, 0 },
669 { "esr13", 589, {0, {0}}, 0, 0 },
670 { "esr14", 590, {0, {0}}, 0, 0 },
671 { "esr15", 591, {0, {0}}, 0, 0 },
672 { "esr16", 592, {0, {0}}, 0, 0 },
673 { "esr17", 593, {0, {0}}, 0, 0 },
674 { "esr18", 594, {0, {0}}, 0, 0 },
675 { "esr19", 595, {0, {0}}, 0, 0 },
676 { "esr20", 596, {0, {0}}, 0, 0 },
677 { "esr21", 597, {0, {0}}, 0, 0 },
678 { "esr22", 598, {0, {0}}, 0, 0 },
679 { "esr23", 599, {0, {0}}, 0, 0 },
680 { "esr24", 600, {0, {0}}, 0, 0 },
681 { "esr25", 601, {0, {0}}, 0, 0 },
682 { "esr26", 602, {0, {0}}, 0, 0 },
683 { "esr27", 603, {0, {0}}, 0, 0 },
684 { "esr28", 604, {0, {0}}, 0, 0 },
685 { "esr29", 605, {0, {0}}, 0, 0 },
686 { "esr30", 606, {0, {0}}, 0, 0 },
687 { "esr31", 607, {0, {0}}, 0, 0 },
688 { "esr32", 608, {0, {0}}, 0, 0 },
689 { "esr33", 609, {0, {0}}, 0, 0 },
690 { "esr34", 610, {0, {0}}, 0, 0 },
691 { "esr35", 611, {0, {0}}, 0, 0 },
692 { "esr36", 612, {0, {0}}, 0, 0 },
693 { "esr37", 613, {0, {0}}, 0, 0 },
694 { "esr38", 614, {0, {0}}, 0, 0 },
695 { "esr39", 615, {0, {0}}, 0, 0 },
696 { "esr40", 616, {0, {0}}, 0, 0 },
697 { "esr41", 617, {0, {0}}, 0, 0 },
698 { "esr42", 618, {0, {0}}, 0, 0 },
699 { "esr43", 619, {0, {0}}, 0, 0 },
700 { "esr44", 620, {0, {0}}, 0, 0 },
701 { "esr45", 621, {0, {0}}, 0, 0 },
702 { "esr46", 622, {0, {0}}, 0, 0 },
703 { "esr47", 623, {0, {0}}, 0, 0 },
704 { "esr48", 624, {0, {0}}, 0, 0 },
705 { "esr49", 625, {0, {0}}, 0, 0 },
706 { "esr50", 626, {0, {0}}, 0, 0 },
707 { "esr51", 627, {0, {0}}, 0, 0 },
708 { "esr52", 628, {0, {0}}, 0, 0 },
709 { "esr53", 629, {0, {0}}, 0, 0 },
710 { "esr54", 630, {0, {0}}, 0, 0 },
711 { "esr55", 631, {0, {0}}, 0, 0 },
712 { "esr56", 632, {0, {0}}, 0, 0 },
713 { "esr57", 633, {0, {0}}, 0, 0 },
714 { "esr58", 634, {0, {0}}, 0, 0 },
715 { "esr59", 635, {0, {0}}, 0, 0 },
716 { "esr60", 636, {0, {0}}, 0, 0 },
717 { "esr61", 637, {0, {0}}, 0, 0 },
718 { "esr62", 638, {0, {0}}, 0, 0 },
719 { "esr63", 639, {0, {0}}, 0, 0 },
720 { "eir0", 640, {0, {0}}, 0, 0 },
721 { "eir1", 641, {0, {0}}, 0, 0 },
722 { "eir2", 642, {0, {0}}, 0, 0 },
723 { "eir3", 643, {0, {0}}, 0, 0 },
724 { "eir4", 644, {0, {0}}, 0, 0 },
725 { "eir5", 645, {0, {0}}, 0, 0 },
726 { "eir6", 646, {0, {0}}, 0, 0 },
727 { "eir7", 647, {0, {0}}, 0, 0 },
728 { "eir8", 648, {0, {0}}, 0, 0 },
729 { "eir9", 649, {0, {0}}, 0, 0 },
730 { "eir10", 650, {0, {0}}, 0, 0 },
731 { "eir11", 651, {0, {0}}, 0, 0 },
732 { "eir12", 652, {0, {0}}, 0, 0 },
733 { "eir13", 653, {0, {0}}, 0, 0 },
734 { "eir14", 654, {0, {0}}, 0, 0 },
735 { "eir15", 655, {0, {0}}, 0, 0 },
736 { "eir16", 656, {0, {0}}, 0, 0 },
737 { "eir17", 657, {0, {0}}, 0, 0 },
738 { "eir18", 658, {0, {0}}, 0, 0 },
739 { "eir19", 659, {0, {0}}, 0, 0 },
740 { "eir20", 660, {0, {0}}, 0, 0 },
741 { "eir21", 661, {0, {0}}, 0, 0 },
742 { "eir22", 662, {0, {0}}, 0, 0 },
743 { "eir23", 663, {0, {0}}, 0, 0 },
744 { "eir24", 664, {0, {0}}, 0, 0 },
745 { "eir25", 665, {0, {0}}, 0, 0 },
746 { "eir26", 666, {0, {0}}, 0, 0 },
747 { "eir27", 667, {0, {0}}, 0, 0 },
748 { "eir28", 668, {0, {0}}, 0, 0 },
749 { "eir29", 669, {0, {0}}, 0, 0 },
750 { "eir30", 670, {0, {0}}, 0, 0 },
751 { "eir31", 671, {0, {0}}, 0, 0 },
752 { "esfr0", 672, {0, {0}}, 0, 0 },
753 { "esfr1", 673, {0, {0}}, 0, 0 },
754 { "sr0", 768, {0, {0}}, 0, 0 },
755 { "sr1", 769, {0, {0}}, 0, 0 },
756 { "sr2", 770, {0, {0}}, 0, 0 },
757 { "sr3", 771, {0, {0}}, 0, 0 },
758 { "fsr0", 1024, {0, {0}}, 0, 0 },
759 { "fsr1", 1025, {0, {0}}, 0, 0 },
760 { "fsr2", 1026, {0, {0}}, 0, 0 },
761 { "fsr3", 1027, {0, {0}}, 0, 0 },
762 { "fsr4", 1028, {0, {0}}, 0, 0 },
763 { "fsr5", 1029, {0, {0}}, 0, 0 },
764 { "fsr6", 1030, {0, {0}}, 0, 0 },
765 { "fsr7", 1031, {0, {0}}, 0, 0 },
766 { "fsr8", 1032, {0, {0}}, 0, 0 },
767 { "fsr9", 1033, {0, {0}}, 0, 0 },
768 { "fsr10", 1034, {0, {0}}, 0, 0 },
769 { "fsr11", 1035, {0, {0}}, 0, 0 },
770 { "fsr12", 1036, {0, {0}}, 0, 0 },
771 { "fsr13", 1037, {0, {0}}, 0, 0 },
772 { "fsr14", 1038, {0, {0}}, 0, 0 },
773 { "fsr15", 1039, {0, {0}}, 0, 0 },
774 { "fsr16", 1040, {0, {0}}, 0, 0 },
775 { "fsr17", 1041, {0, {0}}, 0, 0 },
776 { "fsr18", 1042, {0, {0}}, 0, 0 },
777 { "fsr19", 1043, {0, {0}}, 0, 0 },
778 { "fsr20", 1044, {0, {0}}, 0, 0 },
779 { "fsr21", 1045, {0, {0}}, 0, 0 },
780 { "fsr22", 1046, {0, {0}}, 0, 0 },
781 { "fsr23", 1047, {0, {0}}, 0, 0 },
782 { "fsr24", 1048, {0, {0}}, 0, 0 },
783 { "fsr25", 1049, {0, {0}}, 0, 0 },
784 { "fsr26", 1050, {0, {0}}, 0, 0 },
785 { "fsr27", 1051, {0, {0}}, 0, 0 },
786 { "fsr28", 1052, {0, {0}}, 0, 0 },
787 { "fsr29", 1053, {0, {0}}, 0, 0 },
788 { "fsr30", 1054, {0, {0}}, 0, 0 },
789 { "fsr31", 1055, {0, {0}}, 0, 0 },
790 { "fsr32", 1056, {0, {0}}, 0, 0 },
791 { "fsr33", 1057, {0, {0}}, 0, 0 },
792 { "fsr34", 1058, {0, {0}}, 0, 0 },
793 { "fsr35", 1059, {0, {0}}, 0, 0 },
794 { "fsr36", 1060, {0, {0}}, 0, 0 },
795 { "fsr37", 1061, {0, {0}}, 0, 0 },
796 { "fsr38", 1062, {0, {0}}, 0, 0 },
797 { "fsr39", 1063, {0, {0}}, 0, 0 },
798 { "fsr40", 1064, {0, {0}}, 0, 0 },
799 { "fsr41", 1065, {0, {0}}, 0, 0 },
800 { "fsr42", 1066, {0, {0}}, 0, 0 },
801 { "fsr43", 1067, {0, {0}}, 0, 0 },
802 { "fsr44", 1068, {0, {0}}, 0, 0 },
803 { "fsr45", 1069, {0, {0}}, 0, 0 },
804 { "fsr46", 1070, {0, {0}}, 0, 0 },
805 { "fsr47", 1071, {0, {0}}, 0, 0 },
806 { "fsr48", 1072, {0, {0}}, 0, 0 },
807 { "fsr49", 1073, {0, {0}}, 0, 0 },
808 { "fsr50", 1074, {0, {0}}, 0, 0 },
809 { "fsr51", 1075, {0, {0}}, 0, 0 },
810 { "fsr52", 1076, {0, {0}}, 0, 0 },
811 { "fsr53", 1077, {0, {0}}, 0, 0 },
812 { "fsr54", 1078, {0, {0}}, 0, 0 },
813 { "fsr55", 1079, {0, {0}}, 0, 0 },
814 { "fsr56", 1080, {0, {0}}, 0, 0 },
815 { "fsr57", 1081, {0, {0}}, 0, 0 },
816 { "fsr58", 1082, {0, {0}}, 0, 0 },
817 { "fsr59", 1083, {0, {0}}, 0, 0 },
818 { "fsr60", 1084, {0, {0}}, 0, 0 },
819 { "fsr61", 1085, {0, {0}}, 0, 0 },
820 { "fsr62", 1086, {0, {0}}, 0, 0 },
821 { "fsr63", 1087, {0, {0}}, 0, 0 },
822 { "fqop0", 1088, {0, {0}}, 0, 0 },
823 { "fqop1", 1090, {0, {0}}, 0, 0 },
824 { "fqop2", 1092, {0, {0}}, 0, 0 },
825 { "fqop3", 1094, {0, {0}}, 0, 0 },
826 { "fqop4", 1096, {0, {0}}, 0, 0 },
827 { "fqop5", 1098, {0, {0}}, 0, 0 },
828 { "fqop6", 1100, {0, {0}}, 0, 0 },
829 { "fqop7", 1102, {0, {0}}, 0, 0 },
830 { "fqop8", 1104, {0, {0}}, 0, 0 },
831 { "fqop9", 1106, {0, {0}}, 0, 0 },
832 { "fqop10", 1108, {0, {0}}, 0, 0 },
833 { "fqop11", 1110, {0, {0}}, 0, 0 },
834 { "fqop12", 1112, {0, {0}}, 0, 0 },
835 { "fqop13", 1114, {0, {0}}, 0, 0 },
836 { "fqop14", 1116, {0, {0}}, 0, 0 },
837 { "fqop15", 1118, {0, {0}}, 0, 0 },
838 { "fqop16", 1120, {0, {0}}, 0, 0 },
839 { "fqop17", 1122, {0, {0}}, 0, 0 },
840 { "fqop18", 1124, {0, {0}}, 0, 0 },
841 { "fqop19", 1126, {0, {0}}, 0, 0 },
842 { "fqop20", 1128, {0, {0}}, 0, 0 },
843 { "fqop21", 1130, {0, {0}}, 0, 0 },
844 { "fqop22", 1132, {0, {0}}, 0, 0 },
845 { "fqop23", 1134, {0, {0}}, 0, 0 },
846 { "fqop24", 1136, {0, {0}}, 0, 0 },
847 { "fqop25", 1138, {0, {0}}, 0, 0 },
848 { "fqop26", 1140, {0, {0}}, 0, 0 },
849 { "fqop27", 1142, {0, {0}}, 0, 0 },
850 { "fqop28", 1144, {0, {0}}, 0, 0 },
851 { "fqop29", 1146, {0, {0}}, 0, 0 },
852 { "fqop30", 1148, {0, {0}}, 0, 0 },
853 { "fqop31", 1150, {0, {0}}, 0, 0 },
854 { "fqst0", 1089, {0, {0}}, 0, 0 },
855 { "fqst1", 1091, {0, {0}}, 0, 0 },
856 { "fqst2", 1093, {0, {0}}, 0, 0 },
857 { "fqst3", 1095, {0, {0}}, 0, 0 },
858 { "fqst4", 1097, {0, {0}}, 0, 0 },
859 { "fqst5", 1099, {0, {0}}, 0, 0 },
860 { "fqst6", 1101, {0, {0}}, 0, 0 },
861 { "fqst7", 1103, {0, {0}}, 0, 0 },
862 { "fqst8", 1105, {0, {0}}, 0, 0 },
863 { "fqst9", 1107, {0, {0}}, 0, 0 },
864 { "fqst10", 1109, {0, {0}}, 0, 0 },
865 { "fqst11", 1111, {0, {0}}, 0, 0 },
866 { "fqst12", 1113, {0, {0}}, 0, 0 },
867 { "fqst13", 1115, {0, {0}}, 0, 0 },
868 { "fqst14", 1117, {0, {0}}, 0, 0 },
869 { "fqst15", 1119, {0, {0}}, 0, 0 },
870 { "fqst16", 1121, {0, {0}}, 0, 0 },
871 { "fqst17", 1123, {0, {0}}, 0, 0 },
872 { "fqst18", 1125, {0, {0}}, 0, 0 },
873 { "fqst19", 1127, {0, {0}}, 0, 0 },
874 { "fqst20", 1129, {0, {0}}, 0, 0 },
875 { "fqst21", 1131, {0, {0}}, 0, 0 },
876 { "fqst22", 1133, {0, {0}}, 0, 0 },
877 { "fqst23", 1135, {0, {0}}, 0, 0 },
878 { "fqst24", 1137, {0, {0}}, 0, 0 },
879 { "fqst25", 1139, {0, {0}}, 0, 0 },
880 { "fqst26", 1141, {0, {0}}, 0, 0 },
881 { "fqst27", 1143, {0, {0}}, 0, 0 },
882 { "fqst28", 1145, {0, {0}}, 0, 0 },
883 { "fqst29", 1147, {0, {0}}, 0, 0 },
884 { "fqst30", 1149, {0, {0}}, 0, 0 },
885 { "fqst31", 1151, {0, {0}}, 0, 0 },
886 { "mcilr0", 1272, {0, {0}}, 0, 0 },
887 { "mcilr1", 1273, {0, {0}}, 0, 0 },
888 { "msr0", 1280, {0, {0}}, 0, 0 },
889 { "msr1", 1281, {0, {0}}, 0, 0 },
890 { "msr2", 1282, {0, {0}}, 0, 0 },
891 { "msr3", 1283, {0, {0}}, 0, 0 },
892 { "msr4", 1284, {0, {0}}, 0, 0 },
893 { "msr5", 1285, {0, {0}}, 0, 0 },
894 { "msr6", 1286, {0, {0}}, 0, 0 },
895 { "msr7", 1287, {0, {0}}, 0, 0 },
896 { "msr8", 1288, {0, {0}}, 0, 0 },
897 { "msr9", 1289, {0, {0}}, 0, 0 },
898 { "msr10", 1290, {0, {0}}, 0, 0 },
899 { "msr11", 1291, {0, {0}}, 0, 0 },
900 { "msr12", 1292, {0, {0}}, 0, 0 },
901 { "msr13", 1293, {0, {0}}, 0, 0 },
902 { "msr14", 1294, {0, {0}}, 0, 0 },
903 { "msr15", 1295, {0, {0}}, 0, 0 },
904 { "msr16", 1296, {0, {0}}, 0, 0 },
905 { "msr17", 1297, {0, {0}}, 0, 0 },
906 { "msr18", 1298, {0, {0}}, 0, 0 },
907 { "msr19", 1299, {0, {0}}, 0, 0 },
908 { "msr20", 1300, {0, {0}}, 0, 0 },
909 { "msr21", 1301, {0, {0}}, 0, 0 },
910 { "msr22", 1302, {0, {0}}, 0, 0 },
911 { "msr23", 1303, {0, {0}}, 0, 0 },
912 { "msr24", 1304, {0, {0}}, 0, 0 },
913 { "msr25", 1305, {0, {0}}, 0, 0 },
914 { "msr26", 1306, {0, {0}}, 0, 0 },
915 { "msr27", 1307, {0, {0}}, 0, 0 },
916 { "msr28", 1308, {0, {0}}, 0, 0 },
917 { "msr29", 1309, {0, {0}}, 0, 0 },
918 { "msr30", 1310, {0, {0}}, 0, 0 },
919 { "msr31", 1311, {0, {0}}, 0, 0 },
920 { "msr32", 1312, {0, {0}}, 0, 0 },
921 { "msr33", 1313, {0, {0}}, 0, 0 },
922 { "msr34", 1314, {0, {0}}, 0, 0 },
923 { "msr35", 1315, {0, {0}}, 0, 0 },
924 { "msr36", 1316, {0, {0}}, 0, 0 },
925 { "msr37", 1317, {0, {0}}, 0, 0 },
926 { "msr38", 1318, {0, {0}}, 0, 0 },
927 { "msr39", 1319, {0, {0}}, 0, 0 },
928 { "msr40", 1320, {0, {0}}, 0, 0 },
929 { "msr41", 1321, {0, {0}}, 0, 0 },
930 { "msr42", 1322, {0, {0}}, 0, 0 },
931 { "msr43", 1323, {0, {0}}, 0, 0 },
932 { "msr44", 1324, {0, {0}}, 0, 0 },
933 { "msr45", 1325, {0, {0}}, 0, 0 },
934 { "msr46", 1326, {0, {0}}, 0, 0 },
935 { "msr47", 1327, {0, {0}}, 0, 0 },
936 { "msr48", 1328, {0, {0}}, 0, 0 },
937 { "msr49", 1329, {0, {0}}, 0, 0 },
938 { "msr50", 1330, {0, {0}}, 0, 0 },
939 { "msr51", 1331, {0, {0}}, 0, 0 },
940 { "msr52", 1332, {0, {0}}, 0, 0 },
941 { "msr53", 1333, {0, {0}}, 0, 0 },
942 { "msr54", 1334, {0, {0}}, 0, 0 },
943 { "msr55", 1335, {0, {0}}, 0, 0 },
944 { "msr56", 1336, {0, {0}}, 0, 0 },
945 { "msr57", 1337, {0, {0}}, 0, 0 },
946 { "msr58", 1338, {0, {0}}, 0, 0 },
947 { "msr59", 1339, {0, {0}}, 0, 0 },
948 { "msr60", 1340, {0, {0}}, 0, 0 },
949 { "msr61", 1341, {0, {0}}, 0, 0 },
950 { "msr62", 1342, {0, {0}}, 0, 0 },
951 { "msr63", 1343, {0, {0}}, 0, 0 },
952 { "mqop0", 1344, {0, {0}}, 0, 0 },
953 { "mqop1", 1346, {0, {0}}, 0, 0 },
954 { "mqop2", 1348, {0, {0}}, 0, 0 },
955 { "mqop3", 1350, {0, {0}}, 0, 0 },
956 { "mqop4", 1352, {0, {0}}, 0, 0 },
957 { "mqop5", 1354, {0, {0}}, 0, 0 },
958 { "mqop6", 1356, {0, {0}}, 0, 0 },
959 { "mqop7", 1358, {0, {0}}, 0, 0 },
960 { "mqop8", 1360, {0, {0}}, 0, 0 },
961 { "mqop9", 1362, {0, {0}}, 0, 0 },
962 { "mqop10", 1364, {0, {0}}, 0, 0 },
963 { "mqop11", 1366, {0, {0}}, 0, 0 },
964 { "mqop12", 1368, {0, {0}}, 0, 0 },
965 { "mqop13", 1370, {0, {0}}, 0, 0 },
966 { "mqop14", 1372, {0, {0}}, 0, 0 },
967 { "mqop15", 1374, {0, {0}}, 0, 0 },
968 { "mqop16", 1376, {0, {0}}, 0, 0 },
969 { "mqop17", 1378, {0, {0}}, 0, 0 },
970 { "mqop18", 1380, {0, {0}}, 0, 0 },
971 { "mqop19", 1382, {0, {0}}, 0, 0 },
972 { "mqop20", 1384, {0, {0}}, 0, 0 },
973 { "mqop21", 1386, {0, {0}}, 0, 0 },
974 { "mqop22", 1388, {0, {0}}, 0, 0 },
975 { "mqop23", 1390, {0, {0}}, 0, 0 },
976 { "mqop24", 1392, {0, {0}}, 0, 0 },
977 { "mqop25", 1394, {0, {0}}, 0, 0 },
978 { "mqop26", 1396, {0, {0}}, 0, 0 },
979 { "mqop27", 1398, {0, {0}}, 0, 0 },
980 { "mqop28", 1400, {0, {0}}, 0, 0 },
981 { "mqop29", 1402, {0, {0}}, 0, 0 },
982 { "mqop30", 1404, {0, {0}}, 0, 0 },
983 { "mqop31", 1406, {0, {0}}, 0, 0 },
984 { "mqst0", 1345, {0, {0}}, 0, 0 },
985 { "mqst1", 1347, {0, {0}}, 0, 0 },
986 { "mqst2", 1349, {0, {0}}, 0, 0 },
987 { "mqst3", 1351, {0, {0}}, 0, 0 },
988 { "mqst4", 1353, {0, {0}}, 0, 0 },
989 { "mqst5", 1355, {0, {0}}, 0, 0 },
990 { "mqst6", 1357, {0, {0}}, 0, 0 },
991 { "mqst7", 1359, {0, {0}}, 0, 0 },
992 { "mqst8", 1361, {0, {0}}, 0, 0 },
993 { "mqst9", 1363, {0, {0}}, 0, 0 },
994 { "mqst10", 1365, {0, {0}}, 0, 0 },
995 { "mqst11", 1367, {0, {0}}, 0, 0 },
996 { "mqst12", 1369, {0, {0}}, 0, 0 },
997 { "mqst13", 1371, {0, {0}}, 0, 0 },
998 { "mqst14", 1373, {0, {0}}, 0, 0 },
999 { "mqst15", 1375, {0, {0}}, 0, 0 },
1000 { "mqst16", 1377, {0, {0}}, 0, 0 },
1001 { "mqst17", 1379, {0, {0}}, 0, 0 },
1002 { "mqst18", 1381, {0, {0}}, 0, 0 },
1003 { "mqst19", 1383, {0, {0}}, 0, 0 },
1004 { "mqst20", 1385, {0, {0}}, 0, 0 },
1005 { "mqst21", 1387, {0, {0}}, 0, 0 },
1006 { "mqst22", 1389, {0, {0}}, 0, 0 },
1007 { "mqst23", 1391, {0, {0}}, 0, 0 },
1008 { "mqst24", 1393, {0, {0}}, 0, 0 },
1009 { "mqst25", 1395, {0, {0}}, 0, 0 },
1010 { "mqst26", 1397, {0, {0}}, 0, 0 },
1011 { "mqst27", 1399, {0, {0}}, 0, 0 },
1012 { "mqst28", 1401, {0, {0}}, 0, 0 },
1013 { "mqst29", 1403, {0, {0}}, 0, 0 },
1014 { "mqst30", 1405, {0, {0}}, 0, 0 },
1015 { "mqst31", 1407, {0, {0}}, 0, 0 },
1016 { "ear0", 1536, {0, {0}}, 0, 0 },
1017 { "ear1", 1537, {0, {0}}, 0, 0 },
1018 { "ear2", 1538, {0, {0}}, 0, 0 },
1019 { "ear3", 1539, {0, {0}}, 0, 0 },
1020 { "ear4", 1540, {0, {0}}, 0, 0 },
1021 { "ear5", 1541, {0, {0}}, 0, 0 },
1022 { "ear6", 1542, {0, {0}}, 0, 0 },
1023 { "ear7", 1543, {0, {0}}, 0, 0 },
1024 { "ear8", 1544, {0, {0}}, 0, 0 },
1025 { "ear9", 1545, {0, {0}}, 0, 0 },
1026 { "ear10", 1546, {0, {0}}, 0, 0 },
1027 { "ear11", 1547, {0, {0}}, 0, 0 },
1028 { "ear12", 1548, {0, {0}}, 0, 0 },
1029 { "ear13", 1549, {0, {0}}, 0, 0 },
1030 { "ear14", 1550, {0, {0}}, 0, 0 },
1031 { "ear15", 1551, {0, {0}}, 0, 0 },
1032 { "ear16", 1552, {0, {0}}, 0, 0 },
1033 { "ear17", 1553, {0, {0}}, 0, 0 },
1034 { "ear18", 1554, {0, {0}}, 0, 0 },
1035 { "ear19", 1555, {0, {0}}, 0, 0 },
1036 { "ear20", 1556, {0, {0}}, 0, 0 },
1037 { "ear21", 1557, {0, {0}}, 0, 0 },
1038 { "ear22", 1558, {0, {0}}, 0, 0 },
1039 { "ear23", 1559, {0, {0}}, 0, 0 },
1040 { "ear24", 1560, {0, {0}}, 0, 0 },
1041 { "ear25", 1561, {0, {0}}, 0, 0 },
1042 { "ear26", 1562, {0, {0}}, 0, 0 },
1043 { "ear27", 1563, {0, {0}}, 0, 0 },
1044 { "ear28", 1564, {0, {0}}, 0, 0 },
1045 { "ear29", 1565, {0, {0}}, 0, 0 },
1046 { "ear30", 1566, {0, {0}}, 0, 0 },
1047 { "ear31", 1567, {0, {0}}, 0, 0 },
1048 { "ear32", 1568, {0, {0}}, 0, 0 },
1049 { "ear33", 1569, {0, {0}}, 0, 0 },
1050 { "ear34", 1570, {0, {0}}, 0, 0 },
1051 { "ear35", 1571, {0, {0}}, 0, 0 },
1052 { "ear36", 1572, {0, {0}}, 0, 0 },
1053 { "ear37", 1573, {0, {0}}, 0, 0 },
1054 { "ear38", 1574, {0, {0}}, 0, 0 },
1055 { "ear39", 1575, {0, {0}}, 0, 0 },
1056 { "ear40", 1576, {0, {0}}, 0, 0 },
1057 { "ear41", 1577, {0, {0}}, 0, 0 },
1058 { "ear42", 1578, {0, {0}}, 0, 0 },
1059 { "ear43", 1579, {0, {0}}, 0, 0 },
1060 { "ear44", 1580, {0, {0}}, 0, 0 },
1061 { "ear45", 1581, {0, {0}}, 0, 0 },
1062 { "ear46", 1582, {0, {0}}, 0, 0 },
1063 { "ear47", 1583, {0, {0}}, 0, 0 },
1064 { "ear48", 1584, {0, {0}}, 0, 0 },
1065 { "ear49", 1585, {0, {0}}, 0, 0 },
1066 { "ear50", 1586, {0, {0}}, 0, 0 },
1067 { "ear51", 1587, {0, {0}}, 0, 0 },
1068 { "ear52", 1588, {0, {0}}, 0, 0 },
1069 { "ear53", 1589, {0, {0}}, 0, 0 },
1070 { "ear54", 1590, {0, {0}}, 0, 0 },
1071 { "ear55", 1591, {0, {0}}, 0, 0 },
1072 { "ear56", 1592, {0, {0}}, 0, 0 },
1073 { "ear57", 1593, {0, {0}}, 0, 0 },
1074 { "ear58", 1594, {0, {0}}, 0, 0 },
1075 { "ear59", 1595, {0, {0}}, 0, 0 },
1076 { "ear60", 1596, {0, {0}}, 0, 0 },
1077 { "ear61", 1597, {0, {0}}, 0, 0 },
1078 { "ear62", 1598, {0, {0}}, 0, 0 },
1079 { "ear63", 1599, {0, {0}}, 0, 0 },
1080 { "edr0", 1600, {0, {0}}, 0, 0 },
1081 { "edr1", 1601, {0, {0}}, 0, 0 },
1082 { "edr2", 1602, {0, {0}}, 0, 0 },
1083 { "edr3", 1603, {0, {0}}, 0, 0 },
1084 { "edr4", 1604, {0, {0}}, 0, 0 },
1085 { "edr5", 1605, {0, {0}}, 0, 0 },
1086 { "edr6", 1606, {0, {0}}, 0, 0 },
1087 { "edr7", 1607, {0, {0}}, 0, 0 },
1088 { "edr8", 1608, {0, {0}}, 0, 0 },
1089 { "edr9", 1609, {0, {0}}, 0, 0 },
1090 { "edr10", 1610, {0, {0}}, 0, 0 },
1091 { "edr11", 1611, {0, {0}}, 0, 0 },
1092 { "edr12", 1612, {0, {0}}, 0, 0 },
1093 { "edr13", 1613, {0, {0}}, 0, 0 },
1094 { "edr14", 1614, {0, {0}}, 0, 0 },
1095 { "edr15", 1615, {0, {0}}, 0, 0 },
1096 { "edr16", 1616, {0, {0}}, 0, 0 },
1097 { "edr17", 1617, {0, {0}}, 0, 0 },
1098 { "edr18", 1618, {0, {0}}, 0, 0 },
1099 { "edr19", 1619, {0, {0}}, 0, 0 },
1100 { "edr20", 1620, {0, {0}}, 0, 0 },
1101 { "edr21", 1621, {0, {0}}, 0, 0 },
1102 { "edr22", 1622, {0, {0}}, 0, 0 },
1103 { "edr23", 1623, {0, {0}}, 0, 0 },
1104 { "edr24", 1624, {0, {0}}, 0, 0 },
1105 { "edr25", 1625, {0, {0}}, 0, 0 },
1106 { "edr26", 1626, {0, {0}}, 0, 0 },
1107 { "edr27", 1627, {0, {0}}, 0, 0 },
1108 { "edr28", 1628, {0, {0}}, 0, 0 },
1109 { "edr29", 1629, {0, {0}}, 0, 0 },
1110 { "edr30", 1630, {0, {0}}, 0, 0 },
1111 { "edr31", 1631, {0, {0}}, 0, 0 },
1112 { "edr32", 1632, {0, {0}}, 0, 0 },
1113 { "edr33", 1636, {0, {0}}, 0, 0 },
1114 { "edr34", 1634, {0, {0}}, 0, 0 },
1115 { "edr35", 1635, {0, {0}}, 0, 0 },
1116 { "edr36", 1636, {0, {0}}, 0, 0 },
1117 { "edr37", 1637, {0, {0}}, 0, 0 },
1118 { "edr38", 1638, {0, {0}}, 0, 0 },
1119 { "edr39", 1639, {0, {0}}, 0, 0 },
1120 { "edr40", 1640, {0, {0}}, 0, 0 },
1121 { "edr41", 1641, {0, {0}}, 0, 0 },
1122 { "edr42", 1642, {0, {0}}, 0, 0 },
1123 { "edr43", 1643, {0, {0}}, 0, 0 },
1124 { "edr44", 1644, {0, {0}}, 0, 0 },
1125 { "edr45", 1645, {0, {0}}, 0, 0 },
1126 { "edr46", 1646, {0, {0}}, 0, 0 },
1127 { "edr47", 1647, {0, {0}}, 0, 0 },
1128 { "edr48", 1648, {0, {0}}, 0, 0 },
1129 { "edr49", 1649, {0, {0}}, 0, 0 },
1130 { "edr50", 1650, {0, {0}}, 0, 0 },
1131 { "edr51", 1651, {0, {0}}, 0, 0 },
1132 { "edr52", 1652, {0, {0}}, 0, 0 },
1133 { "edr53", 1653, {0, {0}}, 0, 0 },
1134 { "edr54", 1654, {0, {0}}, 0, 0 },
1135 { "edr55", 1655, {0, {0}}, 0, 0 },
1136 { "edr56", 1656, {0, {0}}, 0, 0 },
1137 { "edr57", 1657, {0, {0}}, 0, 0 },
1138 { "edr58", 1658, {0, {0}}, 0, 0 },
1139 { "edr59", 1659, {0, {0}}, 0, 0 },
1140 { "edr60", 1660, {0, {0}}, 0, 0 },
1141 { "edr61", 1661, {0, {0}}, 0, 0 },
1142 { "edr62", 1662, {0, {0}}, 0, 0 },
1143 { "edr63", 1663, {0, {0}}, 0, 0 },
1144 { "iamlr0", 1664, {0, {0}}, 0, 0 },
1145 { "iamlr1", 1665, {0, {0}}, 0, 0 },
1146 { "iamlr2", 1666, {0, {0}}, 0, 0 },
1147 { "iamlr3", 1667, {0, {0}}, 0, 0 },
1148 { "iamlr4", 1668, {0, {0}}, 0, 0 },
1149 { "iamlr5", 1669, {0, {0}}, 0, 0 },
1150 { "iamlr6", 1670, {0, {0}}, 0, 0 },
1151 { "iamlr7", 1671, {0, {0}}, 0, 0 },
1152 { "iamlr8", 1672, {0, {0}}, 0, 0 },
1153 { "iamlr9", 1673, {0, {0}}, 0, 0 },
1154 { "iamlr10", 1674, {0, {0}}, 0, 0 },
1155 { "iamlr11", 1675, {0, {0}}, 0, 0 },
1156 { "iamlr12", 1676, {0, {0}}, 0, 0 },
1157 { "iamlr13", 1677, {0, {0}}, 0, 0 },
1158 { "iamlr14", 1678, {0, {0}}, 0, 0 },
1159 { "iamlr15", 1679, {0, {0}}, 0, 0 },
1160 { "iamlr16", 1680, {0, {0}}, 0, 0 },
1161 { "iamlr17", 1681, {0, {0}}, 0, 0 },
1162 { "iamlr18", 1682, {0, {0}}, 0, 0 },
1163 { "iamlr19", 1683, {0, {0}}, 0, 0 },
1164 { "iamlr20", 1684, {0, {0}}, 0, 0 },
1165 { "iamlr21", 1685, {0, {0}}, 0, 0 },
1166 { "iamlr22", 1686, {0, {0}}, 0, 0 },
1167 { "iamlr23", 1687, {0, {0}}, 0, 0 },
1168 { "iamlr24", 1688, {0, {0}}, 0, 0 },
1169 { "iamlr25", 1689, {0, {0}}, 0, 0 },
1170 { "iamlr26", 1690, {0, {0}}, 0, 0 },
1171 { "iamlr27", 1691, {0, {0}}, 0, 0 },
1172 { "iamlr28", 1692, {0, {0}}, 0, 0 },
1173 { "iamlr29", 1693, {0, {0}}, 0, 0 },
1174 { "iamlr30", 1694, {0, {0}}, 0, 0 },
1175 { "iamlr31", 1695, {0, {0}}, 0, 0 },
1176 { "iamlr32", 1696, {0, {0}}, 0, 0 },
1177 { "iamlr33", 1697, {0, {0}}, 0, 0 },
1178 { "iamlr34", 1698, {0, {0}}, 0, 0 },
1179 { "iamlr35", 1699, {0, {0}}, 0, 0 },
1180 { "iamlr36", 1700, {0, {0}}, 0, 0 },
1181 { "iamlr37", 1701, {0, {0}}, 0, 0 },
1182 { "iamlr38", 1702, {0, {0}}, 0, 0 },
1183 { "iamlr39", 1703, {0, {0}}, 0, 0 },
1184 { "iamlr40", 1704, {0, {0}}, 0, 0 },
1185 { "iamlr41", 1705, {0, {0}}, 0, 0 },
1186 { "iamlr42", 1706, {0, {0}}, 0, 0 },
1187 { "iamlr43", 1707, {0, {0}}, 0, 0 },
1188 { "iamlr44", 1708, {0, {0}}, 0, 0 },
1189 { "iamlr45", 1709, {0, {0}}, 0, 0 },
1190 { "iamlr46", 1710, {0, {0}}, 0, 0 },
1191 { "iamlr47", 1711, {0, {0}}, 0, 0 },
1192 { "iamlr48", 1712, {0, {0}}, 0, 0 },
1193 { "iamlr49", 1713, {0, {0}}, 0, 0 },
1194 { "iamlr50", 1714, {0, {0}}, 0, 0 },
1195 { "iamlr51", 1715, {0, {0}}, 0, 0 },
1196 { "iamlr52", 1716, {0, {0}}, 0, 0 },
1197 { "iamlr53", 1717, {0, {0}}, 0, 0 },
1198 { "iamlr54", 1718, {0, {0}}, 0, 0 },
1199 { "iamlr55", 1719, {0, {0}}, 0, 0 },
1200 { "iamlr56", 1720, {0, {0}}, 0, 0 },
1201 { "iamlr57", 1721, {0, {0}}, 0, 0 },
1202 { "iamlr58", 1722, {0, {0}}, 0, 0 },
1203 { "iamlr59", 1723, {0, {0}}, 0, 0 },
1204 { "iamlr60", 1724, {0, {0}}, 0, 0 },
1205 { "iamlr61", 1725, {0, {0}}, 0, 0 },
1206 { "iamlr62", 1726, {0, {0}}, 0, 0 },
1207 { "iamlr63", 1727, {0, {0}}, 0, 0 },
1208 { "iampr0", 1728, {0, {0}}, 0, 0 },
1209 { "iampr1", 1729, {0, {0}}, 0, 0 },
1210 { "iampr2", 1730, {0, {0}}, 0, 0 },
1211 { "iampr3", 1731, {0, {0}}, 0, 0 },
1212 { "iampr4", 1732, {0, {0}}, 0, 0 },
1213 { "iampr5", 1733, {0, {0}}, 0, 0 },
1214 { "iampr6", 1734, {0, {0}}, 0, 0 },
1215 { "iampr7", 1735, {0, {0}}, 0, 0 },
1216 { "iampr8", 1736, {0, {0}}, 0, 0 },
1217 { "iampr9", 1737, {0, {0}}, 0, 0 },
1218 { "iampr10", 1738, {0, {0}}, 0, 0 },
1219 { "iampr11", 1739, {0, {0}}, 0, 0 },
1220 { "iampr12", 1740, {0, {0}}, 0, 0 },
1221 { "iampr13", 1741, {0, {0}}, 0, 0 },
1222 { "iampr14", 1742, {0, {0}}, 0, 0 },
1223 { "iampr15", 1743, {0, {0}}, 0, 0 },
1224 { "iampr16", 1744, {0, {0}}, 0, 0 },
1225 { "iampr17", 1745, {0, {0}}, 0, 0 },
1226 { "iampr18", 1746, {0, {0}}, 0, 0 },
1227 { "iampr19", 1747, {0, {0}}, 0, 0 },
1228 { "iampr20", 1748, {0, {0}}, 0, 0 },
1229 { "iampr21", 1749, {0, {0}}, 0, 0 },
1230 { "iampr22", 1750, {0, {0}}, 0, 0 },
1231 { "iampr23", 1751, {0, {0}}, 0, 0 },
1232 { "iampr24", 1752, {0, {0}}, 0, 0 },
1233 { "iampr25", 1753, {0, {0}}, 0, 0 },
1234 { "iampr26", 1754, {0, {0}}, 0, 0 },
1235 { "iampr27", 1755, {0, {0}}, 0, 0 },
1236 { "iampr28", 1756, {0, {0}}, 0, 0 },
1237 { "iampr29", 1757, {0, {0}}, 0, 0 },
1238 { "iampr30", 1758, {0, {0}}, 0, 0 },
1239 { "iampr31", 1759, {0, {0}}, 0, 0 },
1240 { "iampr32", 1760, {0, {0}}, 0, 0 },
1241 { "iampr33", 1761, {0, {0}}, 0, 0 },
1242 { "iampr34", 1762, {0, {0}}, 0, 0 },
1243 { "iampr35", 1763, {0, {0}}, 0, 0 },
1244 { "iampr36", 1764, {0, {0}}, 0, 0 },
1245 { "iampr37", 1765, {0, {0}}, 0, 0 },
1246 { "iampr38", 1766, {0, {0}}, 0, 0 },
1247 { "iampr39", 1767, {0, {0}}, 0, 0 },
1248 { "iampr40", 1768, {0, {0}}, 0, 0 },
1249 { "iampr41", 1769, {0, {0}}, 0, 0 },
1250 { "iampr42", 1770, {0, {0}}, 0, 0 },
1251 { "iampr43", 1771, {0, {0}}, 0, 0 },
1252 { "iampr44", 1772, {0, {0}}, 0, 0 },
1253 { "iampr45", 1773, {0, {0}}, 0, 0 },
1254 { "iampr46", 1774, {0, {0}}, 0, 0 },
1255 { "iampr47", 1775, {0, {0}}, 0, 0 },
1256 { "iampr48", 1776, {0, {0}}, 0, 0 },
1257 { "iampr49", 1777, {0, {0}}, 0, 0 },
1258 { "iampr50", 1778, {0, {0}}, 0, 0 },
1259 { "iampr51", 1779, {0, {0}}, 0, 0 },
1260 { "iampr52", 1780, {0, {0}}, 0, 0 },
1261 { "iampr53", 1781, {0, {0}}, 0, 0 },
1262 { "iampr54", 1782, {0, {0}}, 0, 0 },
1263 { "iampr55", 1783, {0, {0}}, 0, 0 },
1264 { "iampr56", 1784, {0, {0}}, 0, 0 },
1265 { "iampr57", 1785, {0, {0}}, 0, 0 },
1266 { "iampr58", 1786, {0, {0}}, 0, 0 },
1267 { "iampr59", 1787, {0, {0}}, 0, 0 },
1268 { "iampr60", 1788, {0, {0}}, 0, 0 },
1269 { "iampr61", 1789, {0, {0}}, 0, 0 },
1270 { "iampr62", 1790, {0, {0}}, 0, 0 },
1271 { "iampr63", 1791, {0, {0}}, 0, 0 },
1272 { "damlr0", 1792, {0, {0}}, 0, 0 },
1273 { "damlr1", 1793, {0, {0}}, 0, 0 },
1274 { "damlr2", 1794, {0, {0}}, 0, 0 },
1275 { "damlr3", 1795, {0, {0}}, 0, 0 },
1276 { "damlr4", 1796, {0, {0}}, 0, 0 },
1277 { "damlr5", 1797, {0, {0}}, 0, 0 },
1278 { "damlr6", 1798, {0, {0}}, 0, 0 },
1279 { "damlr7", 1799, {0, {0}}, 0, 0 },
1280 { "damlr8", 1800, {0, {0}}, 0, 0 },
1281 { "damlr9", 1801, {0, {0}}, 0, 0 },
1282 { "damlr10", 1802, {0, {0}}, 0, 0 },
1283 { "damlr11", 1803, {0, {0}}, 0, 0 },
1284 { "damlr12", 1804, {0, {0}}, 0, 0 },
1285 { "damlr13", 1805, {0, {0}}, 0, 0 },
1286 { "damlr14", 1806, {0, {0}}, 0, 0 },
1287 { "damlr15", 1807, {0, {0}}, 0, 0 },
1288 { "damlr16", 1808, {0, {0}}, 0, 0 },
1289 { "damlr17", 1809, {0, {0}}, 0, 0 },
1290 { "damlr18", 1810, {0, {0}}, 0, 0 },
1291 { "damlr19", 1811, {0, {0}}, 0, 0 },
1292 { "damlr20", 1812, {0, {0}}, 0, 0 },
1293 { "damlr21", 1813, {0, {0}}, 0, 0 },
1294 { "damlr22", 1814, {0, {0}}, 0, 0 },
1295 { "damlr23", 1815, {0, {0}}, 0, 0 },
1296 { "damlr24", 1816, {0, {0}}, 0, 0 },
1297 { "damlr25", 1817, {0, {0}}, 0, 0 },
1298 { "damlr26", 1818, {0, {0}}, 0, 0 },
1299 { "damlr27", 1819, {0, {0}}, 0, 0 },
1300 { "damlr28", 1820, {0, {0}}, 0, 0 },
1301 { "damlr29", 1821, {0, {0}}, 0, 0 },
1302 { "damlr30", 1822, {0, {0}}, 0, 0 },
1303 { "damlr31", 1823, {0, {0}}, 0, 0 },
1304 { "damlr32", 1824, {0, {0}}, 0, 0 },
1305 { "damlr33", 1825, {0, {0}}, 0, 0 },
1306 { "damlr34", 1826, {0, {0}}, 0, 0 },
1307 { "damlr35", 1827, {0, {0}}, 0, 0 },
1308 { "damlr36", 1828, {0, {0}}, 0, 0 },
1309 { "damlr37", 1829, {0, {0}}, 0, 0 },
1310 { "damlr38", 1830, {0, {0}}, 0, 0 },
1311 { "damlr39", 1831, {0, {0}}, 0, 0 },
1312 { "damlr40", 1832, {0, {0}}, 0, 0 },
1313 { "damlr41", 1833, {0, {0}}, 0, 0 },
1314 { "damlr42", 1834, {0, {0}}, 0, 0 },
1315 { "damlr43", 1835, {0, {0}}, 0, 0 },
1316 { "damlr44", 1836, {0, {0}}, 0, 0 },
1317 { "damlr45", 1837, {0, {0}}, 0, 0 },
1318 { "damlr46", 1838, {0, {0}}, 0, 0 },
1319 { "damlr47", 1839, {0, {0}}, 0, 0 },
1320 { "damlr48", 1840, {0, {0}}, 0, 0 },
1321 { "damlr49", 1841, {0, {0}}, 0, 0 },
1322 { "damlr50", 1842, {0, {0}}, 0, 0 },
1323 { "damlr51", 1843, {0, {0}}, 0, 0 },
1324 { "damlr52", 1844, {0, {0}}, 0, 0 },
1325 { "damlr53", 1845, {0, {0}}, 0, 0 },
1326 { "damlr54", 1846, {0, {0}}, 0, 0 },
1327 { "damlr55", 1847, {0, {0}}, 0, 0 },
1328 { "damlr56", 1848, {0, {0}}, 0, 0 },
1329 { "damlr57", 1849, {0, {0}}, 0, 0 },
1330 { "damlr58", 1850, {0, {0}}, 0, 0 },
1331 { "damlr59", 1851, {0, {0}}, 0, 0 },
1332 { "damlr60", 1852, {0, {0}}, 0, 0 },
1333 { "damlr61", 1853, {0, {0}}, 0, 0 },
1334 { "damlr62", 1854, {0, {0}}, 0, 0 },
1335 { "damlr63", 1855, {0, {0}}, 0, 0 },
1336 { "dampr0", 1856, {0, {0}}, 0, 0 },
1337 { "dampr1", 1857, {0, {0}}, 0, 0 },
1338 { "dampr2", 1858, {0, {0}}, 0, 0 },
1339 { "dampr3", 1859, {0, {0}}, 0, 0 },
1340 { "dampr4", 1860, {0, {0}}, 0, 0 },
1341 { "dampr5", 1861, {0, {0}}, 0, 0 },
1342 { "dampr6", 1862, {0, {0}}, 0, 0 },
1343 { "dampr7", 1863, {0, {0}}, 0, 0 },
1344 { "dampr8", 1864, {0, {0}}, 0, 0 },
1345 { "dampr9", 1865, {0, {0}}, 0, 0 },
1346 { "dampr10", 1866, {0, {0}}, 0, 0 },
1347 { "dampr11", 1867, {0, {0}}, 0, 0 },
1348 { "dampr12", 1868, {0, {0}}, 0, 0 },
1349 { "dampr13", 1869, {0, {0}}, 0, 0 },
1350 { "dampr14", 1870, {0, {0}}, 0, 0 },
1351 { "dampr15", 1871, {0, {0}}, 0, 0 },
1352 { "dampr16", 1872, {0, {0}}, 0, 0 },
1353 { "dampr17", 1873, {0, {0}}, 0, 0 },
1354 { "dampr18", 1874, {0, {0}}, 0, 0 },
1355 { "dampr19", 1875, {0, {0}}, 0, 0 },
1356 { "dampr20", 1876, {0, {0}}, 0, 0 },
1357 { "dampr21", 1877, {0, {0}}, 0, 0 },
1358 { "dampr22", 1878, {0, {0}}, 0, 0 },
1359 { "dampr23", 1879, {0, {0}}, 0, 0 },
1360 { "dampr24", 1880, {0, {0}}, 0, 0 },
1361 { "dampr25", 1881, {0, {0}}, 0, 0 },
1362 { "dampr26", 1882, {0, {0}}, 0, 0 },
1363 { "dampr27", 1883, {0, {0}}, 0, 0 },
1364 { "dampr28", 1884, {0, {0}}, 0, 0 },
1365 { "dampr29", 1885, {0, {0}}, 0, 0 },
1366 { "dampr30", 1886, {0, {0}}, 0, 0 },
1367 { "dampr31", 1887, {0, {0}}, 0, 0 },
1368 { "dampr32", 1888, {0, {0}}, 0, 0 },
1369 { "dampr33", 1889, {0, {0}}, 0, 0 },
1370 { "dampr34", 1890, {0, {0}}, 0, 0 },
1371 { "dampr35", 1891, {0, {0}}, 0, 0 },
1372 { "dampr36", 1892, {0, {0}}, 0, 0 },
1373 { "dampr37", 1893, {0, {0}}, 0, 0 },
1374 { "dampr38", 1894, {0, {0}}, 0, 0 },
1375 { "dampr39", 1895, {0, {0}}, 0, 0 },
1376 { "dampr40", 1896, {0, {0}}, 0, 0 },
1377 { "dampr41", 1897, {0, {0}}, 0, 0 },
1378 { "dampr42", 1898, {0, {0}}, 0, 0 },
1379 { "dampr43", 1899, {0, {0}}, 0, 0 },
1380 { "dampr44", 1900, {0, {0}}, 0, 0 },
1381 { "dampr45", 1901, {0, {0}}, 0, 0 },
1382 { "dampr46", 1902, {0, {0}}, 0, 0 },
1383 { "dampr47", 1903, {0, {0}}, 0, 0 },
1384 { "dampr48", 1904, {0, {0}}, 0, 0 },
1385 { "dampr49", 1905, {0, {0}}, 0, 0 },
1386 { "dampr50", 1906, {0, {0}}, 0, 0 },
1387 { "dampr51", 1907, {0, {0}}, 0, 0 },
1388 { "dampr52", 1908, {0, {0}}, 0, 0 },
1389 { "dampr53", 1909, {0, {0}}, 0, 0 },
1390 { "dampr54", 1910, {0, {0}}, 0, 0 },
1391 { "dampr55", 1911, {0, {0}}, 0, 0 },
1392 { "dampr56", 1912, {0, {0}}, 0, 0 },
1393 { "dampr57", 1913, {0, {0}}, 0, 0 },
1394 { "dampr58", 1914, {0, {0}}, 0, 0 },
1395 { "dampr59", 1915, {0, {0}}, 0, 0 },
1396 { "dampr60", 1916, {0, {0}}, 0, 0 },
1397 { "dampr61", 1917, {0, {0}}, 0, 0 },
1398 { "dampr62", 1918, {0, {0}}, 0, 0 },
1399 { "dampr63", 1919, {0, {0}}, 0, 0 },
1400 { "amcr", 1920, {0, {0}}, 0, 0 },
1401 { "stbar", 1921, {0, {0}}, 0, 0 },
1402 { "mmcr", 1922, {0, {0}}, 0, 0 },
1403 { "dcr", 2048, {0, {0}}, 0, 0 },
1404 { "brr", 2049, {0, {0}}, 0, 0 },
1405 { "nmar", 2050, {0, {0}}, 0, 0 },
1406 { "ibar0", 2052, {0, {0}}, 0, 0 },
1407 { "ibar1", 2053, {0, {0}}, 0, 0 },
1408 { "ibar2", 2054, {0, {0}}, 0, 0 },
1409 { "ibar3", 2055, {0, {0}}, 0, 0 },
1410 { "dbar0", 2056, {0, {0}}, 0, 0 },
1411 { "dbar1", 2057, {0, {0}}, 0, 0 },
1412 { "dbar2", 2058, {0, {0}}, 0, 0 },
1413 { "dbar3", 2059, {0, {0}}, 0, 0 },
1414 { "dbdr00", 2060, {0, {0}}, 0, 0 },
1415 { "dbdr01", 2061, {0, {0}}, 0, 0 },
1416 { "dbdr02", 2062, {0, {0}}, 0, 0 },
1417 { "dbdr03", 2063, {0, {0}}, 0, 0 },
1418 { "dbdr10", 2064, {0, {0}}, 0, 0 },
1419 { "dbdr11", 2065, {0, {0}}, 0, 0 },
1420 { "dbdr12", 2066, {0, {0}}, 0, 0 },
1421 { "dbdr13", 2067, {0, {0}}, 0, 0 },
1422 { "dbdr20", 2068, {0, {0}}, 0, 0 },
1423 { "dbdr21", 2069, {0, {0}}, 0, 0 },
1424 { "dbdr22", 2070, {0, {0}}, 0, 0 },
1425 { "dbdr23", 2071, {0, {0}}, 0, 0 },
1426 { "dbdr30", 2072, {0, {0}}, 0, 0 },
1427 { "dbdr31", 2073, {0, {0}}, 0, 0 },
1428 { "dbdr32", 2074, {0, {0}}, 0, 0 },
1429 { "dbdr33", 2075, {0, {0}}, 0, 0 },
1430 { "dbmr00", 2076, {0, {0}}, 0, 0 },
1431 { "dbmr01", 2077, {0, {0}}, 0, 0 },
1432 { "dbmr02", 2078, {0, {0}}, 0, 0 },
1433 { "dbmr03", 2079, {0, {0}}, 0, 0 },
1434 { "dbmr10", 2080, {0, {0}}, 0, 0 },
1435 { "dbmr11", 2081, {0, {0}}, 0, 0 },
1436 { "dbmr12", 2082, {0, {0}}, 0, 0 },
1437 { "dbmr13", 2083, {0, {0}}, 0, 0 },
1438 { "dbmr20", 2084, {0, {0}}, 0, 0 },
1439 { "dbmr21", 2085, {0, {0}}, 0, 0 },
1440 { "dbmr22", 2086, {0, {0}}, 0, 0 },
1441 { "dbmr23", 2087, {0, {0}}, 0, 0 },
1442 { "dbmr30", 2088, {0, {0}}, 0, 0 },
1443 { "dbmr31", 2089, {0, {0}}, 0, 0 },
1444 { "dbmr32", 2090, {0, {0}}, 0, 0 },
1445 { "dbmr33", 2091, {0, {0}}, 0, 0 },
1446 { "cpcfr", 2092, {0, {0}}, 0, 0 },
1447 { "cpcr", 2093, {0, {0}}, 0, 0 },
1448 { "cpsr", 2094, {0, {0}}, 0, 0 },
1449 { "cpesr0", 2096, {0, {0}}, 0, 0 },
1450 { "cpesr1", 2097, {0, {0}}, 0, 0 },
1451 { "cpemr0", 2098, {0, {0}}, 0, 0 },
1452 { "cpemr1", 2099, {0, {0}}, 0, 0 },
1453 { "ihsr8", 3848, {0, {0}}, 0, 0 }
1454};
1455
1456CGEN_KEYWORD frv_cgen_opval_spr_names =
1457{
1458 & frv_cgen_opval_spr_names_entries[0],
1459 1005,
1460 0, 0, 0, 0, ""
1461};
1462
1463static CGEN_KEYWORD_ENTRY frv_cgen_opval_accg_names_entries[] =
1464{
1465 { "accg0", 0, {0, {0}}, 0, 0 },
1466 { "accg1", 1, {0, {0}}, 0, 0 },
1467 { "accg2", 2, {0, {0}}, 0, 0 },
1468 { "accg3", 3, {0, {0}}, 0, 0 },
1469 { "accg4", 4, {0, {0}}, 0, 0 },
1470 { "accg5", 5, {0, {0}}, 0, 0 },
1471 { "accg6", 6, {0, {0}}, 0, 0 },
1472 { "accg7", 7, {0, {0}}, 0, 0 },
1473 { "accg8", 8, {0, {0}}, 0, 0 },
1474 { "accg9", 9, {0, {0}}, 0, 0 },
1475 { "accg10", 10, {0, {0}}, 0, 0 },
1476 { "accg11", 11, {0, {0}}, 0, 0 },
1477 { "accg12", 12, {0, {0}}, 0, 0 },
1478 { "accg13", 13, {0, {0}}, 0, 0 },
1479 { "accg14", 14, {0, {0}}, 0, 0 },
1480 { "accg15", 15, {0, {0}}, 0, 0 },
1481 { "accg16", 16, {0, {0}}, 0, 0 },
1482 { "accg17", 17, {0, {0}}, 0, 0 },
1483 { "accg18", 18, {0, {0}}, 0, 0 },
1484 { "accg19", 19, {0, {0}}, 0, 0 },
1485 { "accg20", 20, {0, {0}}, 0, 0 },
1486 { "accg21", 21, {0, {0}}, 0, 0 },
1487 { "accg22", 22, {0, {0}}, 0, 0 },
1488 { "accg23", 23, {0, {0}}, 0, 0 },
1489 { "accg24", 24, {0, {0}}, 0, 0 },
1490 { "accg25", 25, {0, {0}}, 0, 0 },
1491 { "accg26", 26, {0, {0}}, 0, 0 },
1492 { "accg27", 27, {0, {0}}, 0, 0 },
1493 { "accg28", 28, {0, {0}}, 0, 0 },
1494 { "accg29", 29, {0, {0}}, 0, 0 },
1495 { "accg30", 30, {0, {0}}, 0, 0 },
1496 { "accg31", 31, {0, {0}}, 0, 0 },
1497 { "accg32", 32, {0, {0}}, 0, 0 },
1498 { "accg33", 33, {0, {0}}, 0, 0 },
1499 { "accg34", 34, {0, {0}}, 0, 0 },
1500 { "accg35", 35, {0, {0}}, 0, 0 },
1501 { "accg36", 36, {0, {0}}, 0, 0 },
1502 { "accg37", 37, {0, {0}}, 0, 0 },
1503 { "accg38", 38, {0, {0}}, 0, 0 },
1504 { "accg39", 39, {0, {0}}, 0, 0 },
1505 { "accg40", 40, {0, {0}}, 0, 0 },
1506 { "accg41", 41, {0, {0}}, 0, 0 },
1507 { "accg42", 42, {0, {0}}, 0, 0 },
1508 { "accg43", 43, {0, {0}}, 0, 0 },
1509 { "accg44", 44, {0, {0}}, 0, 0 },
1510 { "accg45", 45, {0, {0}}, 0, 0 },
1511 { "accg46", 46, {0, {0}}, 0, 0 },
1512 { "accg47", 47, {0, {0}}, 0, 0 },
1513 { "accg48", 48, {0, {0}}, 0, 0 },
1514 { "accg49", 49, {0, {0}}, 0, 0 },
1515 { "accg50", 50, {0, {0}}, 0, 0 },
1516 { "accg51", 51, {0, {0}}, 0, 0 },
1517 { "accg52", 52, {0, {0}}, 0, 0 },
1518 { "accg53", 53, {0, {0}}, 0, 0 },
1519 { "accg54", 54, {0, {0}}, 0, 0 },
1520 { "accg55", 55, {0, {0}}, 0, 0 },
1521 { "accg56", 56, {0, {0}}, 0, 0 },
1522 { "accg57", 57, {0, {0}}, 0, 0 },
1523 { "accg58", 58, {0, {0}}, 0, 0 },
1524 { "accg59", 59, {0, {0}}, 0, 0 },
1525 { "accg60", 60, {0, {0}}, 0, 0 },
1526 { "accg61", 61, {0, {0}}, 0, 0 },
1527 { "accg62", 62, {0, {0}}, 0, 0 },
1528 { "accg63", 63, {0, {0}}, 0, 0 }
1529};
1530
1531CGEN_KEYWORD frv_cgen_opval_accg_names =
1532{
1533 & frv_cgen_opval_accg_names_entries[0],
1534 64,
1535 0, 0, 0, 0, ""
1536};
1537
1538static CGEN_KEYWORD_ENTRY frv_cgen_opval_acc_names_entries[] =
1539{
1540 { "acc0", 0, {0, {0}}, 0, 0 },
1541 { "acc1", 1, {0, {0}}, 0, 0 },
1542 { "acc2", 2, {0, {0}}, 0, 0 },
1543 { "acc3", 3, {0, {0}}, 0, 0 },
1544 { "acc4", 4, {0, {0}}, 0, 0 },
1545 { "acc5", 5, {0, {0}}, 0, 0 },
1546 { "acc6", 6, {0, {0}}, 0, 0 },
1547 { "acc7", 7, {0, {0}}, 0, 0 },
1548 { "acc8", 8, {0, {0}}, 0, 0 },
1549 { "acc9", 9, {0, {0}}, 0, 0 },
1550 { "acc10", 10, {0, {0}}, 0, 0 },
1551 { "acc11", 11, {0, {0}}, 0, 0 },
1552 { "acc12", 12, {0, {0}}, 0, 0 },
1553 { "acc13", 13, {0, {0}}, 0, 0 },
1554 { "acc14", 14, {0, {0}}, 0, 0 },
1555 { "acc15", 15, {0, {0}}, 0, 0 },
1556 { "acc16", 16, {0, {0}}, 0, 0 },
1557 { "acc17", 17, {0, {0}}, 0, 0 },
1558 { "acc18", 18, {0, {0}}, 0, 0 },
1559 { "acc19", 19, {0, {0}}, 0, 0 },
1560 { "acc20", 20, {0, {0}}, 0, 0 },
1561 { "acc21", 21, {0, {0}}, 0, 0 },
1562 { "acc22", 22, {0, {0}}, 0, 0 },
1563 { "acc23", 23, {0, {0}}, 0, 0 },
1564 { "acc24", 24, {0, {0}}, 0, 0 },
1565 { "acc25", 25, {0, {0}}, 0, 0 },
1566 { "acc26", 26, {0, {0}}, 0, 0 },
1567 { "acc27", 27, {0, {0}}, 0, 0 },
1568 { "acc28", 28, {0, {0}}, 0, 0 },
1569 { "acc29", 29, {0, {0}}, 0, 0 },
1570 { "acc30", 30, {0, {0}}, 0, 0 },
1571 { "acc31", 31, {0, {0}}, 0, 0 },
1572 { "acc32", 32, {0, {0}}, 0, 0 },
1573 { "acc33", 33, {0, {0}}, 0, 0 },
1574 { "acc34", 34, {0, {0}}, 0, 0 },
1575 { "acc35", 35, {0, {0}}, 0, 0 },
1576 { "acc36", 36, {0, {0}}, 0, 0 },
1577 { "acc37", 37, {0, {0}}, 0, 0 },
1578 { "acc38", 38, {0, {0}}, 0, 0 },
1579 { "acc39", 39, {0, {0}}, 0, 0 },
1580 { "acc40", 40, {0, {0}}, 0, 0 },
1581 { "acc41", 41, {0, {0}}, 0, 0 },
1582 { "acc42", 42, {0, {0}}, 0, 0 },
1583 { "acc43", 43, {0, {0}}, 0, 0 },
1584 { "acc44", 44, {0, {0}}, 0, 0 },
1585 { "acc45", 45, {0, {0}}, 0, 0 },
1586 { "acc46", 46, {0, {0}}, 0, 0 },
1587 { "acc47", 47, {0, {0}}, 0, 0 },
1588 { "acc48", 48, {0, {0}}, 0, 0 },
1589 { "acc49", 49, {0, {0}}, 0, 0 },
1590 { "acc50", 50, {0, {0}}, 0, 0 },
1591 { "acc51", 51, {0, {0}}, 0, 0 },
1592 { "acc52", 52, {0, {0}}, 0, 0 },
1593 { "acc53", 53, {0, {0}}, 0, 0 },
1594 { "acc54", 54, {0, {0}}, 0, 0 },
1595 { "acc55", 55, {0, {0}}, 0, 0 },
1596 { "acc56", 56, {0, {0}}, 0, 0 },
1597 { "acc57", 57, {0, {0}}, 0, 0 },
1598 { "acc58", 58, {0, {0}}, 0, 0 },
1599 { "acc59", 59, {0, {0}}, 0, 0 },
1600 { "acc60", 60, {0, {0}}, 0, 0 },
1601 { "acc61", 61, {0, {0}}, 0, 0 },
1602 { "acc62", 62, {0, {0}}, 0, 0 },
1603 { "acc63", 63, {0, {0}}, 0, 0 }
1604};
1605
1606CGEN_KEYWORD frv_cgen_opval_acc_names =
1607{
1608 & frv_cgen_opval_acc_names_entries[0],
1609 64,
1610 0, 0, 0, 0, ""
1611};
1612
1613static CGEN_KEYWORD_ENTRY frv_cgen_opval_iccr_names_entries[] =
1614{
1615 { "icc0", 0, {0, {0}}, 0, 0 },
1616 { "icc1", 1, {0, {0}}, 0, 0 },
1617 { "icc2", 2, {0, {0}}, 0, 0 },
1618 { "icc3", 3, {0, {0}}, 0, 0 }
1619};
1620
1621CGEN_KEYWORD frv_cgen_opval_iccr_names =
1622{
1623 & frv_cgen_opval_iccr_names_entries[0],
1624 4,
1625 0, 0, 0, 0, ""
1626};
1627
1628static CGEN_KEYWORD_ENTRY frv_cgen_opval_fccr_names_entries[] =
1629{
1630 { "fcc0", 0, {0, {0}}, 0, 0 },
1631 { "fcc1", 1, {0, {0}}, 0, 0 },
1632 { "fcc2", 2, {0, {0}}, 0, 0 },
1633 { "fcc3", 3, {0, {0}}, 0, 0 }
1634};
1635
1636CGEN_KEYWORD frv_cgen_opval_fccr_names =
1637{
1638 & frv_cgen_opval_fccr_names_entries[0],
1639 4,
1640 0, 0, 0, 0, ""
1641};
1642
1643static CGEN_KEYWORD_ENTRY frv_cgen_opval_cccr_names_entries[] =
1644{
1645 { "cc0", 0, {0, {0}}, 0, 0 },
1646 { "cc1", 1, {0, {0}}, 0, 0 },
1647 { "cc2", 2, {0, {0}}, 0, 0 },
1648 { "cc3", 3, {0, {0}}, 0, 0 },
1649 { "cc4", 4, {0, {0}}, 0, 0 },
1650 { "cc5", 5, {0, {0}}, 0, 0 },
1651 { "cc6", 6, {0, {0}}, 0, 0 },
1652 { "cc7", 7, {0, {0}}, 0, 0 }
1653};
1654
1655CGEN_KEYWORD frv_cgen_opval_cccr_names =
1656{
1657 & frv_cgen_opval_cccr_names_entries[0],
1658 8,
1659 0, 0, 0, 0, ""
1660};
1661
1662static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_pack_entries[] =
1663{
1664 { "", 1, {0, {0}}, 0, 0 },
1665 { ".p", 0, {0, {0}}, 0, 0 },
1666 { ".P", 0, {0, {0}}, 0, 0 }
1667};
1668
1669CGEN_KEYWORD frv_cgen_opval_h_pack =
1670{
1671 & frv_cgen_opval_h_pack_entries[0],
1672 3,
1673 0, 0, 0, 0, ""
1674};
1675
1676static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_taken_entries[] =
1677{
1678 { "", 2, {0, {0}}, 0, 0 },
1679 { "", 0, {0, {0}}, 0, 0 },
1680 { "", 1, {0, {0}}, 0, 0 },
1681 { "", 3, {0, {0}}, 0, 0 }
1682};
1683
1684CGEN_KEYWORD frv_cgen_opval_h_hint_taken =
1685{
1686 & frv_cgen_opval_h_hint_taken_entries[0],
1687 4,
1688 0, 0, 0, 0, ""
1689};
1690
1691static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_not_taken_entries[] =
1692{
1693 { "", 0, {0, {0}}, 0, 0 },
1694 { "", 1, {0, {0}}, 0, 0 },
1695 { "", 2, {0, {0}}, 0, 0 },
1696 { "", 3, {0, {0}}, 0, 0 }
1697};
1698
1699CGEN_KEYWORD frv_cgen_opval_h_hint_not_taken =
1700{
1701 & frv_cgen_opval_h_hint_not_taken_entries[0],
1702 4,
1703 0, 0, 0, 0, ""
1704};
1705
1706
1707/* The hardware table. */
1708
1709#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1710#define A(a) (1 << CGEN_HW_##a)
1711#else
1712#define A(a) (1 << CGEN_HW_/**/a)
1713#endif
1714
1715const CGEN_HW_ENTRY frv_cgen_hw_table[] =
1716{
1717 { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1718 { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1719 { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1720 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1721 { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1722 { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { (1<<MACH_BASE) } } },
1723 { "h-psr_imple", HW_H_PSR_IMPLE, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1724 { "h-psr_ver", HW_H_PSR_VER, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1725 { "h-psr_ice", HW_H_PSR_ICE, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1726 { "h-psr_nem", HW_H_PSR_NEM, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1727 { "h-psr_cm", HW_H_PSR_CM, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1728 { "h-psr_be", HW_H_PSR_BE, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1729 { "h-psr_esr", HW_H_PSR_ESR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1730 { "h-psr_ef", HW_H_PSR_EF, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1731 { "h-psr_em", HW_H_PSR_EM, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1732 { "h-psr_pil", HW_H_PSR_PIL, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1733 { "h-psr_ps", HW_H_PSR_PS, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1734 { "h-psr_et", HW_H_PSR_ET, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1735 { "h-psr_s", HW_H_PSR_S, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1736 { "h-tbr_tba", HW_H_TBR_TBA, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1737 { "h-tbr_tt", HW_H_TBR_TT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1738 { "h-bpsr_bs", HW_H_BPSR_BS, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1739 { "h-bpsr_bet", HW_H_BPSR_BET, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1740 { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1741 { "h-gr_double", HW_H_GR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1742 { "h-gr_hi", HW_H_GR_HI, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1743 { "h-gr_lo", HW_H_GR_LO, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1744 { "h-fr", HW_H_FR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1745 { "h-fr_double", HW_H_FR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1746 { "h-fr_int", HW_H_FR_INT, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1747 { "h-fr_hi", HW_H_FR_HI, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1748 { "h-fr_lo", HW_H_FR_LO, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1749 { "h-fr_0", HW_H_FR_0, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1750 { "h-fr_1", HW_H_FR_1, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1751 { "h-fr_2", HW_H_FR_2, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1752 { "h-fr_3", HW_H_FR_3, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1753 { "h-cpr", HW_H_CPR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cpr_names, { 0|A(PROFILE), { (1<<MACH_FRV) } } },
1754 { "h-cpr_double", HW_H_CPR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cpr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_FRV) } } },
1755 { "h-spr", HW_H_SPR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_spr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1756 { "h-accg", HW_H_ACCG, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_accg_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1757 { "h-acc40S", HW_H_ACC40S, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1758 { "h-acc40U", HW_H_ACC40U, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1759 { "h-iccr", HW_H_ICCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_iccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1760 { "h-fccr", HW_H_FCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1761 { "h-cccr", HW_H_CCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1762 { "h-pack", HW_H_PACK, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_pack, { 0, { (1<<MACH_BASE) } } },
1763 { "h-hint-taken", HW_H_HINT_TAKEN, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_hint_taken, { 0, { (1<<MACH_BASE) } } },
1764 { "h-hint-not-taken", HW_H_HINT_NOT_TAKEN, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_hint_not_taken, { 0, { (1<<MACH_BASE) } } },
1765 { 0, 0, CGEN_ASM_NONE, 0, {0, {0}} }
1766};
1767
1768#undef A
1769
1770
1771/* The instruction field table. */
1772
1773#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1774#define A(a) (1 << CGEN_IFLD_##a)
1775#else
1776#define A(a) (1 << CGEN_IFLD_/**/a)
1777#endif
1778
1779const CGEN_IFLD frv_cgen_ifld_table[] =
1780{
1781 { FRV_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } },
1782 { FRV_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } },
1783 { FRV_F_PACK, "f-pack", 0, 32, 31, 1, { 0, { (1<<MACH_BASE) } } },
1784 { FRV_F_OP, "f-op", 0, 32, 24, 7, { 0, { (1<<MACH_BASE) } } },
1785 { FRV_F_OPE1, "f-ope1", 0, 32, 11, 6, { 0, { (1<<MACH_BASE) } } },
1786 { FRV_F_OPE2, "f-ope2", 0, 32, 9, 4, { 0, { (1<<MACH_BASE) } } },
1787 { FRV_F_OPE3, "f-ope3", 0, 32, 15, 3, { 0, { (1<<MACH_BASE) } } },
1788 { FRV_F_OPE4, "f-ope4", 0, 32, 7, 2, { 0, { (1<<MACH_BASE) } } },
1789 { FRV_F_GRI, "f-GRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1790 { FRV_F_GRJ, "f-GRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
1791 { FRV_F_GRK, "f-GRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1792 { FRV_F_FRI, "f-FRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1793 { FRV_F_FRJ, "f-FRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
1794 { FRV_F_FRK, "f-FRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1795 { FRV_F_CPRI, "f-CPRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1796 { FRV_F_CPRJ, "f-CPRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
1797 { FRV_F_CPRK, "f-CPRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1798 { FRV_F_ACCGI, "f-ACCGi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1799 { FRV_F_ACCGK, "f-ACCGk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1800 { FRV_F_ACC40SI, "f-ACC40Si", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1801 { FRV_F_ACC40UI, "f-ACC40Ui", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1802 { FRV_F_ACC40SK, "f-ACC40Sk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1803 { FRV_F_ACC40UK, "f-ACC40Uk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1804 { FRV_F_CRI, "f-CRi", 0, 32, 14, 3, { 0, { (1<<MACH_BASE) } } },
1805 { FRV_F_CRJ, "f-CRj", 0, 32, 2, 3, { 0, { (1<<MACH_BASE) } } },
1806 { FRV_F_CRK, "f-CRk", 0, 32, 27, 3, { 0, { (1<<MACH_BASE) } } },
1807 { FRV_F_CCI, "f-CCi", 0, 32, 11, 3, { 0, { (1<<MACH_BASE) } } },
1808 { FRV_F_CRJ_INT, "f-CRj_int", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
1809 { FRV_F_CRJ_FLOAT, "f-CRj_float", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
1810 { FRV_F_ICCI_1, "f-ICCi_1", 0, 32, 11, 2, { 0, { (1<<MACH_BASE) } } },
1811 { FRV_F_ICCI_2, "f-ICCi_2", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
1812 { FRV_F_ICCI_3, "f-ICCi_3", 0, 32, 1, 2, { 0, { (1<<MACH_BASE) } } },
1813 { FRV_F_FCCI_1, "f-FCCi_1", 0, 32, 11, 2, { 0, { (1<<MACH_BASE) } } },
1814 { FRV_F_FCCI_2, "f-FCCi_2", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
1815 { FRV_F_FCCI_3, "f-FCCi_3", 0, 32, 1, 2, { 0, { (1<<MACH_BASE) } } },
1816 { FRV_F_FCCK, "f-FCCk", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
1817 { FRV_F_EIR, "f-eir", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1818 { FRV_F_S10, "f-s10", 0, 32, 9, 10, { 0, { (1<<MACH_BASE) } } },
1819 { FRV_F_S12, "f-s12", 0, 32, 11, 12, { 0, { (1<<MACH_BASE) } } },
1820 { FRV_F_D12, "f-d12", 0, 32, 11, 12, { 0, { (1<<MACH_BASE) } } },
1821 { FRV_F_U16, "f-u16", 0, 32, 15, 16, { 0, { (1<<MACH_BASE) } } },
1822 { FRV_F_S16, "f-s16", 0, 32, 15, 16, { 0, { (1<<MACH_BASE) } } },
1823 { FRV_F_S6, "f-s6", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
1824 { FRV_F_S6_1, "f-s6_1", 0, 32, 11, 6, { 0, { (1<<MACH_BASE) } } },
1825 { FRV_F_U6, "f-u6", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
1826 { FRV_F_S5, "f-s5", 0, 32, 4, 5, { 0, { (1<<MACH_BASE) } } },
1827 { FRV_F_U12_H, "f-u12-h", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1828 { FRV_F_U12_L, "f-u12-l", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
390ff83f 1829 { FRV_F_U12, "f-u12", 0, 0, 0, 0,{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
fd3c93d5
DB		 1830 { FRV_F_INT_CC, "f-int-cc", 0, 32, 30, 4, { 0, { (1<<MACH_BASE) } } },
1831 { FRV_F_FLT_CC, "f-flt-cc", 0, 32, 30, 4, { 0, { (1<<MACH_BASE) } } },
1832 { FRV_F_COND, "f-cond", 0, 32, 8, 1, { 0, { (1<<MACH_BASE) } } },
1833 { FRV_F_CCOND, "f-ccond", 0, 32, 12, 1, { 0, { (1<<MACH_BASE) } } },
1834 { FRV_F_HINT, "f-hint", 0, 32, 17, 2, { 0, { (1<<MACH_BASE) } } },
1835 { FRV_F_LI, "f-LI", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
1836 { FRV_F_LOCK, "f-lock", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
1837 { FRV_F_DEBUG, "f-debug", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
1838 { FRV_F_A, "f-A", 0, 32, 17, 1, { 0, { (1<<MACH_BASE) } } },
1839 { FRV_F_AE, "f-ae", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
1840 { FRV_F_SPR_H, "f-spr-h", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1841 { FRV_F_SPR_L, "f-spr-l", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
390ff83f 1842 { FRV_F_SPR, "f-spr", 0, 0, 0, 0,{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
fd3c93d5
DB		 1843 { FRV_F_LABEL16, "f-label16", 0, 32, 15, 16, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
1844 { FRV_F_LABELH6, "f-labelH6", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1845 { FRV_F_LABELL18, "f-labelL18", 0, 32, 17, 18, { 0, { (1<<MACH_BASE) } } },
390ff83f 1846 { FRV_F_LABEL24, "f-label24", 0, 0, 0, 0,{ 0|A(PCREL_ADDR)|A(VIRTUAL), { (1<<MACH_BASE) } } },
fd3c93d5
DB		 1847 { FRV_F_ICCI_1_NULL, "f-ICCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1848 { FRV_F_ICCI_2_NULL, "f-ICCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1849 { FRV_F_ICCI_3_NULL, "f-ICCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1850 { FRV_F_FCCI_1_NULL, "f-FCCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1851 { FRV_F_FCCI_2_NULL, "f-FCCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1852 { FRV_F_FCCI_3_NULL, "f-FCCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1853 { FRV_F_RS_NULL, "f-rs-null", 0, 32, 17, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1854 { FRV_F_GRI_NULL, "f-GRi-null", 0, 32, 17, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1855 { FRV_F_GRJ_NULL, "f-GRj-null", 0, 32, 5, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1856 { FRV_F_GRK_NULL, "f-GRk-null", 0, 32, 30, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1857 { FRV_F_FRI_NULL, "f-FRi-null", 0, 32, 17, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1858 { FRV_F_FRJ_NULL, "f-FRj-null", 0, 32, 5, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1859 { FRV_F_ACCJ_NULL, "f-ACCj-null", 0, 32, 5, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1860 { FRV_F_RD_NULL, "f-rd-null", 0, 32, 30, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1861 { FRV_F_COND_NULL, "f-cond-null", 0, 32, 30, 4, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1862 { FRV_F_CCOND_NULL, "f-ccond-null", 0, 32, 12, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1863 { FRV_F_S12_NULL, "f-s12-null", 0, 32, 11, 12, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1864 { FRV_F_LABEL16_NULL, "f-label16-null", 0, 32, 15, 16, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1865 { FRV_F_MISC_NULL_1, "f-misc-null-1", 0, 32, 30, 5, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1866 { FRV_F_MISC_NULL_2, "f-misc-null-2", 0, 32, 11, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1867 { FRV_F_MISC_NULL_3, "f-misc-null-3", 0, 32, 11, 4, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1868 { FRV_F_MISC_NULL_4, "f-misc-null-4", 0, 32, 17, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1869 { FRV_F_MISC_NULL_5, "f-misc-null-5", 0, 32, 17, 16, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1870 { FRV_F_MISC_NULL_6, "f-misc-null-6", 0, 32, 30, 3, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1871 { FRV_F_MISC_NULL_7, "f-misc-null-7", 0, 32, 17, 3, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1872 { FRV_F_MISC_NULL_8, "f-misc-null-8", 0, 32, 5, 3, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1873 { FRV_F_MISC_NULL_9, "f-misc-null-9", 0, 32, 5, 4, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1874 { FRV_F_MISC_NULL_10, "f-misc-null-10", 0, 32, 16, 5, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1875 { FRV_F_MISC_NULL_11, "f-misc-null-11", 0, 32, 5, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1876 { FRV_F_LI_OFF, "f-LI-off", 0, 32, 25, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1877 { FRV_F_LI_ON, "f-LI-on", 0, 32, 25, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1878 { 0, 0, 0, 0, 0, 0, {0, {0}} }
1879};
1880
1881#undef A
1882
1883
1884
1885/* multi ifield declarations */
1886
1887const CGEN_MAYBE_MULTI_IFLD FRV_F_U12_MULTI_IFIELD [];
1888const CGEN_MAYBE_MULTI_IFLD FRV_F_SPR_MULTI_IFIELD [];
1889const CGEN_MAYBE_MULTI_IFLD FRV_F_LABEL24_MULTI_IFIELD [];
1890
1891
1892/* multi ifield definitions */
1893
1894const CGEN_MAYBE_MULTI_IFLD FRV_F_U12_MULTI_IFIELD [] =
1895{
390ff83f
DE		 1896 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U12_H] } },
1897 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U12_L] } },
98f70fc4 1898 { 0, { (const PTR) 0 } }
fd3c93d5
DB		 1899};
1900const CGEN_MAYBE_MULTI_IFLD FRV_F_SPR_MULTI_IFIELD [] =
1901{
390ff83f
DE		 1902 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_SPR_H] } },
1903 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_SPR_L] } },
98f70fc4 1904 { 0, { (const PTR) 0 } }
fd3c93d5
DB		 1905};
1906const CGEN_MAYBE_MULTI_IFLD FRV_F_LABEL24_MULTI_IFIELD [] =
1907{
390ff83f
DE		 1908 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LABELH6] } },
1909 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LABELL18] } },
98f70fc4 1910 { 0, { (const PTR) 0 } }
fd3c93d5
DB		 1911};
1912
1913/* The operand table. */
1914
1915#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1916#define A(a) (1 << CGEN_OPERAND_##a)
1917#else
1918#define A(a) (1 << CGEN_OPERAND_/**/a)
1919#endif
1920#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1921#define OPERAND(op) FRV_OPERAND_##op
1922#else
1923#define OPERAND(op) FRV_OPERAND_/**/op
1924#endif
1925
1926const CGEN_OPERAND frv_cgen_operand_table[] =
1927{
1928/* pc: program counter */
1929 { "pc", FRV_OPERAND_PC, HW_H_PC, 0, 0,
390ff83f 1930 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_NIL] } },
fd3c93d5
DB		 1931 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
1932/* pack: packing bit */
1933 { "pack", FRV_OPERAND_PACK, HW_H_PACK, 31, 1,
390ff83f 1934 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_PACK] } },
fd3c93d5
DB		 1935 { 0, { (1<<MACH_BASE) } } },
1936/* GRi: source register 1 */
1937 { "GRi", FRV_OPERAND_GRI, HW_H_GR, 17, 6,
390ff83f 1938 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRI] } },
fd3c93d5
DB		 1939 { 0, { (1<<MACH_BASE) } } },
1940/* GRj: source register 2 */
1941 { "GRj", FRV_OPERAND_GRJ, HW_H_GR, 5, 6,
390ff83f 1942 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRJ] } },
fd3c93d5
DB		 1943 { 0, { (1<<MACH_BASE) } } },
1944/* GRk: destination register */
1945 { "GRk", FRV_OPERAND_GRK, HW_H_GR, 30, 6,
390ff83f 1946 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
fd3c93d5
DB		 1947 { 0, { (1<<MACH_BASE) } } },
1948/* GRkhi: destination register */
1949 { "GRkhi", FRV_OPERAND_GRKHI, HW_H_GR_HI, 30, 6,
390ff83f 1950 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
fd3c93d5
DB		 1951 { 0, { (1<<MACH_BASE) } } },
1952/* GRklo: destination register */
1953 { "GRklo", FRV_OPERAND_GRKLO, HW_H_GR_LO, 30, 6,
390ff83f 1954 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
fd3c93d5
DB		 1955 { 0, { (1<<MACH_BASE) } } },
1956/* GRdoublek: destination register */
1957 { "GRdoublek", FRV_OPERAND_GRDOUBLEK, HW_H_GR_DOUBLE, 30, 6,
390ff83f 1958 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
fd3c93d5
DB		 1959 { 0, { (1<<MACH_BASE) } } },
1960/* ACC40Si: signed accumulator */
1961 { "ACC40Si", FRV_OPERAND_ACC40SI, HW_H_ACC40S, 17, 6,
390ff83f 1962 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40SI] } },
fd3c93d5
DB		 1963 { 0, { (1<<MACH_BASE) } } },
1964/* ACC40Ui: unsigned accumulator */
1965 { "ACC40Ui", FRV_OPERAND_ACC40UI, HW_H_ACC40U, 17, 6,
390ff83f 1966 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40UI] } },
fd3c93d5
DB		 1967 { 0, { (1<<MACH_BASE) } } },
1968/* ACC40Sk: target accumulator */
1969 { "ACC40Sk", FRV_OPERAND_ACC40SK, HW_H_ACC40S, 30, 6,
390ff83f 1970 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40SK] } },
fd3c93d5
DB		 1971 { 0, { (1<<MACH_BASE) } } },
1972/* ACC40Uk: target accumulator */
1973 { "ACC40Uk", FRV_OPERAND_ACC40UK, HW_H_ACC40U, 30, 6,
390ff83f 1974 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40UK] } },
fd3c93d5
DB		 1975 { 0, { (1<<MACH_BASE) } } },
1976/* ACCGi: source register */
1977 { "ACCGi", FRV_OPERAND_ACCGI, HW_H_ACCG, 17, 6,
390ff83f 1978 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACCGI] } },
fd3c93d5
DB		 1979 { 0, { (1<<MACH_BASE) } } },
1980/* ACCGk: target register */
1981 { "ACCGk", FRV_OPERAND_ACCGK, HW_H_ACCG, 30, 6,
390ff83f 1982 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACCGK] } },
fd3c93d5
DB		 1983 { 0, { (1<<MACH_BASE) } } },
1984/* CPRi: source register */
1985 { "CPRi", FRV_OPERAND_CPRI, HW_H_CPR, 17, 6,
390ff83f 1986 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRI] } },
fd3c93d5
DB		 1987 { 0, { (1<<MACH_FRV) } } },
1988/* CPRj: source register */
1989 { "CPRj", FRV_OPERAND_CPRJ, HW_H_CPR, 5, 6,
390ff83f 1990 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRJ] } },
fd3c93d5
DB		 1991 { 0, { (1<<MACH_FRV) } } },
1992/* CPRk: destination register */
1993 { "CPRk", FRV_OPERAND_CPRK, HW_H_CPR, 30, 6,
390ff83f 1994 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRK] } },
fd3c93d5
DB		 1995 { 0, { (1<<MACH_FRV) } } },
1996/* CPRdoublek: destination register */
1997 { "CPRdoublek", FRV_OPERAND_CPRDOUBLEK, HW_H_CPR_DOUBLE, 30, 6,
390ff83f 1998 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRK] } },
fd3c93d5
DB		 1999 { 0, { (1<<MACH_FRV) } } },
2000/* FRinti: source register 1 */
2001 { "FRinti", FRV_OPERAND_FRINTI, HW_H_FR_INT, 17, 6,
390ff83f 2002 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
fd3c93d5
DB		 2003 { 0, { (1<<MACH_BASE) } } },
2004/* FRintj: source register 2 */
2005 { "FRintj", FRV_OPERAND_FRINTJ, HW_H_FR_INT, 5, 6,
390ff83f 2006 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
fd3c93d5
DB		 2007 { 0, { (1<<MACH_BASE) } } },
2008/* FRintk: target register */
2009 { "FRintk", FRV_OPERAND_FRINTK, HW_H_FR_INT, 30, 6,
390ff83f 2010 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
fd3c93d5
DB		 2011 { 0, { (1<<MACH_BASE) } } },
2012/* FRi: source register 1 */
2013 { "FRi", FRV_OPERAND_FRI, HW_H_FR, 17, 6,
390ff83f 2014 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
fd3c93d5
DB		 2015 { 0, { (1<<MACH_BASE) } } },
2016/* FRj: source register 2 */
2017 { "FRj", FRV_OPERAND_FRJ, HW_H_FR, 5, 6,
390ff83f 2018 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
fd3c93d5
DB		 2019 { 0, { (1<<MACH_BASE) } } },
2020/* FRk: destination register */
2021 { "FRk", FRV_OPERAND_FRK, HW_H_FR, 30, 6,
390ff83f 2022 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
fd3c93d5
DB		 2023 { 0, { (1<<MACH_BASE) } } },
2024/* FRkhi: destination register */
2025 { "FRkhi", FRV_OPERAND_FRKHI, HW_H_FR_HI, 30, 6,
390ff83f 2026 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
fd3c93d5
DB		 2027 { 0, { (1<<MACH_BASE) } } },
2028/* FRklo: destination register */
2029 { "FRklo", FRV_OPERAND_FRKLO, HW_H_FR_LO, 30, 6,
390ff83f 2030 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
fd3c93d5
DB		 2031 { 0, { (1<<MACH_BASE) } } },
2032/* FRdoublei: source register 1 */
2033 { "FRdoublei", FRV_OPERAND_FRDOUBLEI, HW_H_FR_DOUBLE, 17, 6,
390ff83f 2034 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
fd3c93d5
DB		 2035 { 0, { (1<<MACH_BASE) } } },
2036/* FRdoublej: source register 2 */
2037 { "FRdoublej", FRV_OPERAND_FRDOUBLEJ, HW_H_FR_DOUBLE, 5, 6,
390ff83f 2038 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
fd3c93d5
DB		 2039 { 0, { (1<<MACH_BASE) } } },
2040/* FRdoublek: target register */
2041 { "FRdoublek", FRV_OPERAND_FRDOUBLEK, HW_H_FR_DOUBLE, 30, 6,
390ff83f 2042 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
fd3c93d5
DB		 2043 { 0, { (1<<MACH_BASE) } } },
2044/* CRi: source register 1 */
2045 { "CRi", FRV_OPERAND_CRI, HW_H_CCCR, 14, 3,
390ff83f 2046 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRI] } },
fd3c93d5
DB		 2047 { 0, { (1<<MACH_BASE) } } },
2048/* CRj: source register 2 */
2049 { "CRj", FRV_OPERAND_CRJ, HW_H_CCCR, 2, 3,
390ff83f 2050 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ] } },
fd3c93d5
DB		 2051 { 0, { (1<<MACH_BASE) } } },
2052/* CRj_int: destination register */
2053 { "CRj_int", FRV_OPERAND_CRJ_INT, HW_H_CCCR, 26, 2,
390ff83f 2054 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ_INT] } },
fd3c93d5
DB		 2055 { 0, { (1<<MACH_BASE) } } },
2056/* CRj_float: destination register */
2057 { "CRj_float", FRV_OPERAND_CRJ_FLOAT, HW_H_CCCR, 26, 2,
390ff83f 2058 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ_FLOAT] } },
fd3c93d5
DB		 2059 { 0, { (1<<MACH_BASE) } } },
2060/* CRk: destination register */
2061 { "CRk", FRV_OPERAND_CRK, HW_H_CCCR, 27, 3,
390ff83f 2062 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRK] } },
fd3c93d5
DB		 2063 { 0, { (1<<MACH_BASE) } } },
2064/* CCi: condition register */
2065 { "CCi", FRV_OPERAND_CCI, HW_H_CCCR, 11, 3,
390ff83f 2066 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CCI] } },
fd3c93d5
DB		 2067 { 0, { (1<<MACH_BASE) } } },
2068/* ICCi_1: condition register */
2069 { "ICCi_1", FRV_OPERAND_ICCI_1, HW_H_ICCR, 11, 2,
390ff83f 2070 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_1] } },
fd3c93d5
DB		 2071 { 0, { (1<<MACH_BASE) } } },
2072/* ICCi_2: condition register */
2073 { "ICCi_2", FRV_OPERAND_ICCI_2, HW_H_ICCR, 26, 2,
390ff83f 2074 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_2] } },
fd3c93d5
DB		 2075 { 0, { (1<<MACH_BASE) } } },
2076/* ICCi_3: condition register */
2077 { "ICCi_3", FRV_OPERAND_ICCI_3, HW_H_ICCR, 1, 2,
390ff83f 2078 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_3] } },
fd3c93d5
DB		 2079 { 0, { (1<<MACH_BASE) } } },
2080/* FCCi_1: condition register */
2081 { "FCCi_1", FRV_OPERAND_FCCI_1, HW_H_FCCR, 11, 2,
390ff83f 2082 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_1] } },
fd3c93d5
DB		 2083 { 0, { (1<<MACH_BASE) } } },
2084/* FCCi_2: condition register */
2085 { "FCCi_2", FRV_OPERAND_FCCI_2, HW_H_FCCR, 26, 2,
390ff83f 2086 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_2] } },
fd3c93d5
DB		 2087 { 0, { (1<<MACH_BASE) } } },
2088/* FCCi_3: condition register */
2089 { "FCCi_3", FRV_OPERAND_FCCI_3, HW_H_FCCR, 1, 2,
390ff83f 2090 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_3] } },
fd3c93d5
DB		 2091 { 0, { (1<<MACH_BASE) } } },
2092/* FCCk: condition register */
2093 { "FCCk", FRV_OPERAND_FCCK, HW_H_FCCR, 26, 2,
390ff83f 2094 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCK] } },
fd3c93d5
DB		 2095 { 0, { (1<<MACH_BASE) } } },
2096/* eir: exception insn reg */
2097 { "eir", FRV_OPERAND_EIR, HW_H_UINT, 17, 6,
390ff83f 2098 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_EIR] } },
fd3c93d5
DB		 2099 { 0, { (1<<MACH_BASE) } } },
2100/* s10: 10 bit signed immediate */
2101 { "s10", FRV_OPERAND_S10, HW_H_SINT, 9, 10,
390ff83f 2102 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S10] } },
fd3c93d5
DB		 2103 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2104/* u16: 16 bit unsigned immediate */
2105 { "u16", FRV_OPERAND_U16, HW_H_UINT, 15, 16,
390ff83f 2106 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
fd3c93d5
DB		 2107 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2108/* s16: 16 bit signed immediate */
2109 { "s16", FRV_OPERAND_S16, HW_H_SINT, 15, 16,
390ff83f 2110 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S16] } },
fd3c93d5
DB		 2111 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2112/* s6: 6 bit signed immediate */
2113 { "s6", FRV_OPERAND_S6, HW_H_SINT, 5, 6,
390ff83f 2114 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S6] } },
fd3c93d5
DB		 2115 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2116/* s6_1: 6 bit signed immediate */
2117 { "s6_1", FRV_OPERAND_S6_1, HW_H_SINT, 11, 6,
390ff83f 2118 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S6_1] } },
fd3c93d5
DB		 2119 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2120/* u6: 6 bit unsigned immediate */
2121 { "u6", FRV_OPERAND_U6, HW_H_UINT, 5, 6,
390ff83f 2122 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U6] } },
fd3c93d5
DB		 2123 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2124/* s5: 5 bit signed immediate */
2125 { "s5", FRV_OPERAND_S5, HW_H_SINT, 4, 5,
390ff83f 2126 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S5] } },
fd3c93d5
DB		 2127 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2128/* cond: conditional arithmetic */
2129 { "cond", FRV_OPERAND_COND, HW_H_UINT, 8, 1,
390ff83f 2130 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_COND] } },
fd3c93d5
DB		 2131 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2132/* ccond: lr branch condition */
2133 { "ccond", FRV_OPERAND_CCOND, HW_H_UINT, 12, 1,
390ff83f 2134 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CCOND] } },
fd3c93d5
DB		 2135 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2136/* hint: 2 bit branch predictor */
2137 { "hint", FRV_OPERAND_HINT, HW_H_UINT, 17, 2,
390ff83f 2138 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
fd3c93d5
DB		 2139 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2140/* hint_taken: 2 bit branch predictor */
2141 { "hint_taken", FRV_OPERAND_HINT_TAKEN, HW_H_HINT_TAKEN, 17, 2,
390ff83f 2142 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
fd3c93d5
DB		 2143 { 0, { (1<<MACH_BASE) } } },
2144/* hint_not_taken: 2 bit branch predictor */
2145 { "hint_not_taken", FRV_OPERAND_HINT_NOT_TAKEN, HW_H_HINT_NOT_TAKEN, 17, 2,
390ff83f 2146 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
fd3c93d5
DB		 2147 { 0, { (1<<MACH_BASE) } } },
2148/* LI: link indicator */
2149 { "LI", FRV_OPERAND_LI, HW_H_UINT, 25, 1,
390ff83f 2150 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LI] } },
fd3c93d5
DB		 2151 { 0, { (1<<MACH_BASE) } } },
2152/* lock: cache lock indicator */
2153 { "lock", FRV_OPERAND_LOCK, HW_H_UINT, 25, 1,
390ff83f 2154 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LOCK] } },
fd3c93d5
DB		 2155 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2156/* debug: debug mode indicator */
2157 { "debug", FRV_OPERAND_DEBUG, HW_H_UINT, 25, 1,
390ff83f 2158 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_DEBUG] } },
fd3c93d5
DB		 2159 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2160/* A: all accumulator indicator */
2161 { "A", FRV_OPERAND_A, HW_H_UINT, 17, 1,
390ff83f 2162 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_A] } },
fd3c93d5
DB		 2163 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2164/* ae: all entries indicator */
2165 { "ae", FRV_OPERAND_AE, HW_H_UINT, 25, 1,
390ff83f 2166 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_AE] } },
fd3c93d5
DB		 2167 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2168/* label16: 18 bit pc relative address */
2169 { "label16", FRV_OPERAND_LABEL16, HW_H_IADDR, 15, 16,
390ff83f 2170 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LABEL16] } },
fd3c93d5
DB		 2171 { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
2172/* label24: 26 bit pc relative address */
2173 { "label24", FRV_OPERAND_LABEL24, HW_H_IADDR, 17, 24,
98f70fc4 2174 { 2, { (const PTR) &FRV_F_LABEL24_MULTI_IFIELD[0] } },
fd3c93d5
DB		 2175 { 0|A(PCREL_ADDR)|A(VIRTUAL), { (1<<MACH_BASE) } } },
2176/* d12: 12 bit signed immediate */
2177 { "d12", FRV_OPERAND_D12, HW_H_SINT, 11, 12,
390ff83f 2178 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_D12] } },
fd3c93d5
DB		 2179 { 0, { (1<<MACH_BASE) } } },
2180/* s12: 12 bit signed immediate */
2181 { "s12", FRV_OPERAND_S12, HW_H_SINT, 11, 12,
390ff83f 2182 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_D12] } },
fd3c93d5
DB		 2183 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2184/* u12: 12 bit signed immediate */
2185 { "u12", FRV_OPERAND_U12, HW_H_SINT, 5, 12,
98f70fc4 2186 { 2, { (const PTR) &FRV_F_U12_MULTI_IFIELD[0] } },
fd3c93d5
DB		 2187 { 0|A(HASH_PREFIX)|A(VIRTUAL), { (1<<MACH_BASE) } } },
2188/* spr: special purpose register */
2189 { "spr", FRV_OPERAND_SPR, HW_H_SPR, 17, 12,
98f70fc4 2190 { 2, { (const PTR) &FRV_F_SPR_MULTI_IFIELD[0] } },
fd3c93d5
DB		 2191 { 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
2192/* ulo16: 16 bit unsigned immediate, for #lo() */
2193 { "ulo16", FRV_OPERAND_ULO16, HW_H_UINT, 15, 16,
390ff83f 2194 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
fd3c93d5
DB		 2195 { 0, { (1<<MACH_BASE) } } },
2196/* slo16: 16 bit unsigned immediate, for #lo() */
2197 { "slo16", FRV_OPERAND_SLO16, HW_H_SINT, 15, 16,
390ff83f 2198 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S16] } },
fd3c93d5
DB		 2199 { 0, { (1<<MACH_BASE) } } },
2200/* uhi16: 16 bit unsigned immediate, for #hi() */
2201 { "uhi16", FRV_OPERAND_UHI16, HW_H_UINT, 15, 16,
390ff83f 2202 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
fd3c93d5
DB		 2203 { 0, { (1<<MACH_BASE) } } },
2204/* psr_esr: PSR.ESR bit */
2205 { "psr_esr", FRV_OPERAND_PSR_ESR, HW_H_PSR_ESR, 0, 0,
98f70fc4 2206 { 0, { (const PTR) 0 } },
fd3c93d5
DB		 2207 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2208/* psr_s: PSR.S bit */
2209 { "psr_s", FRV_OPERAND_PSR_S, HW_H_PSR_S, 0, 0,
98f70fc4 2210 { 0, { (const PTR) 0 } },
fd3c93d5
DB		 2211 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2212/* psr_ps: PSR.PS bit */
2213 { "psr_ps", FRV_OPERAND_PSR_PS, HW_H_PSR_PS, 0, 0,
98f70fc4 2214 { 0, { (const PTR) 0 } },
fd3c93d5
DB		 2215 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2216/* psr_et: PSR.ET bit */
2217 { "psr_et", FRV_OPERAND_PSR_ET, HW_H_PSR_ET, 0, 0,
98f70fc4 2218 { 0, { (const PTR) 0 } },
fd3c93d5
DB		 2219 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2220/* bpsr_bs: BPSR.BS bit */
2221 { "bpsr_bs", FRV_OPERAND_BPSR_BS, HW_H_BPSR_BS, 0, 0,
98f70fc4 2222 { 0, { (const PTR) 0 } },
fd3c93d5
DB		 2223 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2224/* bpsr_bet: BPSR.BET bit */
2225 { "bpsr_bet", FRV_OPERAND_BPSR_BET, HW_H_BPSR_BET, 0, 0,
98f70fc4 2226 { 0, { (const PTR) 0 } },
fd3c93d5
DB		 2227 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2228/* tbr_tba: TBR.TBA */
2229 { "tbr_tba", FRV_OPERAND_TBR_TBA, HW_H_TBR_TBA, 0, 0,
98f70fc4 2230 { 0, { (const PTR) 0 } },
fd3c93d5
DB		 2231 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2232/* tbr_tt: TBR.TT */
2233 { "tbr_tt", FRV_OPERAND_TBR_TT, HW_H_TBR_TT, 0, 0,
98f70fc4 2234 { 0, { (const PTR) 0 } },
fd3c93d5 2235 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
98f70fc4
AM		 2236/* sentinel */
2237 { 0, 0, 0, 0, 0,
2238 { 0, { (const PTR) 0 } },
2239 { 0, { 0 } } }
fd3c93d5
DB		 2240};
2241
2242#undef A
2243
2244
2245/* The instruction table. */
2246
2247#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
2248#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
2249#define A(a) (1 << CGEN_INSN_##a)
2250#else
2251#define A(a) (1 << CGEN_INSN_/**/a)
2252#endif
2253
2254static const CGEN_IBASE frv_cgen_insn_table[MAX_INSNS] =
2255{
2256 /* Special null first entry.
2257 A `num' value of zero is thus invalid.
2258 Also, the special `invalid' insn resides here. */
2259 { 0, 0, 0, 0, {0, {0}} },
2260/* add$pack $GRi,$GRj,$GRk */
2261 {
2262 FRV_INSN_ADD, "add", "add", 32,
2263 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2264 },
2265/* sub$pack $GRi,$GRj,$GRk */
2266 {
2267 FRV_INSN_SUB, "sub", "sub", 32,
2268 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2269 },
2270/* and$pack $GRi,$GRj,$GRk */
2271 {
2272 FRV_INSN_AND, "and", "and", 32,
2273 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2274 },
2275/* or$pack $GRi,$GRj,$GRk */
2276 {
2277 FRV_INSN_OR, "or", "or", 32,
2278 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2279 },
2280/* xor$pack $GRi,$GRj,$GRk */
2281 {
2282 FRV_INSN_XOR, "xor", "xor", 32,
2283 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2284 },
2285/* not$pack $GRj,$GRk */
2286 {
2287 FRV_INSN_NOT, "not", "not", 32,
2288 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2289 },
2290/* sdiv$pack $GRi,$GRj,$GRk */
2291 {
2292 FRV_INSN_SDIV, "sdiv", "sdiv", 32,
2293 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2294 },
2295/* nsdiv$pack $GRi,$GRj,$GRk */
2296 {
2297 FRV_INSN_NSDIV, "nsdiv", "nsdiv", 32,
2298 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1 } }
2299 },
2300/* udiv$pack $GRi,$GRj,$GRk */
2301 {
2302 FRV_INSN_UDIV, "udiv", "udiv", 32,
2303 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2304 },
2305/* nudiv$pack $GRi,$GRj,$GRk */
2306 {
2307 FRV_INSN_NUDIV, "nudiv", "nudiv", 32,
2308 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1 } }
2309 },
2310/* smul$pack $GRi,$GRj,$GRdoublek */
2311 {
2312 FRV_INSN_SMUL, "smul", "smul", 32,
2313 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2314 },
2315/* umul$pack $GRi,$GRj,$GRdoublek */
2316 {
2317 FRV_INSN_UMUL, "umul", "umul", 32,
2318 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2319 },
2320/* sll$pack $GRi,$GRj,$GRk */
2321 {
2322 FRV_INSN_SLL, "sll", "sll", 32,
2323 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2324 },
2325/* srl$pack $GRi,$GRj,$GRk */
2326 {
2327 FRV_INSN_SRL, "srl", "srl", 32,
2328 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2329 },
2330/* sra$pack $GRi,$GRj,$GRk */
2331 {
2332 FRV_INSN_SRA, "sra", "sra", 32,
2333 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2334 },
2335/* scan$pack $GRi,$GRj,$GRk */
2336 {
2337 FRV_INSN_SCAN, "scan", "scan", 32,
2338 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2339 },
2340/* cadd$pack $GRi,$GRj,$GRk,$CCi,$cond */
2341 {
2342 FRV_INSN_CADD, "cadd", "cadd", 32,
2343 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2344 },
2345/* csub$pack $GRi,$GRj,$GRk,$CCi,$cond */
2346 {
2347 FRV_INSN_CSUB, "csub", "csub", 32,
2348 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2349 },
2350/* cand$pack $GRi,$GRj,$GRk,$CCi,$cond */
2351 {
2352 FRV_INSN_CAND, "cand", "cand", 32,
2353 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2354 },
2355/* cor$pack $GRi,$GRj,$GRk,$CCi,$cond */
2356 {
2357 FRV_INSN_COR, "cor", "cor", 32,
2358 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2359 },
2360/* cxor$pack $GRi,$GRj,$GRk,$CCi,$cond */
2361 {
2362 FRV_INSN_CXOR, "cxor", "cxor", 32,
2363 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2364 },
2365/* cnot$pack $GRj,$GRk,$CCi,$cond */
2366 {
2367 FRV_INSN_CNOT, "cnot", "cnot", 32,
2368 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2369 },
2370/* csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
2371 {
2372 FRV_INSN_CSMUL, "csmul", "csmul", 32,
2373 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2374 },
2375/* csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
2376 {
2377 FRV_INSN_CSDIV, "csdiv", "csdiv", 32,
2378 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2379 },
2380/* cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
2381 {
2382 FRV_INSN_CUDIV, "cudiv", "cudiv", 32,
2383 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2384 },
2385/* csll$pack $GRi,$GRj,$GRk,$CCi,$cond */
2386 {
2387 FRV_INSN_CSLL, "csll", "csll", 32,
2388 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2389 },
2390/* csrl$pack $GRi,$GRj,$GRk,$CCi,$cond */
2391 {
2392 FRV_INSN_CSRL, "csrl", "csrl", 32,
2393 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2394 },
2395/* csra$pack $GRi,$GRj,$GRk,$CCi,$cond */
2396 {
2397 FRV_INSN_CSRA, "csra", "csra", 32,
2398 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2399 },
2400/* cscan$pack $GRi,$GRj,$GRk,$CCi,$cond */
2401 {
2402 FRV_INSN_CSCAN, "cscan", "cscan", 32,
2403 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2404 },
2405/* addcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2406 {
2407 FRV_INSN_ADDCC, "addcc", "addcc", 32,
2408 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2409 },
2410/* subcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2411 {
2412 FRV_INSN_SUBCC, "subcc", "subcc", 32,
2413 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2414 },
2415/* andcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2416 {
2417 FRV_INSN_ANDCC, "andcc", "andcc", 32,
2418 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2419 },
2420/* orcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2421 {
2422 FRV_INSN_ORCC, "orcc", "orcc", 32,
2423 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2424 },
2425/* xorcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2426 {
2427 FRV_INSN_XORCC, "xorcc", "xorcc", 32,
2428 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2429 },
2430/* sllcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2431 {
2432 FRV_INSN_SLLCC, "sllcc", "sllcc", 32,
2433 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2434 },
2435/* srlcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2436 {
2437 FRV_INSN_SRLCC, "srlcc", "srlcc", 32,
2438 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2439 },
2440/* sracc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2441 {
2442 FRV_INSN_SRACC, "sracc", "sracc", 32,
2443 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2444 },
2445/* smulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
2446 {
2447 FRV_INSN_SMULCC, "smulcc", "smulcc", 32,
2448 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2449 },
2450/* umulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
2451 {
2452 FRV_INSN_UMULCC, "umulcc", "umulcc", 32,
2453 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2454 },
2455/* caddcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2456 {
2457 FRV_INSN_CADDCC, "caddcc", "caddcc", 32,
2458 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2459 },
2460/* csubcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2461 {
2462 FRV_INSN_CSUBCC, "csubcc", "csubcc", 32,
2463 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2464 },
2465/* csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
2466 {
2467 FRV_INSN_CSMULCC, "csmulcc", "csmulcc", 32,
2468 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2469 },
2470/* candcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2471 {
2472 FRV_INSN_CANDCC, "candcc", "candcc", 32,
2473 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2474 },
2475/* corcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2476 {
2477 FRV_INSN_CORCC, "corcc", "corcc", 32,
2478 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2479 },
2480/* cxorcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2481 {
2482 FRV_INSN_CXORCC, "cxorcc", "cxorcc", 32,
2483 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2484 },
2485/* csllcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2486 {
2487 FRV_INSN_CSLLCC, "csllcc", "csllcc", 32,
2488 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2489 },
2490/* csrlcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2491 {
2492 FRV_INSN_CSRLCC, "csrlcc", "csrlcc", 32,
2493 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2494 },
2495/* csracc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2496 {
2497 FRV_INSN_CSRACC, "csracc", "csracc", 32,
2498 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2499 },
2500/* addx$pack $GRi,$GRj,$GRk,$ICCi_1 */
2501 {
2502 FRV_INSN_ADDX, "addx", "addx", 32,
2503 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2504 },
2505/* subx$pack $GRi,$GRj,$GRk,$ICCi_1 */
2506 {
2507 FRV_INSN_SUBX, "subx", "subx", 32,
2508 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2509 },
2510/* addxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2511 {
2512 FRV_INSN_ADDXCC, "addxcc", "addxcc", 32,
2513 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2514 },
2515/* subxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2516 {
2517 FRV_INSN_SUBXCC, "subxcc", "subxcc", 32,
2518 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2519 },
2520/* addi$pack $GRi,$s12,$GRk */
2521 {
2522 FRV_INSN_ADDI, "addi", "addi", 32,
2523 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2524 },
2525/* subi$pack $GRi,$s12,$GRk */
2526 {
2527 FRV_INSN_SUBI, "subi", "subi", 32,
2528 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2529 },
2530/* andi$pack $GRi,$s12,$GRk */
2531 {
2532 FRV_INSN_ANDI, "andi", "andi", 32,
2533 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2534 },
2535/* ori$pack $GRi,$s12,$GRk */
2536 {
2537 FRV_INSN_ORI, "ori", "ori", 32,
2538 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2539 },
2540/* xori$pack $GRi,$s12,$GRk */
2541 {
2542 FRV_INSN_XORI, "xori", "xori", 32,
2543 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2544 },
2545/* sdivi$pack $GRi,$s12,$GRk */
2546 {
2547 FRV_INSN_SDIVI, "sdivi", "sdivi", 32,
2548 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2549 },
2550/* nsdivi$pack $GRi,$s12,$GRk */
2551 {
2552 FRV_INSN_NSDIVI, "nsdivi", "nsdivi", 32,
2553 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1 } }
2554 },
2555/* udivi$pack $GRi,$s12,$GRk */
2556 {
2557 FRV_INSN_UDIVI, "udivi", "udivi", 32,
2558 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2559 },
2560/* nudivi$pack $GRi,$s12,$GRk */
2561 {
2562 FRV_INSN_NUDIVI, "nudivi", "nudivi", 32,
2563 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1 } }
2564 },
2565/* smuli$pack $GRi,$s12,$GRdoublek */
2566 {
2567 FRV_INSN_SMULI, "smuli", "smuli", 32,
2568 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2569 },
2570/* umuli$pack $GRi,$s12,$GRdoublek */
2571 {
2572 FRV_INSN_UMULI, "umuli", "umuli", 32,
2573 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2574 },
2575/* slli$pack $GRi,$s12,$GRk */
2576 {
2577 FRV_INSN_SLLI, "slli", "slli", 32,
2578 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2579 },
2580/* srli$pack $GRi,$s12,$GRk */
2581 {
2582 FRV_INSN_SRLI, "srli", "srli", 32,
2583 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2584 },
2585/* srai$pack $GRi,$s12,$GRk */
2586 {
2587 FRV_INSN_SRAI, "srai", "srai", 32,
2588 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2589 },
2590/* scani$pack $GRi,$s12,$GRk */
2591 {
2592 FRV_INSN_SCANI, "scani", "scani", 32,
2593 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2594 },
2595/* addicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2596 {
2597 FRV_INSN_ADDICC, "addicc", "addicc", 32,
2598 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2599 },
2600/* subicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2601 {
2602 FRV_INSN_SUBICC, "subicc", "subicc", 32,
2603 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2604 },
2605/* andicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2606 {
2607 FRV_INSN_ANDICC, "andicc", "andicc", 32,
2608 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2609 },
2610/* oricc$pack $GRi,$s10,$GRk,$ICCi_1 */
2611 {
2612 FRV_INSN_ORICC, "oricc", "oricc", 32,
2613 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2614 },
2615/* xoricc$pack $GRi,$s10,$GRk,$ICCi_1 */
2616 {
2617 FRV_INSN_XORICC, "xoricc", "xoricc", 32,
2618 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2619 },
2620/* smulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
2621 {
2622 FRV_INSN_SMULICC, "smulicc", "smulicc", 32,
2623 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2624 },
2625/* umulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
2626 {
2627 FRV_INSN_UMULICC, "umulicc", "umulicc", 32,
2628 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2629 },
2630/* sllicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2631 {
2632 FRV_INSN_SLLICC, "sllicc", "sllicc", 32,
2633 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2634 },
2635/* srlicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2636 {
2637 FRV_INSN_SRLICC, "srlicc", "srlicc", 32,
2638 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2639 },
2640/* sraicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2641 {
2642 FRV_INSN_SRAICC, "sraicc", "sraicc", 32,
2643 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2644 },
2645/* addxi$pack $GRi,$s10,$GRk,$ICCi_1 */
2646 {
2647 FRV_INSN_ADDXI, "addxi", "addxi", 32,
2648 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2649 },
2650/* subxi$pack $GRi,$s10,$GRk,$ICCi_1 */
2651 {
2652 FRV_INSN_SUBXI, "subxi", "subxi", 32,
2653 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2654 },
2655/* addxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2656 {
2657 FRV_INSN_ADDXICC, "addxicc", "addxicc", 32,
2658 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2659 },
2660/* subxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2661 {
2662 FRV_INSN_SUBXICC, "subxicc", "subxicc", 32,
2663 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2664 },
2665/* cmpb$pack $GRi,$GRj,$ICCi_1 */
2666 {
2667 FRV_INSN_CMPB, "cmpb", "cmpb", 32,
2668 { 0, { (1<<MACH_FR400), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_NONE } }
2669 },
2670/* cmpba$pack $GRi,$GRj,$ICCi_1 */
2671 {
2672 FRV_INSN_CMPBA, "cmpba", "cmpba", 32,
2673 { 0, { (1<<MACH_FR400), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_NONE } }
2674 },
2675/* setlo$pack $ulo16,$GRklo */
2676 {
2677 FRV_INSN_SETLO, "setlo", "setlo", 32,
2678 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2679 },
2680/* sethi$pack $uhi16,$GRkhi */
2681 {
2682 FRV_INSN_SETHI, "sethi", "sethi", 32,
2683 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2684 },
2685/* setlos$pack $slo16,$GRk */
2686 {
2687 FRV_INSN_SETLOS, "setlos", "setlos", 32,
2688 { 0, { (1<<MACH_BASE), UNIT_I01, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
2689 },
2690/* ldsb$pack @($GRi,$GRj),$GRk */
2691 {
2692 FRV_INSN_LDSB, "ldsb", "ldsb", 32,
2693 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2694 },
2695/* ldub$pack @($GRi,$GRj),$GRk */
2696 {
2697 FRV_INSN_LDUB, "ldub", "ldub", 32,
2698 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2699 },
2700/* ldsh$pack @($GRi,$GRj),$GRk */
2701 {
2702 FRV_INSN_LDSH, "ldsh", "ldsh", 32,
2703 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2704 },
2705/* lduh$pack @($GRi,$GRj),$GRk */
2706 {
2707 FRV_INSN_LDUH, "lduh", "lduh", 32,
2708 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2709 },
2710/* ld$pack @($GRi,$GRj),$GRk */
2711 {
2712 FRV_INSN_LD, "ld", "ld", 32,
2713 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2714 },
2715/* ldbf$pack @($GRi,$GRj),$FRintk */
2716 {
2717 FRV_INSN_LDBF, "ldbf", "ldbf", 32,
2718 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2719 },
2720/* ldhf$pack @($GRi,$GRj),$FRintk */
2721 {
2722 FRV_INSN_LDHF, "ldhf", "ldhf", 32,
2723 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2724 },
2725/* ldf$pack @($GRi,$GRj),$FRintk */
2726 {
2727 FRV_INSN_LDF, "ldf", "ldf", 32,
2728 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2729 },
2730/* ldc$pack @($GRi,$GRj),$CPRk */
2731 {
2732 FRV_INSN_LDC, "ldc", "ldc", 32,
2733 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2734 },
2735/* nldsb$pack @($GRi,$GRj),$GRk */
2736 {
2737 FRV_INSN_NLDSB, "nldsb", "nldsb", 32,
2738 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2739 },
2740/* nldub$pack @($GRi,$GRj),$GRk */
2741 {
2742 FRV_INSN_NLDUB, "nldub", "nldub", 32,
2743 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2744 },
2745/* nldsh$pack @($GRi,$GRj),$GRk */
2746 {
2747 FRV_INSN_NLDSH, "nldsh", "nldsh", 32,
2748 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2749 },
2750/* nlduh$pack @($GRi,$GRj),$GRk */
2751 {
2752 FRV_INSN_NLDUH, "nlduh", "nlduh", 32,
2753 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2754 },
2755/* nld$pack @($GRi,$GRj),$GRk */
2756 {
2757 FRV_INSN_NLD, "nld", "nld", 32,
2758 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2759 },
2760/* nldbf$pack @($GRi,$GRj),$FRintk */
2761 {
2762 FRV_INSN_NLDBF, "nldbf", "nldbf", 32,
2763 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2764 },
2765/* nldhf$pack @($GRi,$GRj),$FRintk */
2766 {
2767 FRV_INSN_NLDHF, "nldhf", "nldhf", 32,
2768 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2769 },
2770/* nldf$pack @($GRi,$GRj),$FRintk */
2771 {
2772 FRV_INSN_NLDF, "nldf", "nldf", 32,
2773 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2774 },
2775/* ldd$pack @($GRi,$GRj),$GRdoublek */
2776 {
2777 FRV_INSN_LDD, "ldd", "ldd", 32,
2778 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2779 },
2780/* lddf$pack @($GRi,$GRj),$FRdoublek */
2781 {
2782 FRV_INSN_LDDF, "lddf", "lddf", 32,
2783 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2784 },
2785/* lddc$pack @($GRi,$GRj),$CPRdoublek */
2786 {
2787 FRV_INSN_LDDC, "lddc", "lddc", 32,
2788 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2789 },
2790/* nldd$pack @($GRi,$GRj),$GRdoublek */
2791 {
2792 FRV_INSN_NLDD, "nldd", "nldd", 32,
2793 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2794 },
2795/* nlddf$pack @($GRi,$GRj),$FRdoublek */
2796 {
2797 FRV_INSN_NLDDF, "nlddf", "nlddf", 32,
2798 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2799 },
2800/* ldq$pack @($GRi,$GRj),$GRk */
2801 {
2802 FRV_INSN_LDQ, "ldq", "ldq", 32,
2803 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2804 },
2805/* ldqf$pack @($GRi,$GRj),$FRintk */
2806 {
2807 FRV_INSN_LDQF, "ldqf", "ldqf", 32,
2808 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2809 },
2810/* ldqc$pack @($GRi,$GRj),$CPRk */
2811 {
2812 FRV_INSN_LDQC, "ldqc", "ldqc", 32,
2813 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2814 },
2815/* nldq$pack @($GRi,$GRj),$GRk */
2816 {
2817 FRV_INSN_NLDQ, "nldq", "nldq", 32,
2818 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2819 },
2820/* nldqf$pack @($GRi,$GRj),$FRintk */
2821 {
2822 FRV_INSN_NLDQF, "nldqf", "nldqf", 32,
2823 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2824 },
2825/* ldsbu$pack @($GRi,$GRj),$GRk */
2826 {
2827 FRV_INSN_LDSBU, "ldsbu", "ldsbu", 32,
2828 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2829 },
2830/* ldubu$pack @($GRi,$GRj),$GRk */
2831 {
2832 FRV_INSN_LDUBU, "ldubu", "ldubu", 32,
2833 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2834 },
2835/* ldshu$pack @($GRi,$GRj),$GRk */
2836 {
2837 FRV_INSN_LDSHU, "ldshu", "ldshu", 32,
2838 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2839 },
2840/* lduhu$pack @($GRi,$GRj),$GRk */
2841 {
2842 FRV_INSN_LDUHU, "lduhu", "lduhu", 32,
2843 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2844 },
2845/* ldu$pack @($GRi,$GRj),$GRk */
2846 {
2847 FRV_INSN_LDU, "ldu", "ldu", 32,
2848 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2849 },
2850/* nldsbu$pack @($GRi,$GRj),$GRk */
2851 {
2852 FRV_INSN_NLDSBU, "nldsbu", "nldsbu", 32,
2853 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2854 },
2855/* nldubu$pack @($GRi,$GRj),$GRk */
2856 {
2857 FRV_INSN_NLDUBU, "nldubu", "nldubu", 32,
2858 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2859 },
2860/* nldshu$pack @($GRi,$GRj),$GRk */
2861 {
2862 FRV_INSN_NLDSHU, "nldshu", "nldshu", 32,
2863 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2864 },
2865/* nlduhu$pack @($GRi,$GRj),$GRk */
2866 {
2867 FRV_INSN_NLDUHU, "nlduhu", "nlduhu", 32,
2868 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2869 },
2870/* nldu$pack @($GRi,$GRj),$GRk */
2871 {
2872 FRV_INSN_NLDU, "nldu", "nldu", 32,
2873 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2874 },
2875/* ldbfu$pack @($GRi,$GRj),$FRintk */
2876 {
2877 FRV_INSN_LDBFU, "ldbfu", "ldbfu", 32,
2878 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2879 },
2880/* ldhfu$pack @($GRi,$GRj),$FRintk */
2881 {
2882 FRV_INSN_LDHFU, "ldhfu", "ldhfu", 32,
2883 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2884 },
2885/* ldfu$pack @($GRi,$GRj),$FRintk */
2886 {
2887 FRV_INSN_LDFU, "ldfu", "ldfu", 32,
2888 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2889 },
2890/* ldcu$pack @($GRi,$GRj),$CPRk */
2891 {
2892 FRV_INSN_LDCU, "ldcu", "ldcu", 32,
2893 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2894 },
2895/* nldbfu$pack @($GRi,$GRj),$FRintk */
2896 {
2897 FRV_INSN_NLDBFU, "nldbfu", "nldbfu", 32,
2898 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2899 },
2900/* nldhfu$pack @($GRi,$GRj),$FRintk */
2901 {
2902 FRV_INSN_NLDHFU, "nldhfu", "nldhfu", 32,
2903 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2904 },
2905/* nldfu$pack @($GRi,$GRj),$FRintk */
2906 {
2907 FRV_INSN_NLDFU, "nldfu", "nldfu", 32,
2908 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2909 },
2910/* lddu$pack @($GRi,$GRj),$GRdoublek */
2911 {
2912 FRV_INSN_LDDU, "lddu", "lddu", 32,
2913 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2914 },
2915/* nlddu$pack @($GRi,$GRj),$GRdoublek */
2916 {
2917 FRV_INSN_NLDDU, "nlddu", "nlddu", 32,
2918 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2919 },
2920/* lddfu$pack @($GRi,$GRj),$FRdoublek */
2921 {
2922 FRV_INSN_LDDFU, "lddfu", "lddfu", 32,
2923 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2924 },
2925/* lddcu$pack @($GRi,$GRj),$CPRdoublek */
2926 {
2927 FRV_INSN_LDDCU, "lddcu", "lddcu", 32,
2928 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2929 },
2930/* nlddfu$pack @($GRi,$GRj),$FRdoublek */
2931 {
2932 FRV_INSN_NLDDFU, "nlddfu", "nlddfu", 32,
2933 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2934 },
2935/* ldqu$pack @($GRi,$GRj),$GRk */
2936 {
2937 FRV_INSN_LDQU, "ldqu", "ldqu", 32,
2938 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2939 },
2940/* nldqu$pack @($GRi,$GRj),$GRk */
2941 {
2942 FRV_INSN_NLDQU, "nldqu", "nldqu", 32,
2943 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2944 },
2945/* ldqfu$pack @($GRi,$GRj),$FRintk */
2946 {
2947 FRV_INSN_LDQFU, "ldqfu", "ldqfu", 32,
2948 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2949 },
2950/* ldqcu$pack @($GRi,$GRj),$CPRk */
2951 {
2952 FRV_INSN_LDQCU, "ldqcu", "ldqcu", 32,
2953 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2954 },
2955/* nldqfu$pack @($GRi,$GRj),$FRintk */
2956 {
2957 FRV_INSN_NLDQFU, "nldqfu", "nldqfu", 32,
2958 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
2959 },
2960/* ldsbi$pack @($GRi,$d12),$GRk */
2961 {
2962 FRV_INSN_LDSBI, "ldsbi", "ldsbi", 32,
2963 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2964 },
2965/* ldshi$pack @($GRi,$d12),$GRk */
2966 {
2967 FRV_INSN_LDSHI, "ldshi", "ldshi", 32,
2968 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2969 },
2970/* ldi$pack @($GRi,$d12),$GRk */
2971 {
2972 FRV_INSN_LDI, "ldi", "ldi", 32,
2973 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2974 },
2975/* ldubi$pack @($GRi,$d12),$GRk */
2976 {
2977 FRV_INSN_LDUBI, "ldubi", "ldubi", 32,
2978 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2979 },
2980/* lduhi$pack @($GRi,$d12),$GRk */
2981 {
2982 FRV_INSN_LDUHI, "lduhi", "lduhi", 32,
2983 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2984 },
2985/* ldbfi$pack @($GRi,$d12),$FRintk */
2986 {
2987 FRV_INSN_LDBFI, "ldbfi", "ldbfi", 32,
2988 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2989 },
2990/* ldhfi$pack @($GRi,$d12),$FRintk */
2991 {
2992 FRV_INSN_LDHFI, "ldhfi", "ldhfi", 32,
2993 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2994 },
2995/* ldfi$pack @($GRi,$d12),$FRintk */
2996 {
2997 FRV_INSN_LDFI, "ldfi", "ldfi", 32,
2998 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
2999 },
3000/* nldsbi$pack @($GRi,$d12),$GRk */
3001 {
3002 FRV_INSN_NLDSBI, "nldsbi", "nldsbi", 32,
3003 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3004 },
3005/* nldubi$pack @($GRi,$d12),$GRk */
3006 {
3007 FRV_INSN_NLDUBI, "nldubi", "nldubi", 32,
3008 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3009 },
3010/* nldshi$pack @($GRi,$d12),$GRk */
3011 {
3012 FRV_INSN_NLDSHI, "nldshi", "nldshi", 32,
3013 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3014 },
3015/* nlduhi$pack @($GRi,$d12),$GRk */
3016 {
3017 FRV_INSN_NLDUHI, "nlduhi", "nlduhi", 32,
3018 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3019 },
3020/* nldi$pack @($GRi,$d12),$GRk */
3021 {
3022 FRV_INSN_NLDI, "nldi", "nldi", 32,
3023 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3024 },
3025/* nldbfi$pack @($GRi,$d12),$FRintk */
3026 {
3027 FRV_INSN_NLDBFI, "nldbfi", "nldbfi", 32,
3028 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3029 },
3030/* nldhfi$pack @($GRi,$d12),$FRintk */
3031 {
3032 FRV_INSN_NLDHFI, "nldhfi", "nldhfi", 32,
3033 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3034 },
3035/* nldfi$pack @($GRi,$d12),$FRintk */
3036 {
3037 FRV_INSN_NLDFI, "nldfi", "nldfi", 32,
3038 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3039 },
3040/* lddi$pack @($GRi,$d12),$GRdoublek */
3041 {
3042 FRV_INSN_LDDI, "lddi", "lddi", 32,
3043 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3044 },
3045/* lddfi$pack @($GRi,$d12),$FRdoublek */
3046 {
3047 FRV_INSN_LDDFI, "lddfi", "lddfi", 32,
3048 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3049 },
3050/* nlddi$pack @($GRi,$d12),$GRdoublek */
3051 {
3052 FRV_INSN_NLDDI, "nlddi", "nlddi", 32,
3053 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3054 },
3055/* nlddfi$pack @($GRi,$d12),$FRdoublek */
3056 {
3057 FRV_INSN_NLDDFI, "nlddfi", "nlddfi", 32,
3058 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3059 },
3060/* ldqi$pack @($GRi,$d12),$GRk */
3061 {
3062 FRV_INSN_LDQI, "ldqi", "ldqi", 32,
3063 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3064 },
3065/* ldqfi$pack @($GRi,$d12),$FRintk */
3066 {
3067 FRV_INSN_LDQFI, "ldqfi", "ldqfi", 32,
3068 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3069 },
3070/* nldqi$pack @($GRi,$d12),$GRk */
3071 {
3072 FRV_INSN_NLDQI, "nldqi", "nldqi", 32,
3073 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3074 },
3075/* nldqfi$pack @($GRi,$d12),$FRintk */
3076 {
3077 FRV_INSN_NLDQFI, "nldqfi", "nldqfi", 32,
3078 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3079 },
3080/* stb$pack $GRk,@($GRi,$GRj) */
3081 {
3082 FRV_INSN_STB, "stb", "stb", 32,
3083 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3084 },
3085/* sth$pack $GRk,@($GRi,$GRj) */
3086 {
3087 FRV_INSN_STH, "sth", "sth", 32,
3088 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3089 },
3090/* st$pack $GRk,@($GRi,$GRj) */
3091 {
3092 FRV_INSN_ST, "st", "st", 32,
3093 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3094 },
3095/* stbf$pack $FRintk,@($GRi,$GRj) */
3096 {
3097 FRV_INSN_STBF, "stbf", "stbf", 32,
3098 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3099 },
3100/* sthf$pack $FRintk,@($GRi,$GRj) */
3101 {
3102 FRV_INSN_STHF, "sthf", "sthf", 32,
3103 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3104 },
3105/* stf$pack $FRintk,@($GRi,$GRj) */
3106 {
3107 FRV_INSN_STF, "stf", "stf", 32,
3108 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3109 },
3110/* stc$pack $CPRk,@($GRi,$GRj) */
3111 {
3112 FRV_INSN_STC, "stc", "stc", 32,
3113 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3114 },
3115/* rstb$pack $GRk,@($GRi,$GRj) */
3116 {
3117 FRV_INSN_RSTB, "rstb", "rstb", 32,
3118 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3119 },
3120/* rsth$pack $GRk,@($GRi,$GRj) */
3121 {
3122 FRV_INSN_RSTH, "rsth", "rsth", 32,
3123 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3124 },
3125/* rst$pack $GRk,@($GRi,$GRj) */
3126 {
3127 FRV_INSN_RST, "rst", "rst", 32,
3128 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3129 },
3130/* rstbf$pack $FRintk,@($GRi,$GRj) */
3131 {
3132 FRV_INSN_RSTBF, "rstbf", "rstbf", 32,
3133 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3134 },
3135/* rsthf$pack $FRintk,@($GRi,$GRj) */
3136 {
3137 FRV_INSN_RSTHF, "rsthf", "rsthf", 32,
3138 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3139 },
3140/* rstf$pack $FRintk,@($GRi,$GRj) */
3141 {
3142 FRV_INSN_RSTF, "rstf", "rstf", 32,
3143 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3144 },
3145/* std$pack $GRk,@($GRi,$GRj) */
3146 {
3147 FRV_INSN_STD, "std", "std", 32,
3148 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3149 },
3150/* stdf$pack $FRk,@($GRi,$GRj) */
3151 {
3152 FRV_INSN_STDF, "stdf", "stdf", 32,
3153 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3154 },
3155/* stdc$pack $CPRk,@($GRi,$GRj) */
3156 {
3157 FRV_INSN_STDC, "stdc", "stdc", 32,
3158 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3159 },
3160/* rstd$pack $GRk,@($GRi,$GRj) */
3161 {
3162 FRV_INSN_RSTD, "rstd", "rstd", 32,
3163 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3164 },
3165/* rstdf$pack $FRk,@($GRi,$GRj) */
3166 {
3167 FRV_INSN_RSTDF, "rstdf", "rstdf", 32,
3168 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3169 },
3170/* stq$pack $GRk,@($GRi,$GRj) */
3171 {
3172 FRV_INSN_STQ, "stq", "stq", 32,
3173 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3174 },
3175/* stqf$pack $FRintk,@($GRi,$GRj) */
3176 {
3177 FRV_INSN_STQF, "stqf", "stqf", 32,
3178 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3179 },
3180/* stqc$pack $CPRk,@($GRi,$GRj) */
3181 {
3182 FRV_INSN_STQC, "stqc", "stqc", 32,
3183 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3184 },
3185/* rstq$pack $GRk,@($GRi,$GRj) */
3186 {
3187 FRV_INSN_RSTQ, "rstq", "rstq", 32,
3188 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3189 },
3190/* rstqf$pack $FRintk,@($GRi,$GRj) */
3191 {
3192 FRV_INSN_RSTQF, "rstqf", "rstqf", 32,
3193 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3194 },
3195/* stbu$pack $GRk,@($GRi,$GRj) */
3196 {
3197 FRV_INSN_STBU, "stbu", "stbu", 32,
3198 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3199 },
3200/* sthu$pack $GRk,@($GRi,$GRj) */
3201 {
3202 FRV_INSN_STHU, "sthu", "sthu", 32,
3203 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3204 },
3205/* stu$pack $GRk,@($GRi,$GRj) */
3206 {
3207 FRV_INSN_STU, "stu", "stu", 32,
3208 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3209 },
3210/* stbfu$pack $FRintk,@($GRi,$GRj) */
3211 {
3212 FRV_INSN_STBFU, "stbfu", "stbfu", 32,
3213 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3214 },
3215/* sthfu$pack $FRintk,@($GRi,$GRj) */
3216 {
3217 FRV_INSN_STHFU, "sthfu", "sthfu", 32,
3218 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3219 },
3220/* stfu$pack $FRintk,@($GRi,$GRj) */
3221 {
3222 FRV_INSN_STFU, "stfu", "stfu", 32,
3223 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3224 },
3225/* stcu$pack $CPRk,@($GRi,$GRj) */
3226 {
3227 FRV_INSN_STCU, "stcu", "stcu", 32,
3228 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3229 },
3230/* stdu$pack $GRk,@($GRi,$GRj) */
3231 {
3232 FRV_INSN_STDU, "stdu", "stdu", 32,
3233 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3234 },
3235/* stdfu$pack $FRk,@($GRi,$GRj) */
3236 {
3237 FRV_INSN_STDFU, "stdfu", "stdfu", 32,
3238 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3239 },
3240/* stdcu$pack $CPRk,@($GRi,$GRj) */
3241 {
3242 FRV_INSN_STDCU, "stdcu", "stdcu", 32,
3243 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3244 },
3245/* stqu$pack $GRk,@($GRi,$GRj) */
3246 {
3247 FRV_INSN_STQU, "stqu", "stqu", 32,
3248 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3249 },
3250/* stqfu$pack $FRintk,@($GRi,$GRj) */
3251 {
3252 FRV_INSN_STQFU, "stqfu", "stqfu", 32,
3253 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3254 },
3255/* stqcu$pack $CPRk,@($GRi,$GRj) */
3256 {
3257 FRV_INSN_STQCU, "stqcu", "stqcu", 32,
3258 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3259 },
3260/* cldsb$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3261 {
3262 FRV_INSN_CLDSB, "cldsb", "cldsb", 32,
3263 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3264 },
3265/* cldub$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3266 {
3267 FRV_INSN_CLDUB, "cldub", "cldub", 32,
3268 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3269 },
3270/* cldsh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3271 {
3272 FRV_INSN_CLDSH, "cldsh", "cldsh", 32,
3273 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3274 },
3275/* clduh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3276 {
3277 FRV_INSN_CLDUH, "clduh", "clduh", 32,
3278 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3279 },
3280/* cld$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3281 {
3282 FRV_INSN_CLD, "cld", "cld", 32,
3283 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3284 },
3285/* cldbf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3286 {
3287 FRV_INSN_CLDBF, "cldbf", "cldbf", 32,
3288 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3289 },
3290/* cldhf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3291 {
3292 FRV_INSN_CLDHF, "cldhf", "cldhf", 32,
3293 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3294 },
3295/* cldf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3296 {
3297 FRV_INSN_CLDF, "cldf", "cldf", 32,
3298 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3299 },
3300/* cldd$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
3301 {
3302 FRV_INSN_CLDD, "cldd", "cldd", 32,
3303 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3304 },
3305/* clddf$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
3306 {
3307 FRV_INSN_CLDDF, "clddf", "clddf", 32,
3308 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3309 },
3310/* cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3311 {
3312 FRV_INSN_CLDQ, "cldq", "cldq", 32,
3313 { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3314 },
3315/* cldsbu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3316 {
3317 FRV_INSN_CLDSBU, "cldsbu", "cldsbu", 32,
3318 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3319 },
3320/* cldubu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3321 {
3322 FRV_INSN_CLDUBU, "cldubu", "cldubu", 32,
3323 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3324 },
3325/* cldshu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3326 {
3327 FRV_INSN_CLDSHU, "cldshu", "cldshu", 32,
3328 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3329 },
3330/* clduhu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3331 {
3332 FRV_INSN_CLDUHU, "clduhu", "clduhu", 32,
3333 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3334 },
3335/* cldu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3336 {
3337 FRV_INSN_CLDU, "cldu", "cldu", 32,
3338 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3339 },
3340/* cldbfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3341 {
3342 FRV_INSN_CLDBFU, "cldbfu", "cldbfu", 32,
3343 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3344 },
3345/* cldhfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3346 {
3347 FRV_INSN_CLDHFU, "cldhfu", "cldhfu", 32,
3348 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3349 },
3350/* cldfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3351 {
3352 FRV_INSN_CLDFU, "cldfu", "cldfu", 32,
3353 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3354 },
3355/* clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
3356 {
3357 FRV_INSN_CLDDU, "clddu", "clddu", 32,
3358 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3359 },
3360/* clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
3361 {
3362 FRV_INSN_CLDDFU, "clddfu", "clddfu", 32,
3363 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
3364 },
3365/* cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3366 {
3367 FRV_INSN_CLDQU, "cldqu", "cldqu", 32,
3368 { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
3369 },
3370/* cstb$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3371 {
3372 FRV_INSN_CSTB, "cstb", "cstb", 32,
3373 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3374 },
3375/* csth$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3376 {
3377 FRV_INSN_CSTH, "csth", "csth", 32,
3378 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3379 },
3380/* cst$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3381 {
3382 FRV_INSN_CST, "cst", "cst", 32,
3383 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3384 },
3385/* cstbf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3386 {
3387 FRV_INSN_CSTBF, "cstbf", "cstbf", 32,
3388 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3389 },
3390/* csthf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3391 {
3392 FRV_INSN_CSTHF, "csthf", "csthf", 32,
3393 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3394 },
3395/* cstf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3396 {
3397 FRV_INSN_CSTF, "cstf", "cstf", 32,
3398 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3399 },
3400/* cstd$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3401 {
3402 FRV_INSN_CSTD, "cstd", "cstd", 32,
3403 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3404 },
3405/* cstdf$pack $FRk,@($GRi,$GRj),$CCi,$cond */
3406 {
3407 FRV_INSN_CSTDF, "cstdf", "cstdf", 32,
3408 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3409 },
3410/* cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3411 {
3412 FRV_INSN_CSTQ, "cstq", "cstq", 32,
3413 { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3414 },
3415/* cstbu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3416 {
3417 FRV_INSN_CSTBU, "cstbu", "cstbu", 32,
3418 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3419 },
3420/* csthu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3421 {
3422 FRV_INSN_CSTHU, "csthu", "csthu", 32,
3423 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3424 },
3425/* cstu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3426 {
3427 FRV_INSN_CSTU, "cstu", "cstu", 32,
3428 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3429 },
3430/* cstbfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3431 {
3432 FRV_INSN_CSTBFU, "cstbfu", "cstbfu", 32,
3433 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3434 },
3435/* csthfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3436 {
3437 FRV_INSN_CSTHFU, "csthfu", "csthfu", 32,
3438 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3439 },
3440/* cstfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3441 {
3442 FRV_INSN_CSTFU, "cstfu", "cstfu", 32,
3443 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3444 },
3445/* cstdu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3446 {
3447 FRV_INSN_CSTDU, "cstdu", "cstdu", 32,
3448 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3449 },
3450/* cstdfu$pack $FRk,@($GRi,$GRj),$CCi,$cond */
3451 {
3452 FRV_INSN_CSTDFU, "cstdfu", "cstdfu", 32,
3453 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3454 },
3455/* stbi$pack $GRk,@($GRi,$d12) */
3456 {
3457 FRV_INSN_STBI, "stbi", "stbi", 32,
3458 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3459 },
3460/* sthi$pack $GRk,@($GRi,$d12) */
3461 {
3462 FRV_INSN_STHI, "sthi", "sthi", 32,
3463 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3464 },
3465/* sti$pack $GRk,@($GRi,$d12) */
3466 {
3467 FRV_INSN_STI, "sti", "sti", 32,
3468 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3469 },
3470/* stbfi$pack $FRintk,@($GRi,$d12) */
3471 {
3472 FRV_INSN_STBFI, "stbfi", "stbfi", 32,
3473 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3474 },
3475/* sthfi$pack $FRintk,@($GRi,$d12) */
3476 {
3477 FRV_INSN_STHFI, "sthfi", "sthfi", 32,
3478 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3479 },
3480/* stfi$pack $FRintk,@($GRi,$d12) */
3481 {
3482 FRV_INSN_STFI, "stfi", "stfi", 32,
3483 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3484 },
3485/* stdi$pack $GRk,@($GRi,$d12) */
3486 {
3487 FRV_INSN_STDI, "stdi", "stdi", 32,
3488 { 0, { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3489 },
3490/* stdfi$pack $FRk,@($GRi,$d12) */
3491 {
3492 FRV_INSN_STDFI, "stdfi", "stdfi", 32,
3493 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
3494 },
3495/* stqi$pack $GRk,@($GRi,$d12) */
3496 {
3497 FRV_INSN_STQI, "stqi", "stqi", 32,
3498 { 0, { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3499 },
3500/* stqfi$pack $FRintk,@($GRi,$d12) */
3501 {
3502 FRV_INSN_STQFI, "stqfi", "stqfi", 32,
3503 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
3504 },
3505/* swap$pack @($GRi,$GRj),$GRk */
3506 {
3507 FRV_INSN_SWAP, "swap", "swap", 32,
3508 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
3509 },
3510/* swapi$pack @($GRi,$d12),$GRk */
3511 {
3512 FRV_INSN_SWAPI, "swapi", "swapi", 32,
3513 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
3514 },
3515/* cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3516 {
3517 FRV_INSN_CSWAP, "cswap", "cswap", 32,
3518 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
3519 },
3520/* movgf$pack $GRj,$FRintk */
3521 {
3522 FRV_INSN_MOVGF, "movgf", "movgf", 32,
3523 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
3524 },
3525/* movfg$pack $FRintk,$GRj */
3526 {
3527 FRV_INSN_MOVFG, "movfg", "movfg", 32,
3528 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
3529 },
3530/* movgfd$pack $GRj,$FRintk */
3531 {
3532 FRV_INSN_MOVGFD, "movgfd", "movgfd", 32,
3533 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
3534 },
3535/* movfgd$pack $FRintk,$GRj */
3536 {
3537 FRV_INSN_MOVFGD, "movfgd", "movfgd", 32,
3538 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
3539 },
3540/* movgfq$pack $GRj,$FRintk */
3541 {
3542 FRV_INSN_MOVGFQ, "movgfq", "movgfq", 32,
3543 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_4 } }
3544 },
3545/* movfgq$pack $FRintk,$GRj */
3546 {
3547 FRV_INSN_MOVFGQ, "movfgq", "movfgq", 32,
3548 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_4 } }
3549 },
3550/* cmovgf$pack $GRj,$FRintk,$CCi,$cond */
3551 {
3552 FRV_INSN_CMOVGF, "cmovgf", "cmovgf", 32,
3553 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
3554 },
3555/* cmovfg$pack $FRintk,$GRj,$CCi,$cond */
3556 {
3557 FRV_INSN_CMOVFG, "cmovfg", "cmovfg", 32,
3558 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
3559 },
3560/* cmovgfd$pack $GRj,$FRintk,$CCi,$cond */
3561 {
3562 FRV_INSN_CMOVGFD, "cmovgfd", "cmovgfd", 32,
3563 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
3564 },
3565/* cmovfgd$pack $FRintk,$GRj,$CCi,$cond */
3566 {
3567 FRV_INSN_CMOVFGD, "cmovfgd", "cmovfgd", 32,
3568 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
3569 },
3570/* movgs$pack $GRj,$spr */
3571 {
3572 FRV_INSN_MOVGS, "movgs", "movgs", 32,
3573 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
3574 },
3575/* movsg$pack $spr,$GRj */
3576 {
3577 FRV_INSN_MOVSG, "movsg", "movsg", 32,
3578 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
3579 },
3580/* bra$pack $hint_taken$label16 */
3581 {
3582 FRV_INSN_BRA, "bra", "bra", 32,
3583 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3584 },
3585/* bno$pack$hint_not_taken */
3586 {
3587 FRV_INSN_BNO, "bno", "bno", 32,
3588 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3589 },
3590/* beq$pack $ICCi_2,$hint,$label16 */
3591 {
3592 FRV_INSN_BEQ, "beq", "beq", 32,
3593 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3594 },
3595/* bne$pack $ICCi_2,$hint,$label16 */
3596 {
3597 FRV_INSN_BNE, "bne", "bne", 32,
3598 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3599 },
3600/* ble$pack $ICCi_2,$hint,$label16 */
3601 {
3602 FRV_INSN_BLE, "ble", "ble", 32,
3603 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3604 },
3605/* bgt$pack $ICCi_2,$hint,$label16 */
3606 {
3607 FRV_INSN_BGT, "bgt", "bgt", 32,
3608 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3609 },
3610/* blt$pack $ICCi_2,$hint,$label16 */
3611 {
3612 FRV_INSN_BLT, "blt", "blt", 32,
3613 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3614 },
3615/* bge$pack $ICCi_2,$hint,$label16 */
3616 {
3617 FRV_INSN_BGE, "bge", "bge", 32,
3618 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3619 },
3620/* bls$pack $ICCi_2,$hint,$label16 */
3621 {
3622 FRV_INSN_BLS, "bls", "bls", 32,
3623 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3624 },
3625/* bhi$pack $ICCi_2,$hint,$label16 */
3626 {
3627 FRV_INSN_BHI, "bhi", "bhi", 32,
3628 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3629 },
3630/* bc$pack $ICCi_2,$hint,$label16 */
3631 {
3632 FRV_INSN_BC, "bc", "bc", 32,
3633 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3634 },
3635/* bnc$pack $ICCi_2,$hint,$label16 */
3636 {
3637 FRV_INSN_BNC, "bnc", "bnc", 32,
3638 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3639 },
3640/* bn$pack $ICCi_2,$hint,$label16 */
3641 {
3642 FRV_INSN_BN, "bn", "bn", 32,
3643 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3644 },
3645/* bp$pack $ICCi_2,$hint,$label16 */
3646 {
3647 FRV_INSN_BP, "bp", "bp", 32,
3648 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3649 },
3650/* bv$pack $ICCi_2,$hint,$label16 */
3651 {
3652 FRV_INSN_BV, "bv", "bv", 32,
3653 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3654 },
3655/* bnv$pack $ICCi_2,$hint,$label16 */
3656 {
3657 FRV_INSN_BNV, "bnv", "bnv", 32,
3658 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3659 },
3660/* fbra$pack $hint_taken$label16 */
3661 {
3662 FRV_INSN_FBRA, "fbra", "fbra", 32,
3663 { 0|A(FR_ACCESS)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3664 },
3665/* fbno$pack$hint_not_taken */
3666 {
3667 FRV_INSN_FBNO, "fbno", "fbno", 32,
3668 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3669 },
3670/* fbne$pack $FCCi_2,$hint,$label16 */
3671 {
3672 FRV_INSN_FBNE, "fbne", "fbne", 32,
3673 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3674 },
3675/* fbeq$pack $FCCi_2,$hint,$label16 */
3676 {
3677 FRV_INSN_FBEQ, "fbeq", "fbeq", 32,
3678 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3679 },
3680/* fblg$pack $FCCi_2,$hint,$label16 */
3681 {
3682 FRV_INSN_FBLG, "fblg", "fblg", 32,
3683 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3684 },
3685/* fbue$pack $FCCi_2,$hint,$label16 */
3686 {
3687 FRV_INSN_FBUE, "fbue", "fbue", 32,
3688 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3689 },
3690/* fbul$pack $FCCi_2,$hint,$label16 */
3691 {
3692 FRV_INSN_FBUL, "fbul", "fbul", 32,
3693 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3694 },
3695/* fbge$pack $FCCi_2,$hint,$label16 */
3696 {
3697 FRV_INSN_FBGE, "fbge", "fbge", 32,
3698 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3699 },
3700/* fblt$pack $FCCi_2,$hint,$label16 */
3701 {
3702 FRV_INSN_FBLT, "fblt", "fblt", 32,
3703 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3704 },
3705/* fbuge$pack $FCCi_2,$hint,$label16 */
3706 {
3707 FRV_INSN_FBUGE, "fbuge", "fbuge", 32,
3708 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3709 },
3710/* fbug$pack $FCCi_2,$hint,$label16 */
3711 {
3712 FRV_INSN_FBUG, "fbug", "fbug", 32,
3713 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3714 },
3715/* fble$pack $FCCi_2,$hint,$label16 */
3716 {
3717 FRV_INSN_FBLE, "fble", "fble", 32,
3718 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3719 },
3720/* fbgt$pack $FCCi_2,$hint,$label16 */
3721 {
3722 FRV_INSN_FBGT, "fbgt", "fbgt", 32,
3723 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3724 },
3725/* fbule$pack $FCCi_2,$hint,$label16 */
3726 {
3727 FRV_INSN_FBULE, "fbule", "fbule", 32,
3728 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3729 },
3730/* fbu$pack $FCCi_2,$hint,$label16 */
3731 {
3732 FRV_INSN_FBU, "fbu", "fbu", 32,
3733 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3734 },
3735/* fbo$pack $FCCi_2,$hint,$label16 */
3736 {
3737 FRV_INSN_FBO, "fbo", "fbo", 32,
3738 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
3739 },
3740/* bctrlr$pack $ccond,$hint */
3741 {
3742 FRV_INSN_BCTRLR, "bctrlr", "bctrlr", 32,
3743 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3744 },
3745/* bralr$pack$hint_taken */
3746 {
3747 FRV_INSN_BRALR, "bralr", "bralr", 32,
3748 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3749 },
3750/* bnolr$pack$hint_not_taken */
3751 {
3752 FRV_INSN_BNOLR, "bnolr", "bnolr", 32,
3753 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3754 },
3755/* beqlr$pack $ICCi_2,$hint */
3756 {
3757 FRV_INSN_BEQLR, "beqlr", "beqlr", 32,
3758 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3759 },
3760/* bnelr$pack $ICCi_2,$hint */
3761 {
3762 FRV_INSN_BNELR, "bnelr", "bnelr", 32,
3763 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3764 },
3765/* blelr$pack $ICCi_2,$hint */
3766 {
3767 FRV_INSN_BLELR, "blelr", "blelr", 32,
3768 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3769 },
3770/* bgtlr$pack $ICCi_2,$hint */
3771 {
3772 FRV_INSN_BGTLR, "bgtlr", "bgtlr", 32,
3773 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3774 },
3775/* bltlr$pack $ICCi_2,$hint */
3776 {
3777 FRV_INSN_BLTLR, "bltlr", "bltlr", 32,
3778 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3779 },
3780/* bgelr$pack $ICCi_2,$hint */
3781 {
3782 FRV_INSN_BGELR, "bgelr", "bgelr", 32,
3783 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3784 },
3785/* blslr$pack $ICCi_2,$hint */
3786 {
3787 FRV_INSN_BLSLR, "blslr", "blslr", 32,
3788 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3789 },
3790/* bhilr$pack $ICCi_2,$hint */
3791 {
3792 FRV_INSN_BHILR, "bhilr", "bhilr", 32,
3793 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3794 },
3795/* bclr$pack $ICCi_2,$hint */
3796 {
3797 FRV_INSN_BCLR, "bclr", "bclr", 32,
3798 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3799 },
3800/* bnclr$pack $ICCi_2,$hint */
3801 {
3802 FRV_INSN_BNCLR, "bnclr", "bnclr", 32,
3803 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3804 },
3805/* bnlr$pack $ICCi_2,$hint */
3806 {
3807 FRV_INSN_BNLR, "bnlr", "bnlr", 32,
3808 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3809 },
3810/* bplr$pack $ICCi_2,$hint */
3811 {
3812 FRV_INSN_BPLR, "bplr", "bplr", 32,
3813 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3814 },
3815/* bvlr$pack $ICCi_2,$hint */
3816 {
3817 FRV_INSN_BVLR, "bvlr", "bvlr", 32,
3818 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3819 },
3820/* bnvlr$pack $ICCi_2,$hint */
3821 {
3822 FRV_INSN_BNVLR, "bnvlr", "bnvlr", 32,
3823 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3824 },
3825/* fbralr$pack$hint_taken */
3826 {
3827 FRV_INSN_FBRALR, "fbralr", "fbralr", 32,
3828 { 0|A(FR_ACCESS)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3829 },
3830/* fbnolr$pack$hint_not_taken */
3831 {
3832 FRV_INSN_FBNOLR, "fbnolr", "fbnolr", 32,
3833 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3834 },
3835/* fbeqlr$pack $FCCi_2,$hint */
3836 {
3837 FRV_INSN_FBEQLR, "fbeqlr", "fbeqlr", 32,
3838 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3839 },
3840/* fbnelr$pack $FCCi_2,$hint */
3841 {
3842 FRV_INSN_FBNELR, "fbnelr", "fbnelr", 32,
3843 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3844 },
3845/* fblglr$pack $FCCi_2,$hint */
3846 {
3847 FRV_INSN_FBLGLR, "fblglr", "fblglr", 32,
3848 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3849 },
3850/* fbuelr$pack $FCCi_2,$hint */
3851 {
3852 FRV_INSN_FBUELR, "fbuelr", "fbuelr", 32,
3853 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3854 },
3855/* fbullr$pack $FCCi_2,$hint */
3856 {
3857 FRV_INSN_FBULLR, "fbullr", "fbullr", 32,
3858 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3859 },
3860/* fbgelr$pack $FCCi_2,$hint */
3861 {
3862 FRV_INSN_FBGELR, "fbgelr", "fbgelr", 32,
3863 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3864 },
3865/* fbltlr$pack $FCCi_2,$hint */
3866 {
3867 FRV_INSN_FBLTLR, "fbltlr", "fbltlr", 32,
3868 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3869 },
3870/* fbugelr$pack $FCCi_2,$hint */
3871 {
3872 FRV_INSN_FBUGELR, "fbugelr", "fbugelr", 32,
3873 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3874 },
3875/* fbuglr$pack $FCCi_2,$hint */
3876 {
3877 FRV_INSN_FBUGLR, "fbuglr", "fbuglr", 32,
3878 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3879 },
3880/* fblelr$pack $FCCi_2,$hint */
3881 {
3882 FRV_INSN_FBLELR, "fblelr", "fblelr", 32,
3883 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3884 },
3885/* fbgtlr$pack $FCCi_2,$hint */
3886 {
3887 FRV_INSN_FBGTLR, "fbgtlr", "fbgtlr", 32,
3888 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3889 },
3890/* fbulelr$pack $FCCi_2,$hint */
3891 {
3892 FRV_INSN_FBULELR, "fbulelr", "fbulelr", 32,
3893 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3894 },
3895/* fbulr$pack $FCCi_2,$hint */
3896 {
3897 FRV_INSN_FBULR, "fbulr", "fbulr", 32,
3898 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3899 },
3900/* fbolr$pack $FCCi_2,$hint */
3901 {
3902 FRV_INSN_FBOLR, "fbolr", "fbolr", 32,
3903 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
3904 },
3905/* bcralr$pack $ccond$hint_taken */
3906 {
3907 FRV_INSN_BCRALR, "bcralr", "bcralr", 32,
3908 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3909 },
3910/* bcnolr$pack$hint_not_taken */
3911 {
3912 FRV_INSN_BCNOLR, "bcnolr", "bcnolr", 32,
3913 { 0, { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3914 },
3915/* bceqlr$pack $ICCi_2,$ccond,$hint */
3916 {
3917 FRV_INSN_BCEQLR, "bceqlr", "bceqlr", 32,
3918 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3919 },
3920/* bcnelr$pack $ICCi_2,$ccond,$hint */
3921 {
3922 FRV_INSN_BCNELR, "bcnelr", "bcnelr", 32,
3923 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3924 },
3925/* bclelr$pack $ICCi_2,$ccond,$hint */
3926 {
3927 FRV_INSN_BCLELR, "bclelr", "bclelr", 32,
3928 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3929 },
3930/* bcgtlr$pack $ICCi_2,$ccond,$hint */
3931 {
3932 FRV_INSN_BCGTLR, "bcgtlr", "bcgtlr", 32,
3933 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3934 },
3935/* bcltlr$pack $ICCi_2,$ccond,$hint */
3936 {
3937 FRV_INSN_BCLTLR, "bcltlr", "bcltlr", 32,
3938 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3939 },
3940/* bcgelr$pack $ICCi_2,$ccond,$hint */
3941 {
3942 FRV_INSN_BCGELR, "bcgelr", "bcgelr", 32,
3943 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3944 },
3945/* bclslr$pack $ICCi_2,$ccond,$hint */
3946 {
3947 FRV_INSN_BCLSLR, "bclslr", "bclslr", 32,
3948 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3949 },
3950/* bchilr$pack $ICCi_2,$ccond,$hint */
3951 {
3952 FRV_INSN_BCHILR, "bchilr", "bchilr", 32,
3953 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3954 },
3955/* bcclr$pack $ICCi_2,$ccond,$hint */
3956 {
3957 FRV_INSN_BCCLR, "bcclr", "bcclr", 32,
3958 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3959 },
3960/* bcnclr$pack $ICCi_2,$ccond,$hint */
3961 {
3962 FRV_INSN_BCNCLR, "bcnclr", "bcnclr", 32,
3963 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3964 },
3965/* bcnlr$pack $ICCi_2,$ccond,$hint */
3966 {
3967 FRV_INSN_BCNLR, "bcnlr", "bcnlr", 32,
3968 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3969 },
3970/* bcplr$pack $ICCi_2,$ccond,$hint */
3971 {
3972 FRV_INSN_BCPLR, "bcplr", "bcplr", 32,
3973 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3974 },
3975/* bcvlr$pack $ICCi_2,$ccond,$hint */
3976 {
3977 FRV_INSN_BCVLR, "bcvlr", "bcvlr", 32,
3978 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3979 },
3980/* bcnvlr$pack $ICCi_2,$ccond,$hint */
3981 {
3982 FRV_INSN_BCNVLR, "bcnvlr", "bcnvlr", 32,
3983 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3984 },
3985/* fcbralr$pack $ccond$hint_taken */
3986 {
3987 FRV_INSN_FCBRALR, "fcbralr", "fcbralr", 32,
3988 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3989 },
3990/* fcbnolr$pack$hint_not_taken */
3991 {
3992 FRV_INSN_FCBNOLR, "fcbnolr", "fcbnolr", 32,
3993 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3994 },
3995/* fcbeqlr$pack $FCCi_2,$ccond,$hint */
3996 {
3997 FRV_INSN_FCBEQLR, "fcbeqlr", "fcbeqlr", 32,
3998 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
3999 },
4000/* fcbnelr$pack $FCCi_2,$ccond,$hint */
4001 {
4002 FRV_INSN_FCBNELR, "fcbnelr", "fcbnelr", 32,
4003 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4004 },
4005/* fcblglr$pack $FCCi_2,$ccond,$hint */
4006 {
4007 FRV_INSN_FCBLGLR, "fcblglr", "fcblglr", 32,
4008 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4009 },
4010/* fcbuelr$pack $FCCi_2,$ccond,$hint */
4011 {
4012 FRV_INSN_FCBUELR, "fcbuelr", "fcbuelr", 32,
4013 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4014 },
4015/* fcbullr$pack $FCCi_2,$ccond,$hint */
4016 {
4017 FRV_INSN_FCBULLR, "fcbullr", "fcbullr", 32,
4018 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4019 },
4020/* fcbgelr$pack $FCCi_2,$ccond,$hint */
4021 {
4022 FRV_INSN_FCBGELR, "fcbgelr", "fcbgelr", 32,
4023 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4024 },
4025/* fcbltlr$pack $FCCi_2,$ccond,$hint */
4026 {
4027 FRV_INSN_FCBLTLR, "fcbltlr", "fcbltlr", 32,
4028 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4029 },
4030/* fcbugelr$pack $FCCi_2,$ccond,$hint */
4031 {
4032 FRV_INSN_FCBUGELR, "fcbugelr", "fcbugelr", 32,
4033 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4034 },
4035/* fcbuglr$pack $FCCi_2,$ccond,$hint */
4036 {
4037 FRV_INSN_FCBUGLR, "fcbuglr", "fcbuglr", 32,
4038 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4039 },
4040/* fcblelr$pack $FCCi_2,$ccond,$hint */
4041 {
4042 FRV_INSN_FCBLELR, "fcblelr", "fcblelr", 32,
4043 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4044 },
4045/* fcbgtlr$pack $FCCi_2,$ccond,$hint */
4046 {
4047 FRV_INSN_FCBGTLR, "fcbgtlr", "fcbgtlr", 32,
4048 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4049 },
4050/* fcbulelr$pack $FCCi_2,$ccond,$hint */
4051 {
4052 FRV_INSN_FCBULELR, "fcbulelr", "fcbulelr", 32,
4053 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4054 },
4055/* fcbulr$pack $FCCi_2,$ccond,$hint */
4056 {
4057 FRV_INSN_FCBULR, "fcbulr", "fcbulr", 32,
4058 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4059 },
4060/* fcbolr$pack $FCCi_2,$ccond,$hint */
4061 {
4062 FRV_INSN_FCBOLR, "fcbolr", "fcbolr", 32,
4063 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
4064 },
4065/* jmpl$pack @($GRi,$GRj) */
4066 {
4067 FRV_INSN_JMPL, "jmpl", "jmpl", 32,
4068 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
4069 },
4070/* calll$pack @($GRi,$GRj) */
4071 {
4072 FRV_INSN_CALLL, "calll", "calll", 32,
4073 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
4074 },
4075/* jmpil$pack @($GRi,$s12) */
4076 {
4077 FRV_INSN_JMPIL, "jmpil", "jmpil", 32,
4078 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
4079 },
4080/* callil$pack @($GRi,$s12) */
4081 {
4082 FRV_INSN_CALLIL, "callil", "callil", 32,
4083 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
4084 },
4085/* call$pack $label24 */
4086 {
4087 FRV_INSN_CALL, "call", "call", 32,
4088 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_4, FR500_MAJOR_B_4 } }
4089 },
4090/* rett$pack $debug */
4091 {
4092 FRV_INSN_RETT, "rett", "rett", 32,
4093 { 0|A(PRIVILEGED)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
4094 },
4095/* rei$pack $eir */
4096 {
4097 FRV_INSN_REI, "rei", "rei", 32,
4098 { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_1 } }
4099 },
4100/* tra$pack $GRi,$GRj */
4101 {
4102 FRV_INSN_TRA, "tra", "tra", 32,
4103 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4104 },
4105/* tno$pack */
4106 {
4107 FRV_INSN_TNO, "tno", "tno", 32,
4108 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4109 },
4110/* teq$pack $ICCi_2,$GRi,$GRj */
4111 {
4112 FRV_INSN_TEQ, "teq", "teq", 32,
4113 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4114 },
4115/* tne$pack $ICCi_2,$GRi,$GRj */
4116 {
4117 FRV_INSN_TNE, "tne", "tne", 32,
4118 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4119 },
4120/* tle$pack $ICCi_2,$GRi,$GRj */
4121 {
4122 FRV_INSN_TLE, "tle", "tle", 32,
4123 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4124 },
4125/* tgt$pack $ICCi_2,$GRi,$GRj */
4126 {
4127 FRV_INSN_TGT, "tgt", "tgt", 32,
4128 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4129 },
4130/* tlt$pack $ICCi_2,$GRi,$GRj */
4131 {
4132 FRV_INSN_TLT, "tlt", "tlt", 32,
4133 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4134 },
4135/* tge$pack $ICCi_2,$GRi,$GRj */
4136 {
4137 FRV_INSN_TGE, "tge", "tge", 32,
4138 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4139 },
4140/* tls$pack $ICCi_2,$GRi,$GRj */
4141 {
4142 FRV_INSN_TLS, "tls", "tls", 32,
4143 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4144 },
4145/* thi$pack $ICCi_2,$GRi,$GRj */
4146 {
4147 FRV_INSN_THI, "thi", "thi", 32,
4148 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4149 },
4150/* tc$pack $ICCi_2,$GRi,$GRj */
4151 {
4152 FRV_INSN_TC, "tc", "tc", 32,
4153 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4154 },
4155/* tnc$pack $ICCi_2,$GRi,$GRj */
4156 {
4157 FRV_INSN_TNC, "tnc", "tnc", 32,
4158 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4159 },
4160/* tn$pack $ICCi_2,$GRi,$GRj */
4161 {
4162 FRV_INSN_TN, "tn", "tn", 32,
4163 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4164 },
4165/* tp$pack $ICCi_2,$GRi,$GRj */
4166 {
4167 FRV_INSN_TP, "tp", "tp", 32,
4168 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4169 },
4170/* tv$pack $ICCi_2,$GRi,$GRj */
4171 {
4172 FRV_INSN_TV, "tv", "tv", 32,
4173 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4174 },
4175/* tnv$pack $ICCi_2,$GRi,$GRj */
4176 {
4177 FRV_INSN_TNV, "tnv", "tnv", 32,
4178 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4179 },
4180/* ftra$pack $GRi,$GRj */
4181 {
4182 FRV_INSN_FTRA, "ftra", "ftra", 32,
4183 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4184 },
4185/* ftno$pack */
4186 {
4187 FRV_INSN_FTNO, "ftno", "ftno", 32,
4188 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4189 },
4190/* ftne$pack $FCCi_2,$GRi,$GRj */
4191 {
4192 FRV_INSN_FTNE, "ftne", "ftne", 32,
4193 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4194 },
4195/* fteq$pack $FCCi_2,$GRi,$GRj */
4196 {
4197 FRV_INSN_FTEQ, "fteq", "fteq", 32,
4198 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4199 },
4200/* ftlg$pack $FCCi_2,$GRi,$GRj */
4201 {
4202 FRV_INSN_FTLG, "ftlg", "ftlg", 32,
4203 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4204 },
4205/* ftue$pack $FCCi_2,$GRi,$GRj */
4206 {
4207 FRV_INSN_FTUE, "ftue", "ftue", 32,
4208 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4209 },
4210/* ftul$pack $FCCi_2,$GRi,$GRj */
4211 {
4212 FRV_INSN_FTUL, "ftul", "ftul", 32,
4213 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4214 },
4215/* ftge$pack $FCCi_2,$GRi,$GRj */
4216 {
4217 FRV_INSN_FTGE, "ftge", "ftge", 32,
4218 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4219 },
4220/* ftlt$pack $FCCi_2,$GRi,$GRj */
4221 {
4222 FRV_INSN_FTLT, "ftlt", "ftlt", 32,
4223 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4224 },
4225/* ftuge$pack $FCCi_2,$GRi,$GRj */
4226 {
4227 FRV_INSN_FTUGE, "ftuge", "ftuge", 32,
4228 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4229 },
4230/* ftug$pack $FCCi_2,$GRi,$GRj */
4231 {
4232 FRV_INSN_FTUG, "ftug", "ftug", 32,
4233 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4234 },
4235/* ftle$pack $FCCi_2,$GRi,$GRj */
4236 {
4237 FRV_INSN_FTLE, "ftle", "ftle", 32,
4238 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4239 },
4240/* ftgt$pack $FCCi_2,$GRi,$GRj */
4241 {
4242 FRV_INSN_FTGT, "ftgt", "ftgt", 32,
4243 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4244 },
4245/* ftule$pack $FCCi_2,$GRi,$GRj */
4246 {
4247 FRV_INSN_FTULE, "ftule", "ftule", 32,
4248 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4249 },
4250/* ftu$pack $FCCi_2,$GRi,$GRj */
4251 {
4252 FRV_INSN_FTU, "ftu", "ftu", 32,
4253 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4254 },
4255/* fto$pack $FCCi_2,$GRi,$GRj */
4256 {
4257 FRV_INSN_FTO, "fto", "fto", 32,
4258 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4259 },
4260/* tira$pack $GRi,$s12 */
4261 {
4262 FRV_INSN_TIRA, "tira", "tira", 32,
4263 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4264 },
4265/* tino$pack */
4266 {
4267 FRV_INSN_TINO, "tino", "tino", 32,
4268 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4269 },
4270/* tieq$pack $ICCi_2,$GRi,$s12 */
4271 {
4272 FRV_INSN_TIEQ, "tieq", "tieq", 32,
4273 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4274 },
4275/* tine$pack $ICCi_2,$GRi,$s12 */
4276 {
4277 FRV_INSN_TINE, "tine", "tine", 32,
4278 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4279 },
4280/* tile$pack $ICCi_2,$GRi,$s12 */
4281 {
4282 FRV_INSN_TILE, "tile", "tile", 32,
4283 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4284 },
4285/* tigt$pack $ICCi_2,$GRi,$s12 */
4286 {
4287 FRV_INSN_TIGT, "tigt", "tigt", 32,
4288 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4289 },
4290/* tilt$pack $ICCi_2,$GRi,$s12 */
4291 {
4292 FRV_INSN_TILT, "tilt", "tilt", 32,
4293 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4294 },
4295/* tige$pack $ICCi_2,$GRi,$s12 */
4296 {
4297 FRV_INSN_TIGE, "tige", "tige", 32,
4298 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4299 },
4300/* tils$pack $ICCi_2,$GRi,$s12 */
4301 {
4302 FRV_INSN_TILS, "tils", "tils", 32,
4303 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4304 },
4305/* tihi$pack $ICCi_2,$GRi,$s12 */
4306 {
4307 FRV_INSN_TIHI, "tihi", "tihi", 32,
4308 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4309 },
4310/* tic$pack $ICCi_2,$GRi,$s12 */
4311 {
4312 FRV_INSN_TIC, "tic", "tic", 32,
4313 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4314 },
4315/* tinc$pack $ICCi_2,$GRi,$s12 */
4316 {
4317 FRV_INSN_TINC, "tinc", "tinc", 32,
4318 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4319 },
4320/* tin$pack $ICCi_2,$GRi,$s12 */
4321 {
4322 FRV_INSN_TIN, "tin", "tin", 32,
4323 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4324 },
4325/* tip$pack $ICCi_2,$GRi,$s12 */
4326 {
4327 FRV_INSN_TIP, "tip", "tip", 32,
4328 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4329 },
4330/* tiv$pack $ICCi_2,$GRi,$s12 */
4331 {
4332 FRV_INSN_TIV, "tiv", "tiv", 32,
4333 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4334 },
4335/* tinv$pack $ICCi_2,$GRi,$s12 */
4336 {
4337 FRV_INSN_TINV, "tinv", "tinv", 32,
4338 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4339 },
4340/* ftira$pack $GRi,$s12 */
4341 {
4342 FRV_INSN_FTIRA, "ftira", "ftira", 32,
4343 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4344 },
4345/* ftino$pack */
4346 {
4347 FRV_INSN_FTINO, "ftino", "ftino", 32,
4348 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4349 },
4350/* ftine$pack $FCCi_2,$GRi,$s12 */
4351 {
4352 FRV_INSN_FTINE, "ftine", "ftine", 32,
4353 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4354 },
4355/* ftieq$pack $FCCi_2,$GRi,$s12 */
4356 {
4357 FRV_INSN_FTIEQ, "ftieq", "ftieq", 32,
4358 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4359 },
4360/* ftilg$pack $FCCi_2,$GRi,$s12 */
4361 {
4362 FRV_INSN_FTILG, "ftilg", "ftilg", 32,
4363 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4364 },
4365/* ftiue$pack $FCCi_2,$GRi,$s12 */
4366 {
4367 FRV_INSN_FTIUE, "ftiue", "ftiue", 32,
4368 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4369 },
4370/* ftiul$pack $FCCi_2,$GRi,$s12 */
4371 {
4372 FRV_INSN_FTIUL, "ftiul", "ftiul", 32,
4373 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4374 },
4375/* ftige$pack $FCCi_2,$GRi,$s12 */
4376 {
4377 FRV_INSN_FTIGE, "ftige", "ftige", 32,
4378 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4379 },
4380/* ftilt$pack $FCCi_2,$GRi,$s12 */
4381 {
4382 FRV_INSN_FTILT, "ftilt", "ftilt", 32,
4383 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4384 },
4385/* ftiuge$pack $FCCi_2,$GRi,$s12 */
4386 {
4387 FRV_INSN_FTIUGE, "ftiuge", "ftiuge", 32,
4388 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4389 },
4390/* ftiug$pack $FCCi_2,$GRi,$s12 */
4391 {
4392 FRV_INSN_FTIUG, "ftiug", "ftiug", 32,
4393 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4394 },
4395/* ftile$pack $FCCi_2,$GRi,$s12 */
4396 {
4397 FRV_INSN_FTILE, "ftile", "ftile", 32,
4398 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4399 },
4400/* ftigt$pack $FCCi_2,$GRi,$s12 */
4401 {
4402 FRV_INSN_FTIGT, "ftigt", "ftigt", 32,
4403 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4404 },
4405/* ftiule$pack $FCCi_2,$GRi,$s12 */
4406 {
4407 FRV_INSN_FTIULE, "ftiule", "ftiule", 32,
4408 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4409 },
4410/* ftiu$pack $FCCi_2,$GRi,$s12 */
4411 {
4412 FRV_INSN_FTIU, "ftiu", "ftiu", 32,
4413 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4414 },
4415/* ftio$pack $FCCi_2,$GRi,$s12 */
4416 {
4417 FRV_INSN_FTIO, "ftio", "ftio", 32,
4418 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4419 },
4420/* break$pack */
4421 {
4422 FRV_INSN_BREAK, "break", "break", 32,
4423 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4424 },
4425/* mtrap$pack */
4426 {
4427 FRV_INSN_MTRAP, "mtrap", "mtrap", 32,
4428 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
4429 },
4430/* andcr$pack $CRi,$CRj,$CRk */
4431 {
4432 FRV_INSN_ANDCR, "andcr", "andcr", 32,
4433 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
4434 },
4435/* orcr$pack $CRi,$CRj,$CRk */
4436 {
4437 FRV_INSN_ORCR, "orcr", "orcr", 32,
4438 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
4439 },
4440/* xorcr$pack $CRi,$CRj,$CRk */
4441 {
4442 FRV_INSN_XORCR, "xorcr", "xorcr", 32,
4443 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
4444 },
4445/* nandcr$pack $CRi,$CRj,$CRk */
4446 {
4447 FRV_INSN_NANDCR, "nandcr", "nandcr", 32,
4448 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
4449 },
4450/* norcr$pack $CRi,$CRj,$CRk */
4451 {
4452 FRV_INSN_NORCR, "norcr", "norcr", 32,
4453 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
4454 },
4455/* andncr$pack $CRi,$CRj,$CRk */
4456 {
4457 FRV_INSN_ANDNCR, "andncr", "andncr", 32,
4458 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
4459 },
4460/* orncr$pack $CRi,$CRj,$CRk */
4461 {
4462 FRV_INSN_ORNCR, "orncr", "orncr", 32,
4463 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
4464 },
4465/* nandncr$pack $CRi,$CRj,$CRk */
4466 {
4467 FRV_INSN_NANDNCR, "nandncr", "nandncr", 32,
4468 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
4469 },
4470/* norncr$pack $CRi,$CRj,$CRk */
4471 {
4472 FRV_INSN_NORNCR, "norncr", "norncr", 32,
4473 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
4474 },
4475/* notcr$pack $CRj,$CRk */
4476 {
4477 FRV_INSN_NOTCR, "notcr", "notcr", 32,
4478 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
4479 },
4480/* ckra$pack $CRj_int */
4481 {
4482 FRV_INSN_CKRA, "ckra", "ckra", 32,
4483 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4484 },
4485/* ckno$pack $CRj_int */
4486 {
4487 FRV_INSN_CKNO, "ckno", "ckno", 32,
4488 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4489 },
4490/* ckeq$pack $ICCi_3,$CRj_int */
4491 {
4492 FRV_INSN_CKEQ, "ckeq", "ckeq", 32,
4493 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4494 },
4495/* ckne$pack $ICCi_3,$CRj_int */
4496 {
4497 FRV_INSN_CKNE, "ckne", "ckne", 32,
4498 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4499 },
4500/* ckle$pack $ICCi_3,$CRj_int */
4501 {
4502 FRV_INSN_CKLE, "ckle", "ckle", 32,
4503 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4504 },
4505/* ckgt$pack $ICCi_3,$CRj_int */
4506 {
4507 FRV_INSN_CKGT, "ckgt", "ckgt", 32,
4508 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4509 },
4510/* cklt$pack $ICCi_3,$CRj_int */
4511 {
4512 FRV_INSN_CKLT, "cklt", "cklt", 32,
4513 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4514 },
4515/* ckge$pack $ICCi_3,$CRj_int */
4516 {
4517 FRV_INSN_CKGE, "ckge", "ckge", 32,
4518 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4519 },
4520/* ckls$pack $ICCi_3,$CRj_int */
4521 {
4522 FRV_INSN_CKLS, "ckls", "ckls", 32,
4523 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4524 },
4525/* ckhi$pack $ICCi_3,$CRj_int */
4526 {
4527 FRV_INSN_CKHI, "ckhi", "ckhi", 32,
4528 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4529 },
4530/* ckc$pack $ICCi_3,$CRj_int */
4531 {
4532 FRV_INSN_CKC, "ckc", "ckc", 32,
4533 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4534 },
4535/* cknc$pack $ICCi_3,$CRj_int */
4536 {
4537 FRV_INSN_CKNC, "cknc", "cknc", 32,
4538 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4539 },
4540/* ckn$pack $ICCi_3,$CRj_int */
4541 {
4542 FRV_INSN_CKN, "ckn", "ckn", 32,
4543 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4544 },
4545/* ckp$pack $ICCi_3,$CRj_int */
4546 {
4547 FRV_INSN_CKP, "ckp", "ckp", 32,
4548 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4549 },
4550/* ckv$pack $ICCi_3,$CRj_int */
4551 {
4552 FRV_INSN_CKV, "ckv", "ckv", 32,
4553 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4554 },
4555/* cknv$pack $ICCi_3,$CRj_int */
4556 {
4557 FRV_INSN_CKNV, "cknv", "cknv", 32,
4558 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4559 },
4560/* fckra$pack $CRj_float */
4561 {
4562 FRV_INSN_FCKRA, "fckra", "fckra", 32,
4563 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4564 },
4565/* fckno$pack $CRj_float */
4566 {
4567 FRV_INSN_FCKNO, "fckno", "fckno", 32,
4568 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4569 },
4570/* fckne$pack $FCCi_3,$CRj_float */
4571 {
4572 FRV_INSN_FCKNE, "fckne", "fckne", 32,
4573 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4574 },
4575/* fckeq$pack $FCCi_3,$CRj_float */
4576 {
4577 FRV_INSN_FCKEQ, "fckeq", "fckeq", 32,
4578 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4579 },
4580/* fcklg$pack $FCCi_3,$CRj_float */
4581 {
4582 FRV_INSN_FCKLG, "fcklg", "fcklg", 32,
4583 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4584 },
4585/* fckue$pack $FCCi_3,$CRj_float */
4586 {
4587 FRV_INSN_FCKUE, "fckue", "fckue", 32,
4588 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4589 },
4590/* fckul$pack $FCCi_3,$CRj_float */
4591 {
4592 FRV_INSN_FCKUL, "fckul", "fckul", 32,
4593 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4594 },
4595/* fckge$pack $FCCi_3,$CRj_float */
4596 {
4597 FRV_INSN_FCKGE, "fckge", "fckge", 32,
4598 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4599 },
4600/* fcklt$pack $FCCi_3,$CRj_float */
4601 {
4602 FRV_INSN_FCKLT, "fcklt", "fcklt", 32,
4603 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4604 },
4605/* fckuge$pack $FCCi_3,$CRj_float */
4606 {
4607 FRV_INSN_FCKUGE, "fckuge", "fckuge", 32,
4608 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4609 },
4610/* fckug$pack $FCCi_3,$CRj_float */
4611 {
4612 FRV_INSN_FCKUG, "fckug", "fckug", 32,
4613 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4614 },
4615/* fckle$pack $FCCi_3,$CRj_float */
4616 {
4617 FRV_INSN_FCKLE, "fckle", "fckle", 32,
4618 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4619 },
4620/* fckgt$pack $FCCi_3,$CRj_float */
4621 {
4622 FRV_INSN_FCKGT, "fckgt", "fckgt", 32,
4623 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4624 },
4625/* fckule$pack $FCCi_3,$CRj_float */
4626 {
4627 FRV_INSN_FCKULE, "fckule", "fckule", 32,
4628 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4629 },
4630/* fcku$pack $FCCi_3,$CRj_float */
4631 {
4632 FRV_INSN_FCKU, "fcku", "fcku", 32,
4633 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4634 },
4635/* fcko$pack $FCCi_3,$CRj_float */
4636 {
4637 FRV_INSN_FCKO, "fcko", "fcko", 32,
4638 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4639 },
4640/* cckra$pack $CRj_int,$CCi,$cond */
4641 {
4642 FRV_INSN_CCKRA, "cckra", "cckra", 32,
4643 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4644 },
4645/* cckno$pack $CRj_int,$CCi,$cond */
4646 {
4647 FRV_INSN_CCKNO, "cckno", "cckno", 32,
4648 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4649 },
4650/* cckeq$pack $ICCi_3,$CRj_int,$CCi,$cond */
4651 {
4652 FRV_INSN_CCKEQ, "cckeq", "cckeq", 32,
4653 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4654 },
4655/* cckne$pack $ICCi_3,$CRj_int,$CCi,$cond */
4656 {
4657 FRV_INSN_CCKNE, "cckne", "cckne", 32,
4658 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4659 },
4660/* cckle$pack $ICCi_3,$CRj_int,$CCi,$cond */
4661 {
4662 FRV_INSN_CCKLE, "cckle", "cckle", 32,
4663 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4664 },
4665/* cckgt$pack $ICCi_3,$CRj_int,$CCi,$cond */
4666 {
4667 FRV_INSN_CCKGT, "cckgt", "cckgt", 32,
4668 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4669 },
4670/* ccklt$pack $ICCi_3,$CRj_int,$CCi,$cond */
4671 {
4672 FRV_INSN_CCKLT, "ccklt", "ccklt", 32,
4673 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4674 },
4675/* cckge$pack $ICCi_3,$CRj_int,$CCi,$cond */
4676 {
4677 FRV_INSN_CCKGE, "cckge", "cckge", 32,
4678 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4679 },
4680/* cckls$pack $ICCi_3,$CRj_int,$CCi,$cond */
4681 {
4682 FRV_INSN_CCKLS, "cckls", "cckls", 32,
4683 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4684 },
4685/* cckhi$pack $ICCi_3,$CRj_int,$CCi,$cond */
4686 {
4687 FRV_INSN_CCKHI, "cckhi", "cckhi", 32,
4688 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4689 },
4690/* cckc$pack $ICCi_3,$CRj_int,$CCi,$cond */
4691 {
4692 FRV_INSN_CCKC, "cckc", "cckc", 32,
4693 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4694 },
4695/* ccknc$pack $ICCi_3,$CRj_int,$CCi,$cond */
4696 {
4697 FRV_INSN_CCKNC, "ccknc", "ccknc", 32,
4698 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4699 },
4700/* cckn$pack $ICCi_3,$CRj_int,$CCi,$cond */
4701 {
4702 FRV_INSN_CCKN, "cckn", "cckn", 32,
4703 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4704 },
4705/* cckp$pack $ICCi_3,$CRj_int,$CCi,$cond */
4706 {
4707 FRV_INSN_CCKP, "cckp", "cckp", 32,
4708 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4709 },
4710/* cckv$pack $ICCi_3,$CRj_int,$CCi,$cond */
4711 {
4712 FRV_INSN_CCKV, "cckv", "cckv", 32,
4713 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4714 },
4715/* ccknv$pack $ICCi_3,$CRj_int,$CCi,$cond */
4716 {
4717 FRV_INSN_CCKNV, "ccknv", "ccknv", 32,
4718 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4719 },
4720/* cfckra$pack $CRj_float,$CCi,$cond */
4721 {
4722 FRV_INSN_CFCKRA, "cfckra", "cfckra", 32,
4723 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4724 },
4725/* cfckno$pack $CRj_float,$CCi,$cond */
4726 {
4727 FRV_INSN_CFCKNO, "cfckno", "cfckno", 32,
4728 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4729 },
4730/* cfckne$pack $FCCi_3,$CRj_float,$CCi,$cond */
4731 {
4732 FRV_INSN_CFCKNE, "cfckne", "cfckne", 32,
4733 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4734 },
4735/* cfckeq$pack $FCCi_3,$CRj_float,$CCi,$cond */
4736 {
4737 FRV_INSN_CFCKEQ, "cfckeq", "cfckeq", 32,
4738 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4739 },
4740/* cfcklg$pack $FCCi_3,$CRj_float,$CCi,$cond */
4741 {
4742 FRV_INSN_CFCKLG, "cfcklg", "cfcklg", 32,
4743 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4744 },
4745/* cfckue$pack $FCCi_3,$CRj_float,$CCi,$cond */
4746 {
4747 FRV_INSN_CFCKUE, "cfckue", "cfckue", 32,
4748 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4749 },
4750/* cfckul$pack $FCCi_3,$CRj_float,$CCi,$cond */
4751 {
4752 FRV_INSN_CFCKUL, "cfckul", "cfckul", 32,
4753 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4754 },
4755/* cfckge$pack $FCCi_3,$CRj_float,$CCi,$cond */
4756 {
4757 FRV_INSN_CFCKGE, "cfckge", "cfckge", 32,
4758 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4759 },
4760/* cfcklt$pack $FCCi_3,$CRj_float,$CCi,$cond */
4761 {
4762 FRV_INSN_CFCKLT, "cfcklt", "cfcklt", 32,
4763 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4764 },
4765/* cfckuge$pack $FCCi_3,$CRj_float,$CCi,$cond */
4766 {
4767 FRV_INSN_CFCKUGE, "cfckuge", "cfckuge", 32,
4768 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4769 },
4770/* cfckug$pack $FCCi_3,$CRj_float,$CCi,$cond */
4771 {
4772 FRV_INSN_CFCKUG, "cfckug", "cfckug", 32,
4773 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4774 },
4775/* cfckle$pack $FCCi_3,$CRj_float,$CCi,$cond */
4776 {
4777 FRV_INSN_CFCKLE, "cfckle", "cfckle", 32,
4778 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4779 },
4780/* cfckgt$pack $FCCi_3,$CRj_float,$CCi,$cond */
4781 {
4782 FRV_INSN_CFCKGT, "cfckgt", "cfckgt", 32,
4783 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4784 },
4785/* cfckule$pack $FCCi_3,$CRj_float,$CCi,$cond */
4786 {
4787 FRV_INSN_CFCKULE, "cfckule", "cfckule", 32,
4788 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4789 },
4790/* cfcku$pack $FCCi_3,$CRj_float,$CCi,$cond */
4791 {
4792 FRV_INSN_CFCKU, "cfcku", "cfcku", 32,
4793 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4794 },
4795/* cfcko$pack $FCCi_3,$CRj_float,$CCi,$cond */
4796 {
4797 FRV_INSN_CFCKO, "cfcko", "cfcko", 32,
4798 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
4799 },
4800/* cjmpl$pack @($GRi,$GRj),$CCi,$cond */
4801 {
4802 FRV_INSN_CJMPL, "cjmpl", "cjmpl", 32,
4803 { 0|A(CONDITIONAL)|A(COND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
4804 },
4805/* ccalll$pack @($GRi,$GRj),$CCi,$cond */
4806 {
4807 FRV_INSN_CCALLL, "ccalll", "ccalll", 32,
4808 { 0|A(CONDITIONAL)|A(COND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
4809 },
4810/* ici$pack @($GRi,$GRj) */
4811 {
4812 FRV_INSN_ICI, "ici", "ici", 32,
4813 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
4814 },
4815/* dci$pack @($GRi,$GRj) */
4816 {
4817 FRV_INSN_DCI, "dci", "dci", 32,
4818 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
4819 },
4820/* icei$pack @($GRi,$GRj),$ae */
4821 {
4822 FRV_INSN_ICEI, "icei", "icei", 32,
4823 { 0, { (1<<MACH_FR400), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_NONE } }
4824 },
4825/* dcei$pack @($GRi,$GRj),$ae */
4826 {
4827 FRV_INSN_DCEI, "dcei", "dcei", 32,
4828 { 0, { (1<<MACH_FR400), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_NONE } }
4829 },
4830/* dcf$pack @($GRi,$GRj) */
4831 {
4832 FRV_INSN_DCF, "dcf", "dcf", 32,
4833 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
4834 },
4835/* dcef$pack @($GRi,$GRj),$ae */
4836 {
4837 FRV_INSN_DCEF, "dcef", "dcef", 32,
4838 { 0, { (1<<MACH_FR400), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_NONE } }
4839 },
4840/* witlb$pack $GRk,@($GRi,$GRj) */
4841 {
4842 FRV_INSN_WITLB, "witlb", "witlb", 32,
4843 { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
4844 },
4845/* wdtlb$pack $GRk,@($GRi,$GRj) */
4846 {
4847 FRV_INSN_WDTLB, "wdtlb", "wdtlb", 32,
4848 { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
4849 },
4850/* itlbi$pack @($GRi,$GRj) */
4851 {
4852 FRV_INSN_ITLBI, "itlbi", "itlbi", 32,
4853 { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
4854 },
4855/* dtlbi$pack @($GRi,$GRj) */
4856 {
4857 FRV_INSN_DTLBI, "dtlbi", "dtlbi", 32,
4858 { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
4859 },
4860/* icpl$pack $GRi,$GRj,$lock */
4861 {
4862 FRV_INSN_ICPL, "icpl", "icpl", 32,
4863 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
4864 },
4865/* dcpl$pack $GRi,$GRj,$lock */
4866 {
4867 FRV_INSN_DCPL, "dcpl", "dcpl", 32,
4868 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
4869 },
4870/* icul$pack $GRi */
4871 {
4872 FRV_INSN_ICUL, "icul", "icul", 32,
4873 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
4874 },
4875/* dcul$pack $GRi */
4876 {
4877 FRV_INSN_DCUL, "dcul", "dcul", 32,
4878 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
4879 },
4880/* bar$pack */
4881 {
4882 FRV_INSN_BAR, "bar", "bar", 32,
4883 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
4884 },
4885/* membar$pack */
4886 {
4887 FRV_INSN_MEMBAR, "membar", "membar", 32,
4888 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
4889 },
4890/* cop1$pack $s6_1,$CPRi,$CPRj,$CPRk */
4891 {
4892 FRV_INSN_COP1, "cop1", "cop1", 32,
4893 { 0, { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
4894 },
4895/* cop2$pack $s6_1,$CPRi,$CPRj,$CPRk */
4896 {
4897 FRV_INSN_COP2, "cop2", "cop2", 32,
4898 { 0, { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
4899 },
4900/* clrgr$pack $GRk */
4901 {
4902 FRV_INSN_CLRGR, "clrgr", "clrgr", 32,
4903 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
4904 },
4905/* clrfr$pack $FRk */
4906 {
4907 FRV_INSN_CLRFR, "clrfr", "clrfr", 32,
4908 { 0|A(FR_ACCESS), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
4909 },
4910/* clrga$pack */
4911 {
4912 FRV_INSN_CLRGA, "clrga", "clrga", 32,
4913 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
4914 },
4915/* clrfa$pack */
4916 {
4917 FRV_INSN_CLRFA, "clrfa", "clrfa", 32,
4918 { 0|A(FR_ACCESS), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
4919 },
4920/* commitgr$pack $GRk */
4921 {
4922 FRV_INSN_COMMITGR, "commitgr", "commitgr", 32,
4923 { 0, { (1<<MACH_FRV)|(1<<MACH_FR500), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
4924 },
4925/* commitfr$pack $FRk */
4926 {
4927 FRV_INSN_COMMITFR, "commitfr", "commitfr", 32,
4928 { 0|A(FR_ACCESS), { (1<<MACH_FRV)|(1<<MACH_FR500), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
4929 },
4930/* commitga$pack */
4931 {
4932 FRV_INSN_COMMITGA, "commitga", "commitga", 32,
4933 { 0, { (1<<MACH_FRV)|(1<<MACH_FR500), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
4934 },
4935/* commitfa$pack */
4936 {
4937 FRV_INSN_COMMITFA, "commitfa", "commitfa", 32,
4938 { 0|A(FR_ACCESS), { (1<<MACH_FRV)|(1<<MACH_FR500), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
4939 },
4940/* fitos$pack $FRintj,$FRk */
4941 {
4942 FRV_INSN_FITOS, "fitos", "fitos", 32,
4943 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4944 },
4945/* fstoi$pack $FRj,$FRintk */
4946 {
4947 FRV_INSN_FSTOI, "fstoi", "fstoi", 32,
4948 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4949 },
4950/* fitod$pack $FRintj,$FRdoublek */
4951 {
4952 FRV_INSN_FITOD, "fitod", "fitod", 32,
4953 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4954 },
4955/* fdtoi$pack $FRdoublej,$FRintk */
4956 {
4957 FRV_INSN_FDTOI, "fdtoi", "fdtoi", 32,
4958 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4959 },
4960/* fditos$pack $FRintj,$FRk */
4961 {
4962 FRV_INSN_FDITOS, "fditos", "fditos", 32,
4963 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4964 },
4965/* fdstoi$pack $FRj,$FRintk */
4966 {
4967 FRV_INSN_FDSTOI, "fdstoi", "fdstoi", 32,
4968 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4969 },
4970/* nfditos$pack $FRintj,$FRk */
4971 {
4972 FRV_INSN_NFDITOS, "nfditos", "nfditos", 32,
4973 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4974 },
4975/* nfdstoi$pack $FRj,$FRintk */
4976 {
4977 FRV_INSN_NFDSTOI, "nfdstoi", "nfdstoi", 32,
4978 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4979 },
4980/* cfitos$pack $FRintj,$FRk,$CCi,$cond */
4981 {
4982 FRV_INSN_CFITOS, "cfitos", "cfitos", 32,
4983 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4984 },
4985/* cfstoi$pack $FRj,$FRintk,$CCi,$cond */
4986 {
4987 FRV_INSN_CFSTOI, "cfstoi", "cfstoi", 32,
4988 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4989 },
4990/* nfitos$pack $FRintj,$FRk */
4991 {
4992 FRV_INSN_NFITOS, "nfitos", "nfitos", 32,
4993 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4994 },
4995/* nfstoi$pack $FRj,$FRintk */
4996 {
4997 FRV_INSN_NFSTOI, "nfstoi", "nfstoi", 32,
4998 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
4999 },
5000/* fmovs$pack $FRj,$FRk */
5001 {
5002 FRV_INSN_FMOVS, "fmovs", "fmovs", 32,
5003 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5004 },
5005/* fmovd$pack $FRdoublej,$FRdoublek */
5006 {
5007 FRV_INSN_FMOVD, "fmovd", "fmovd", 32,
5008 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5009 },
5010/* fdmovs$pack $FRj,$FRk */
5011 {
5012 FRV_INSN_FDMOVS, "fdmovs", "fdmovs", 32,
5013 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5014 },
5015/* cfmovs$pack $FRj,$FRk,$CCi,$cond */
5016 {
5017 FRV_INSN_CFMOVS, "cfmovs", "cfmovs", 32,
5018 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5019 },
5020/* fnegs$pack $FRj,$FRk */
5021 {
5022 FRV_INSN_FNEGS, "fnegs", "fnegs", 32,
5023 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5024 },
5025/* fnegd$pack $FRdoublej,$FRdoublek */
5026 {
5027 FRV_INSN_FNEGD, "fnegd", "fnegd", 32,
5028 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5029 },
5030/* fdnegs$pack $FRj,$FRk */
5031 {
5032 FRV_INSN_FDNEGS, "fdnegs", "fdnegs", 32,
5033 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5034 },
5035/* cfnegs$pack $FRj,$FRk,$CCi,$cond */
5036 {
5037 FRV_INSN_CFNEGS, "cfnegs", "cfnegs", 32,
5038 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5039 },
5040/* fabss$pack $FRj,$FRk */
5041 {
5042 FRV_INSN_FABSS, "fabss", "fabss", 32,
5043 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5044 },
5045/* fabsd$pack $FRdoublej,$FRdoublek */
5046 {
5047 FRV_INSN_FABSD, "fabsd", "fabsd", 32,
5048 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5049 },
5050/* fdabss$pack $FRj,$FRk */
5051 {
5052 FRV_INSN_FDABSS, "fdabss", "fdabss", 32,
5053 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5054 },
5055/* cfabss$pack $FRj,$FRk,$CCi,$cond */
5056 {
5057 FRV_INSN_CFABSS, "cfabss", "cfabss", 32,
5058 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
5059 },
5060/* fsqrts$pack $FRj,$FRk */
5061 {
5062 FRV_INSN_FSQRTS, "fsqrts", "fsqrts", 32,
5063 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
5064 },
5065/* fdsqrts$pack $FRj,$FRk */
5066 {
5067 FRV_INSN_FDSQRTS, "fdsqrts", "fdsqrts", 32,
5068 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
5069 },
5070/* nfdsqrts$pack $FRj,$FRk */
5071 {
5072 FRV_INSN_NFDSQRTS, "nfdsqrts", "nfdsqrts", 32,
5073 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
5074 },
5075/* fsqrtd$pack $FRdoublej,$FRdoublek */
5076 {
5077 FRV_INSN_FSQRTD, "fsqrtd", "fsqrtd", 32,
5078 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
5079 },
5080/* cfsqrts$pack $FRj,$FRk,$CCi,$cond */
5081 {
5082 FRV_INSN_CFSQRTS, "cfsqrts", "cfsqrts", 32,
5083 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
5084 },
5085/* nfsqrts$pack $FRj,$FRk */
5086 {
5087 FRV_INSN_NFSQRTS, "nfsqrts", "nfsqrts", 32,
5088 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
5089 },
5090/* fadds$pack $FRi,$FRj,$FRk */
5091 {
5092 FRV_INSN_FADDS, "fadds", "fadds", 32,
5093 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
5094 },
5095/* fsubs$pack $FRi,$FRj,$FRk */
5096 {
5097 FRV_INSN_FSUBS, "fsubs", "fsubs", 32,
5098 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
5099 },
5100/* fmuls$pack $FRi,$FRj,$FRk */
5101 {
5102 FRV_INSN_FMULS, "fmuls", "fmuls", 32,
5103 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_3 } }
5104 },
5105/* fdivs$pack $FRi,$FRj,$FRk */
5106 {
5107 FRV_INSN_FDIVS, "fdivs", "fdivs", 32,
5108 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
5109 },
5110/* faddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5111 {
5112 FRV_INSN_FADDD, "faddd", "faddd", 32,
5113 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
5114 },
5115/* fsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5116 {
5117 FRV_INSN_FSUBD, "fsubd", "fsubd", 32,
5118 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
5119 },
5120/* fmuld$pack $FRdoublei,$FRdoublej,$FRdoublek */
5121 {
5122 FRV_INSN_FMULD, "fmuld", "fmuld", 32,
5123 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_3 } }
5124 },
5125/* fdivd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5126 {
5127 FRV_INSN_FDIVD, "fdivd", "fdivd", 32,
5128 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
5129 },
5130/* cfadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
5131 {
5132 FRV_INSN_CFADDS, "cfadds", "cfadds", 32,
5133 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
5134 },
5135/* cfsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
5136 {
5137 FRV_INSN_CFSUBS, "cfsubs", "cfsubs", 32,
5138 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
5139 },
5140/* cfmuls$pack $FRi,$FRj,$FRk,$CCi,$cond */
5141 {
5142 FRV_INSN_CFMULS, "cfmuls", "cfmuls", 32,
5143 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_3 } }
5144 },
5145/* cfdivs$pack $FRi,$FRj,$FRk,$CCi,$cond */
5146 {
5147 FRV_INSN_CFDIVS, "cfdivs", "cfdivs", 32,
5148 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
5149 },
5150/* nfadds$pack $FRi,$FRj,$FRk */
5151 {
5152 FRV_INSN_NFADDS, "nfadds", "nfadds", 32,
5153 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
5154 },
5155/* nfsubs$pack $FRi,$FRj,$FRk */
5156 {
5157 FRV_INSN_NFSUBS, "nfsubs", "nfsubs", 32,
5158 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
5159 },
5160/* nfmuls$pack $FRi,$FRj,$FRk */
5161 {
5162 FRV_INSN_NFMULS, "nfmuls", "nfmuls", 32,
5163 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_3 } }
5164 },
5165/* nfdivs$pack $FRi,$FRj,$FRk */
5166 {
5167 FRV_INSN_NFDIVS, "nfdivs", "nfdivs", 32,
5168 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
5169 },
5170/* fcmps$pack $FRi,$FRj,$FCCi_2 */
5171 {
5172 FRV_INSN_FCMPS, "fcmps", "fcmps", 32,
5173 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
5174 },
5175/* fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2 */
5176 {
5177 FRV_INSN_FCMPD, "fcmpd", "fcmpd", 32,
5178 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
5179 },
5180/* cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond */
5181 {
5182 FRV_INSN_CFCMPS, "cfcmps", "cfcmps", 32,
5183 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
5184 },
5185/* fdcmps$pack $FRi,$FRj,$FCCi_2 */
5186 {
5187 FRV_INSN_FDCMPS, "fdcmps", "fdcmps", 32,
5188 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
5189 },
5190/* fmadds$pack $FRi,$FRj,$FRk */
5191 {
5192 FRV_INSN_FMADDS, "fmadds", "fmadds", 32,
5193 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5194 },
5195/* fmsubs$pack $FRi,$FRj,$FRk */
5196 {
5197 FRV_INSN_FMSUBS, "fmsubs", "fmsubs", 32,
5198 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5199 },
5200/* fmaddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5201 {
5202 FRV_INSN_FMADDD, "fmaddd", "fmaddd", 32,
5203 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5204 },
5205/* fmsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5206 {
5207 FRV_INSN_FMSUBD, "fmsubd", "fmsubd", 32,
5208 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5209 },
5210/* fdmadds$pack $FRi,$FRj,$FRk */
5211 {
5212 FRV_INSN_FDMADDS, "fdmadds", "fdmadds", 32,
5213 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5214 },
5215/* nfdmadds$pack $FRi,$FRj,$FRk */
5216 {
5217 FRV_INSN_NFDMADDS, "nfdmadds", "nfdmadds", 32,
5218 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5219 },
5220/* cfmadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
5221 {
5222 FRV_INSN_CFMADDS, "cfmadds", "cfmadds", 32,
5223 { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5224 },
5225/* cfmsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
5226 {
5227 FRV_INSN_CFMSUBS, "cfmsubs", "cfmsubs", 32,
5228 { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5229 },
5230/* nfmadds$pack $FRi,$FRj,$FRk */
5231 {
5232 FRV_INSN_NFMADDS, "nfmadds", "nfmadds", 32,
5233 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5234 },
5235/* nfmsubs$pack $FRi,$FRj,$FRk */
5236 {
5237 FRV_INSN_NFMSUBS, "nfmsubs", "nfmsubs", 32,
5238 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5239 },
5240/* fmas$pack $FRi,$FRj,$FRk */
5241 {
5242 FRV_INSN_FMAS, "fmas", "fmas", 32,
5243 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5244 },
5245/* fmss$pack $FRi,$FRj,$FRk */
5246 {
5247 FRV_INSN_FMSS, "fmss", "fmss", 32,
5248 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5249 },
5250/* fdmas$pack $FRi,$FRj,$FRk */
5251 {
5252 FRV_INSN_FDMAS, "fdmas", "fdmas", 32,
5253 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5254 },
5255/* fdmss$pack $FRi,$FRj,$FRk */
5256 {
5257 FRV_INSN_FDMSS, "fdmss", "fdmss", 32,
5258 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5259 },
5260/* nfdmas$pack $FRi,$FRj,$FRk */
5261 {
5262 FRV_INSN_NFDMAS, "nfdmas", "nfdmas", 32,
5263 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5264 },
5265/* nfdmss$pack $FRi,$FRj,$FRk */
5266 {
5267 FRV_INSN_NFDMSS, "nfdmss", "nfdmss", 32,
5268 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5269 },
5270/* cfmas$pack $FRi,$FRj,$FRk,$CCi,$cond */
5271 {
5272 FRV_INSN_CFMAS, "cfmas", "cfmas", 32,
5273 { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5274 },
5275/* cfmss$pack $FRi,$FRj,$FRk,$CCi,$cond */
5276 {
5277 FRV_INSN_CFMSS, "cfmss", "cfmss", 32,
5278 { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5279 },
5280/* fmad$pack $FRi,$FRj,$FRk */
5281 {
5282 FRV_INSN_FMAD, "fmad", "fmad", 32,
5283 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5284 },
5285/* fmsd$pack $FRi,$FRj,$FRk */
5286 {
5287 FRV_INSN_FMSD, "fmsd", "fmsd", 32,
5288 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5289 },
5290/* nfmas$pack $FRi,$FRj,$FRk */
5291 {
5292 FRV_INSN_NFMAS, "nfmas", "nfmas", 32,
5293 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5294 },
5295/* nfmss$pack $FRi,$FRj,$FRk */
5296 {
5297 FRV_INSN_NFMSS, "nfmss", "nfmss", 32,
5298 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
5299 },
5300/* fdadds$pack $FRi,$FRj,$FRk */
5301 {
5302 FRV_INSN_FDADDS, "fdadds", "fdadds", 32,
5303 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
5304 },
5305/* fdsubs$pack $FRi,$FRj,$FRk */
5306 {
5307 FRV_INSN_FDSUBS, "fdsubs", "fdsubs", 32,
5308 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
5309 },
5310/* fdmuls$pack $FRi,$FRj,$FRk */
5311 {
5312 FRV_INSN_FDMULS, "fdmuls", "fdmuls", 32,
5313 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
5314 },
5315/* fddivs$pack $FRi,$FRj,$FRk */
5316 {
5317 FRV_INSN_FDDIVS, "fddivs", "fddivs", 32,
5318 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
5319 },
5320/* fdsads$pack $FRi,$FRj,$FRk */
5321 {
5322 FRV_INSN_FDSADS, "fdsads", "fdsads", 32,
5323 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
5324 },
5325/* fdmulcs$pack $FRi,$FRj,$FRk */
5326 {
5327 FRV_INSN_FDMULCS, "fdmulcs", "fdmulcs", 32,
5328 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
5329 },
5330/* nfdmulcs$pack $FRi,$FRj,$FRk */
5331 {
5332 FRV_INSN_NFDMULCS, "nfdmulcs", "nfdmulcs", 32,
5333 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
5334 },
5335/* nfdadds$pack $FRi,$FRj,$FRk */
5336 {
5337 FRV_INSN_NFDADDS, "nfdadds", "nfdadds", 32,
5338 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
5339 },
5340/* nfdsubs$pack $FRi,$FRj,$FRk */
5341 {
5342 FRV_INSN_NFDSUBS, "nfdsubs", "nfdsubs", 32,
5343 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
5344 },
5345/* nfdmuls$pack $FRi,$FRj,$FRk */
5346 {
5347 FRV_INSN_NFDMULS, "nfdmuls", "nfdmuls", 32,
5348 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
5349 },
5350/* nfddivs$pack $FRi,$FRj,$FRk */
5351 {
5352 FRV_INSN_NFDDIVS, "nfddivs", "nfddivs", 32,
5353 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
5354 },
5355/* nfdsads$pack $FRi,$FRj,$FRk */
5356 {
5357 FRV_INSN_NFDSADS, "nfdsads", "nfdsads", 32,
5358 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
5359 },
5360/* nfdcmps$pack $FRi,$FRj,$FCCi_2 */
5361 {
5362 FRV_INSN_NFDCMPS, "nfdcmps", "nfdcmps", 32,
5363 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
5364 },
5365/* mhsetlos$pack $u12,$FRklo */
5366 {
5367 FRV_INSN_MHSETLOS, "mhsetlos", "mhsetlos", 32,
5368 { 0, { (1<<MACH_FR400), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
5369 },
5370/* mhsethis$pack $u12,$FRkhi */
5371 {
5372 FRV_INSN_MHSETHIS, "mhsethis", "mhsethis", 32,
5373 { 0, { (1<<MACH_FR400), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
5374 },
5375/* mhdsets$pack $u12,$FRintk */
5376 {
5377 FRV_INSN_MHDSETS, "mhdsets", "mhdsets", 32,
5378 { 0, { (1<<MACH_FR400), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
5379 },
5380/* mhsetloh$pack $s5,$FRklo */
5381 {
5382 FRV_INSN_MHSETLOH, "mhsetloh", "mhsetloh", 32,
5383 { 0, { (1<<MACH_FR400), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
5384 },
5385/* mhsethih$pack $s5,$FRkhi */
5386 {
5387 FRV_INSN_MHSETHIH, "mhsethih", "mhsethih", 32,
5388 { 0, { (1<<MACH_FR400), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
5389 },
5390/* mhdseth$pack $s5,$FRintk */
5391 {
5392 FRV_INSN_MHDSETH, "mhdseth", "mhdseth", 32,
5393 { 0, { (1<<MACH_FR400), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
5394 },
5395/* mand$pack $FRinti,$FRintj,$FRintk */
5396 {
5397 FRV_INSN_MAND, "mand", "mand", 32,
5398 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5399 },
5400/* mor$pack $FRinti,$FRintj,$FRintk */
5401 {
5402 FRV_INSN_MOR, "mor", "mor", 32,
5403 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5404 },
5405/* mxor$pack $FRinti,$FRintj,$FRintk */
5406 {
5407 FRV_INSN_MXOR, "mxor", "mxor", 32,
5408 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5409 },
5410/* cmand$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5411 {
5412 FRV_INSN_CMAND, "cmand", "cmand", 32,
5413 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5414 },
5415/* cmor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5416 {
5417 FRV_INSN_CMOR, "cmor", "cmor", 32,
5418 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5419 },
5420/* cmxor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5421 {
5422 FRV_INSN_CMXOR, "cmxor", "cmxor", 32,
5423 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5424 },
5425/* mnot$pack $FRintj,$FRintk */
5426 {
5427 FRV_INSN_MNOT, "mnot", "mnot", 32,
5428 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5429 },
5430/* cmnot$pack $FRintj,$FRintk,$CCi,$cond */
5431 {
5432 FRV_INSN_CMNOT, "cmnot", "cmnot", 32,
5433 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5434 },
5435/* mrotli$pack $FRinti,$u6,$FRintk */
5436 {
5437 FRV_INSN_MROTLI, "mrotli", "mrotli", 32,
5438 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5439 },
5440/* mrotri$pack $FRinti,$u6,$FRintk */
5441 {
5442 FRV_INSN_MROTRI, "mrotri", "mrotri", 32,
5443 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5444 },
5445/* mwcut$pack $FRinti,$FRintj,$FRintk */
5446 {
5447 FRV_INSN_MWCUT, "mwcut", "mwcut", 32,
5448 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
5449 },
5450/* mwcuti$pack $FRinti,$u6,$FRintk */
5451 {
5452 FRV_INSN_MWCUTI, "mwcuti", "mwcuti", 32,
5453 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
5454 },
5455/* mcut$pack $ACC40Si,$FRintj,$FRintk */
5456 {
5457 FRV_INSN_MCUT, "mcut", "mcut", 32,
5458 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5459 },
5460/* mcuti$pack $ACC40Si,$s6,$FRintk */
5461 {
5462 FRV_INSN_MCUTI, "mcuti", "mcuti", 32,
5463 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5464 },
5465/* mcutss$pack $ACC40Si,$FRintj,$FRintk */
5466 {
5467 FRV_INSN_MCUTSS, "mcutss", "mcutss", 32,
5468 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5469 },
5470/* mcutssi$pack $ACC40Si,$s6,$FRintk */
5471 {
5472 FRV_INSN_MCUTSSI, "mcutssi", "mcutssi", 32,
5473 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5474 },
5475/* mdcutssi$pack $ACC40Si,$s6,$FRintk */
5476 {
5477 FRV_INSN_MDCUTSSI, "mdcutssi", "mdcutssi", 32,
5478 { 0, { (1<<MACH_FR400), UNIT_FM0, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
5479 },
5480/* maveh$pack $FRinti,$FRintj,$FRintk */
5481 {
5482 FRV_INSN_MAVEH, "maveh", "maveh", 32,
5483 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5484 },
5485/* msllhi$pack $FRinti,$u6,$FRintk */
5486 {
5487 FRV_INSN_MSLLHI, "msllhi", "msllhi", 32,
5488 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5489 },
5490/* msrlhi$pack $FRinti,$u6,$FRintk */
5491 {
5492 FRV_INSN_MSRLHI, "msrlhi", "msrlhi", 32,
5493 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5494 },
5495/* msrahi$pack $FRinti,$u6,$FRintk */
5496 {
5497 FRV_INSN_MSRAHI, "msrahi", "msrahi", 32,
5498 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5499 },
75798298 5500/* mdrotli$pack $FRinti,$s6,$FRintk */
fd3c93d5
DB		 5501 {
5502 FRV_INSN_MDROTLI, "mdrotli", "mdrotli", 32,
5503 { 0, { (1<<MACH_FR400), UNIT_FM0, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
5504 },
5505/* mcplhi$pack $FRinti,$u6,$FRintk */
5506 {
5507 FRV_INSN_MCPLHI, "mcplhi", "mcplhi", 32,
5508 { 0, { (1<<MACH_FR400), UNIT_FM0, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
5509 },
5510/* mcpli$pack $FRinti,$u6,$FRintk */
5511 {
5512 FRV_INSN_MCPLI, "mcpli", "mcpli", 32,
5513 { 0, { (1<<MACH_FR400), UNIT_FM0, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
5514 },
5515/* msaths$pack $FRinti,$FRintj,$FRintk */
5516 {
5517 FRV_INSN_MSATHS, "msaths", "msaths", 32,
5518 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5519 },
5520/* mqsaths$pack $FRinti,$FRintj,$FRintk */
5521 {
5522 FRV_INSN_MQSATHS, "mqsaths", "mqsaths", 32,
5523 { 0, { (1<<MACH_FR400), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
5524 },
5525/* msathu$pack $FRinti,$FRintj,$FRintk */
5526 {
5527 FRV_INSN_MSATHU, "msathu", "msathu", 32,
5528 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5529 },
5530/* mcmpsh$pack $FRinti,$FRintj,$FCCk */
5531 {
5532 FRV_INSN_MCMPSH, "mcmpsh", "mcmpsh", 32,
5533 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5534 },
5535/* mcmpuh$pack $FRinti,$FRintj,$FCCk */
5536 {
5537 FRV_INSN_MCMPUH, "mcmpuh", "mcmpuh", 32,
5538 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5539 },
5540/* mabshs$pack $FRintj,$FRintk */
5541 {
5542 FRV_INSN_MABSHS, "mabshs", "mabshs", 32,
5543 { 0, { (1<<MACH_FR400), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
5544 },
5545/* maddhss$pack $FRinti,$FRintj,$FRintk */
5546 {
5547 FRV_INSN_MADDHSS, "maddhss", "maddhss", 32,
5548 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5549 },
5550/* maddhus$pack $FRinti,$FRintj,$FRintk */
5551 {
5552 FRV_INSN_MADDHUS, "maddhus", "maddhus", 32,
5553 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5554 },
5555/* msubhss$pack $FRinti,$FRintj,$FRintk */
5556 {
5557 FRV_INSN_MSUBHSS, "msubhss", "msubhss", 32,
5558 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5559 },
5560/* msubhus$pack $FRinti,$FRintj,$FRintk */
5561 {
5562 FRV_INSN_MSUBHUS, "msubhus", "msubhus", 32,
5563 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5564 },
5565/* cmaddhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5566 {
5567 FRV_INSN_CMADDHSS, "cmaddhss", "cmaddhss", 32,
5568 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5569 },
5570/* cmaddhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5571 {
5572 FRV_INSN_CMADDHUS, "cmaddhus", "cmaddhus", 32,
5573 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5574 },
5575/* cmsubhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5576 {
5577 FRV_INSN_CMSUBHSS, "cmsubhss", "cmsubhss", 32,
5578 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5579 },
5580/* cmsubhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5581 {
5582 FRV_INSN_CMSUBHUS, "cmsubhus", "cmsubhus", 32,
5583 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
5584 },
5585/* mqaddhss$pack $FRinti,$FRintj,$FRintk */
5586 {
5587 FRV_INSN_MQADDHSS, "mqaddhss", "mqaddhss", 32,
5588 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
5589 },
5590/* mqaddhus$pack $FRinti,$FRintj,$FRintk */
5591 {
5592 FRV_INSN_MQADDHUS, "mqaddhus", "mqaddhus", 32,
5593 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
5594 },
5595/* mqsubhss$pack $FRinti,$FRintj,$FRintk */
5596 {
5597 FRV_INSN_MQSUBHSS, "mqsubhss", "mqsubhss", 32,
5598 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
5599 },
5600/* mqsubhus$pack $FRinti,$FRintj,$FRintk */
5601 {
5602 FRV_INSN_MQSUBHUS, "mqsubhus", "mqsubhus", 32,
5603 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
5604 },
5605/* cmqaddhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5606 {
5607 FRV_INSN_CMQADDHSS, "cmqaddhss", "cmqaddhss", 32,
5608 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
5609 },
5610/* cmqaddhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5611 {
5612 FRV_INSN_CMQADDHUS, "cmqaddhus", "cmqaddhus", 32,
5613 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
5614 },
5615/* cmqsubhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5616 {
5617 FRV_INSN_CMQSUBHSS, "cmqsubhss", "cmqsubhss", 32,
5618 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
5619 },
5620/* cmqsubhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5621 {
5622 FRV_INSN_CMQSUBHUS, "cmqsubhus", "cmqsubhus", 32,
5623 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
5624 },
5625/* maddaccs$pack $ACC40Si,$ACC40Sk */
5626 {
5627 FRV_INSN_MADDACCS, "maddaccs", "maddaccs", 32,
5628 { 0, { (1<<MACH_FR400), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
5629 },
5630/* msubaccs$pack $ACC40Si,$ACC40Sk */
5631 {
5632 FRV_INSN_MSUBACCS, "msubaccs", "msubaccs", 32,
5633 { 0, { (1<<MACH_FR400), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
5634 },
5635/* mdaddaccs$pack $ACC40Si,$ACC40Sk */
5636 {
5637 FRV_INSN_MDADDACCS, "mdaddaccs", "mdaddaccs", 32,
5638 { 0, { (1<<MACH_FR400), UNIT_FM0, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
5639 },
5640/* mdsubaccs$pack $ACC40Si,$ACC40Sk */
5641 {
5642 FRV_INSN_MDSUBACCS, "mdsubaccs", "mdsubaccs", 32,
5643 { 0, { (1<<MACH_FR400), UNIT_FM0, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
5644 },
5645/* masaccs$pack $ACC40Si,$ACC40Sk */
5646 {
5647 FRV_INSN_MASACCS, "masaccs", "masaccs", 32,
5648 { 0, { (1<<MACH_FR400), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
5649 },
5650/* mdasaccs$pack $ACC40Si,$ACC40Sk */
5651 {
5652 FRV_INSN_MDASACCS, "mdasaccs", "mdasaccs", 32,
5653 { 0, { (1<<MACH_FR400), UNIT_FM0, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
5654 },
5655/* mmulhs$pack $FRinti,$FRintj,$ACC40Sk */
5656 {
5657 FRV_INSN_MMULHS, "mmulhs", "mmulhs", 32,
5658 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5659 },
5660/* mmulhu$pack $FRinti,$FRintj,$ACC40Sk */
5661 {
5662 FRV_INSN_MMULHU, "mmulhu", "mmulhu", 32,
5663 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5664 },
5665/* mmulxhs$pack $FRinti,$FRintj,$ACC40Sk */
5666 {
5667 FRV_INSN_MMULXHS, "mmulxhs", "mmulxhs", 32,
5668 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5669 },
5670/* mmulxhu$pack $FRinti,$FRintj,$ACC40Sk */
5671 {
5672 FRV_INSN_MMULXHU, "mmulxhu", "mmulxhu", 32,
5673 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5674 },
5675/* cmmulhs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5676 {
5677 FRV_INSN_CMMULHS, "cmmulhs", "cmmulhs", 32,
5678 { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5679 },
5680/* cmmulhu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5681 {
5682 FRV_INSN_CMMULHU, "cmmulhu", "cmmulhu", 32,
5683 { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5684 },
5685/* mqmulhs$pack $FRinti,$FRintj,$ACC40Sk */
5686 {
5687 FRV_INSN_MQMULHS, "mqmulhs", "mqmulhs", 32,
5688 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5689 },
5690/* mqmulhu$pack $FRinti,$FRintj,$ACC40Sk */
5691 {
5692 FRV_INSN_MQMULHU, "mqmulhu", "mqmulhu", 32,
5693 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5694 },
5695/* mqmulxhs$pack $FRinti,$FRintj,$ACC40Sk */
5696 {
5697 FRV_INSN_MQMULXHS, "mqmulxhs", "mqmulxhs", 32,
5698 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5699 },
5700/* mqmulxhu$pack $FRinti,$FRintj,$ACC40Sk */
5701 {
5702 FRV_INSN_MQMULXHU, "mqmulxhu", "mqmulxhu", 32,
5703 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5704 },
5705/* cmqmulhs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5706 {
5707 FRV_INSN_CMQMULHS, "cmqmulhs", "cmqmulhs", 32,
5708 { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5709 },
5710/* cmqmulhu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5711 {
5712 FRV_INSN_CMQMULHU, "cmqmulhu", "cmqmulhu", 32,
5713 { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5714 },
5715/* mmachs$pack $FRinti,$FRintj,$ACC40Sk */
5716 {
5717 FRV_INSN_MMACHS, "mmachs", "mmachs", 32,
5718 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5719 },
5720/* mmachu$pack $FRinti,$FRintj,$ACC40Uk */
5721 {
5722 FRV_INSN_MMACHU, "mmachu", "mmachu", 32,
5723 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5724 },
5725/* mmrdhs$pack $FRinti,$FRintj,$ACC40Sk */
5726 {
5727 FRV_INSN_MMRDHS, "mmrdhs", "mmrdhs", 32,
5728 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5729 },
5730/* mmrdhu$pack $FRinti,$FRintj,$ACC40Uk */
5731 {
5732 FRV_INSN_MMRDHU, "mmrdhu", "mmrdhu", 32,
5733 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5734 },
5735/* cmmachs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5736 {
5737 FRV_INSN_CMMACHS, "cmmachs", "cmmachs", 32,
5738 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5739 },
5740/* cmmachu$pack $FRinti,$FRintj,$ACC40Uk,$CCi,$cond */
5741 {
5742 FRV_INSN_CMMACHU, "cmmachu", "cmmachu", 32,
5743 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5744 },
5745/* mqmachs$pack $FRinti,$FRintj,$ACC40Sk */
5746 {
5747 FRV_INSN_MQMACHS, "mqmachs", "mqmachs", 32,
5748 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5749 },
5750/* mqmachu$pack $FRinti,$FRintj,$ACC40Uk */
5751 {
5752 FRV_INSN_MQMACHU, "mqmachu", "mqmachu", 32,
5753 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5754 },
5755/* cmqmachs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5756 {
5757 FRV_INSN_CMQMACHS, "cmqmachs", "cmqmachs", 32,
5758 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5759 },
5760/* cmqmachu$pack $FRinti,$FRintj,$ACC40Uk,$CCi,$cond */
5761 {
5762 FRV_INSN_CMQMACHU, "cmqmachu", "cmqmachu", 32,
5763 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5764 },
5765/* mqxmachs$pack $FRinti,$FRintj,$ACC40Sk */
5766 {
5767 FRV_INSN_MQXMACHS, "mqxmachs", "mqxmachs", 32,
5768 { 0, { (1<<MACH_FR400), UNIT_FM0, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
5769 },
5770/* mqxmacxhs$pack $FRinti,$FRintj,$ACC40Sk */
5771 {
5772 FRV_INSN_MQXMACXHS, "mqxmacxhs", "mqxmacxhs", 32,
5773 { 0, { (1<<MACH_FR400), UNIT_FM0, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
5774 },
5775/* mqmacxhs$pack $FRinti,$FRintj,$ACC40Sk */
5776 {
5777 FRV_INSN_MQMACXHS, "mqmacxhs", "mqmacxhs", 32,
5778 { 0, { (1<<MACH_FR400), UNIT_FM0, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
5779 },
5780/* mcpxrs$pack $FRinti,$FRintj,$ACC40Sk */
5781 {
5782 FRV_INSN_MCPXRS, "mcpxrs", "mcpxrs", 32,
5783 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5784 },
5785/* mcpxru$pack $FRinti,$FRintj,$ACC40Sk */
5786 {
5787 FRV_INSN_MCPXRU, "mcpxru", "mcpxru", 32,
5788 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5789 },
5790/* mcpxis$pack $FRinti,$FRintj,$ACC40Sk */
5791 {
5792 FRV_INSN_MCPXIS, "mcpxis", "mcpxis", 32,
5793 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5794 },
5795/* mcpxiu$pack $FRinti,$FRintj,$ACC40Sk */
5796 {
5797 FRV_INSN_MCPXIU, "mcpxiu", "mcpxiu", 32,
5798 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5799 },
5800/* cmcpxrs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5801 {
5802 FRV_INSN_CMCPXRS, "cmcpxrs", "cmcpxrs", 32,
5803 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5804 },
5805/* cmcpxru$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5806 {
5807 FRV_INSN_CMCPXRU, "cmcpxru", "cmcpxru", 32,
5808 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5809 },
5810/* cmcpxis$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5811 {
5812 FRV_INSN_CMCPXIS, "cmcpxis", "cmcpxis", 32,
5813 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5814 },
5815/* cmcpxiu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5816 {
5817 FRV_INSN_CMCPXIU, "cmcpxiu", "cmcpxiu", 32,
5818 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
5819 },
5820/* mqcpxrs$pack $FRinti,$FRintj,$ACC40Sk */
5821 {
5822 FRV_INSN_MQCPXRS, "mqcpxrs", "mqcpxrs", 32,
5823 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5824 },
5825/* mqcpxru$pack $FRinti,$FRintj,$ACC40Sk */
5826 {
5827 FRV_INSN_MQCPXRU, "mqcpxru", "mqcpxru", 32,
5828 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5829 },
5830/* mqcpxis$pack $FRinti,$FRintj,$ACC40Sk */
5831 {
5832 FRV_INSN_MQCPXIS, "mqcpxis", "mqcpxis", 32,
5833 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5834 },
5835/* mqcpxiu$pack $FRinti,$FRintj,$ACC40Sk */
5836 {
5837 FRV_INSN_MQCPXIU, "mqcpxiu", "mqcpxiu", 32,
5838 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
5839 },
5840/* mexpdhw$pack $FRinti,$u6,$FRintk */
5841 {
5842 FRV_INSN_MEXPDHW, "mexpdhw", "mexpdhw", 32,
5843 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5844 },
5845/* cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond */
5846 {
5847 FRV_INSN_CMEXPDHW, "cmexpdhw", "cmexpdhw", 32,
5848 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5849 },
5850/* mexpdhd$pack $FRinti,$u6,$FRintk */
5851 {
5852 FRV_INSN_MEXPDHD, "mexpdhd", "mexpdhd", 32,
5853 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
5854 },
5855/* cmexpdhd$pack $FRinti,$u6,$FRintk,$CCi,$cond */
5856 {
5857 FRV_INSN_CMEXPDHD, "cmexpdhd", "cmexpdhd", 32,
5858 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
5859 },
5860/* mpackh$pack $FRinti,$FRintj,$FRintk */
5861 {
5862 FRV_INSN_MPACKH, "mpackh", "mpackh", 32,
5863 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5864 },
5865/* mdpackh$pack $FRinti,$FRintj,$FRintk */
5866 {
5867 FRV_INSN_MDPACKH, "mdpackh", "mdpackh", 32,
5868 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_5 } }
5869 },
5870/* munpackh$pack $FRinti,$FRintk */
5871 {
5872 FRV_INSN_MUNPACKH, "munpackh", "munpackh", 32,
5873 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
5874 },
5875/* mdunpackh$pack $FRinti,$FRintk */
5876 {
5877 FRV_INSN_MDUNPACKH, "mdunpackh", "mdunpackh", 32,
5878 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_7 } }
5879 },
5880/* mbtoh$pack $FRintj,$FRintk */
5881 {
5882 FRV_INSN_MBTOH, "mbtoh", "mbtoh", 32,
5883 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
5884 },
5885/* cmbtoh$pack $FRintj,$FRintk,$CCi,$cond */
5886 {
5887 FRV_INSN_CMBTOH, "cmbtoh", "cmbtoh", 32,
5888 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
5889 },
5890/* mhtob$pack $FRintj,$FRintk */
5891 {
5892 FRV_INSN_MHTOB, "mhtob", "mhtob", 32,
5893 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
5894 },
5895/* cmhtob$pack $FRintj,$FRintk,$CCi,$cond */
5896 {
5897 FRV_INSN_CMHTOB, "cmhtob", "cmhtob", 32,
5898 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
5899 },
5900/* mbtohe$pack $FRintj,$FRintk */
5901 {
5902 FRV_INSN_MBTOHE, "mbtohe", "mbtohe", 32,
5903 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_7 } }
5904 },
5905/* cmbtohe$pack $FRintj,$FRintk,$CCi,$cond */
5906 {
5907 FRV_INSN_CMBTOHE, "cmbtohe", "cmbtohe", 32,
5908 { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_7 } }
5909 },
5910/* mclracc$pack $ACC40Sk,$A */
5911 {
5912 FRV_INSN_MCLRACC, "mclracc", "mclracc", 32,
5913 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_3 } }
5914 },
5915/* mrdacc$pack $ACC40Si,$FRintk */
5916 {
5917 FRV_INSN_MRDACC, "mrdacc", "mrdacc", 32,
5918 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5919 },
5920/* mrdaccg$pack $ACCGi,$FRintk */
5921 {
5922 FRV_INSN_MRDACCG, "mrdaccg", "mrdaccg", 32,
5923 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
5924 },
5925/* mwtacc$pack $FRinti,$ACC40Sk */
5926 {
5927 FRV_INSN_MWTACC, "mwtacc", "mwtacc", 32,
5928 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_3 } }
5929 },
5930/* mwtaccg$pack $FRinti,$ACCGk */
5931 {
5932 FRV_INSN_MWTACCG, "mwtaccg", "mwtaccg", 32,
5933 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_3 } }
5934 },
5935/* mcop1$pack $FRi,$FRj,$FRk */
5936 {
5937 FRV_INSN_MCOP1, "mcop1", "mcop1", 32,
5938 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_1 } }
5939 },
5940/* mcop2$pack $FRi,$FRj,$FRk */
5941 {
5942 FRV_INSN_MCOP2, "mcop2", "mcop2", 32,
5943 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_1 } }
5944 },
5945/* fnop$pack */
5946 {
5947 FRV_INSN_FNOP, "fnop", "fnop", 32,
5948 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_8 } }
5949 },
5950};
5951
5952#undef OP
5953#undef A
5954
5955/* Initialize anything needed to be done once, before any cpu_open call. */
5956static void init_tables PARAMS ((void));
5957
5958static void
5959init_tables ()
5960{
5961}
5962
5963static const CGEN_MACH * lookup_mach_via_bfd_name
5964 PARAMS ((const CGEN_MACH *, const char *));
5965static void build_hw_table PARAMS ((CGEN_CPU_TABLE *));
5966static void build_ifield_table PARAMS ((CGEN_CPU_TABLE *));
5967static void build_operand_table PARAMS ((CGEN_CPU_TABLE *));
5968static void build_insn_table PARAMS ((CGEN_CPU_TABLE *));
5969static void frv_cgen_rebuild_tables PARAMS ((CGEN_CPU_TABLE *));
5970
5971/* Subroutine of frv_cgen_cpu_open to look up a mach via its bfd name. */
5972
5973static const CGEN_MACH *
5974lookup_mach_via_bfd_name (table, name)
5975 const CGEN_MACH *table;
5976 const char *name;
5977{
5978 while (table->name)
5979 {
5980 if (strcmp (name, table->bfd_name) == 0)
5981 return table;
5982 ++table;
5983 }
5984 abort ();
5985}
5986
5987/* Subroutine of frv_cgen_cpu_open to build the hardware table. */
5988
5989static void
5990build_hw_table (cd)
5991 CGEN_CPU_TABLE *cd;
5992{
5993 int i;
5994 int machs = cd->machs;
5995 const CGEN_HW_ENTRY *init = & frv_cgen_hw_table[0];
5996 /* MAX_HW is only an upper bound on the number of selected entries.
5997 However each entry is indexed by it's enum so there can be holes in
5998 the table. */
5999 const CGEN_HW_ENTRY **selected =
6000 (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *));
6001
6002 cd->hw_table.init_entries = init;
6003 cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY);
6004 memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *));
6005 /* ??? For now we just use machs to determine which ones we want. */
6006 for (i = 0; init[i].name != NULL; ++i)
6007 if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH)
6008 & machs)
6009 selected[init[i].type] = &init[i];
6010 cd->hw_table.entries = selected;
6011 cd->hw_table.num_entries = MAX_HW;
6012}
6013
6014/* Subroutine of frv_cgen_cpu_open to build the hardware table. */
6015
6016static void
6017build_ifield_table (cd)
6018 CGEN_CPU_TABLE *cd;
6019{
6020 cd->ifld_table = & frv_cgen_ifld_table[0];
6021}
6022
6023/* Subroutine of frv_cgen_cpu_open to build the hardware table. */
6024
6025static void
6026build_operand_table (cd)
6027 CGEN_CPU_TABLE *cd;
6028{
6029 int i;
6030 int machs = cd->machs;
6031 const CGEN_OPERAND *init = & frv_cgen_operand_table[0];
6032 /* MAX_OPERANDS is only an upper bound on the number of selected entries.
6033 However each entry is indexed by it's enum so there can be holes in
6034 the table. */
6035 const CGEN_OPERAND **selected =
6036 (const CGEN_OPERAND **) xmalloc (MAX_OPERANDS * sizeof (CGEN_OPERAND *));
6037
6038 cd->operand_table.init_entries = init;
6039 cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
6040 memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *));
6041 /* ??? For now we just use mach to determine which ones we want. */
6042 for (i = 0; init[i].name != NULL; ++i)
6043 if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH)
6044 & machs)
6045 selected[init[i].type] = &init[i];
6046 cd->operand_table.entries = selected;
6047 cd->operand_table.num_entries = MAX_OPERANDS;
6048}
6049
6050/* Subroutine of frv_cgen_cpu_open to build the hardware table.
6051 ??? This could leave out insns not supported by the specified mach/isa,
6052 but that would cause errors like "foo only supported by bar" to become
6053 "unknown insn", so for now we include all insns and require the app to
6054 do the checking later.
6055 ??? On the other hand, parsing of such insns may require their hardware or
6056 operand elements to be in the table [which they mightn't be]. */
6057
6058static void
6059build_insn_table (cd)
6060 CGEN_CPU_TABLE *cd;
6061{
6062 int i;
6063 const CGEN_IBASE *ib = & frv_cgen_insn_table[0];
6064 CGEN_INSN *insns = (CGEN_INSN *) xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
6065
6066 memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
6067 for (i = 0; i < MAX_INSNS; ++i)
6068 insns[i].base = &ib[i];
6069 cd->insn_table.init_entries = insns;
6070 cd->insn_table.entry_size = sizeof (CGEN_IBASE);
6071 cd->insn_table.num_init_entries = MAX_INSNS;
6072}
6073
6074/* Subroutine of frv_cgen_cpu_open to rebuild the tables. */
6075
6076static void
6077frv_cgen_rebuild_tables (cd)
6078 CGEN_CPU_TABLE *cd;
6079{
6080 int i;
6081 unsigned int isas = cd->isas;
6082 unsigned int machs = cd->machs;
6083
6084 cd->int_insn_p = CGEN_INT_INSN_P;
6085
6086 /* Data derived from the isa spec. */
6087#define UNSET (CGEN_SIZE_UNKNOWN + 1)
6088 cd->default_insn_bitsize = UNSET;
6089 cd->base_insn_bitsize = UNSET;
6090 cd->min_insn_bitsize = 65535; /* some ridiculously big number */
6091 cd->max_insn_bitsize = 0;
6092 for (i = 0; i < MAX_ISAS; ++i)
6093 if (((1 << i) & isas) != 0)
6094 {
6095 const CGEN_ISA *isa = & frv_cgen_isa_table[i];
6096
6097 /* Default insn sizes of all selected isas must be
6098 equal or we set the result to 0, meaning "unknown". */
6099 if (cd->default_insn_bitsize == UNSET)
6100 cd->default_insn_bitsize = isa->default_insn_bitsize;
6101 else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
6102 ; /* this is ok */
6103 else
6104 cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
6105
6106 /* Base insn sizes of all selected isas must be equal
6107 or we set the result to 0, meaning "unknown". */
6108 if (cd->base_insn_bitsize == UNSET)
6109 cd->base_insn_bitsize = isa->base_insn_bitsize;
6110 else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
6111 ; /* this is ok */
6112 else
6113 cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
6114
6115 /* Set min,max insn sizes. */
6116 if (isa->min_insn_bitsize < cd->min_insn_bitsize)
6117 cd->min_insn_bitsize = isa->min_insn_bitsize;
6118 if (isa->max_insn_bitsize > cd->max_insn_bitsize)
6119 cd->max_insn_bitsize = isa->max_insn_bitsize;
6120 }
6121
6122 /* Data derived from the mach spec. */
6123 for (i = 0; i < MAX_MACHS; ++i)
6124 if (((1 << i) & machs) != 0)
6125 {
6126 const CGEN_MACH *mach = & frv_cgen_mach_table[i];
6127
6128 if (mach->insn_chunk_bitsize != 0)
6129 {
6130 if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
6131 {
6132 fprintf (stderr, "frv_cgen_rebuild_tables: conflicting insn-chunk-bitsize values: `%d' vs. `%d'\n",
6133 cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
6134 abort ();
6135 }
6136
6137 cd->insn_chunk_bitsize = mach->insn_chunk_bitsize;
6138 }
6139 }
6140
6141 /* Determine which hw elements are used by MACH. */
6142 build_hw_table (cd);
6143
6144 /* Build the ifield table. */
6145 build_ifield_table (cd);
6146
6147 /* Determine which operands are used by MACH/ISA. */
6148 build_operand_table (cd);
6149
6150 /* Build the instruction table. */
6151 build_insn_table (cd);
6152}
6153
6154/* Initialize a cpu table and return a descriptor.
6155 It's much like opening a file, and must be the first function called.
6156 The arguments are a set of (type/value) pairs, terminated with
6157 CGEN_CPU_OPEN_END.
6158
6159 Currently supported values:
6160 CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr
6161 CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
6162 CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
6163 CGEN_CPU_OPEN_ENDIAN: specify endian choice
6164 CGEN_CPU_OPEN_END: terminates arguments
6165
6166 ??? Simultaneous multiple isas might not make sense, but it's not (yet)
6167 precluded.
6168
6169 ??? We only support ISO C stdargs here, not K&R.
6170 Laziness, plus experiment to see if anything requires K&R - eventually
6171 K&R will no longer be supported - e.g. GDB is currently trying this. */
6172
6173CGEN_CPU_DESC
6174frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
6175{
6176 CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
6177 static int init_p;
6178 unsigned int isas = 0; /* 0 = "unspecified" */
6179 unsigned int machs = 0; /* 0 = "unspecified" */
6180 enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
6181 va_list ap;
6182
6183 if (! init_p)
6184 {
6185 init_tables ();
6186 init_p = 1;
6187 }
6188
6189 memset (cd, 0, sizeof (*cd));
6190
6191 va_start (ap, arg_type);
6192 while (arg_type != CGEN_CPU_OPEN_END)
6193 {
6194 switch (arg_type)
6195 {
6196 case CGEN_CPU_OPEN_ISAS :
6197 isas = va_arg (ap, unsigned int);
6198 break;
6199 case CGEN_CPU_OPEN_MACHS :
6200 machs = va_arg (ap, unsigned int);
6201 break;
6202 case CGEN_CPU_OPEN_BFDMACH :
6203 {
6204 const char *name = va_arg (ap, const char *);
6205 const CGEN_MACH *mach =
6206 lookup_mach_via_bfd_name (frv_cgen_mach_table, name);
6207
6208 machs |= 1 << mach->num;
6209 break;
6210 }
6211 case CGEN_CPU_OPEN_ENDIAN :
6212 endian = va_arg (ap, enum cgen_endian);
6213 break;
6214 default :
6215 fprintf (stderr, "frv_cgen_cpu_open: unsupported argument `%d'\n",
6216 arg_type);
6217 abort (); /* ??? return NULL? */
6218 }
6219 arg_type = va_arg (ap, enum cgen_cpu_open_arg);
6220 }
6221 va_end (ap);
6222
6223 /* mach unspecified means "all" */
6224 if (machs == 0)
6225 machs = (1 << MAX_MACHS) - 1;
6226 /* base mach is always selected */
6227 machs |= 1;
6228 /* isa unspecified means "all" */
6229 if (isas == 0)
6230 isas = (1 << MAX_ISAS) - 1;
6231 if (endian == CGEN_ENDIAN_UNKNOWN)
6232 {
6233 /* ??? If target has only one, could have a default. */
6234 fprintf (stderr, "frv_cgen_cpu_open: no endianness specified\n");
6235 abort ();
6236 }
6237
6238 cd->isas = isas;
6239 cd->machs = machs;
6240 cd->endian = endian;
6241 /* FIXME: for the sparc case we can determine insn-endianness statically.
6242 The worry here is where both data and insn endian can be independently
6243 chosen, in which case this function will need another argument.
6244 Actually, will want to allow for more arguments in the future anyway. */
6245 cd->insn_endian = endian;
6246
6247 /* Table (re)builder. */
6248 cd->rebuild_tables = frv_cgen_rebuild_tables;
6249 frv_cgen_rebuild_tables (cd);
6250
6251 /* Default to not allowing signed overflow. */
6252 cd->signed_overflow_ok_p = 0;
6253
6254 return (CGEN_CPU_DESC) cd;
6255}
6256
6257/* Cover fn to frv_cgen_cpu_open to handle the simple case of 1 isa, 1 mach.
6258 MACH_NAME is the bfd name of the mach. */
6259
6260CGEN_CPU_DESC
6261frv_cgen_cpu_open_1 (mach_name, endian)
6262 const char *mach_name;
6263 enum cgen_endian endian;
6264{
6265 return frv_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
6266 CGEN_CPU_OPEN_ENDIAN, endian,
6267 CGEN_CPU_OPEN_END);
6268}
6269
6270/* Close a cpu table.
6271 ??? This can live in a machine independent file, but there's currently
6272 no place to put this file (there's no libcgen). libopcodes is the wrong
6273 place as some simulator ports use this but they don't use libopcodes. */
6274
6275void
6276frv_cgen_cpu_close (cd)
6277 CGEN_CPU_DESC cd;
6278{
6279 unsigned int i;
98f70fc4 6280 const CGEN_INSN *insns;
fd3c93d5
DB		 6281
6282 if (cd->macro_insn_table.init_entries)
6283 {
6284 insns = cd->macro_insn_table.init_entries;
6285 for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
6286 {
6287 if (CGEN_INSN_RX ((insns)))
98f70fc4 6288 regfree (CGEN_INSN_RX (insns));
fd3c93d5
DB		 6289 }
6290 }
6291
6292 if (cd->insn_table.init_entries)
6293 {
6294 insns = cd->insn_table.init_entries;
6295 for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
6296 {
6297 if (CGEN_INSN_RX (insns))
98f70fc4 6298 regfree (CGEN_INSN_RX (insns));
fd3c93d5
DB		 6299 }
6300 }
6301
6302
6303
6304 if (cd->macro_insn_table.init_entries)
6305 free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
6306
6307 if (cd->insn_table.init_entries)
6308 free ((CGEN_INSN *) cd->insn_table.init_entries);
6309
6310 if (cd->hw_table.entries)
6311 free ((CGEN_HW_ENTRY *) cd->hw_table.entries);
6312
6313 if (cd->operand_table.entries)
6314 free ((CGEN_HW_ENTRY *) cd->operand_table.entries);
6315
6316 free (cd);
6317}
6318
GDB Binutils - Deliverables
This page took 0.39949 seconds and 4 git commands to generate.