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252b5132 RH |
1 | /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c. |
2 | Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc. | |
3 | ||
4 | Contributed by the Center for Software Science at the | |
5 | University of Utah (pa-gdb-bugs@cs.utah.edu). | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include <ansidecl.h> | |
22 | #include "sysdep.h" | |
23 | #include "dis-asm.h" | |
24 | #include "libhppa.h" | |
25 | #include "opcode/hppa.h" | |
26 | ||
27 | /* Integer register names, indexed by the numbers which appear in the | |
28 | opcodes. */ | |
29 | static const char *const reg_names[] = | |
30 | {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9", | |
31 | "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", | |
32 | "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1", | |
33 | "sp", "r31"}; | |
34 | ||
35 | /* Floating point register names, indexed by the numbers which appear in the | |
36 | opcodes. */ | |
37 | static const char *const fp_reg_names[] = | |
38 | {"fpsr", "fpe2", "fpe4", "fpe6", | |
39 | "fr4", "fr5", "fr6", "fr7", "fr8", | |
40 | "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", | |
41 | "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", | |
42 | "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"}; | |
43 | ||
44 | typedef unsigned int CORE_ADDR; | |
45 | ||
46 | /* Get at various relevent fields of an instruction word. */ | |
47 | ||
48 | #define MASK_5 0x1f | |
49 | #define MASK_11 0x7ff | |
50 | #define MASK_14 0x3fff | |
51 | #define MASK_21 0x1fffff | |
52 | ||
53 | /* This macro gets bit fields using HP's numbering (MSB = 0) */ | |
54 | ||
55 | #define GET_FIELD(X, FROM, TO) \ | |
56 | ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1)) | |
57 | ||
58 | /* Some of these have been converted to 2-d arrays because they | |
59 | consume less storage this way. If the maintenance becomes a | |
60 | problem, convert them back to const 1-d pointer arrays. */ | |
61 | static const char control_reg[][6] = { | |
62 | "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", | |
63 | "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4", | |
64 | "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr", | |
65 | "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3", | |
66 | "tr4", "tr5", "tr6", "tr7" | |
67 | }; | |
68 | ||
69 | static const char compare_cond_names[][5] = { | |
b333b6c6 JL |
70 | "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od", |
71 | ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev" | |
72 | }; | |
73 | static const char compare_cond_64_names[][6] = { | |
74 | "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od", | |
75 | ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev" | |
76 | }; | |
77 | static const char cmpib_cond_64_names[][6] = { | |
78 | ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>" | |
252b5132 RH |
79 | }; |
80 | static const char add_cond_names[][5] = { | |
b333b6c6 JL |
81 | "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od", |
82 | ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev" | |
83 | }; | |
84 | static const char add_cond_64_names[][6] = { | |
85 | ",*", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od", | |
86 | ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev" | |
87 | }; | |
88 | static const char wide_add_cond_names[][5] = { | |
89 | "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=", | |
90 | ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>" | |
252b5132 RH |
91 | }; |
92 | static const char *const logical_cond_names[] = { | |
93 | "", ",=", ",<", ",<=", 0, 0, 0, ",od", | |
94 | ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"}; | |
b333b6c6 JL |
95 | static const char *const logical_cond_64_names[] = { |
96 | ",*", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od", | |
97 | ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"}; | |
252b5132 RH |
98 | static const char *const unit_cond_names[] = { |
99 | "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc", | |
100 | ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc" | |
101 | }; | |
b333b6c6 JL |
102 | static const char *const unit_cond_64_names[] = { |
103 | ",*", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc", | |
104 | ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc" | |
105 | }; | |
252b5132 RH |
106 | static const char shift_cond_names[][4] = { |
107 | "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev" | |
108 | }; | |
b333b6c6 JL |
109 | static const char shift_cond_64_names[][5] = { |
110 | ",*", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev" | |
111 | }; | |
112 | static const char bb_cond_64_names[][5] = { | |
113 | ",*<", ",*>=" | |
114 | }; | |
252b5132 RH |
115 | static const char index_compl_names[][4] = {"", ",m", ",s", ",sm"}; |
116 | static const char short_ldst_compl_names[][4] = {"", ",ma", "", ",mb"}; | |
117 | static const char *const short_bytes_compl_names[] = { | |
118 | "", ",b,m", ",e", ",e,m" | |
119 | }; | |
120 | static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"}; | |
121 | static const char float_comp_names[][8] = | |
122 | { | |
123 | ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>", | |
124 | ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>", | |
125 | ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<", | |
126 | ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true" | |
127 | }; | |
1eee34f5 JL |
128 | static const char *const signed_unsigned_names[][3] = {",u", ",s"}; |
129 | static const char *const mix_half_names[][3] = {",l", ",r"}; | |
130 | static const char *const saturation_names[][3] = {",us", ",ss", 0, ""}; | |
131 | ||
252b5132 RH |
132 | |
133 | /* For a bunch of different instructions form an index into a | |
134 | completer name table. */ | |
135 | #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \ | |
136 | GET_FIELD (insn, 18, 18) << 1) | |
137 | ||
138 | #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \ | |
139 | (GET_FIELD ((insn), 19, 19) ? 8 : 0)) | |
140 | ||
141 | /* Utility function to print registers. Put these first, so gcc's function | |
142 | inlining can do its stuff. */ | |
143 | ||
144 | #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR) | |
145 | ||
146 | static void | |
147 | fput_reg (reg, info) | |
148 | unsigned reg; | |
149 | disassemble_info *info; | |
150 | { | |
151 | (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0"); | |
152 | } | |
153 | ||
154 | static void | |
155 | fput_fp_reg (reg, info) | |
156 | unsigned reg; | |
157 | disassemble_info *info; | |
158 | { | |
159 | (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0"); | |
160 | } | |
161 | ||
162 | static void | |
163 | fput_fp_reg_r (reg, info) | |
164 | unsigned reg; | |
165 | disassemble_info *info; | |
166 | { | |
167 | /* Special case floating point exception registers. */ | |
168 | if (reg < 4) | |
169 | (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1); | |
170 | else | |
171 | (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg] | |
172 | : "fr0"); | |
173 | } | |
174 | ||
175 | static void | |
176 | fput_creg (reg, info) | |
177 | unsigned reg; | |
178 | disassemble_info *info; | |
179 | { | |
180 | (*info->fprintf_func) (info->stream, control_reg[reg]); | |
181 | } | |
182 | ||
183 | /* print constants with sign */ | |
184 | ||
185 | static void | |
186 | fput_const (num, info) | |
187 | unsigned num; | |
188 | disassemble_info *info; | |
189 | { | |
190 | if ((int)num < 0) | |
191 | (*info->fprintf_func) (info->stream, "-%x", -(int)num); | |
192 | else | |
193 | (*info->fprintf_func) (info->stream, "%x", num); | |
194 | } | |
195 | ||
196 | /* Routines to extract various sized constants out of hppa | |
197 | instructions. */ | |
198 | ||
199 | /* extract a 3-bit space register number from a be, ble, mtsp or mfsp */ | |
200 | static int | |
201 | extract_3 (word) | |
202 | unsigned word; | |
203 | { | |
204 | return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17); | |
205 | } | |
206 | ||
207 | static int | |
208 | extract_5_load (word) | |
209 | unsigned word; | |
210 | { | |
211 | return low_sign_extend (word >> 16 & MASK_5, 5); | |
212 | } | |
213 | ||
214 | /* extract the immediate field from a st{bhw}s instruction */ | |
215 | static int | |
216 | extract_5_store (word) | |
217 | unsigned word; | |
218 | { | |
219 | return low_sign_extend (word & MASK_5, 5); | |
220 | } | |
221 | ||
222 | /* extract the immediate field from a break instruction */ | |
223 | static unsigned | |
224 | extract_5r_store (word) | |
225 | unsigned word; | |
226 | { | |
227 | return (word & MASK_5); | |
228 | } | |
229 | ||
230 | /* extract the immediate field from a {sr}sm instruction */ | |
231 | static unsigned | |
232 | extract_5R_store (word) | |
233 | unsigned word; | |
234 | { | |
235 | return (word >> 16 & MASK_5); | |
236 | } | |
237 | ||
238 | /* extract the immediate field from a bb instruction */ | |
239 | static unsigned | |
240 | extract_5Q_store (word) | |
241 | unsigned word; | |
242 | { | |
243 | return (word >> 21 & MASK_5); | |
244 | } | |
245 | ||
246 | /* extract an 11 bit immediate field */ | |
247 | static int | |
248 | extract_11 (word) | |
249 | unsigned word; | |
250 | { | |
251 | return low_sign_extend (word & MASK_11, 11); | |
252 | } | |
253 | ||
254 | /* extract a 14 bit immediate field */ | |
255 | static int | |
256 | extract_14 (word) | |
257 | unsigned word; | |
258 | { | |
259 | return low_sign_extend (word & MASK_14, 14); | |
260 | } | |
261 | ||
262 | /* extract a 21 bit constant */ | |
263 | ||
264 | static int | |
265 | extract_21 (word) | |
266 | unsigned word; | |
267 | { | |
268 | int val; | |
269 | ||
270 | word &= MASK_21; | |
271 | word <<= 11; | |
272 | val = GET_FIELD (word, 20, 20); | |
273 | val <<= 11; | |
274 | val |= GET_FIELD (word, 9, 19); | |
275 | val <<= 2; | |
276 | val |= GET_FIELD (word, 5, 6); | |
277 | val <<= 5; | |
278 | val |= GET_FIELD (word, 0, 4); | |
279 | val <<= 2; | |
280 | val |= GET_FIELD (word, 7, 8); | |
281 | return sign_extend (val, 21) << 11; | |
282 | } | |
283 | ||
284 | /* extract a 12 bit constant from branch instructions */ | |
285 | ||
286 | static int | |
287 | extract_12 (word) | |
288 | unsigned word; | |
289 | { | |
290 | return sign_extend (GET_FIELD (word, 19, 28) | | |
291 | GET_FIELD (word, 29, 29) << 10 | | |
292 | (word & 0x1) << 11, 12) << 2; | |
293 | } | |
294 | ||
295 | /* extract a 17 bit constant from branch instructions, returning the | |
296 | 19 bit signed value. */ | |
297 | ||
298 | static int | |
299 | extract_17 (word) | |
300 | unsigned word; | |
301 | { | |
302 | return sign_extend (GET_FIELD (word, 19, 28) | | |
303 | GET_FIELD (word, 29, 29) << 10 | | |
304 | GET_FIELD (word, 11, 15) << 11 | | |
305 | (word & 0x1) << 16, 17) << 2; | |
306 | } | |
307 | ||
308 | /* Print one instruction. */ | |
309 | int | |
310 | print_insn_hppa (memaddr, info) | |
311 | bfd_vma memaddr; | |
312 | disassemble_info *info; | |
313 | { | |
314 | bfd_byte buffer[4]; | |
315 | unsigned int insn, i; | |
316 | ||
317 | { | |
318 | int status = | |
319 | (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info); | |
320 | if (status != 0) | |
321 | { | |
322 | (*info->memory_error_func) (status, memaddr, info); | |
323 | return -1; | |
324 | } | |
325 | } | |
326 | ||
327 | insn = bfd_getb32 (buffer); | |
328 | ||
329 | for (i = 0; i < NUMOPCODES; ++i) | |
330 | { | |
331 | const struct pa_opcode *opcode = &pa_opcodes[i]; | |
332 | if ((insn & opcode->mask) == opcode->match) | |
333 | { | |
334 | register const char *s; | |
335 | ||
336 | (*info->fprintf_func) (info->stream, "%s", opcode->name); | |
337 | ||
feb12992 | 338 | if (!strchr ("cfCY?-+nHNZFIu", opcode->args[0])) |
252b5132 RH |
339 | (*info->fprintf_func) (info->stream, " "); |
340 | for (s = opcode->args; *s != '\0'; ++s) | |
341 | { | |
342 | switch (*s) | |
343 | { | |
344 | case 'x': | |
345 | fput_reg (GET_FIELD (insn, 11, 15), info); | |
346 | break; | |
347 | case 'X': | |
348 | if (GET_FIELD (insn, 25, 25)) | |
349 | fput_fp_reg_r (GET_FIELD (insn, 11, 15), info); | |
350 | else | |
351 | fput_fp_reg (GET_FIELD (insn, 11, 15), info); | |
352 | break; | |
1eee34f5 | 353 | case 'a': |
252b5132 RH |
354 | case 'b': |
355 | fput_reg (GET_FIELD (insn, 6, 10), info); | |
356 | break; | |
357 | case '^': | |
358 | fput_creg (GET_FIELD (insn, 6, 10), info); | |
359 | break; | |
360 | case 'E': | |
3ea80b33 | 361 | fput_fp_reg (GET_FIELD (insn, 6, 10), info); |
25ef477f | 362 | break; |
252b5132 RH |
363 | case 't': |
364 | fput_reg (GET_FIELD (insn, 27, 31), info); | |
365 | break; | |
366 | case 'v': | |
367 | if (GET_FIELD (insn, 25, 25)) | |
368 | fput_fp_reg_r (GET_FIELD (insn, 27, 31), info); | |
369 | else | |
370 | fput_fp_reg (GET_FIELD (insn, 27, 31), info); | |
371 | break; | |
372 | case 'y': | |
373 | fput_fp_reg (GET_FIELD (insn, 27, 31), info); | |
374 | break; | |
375 | case '4': | |
376 | { | |
377 | int reg = GET_FIELD (insn, 6, 10); | |
378 | ||
379 | reg |= (GET_FIELD (insn, 26, 26) << 4); | |
380 | fput_fp_reg (reg, info); | |
381 | break; | |
382 | } | |
383 | case '6': | |
384 | { | |
385 | int reg = GET_FIELD (insn, 11, 15); | |
386 | ||
387 | reg |= (GET_FIELD (insn, 26, 26) << 4); | |
388 | fput_fp_reg (reg, info); | |
389 | break; | |
390 | } | |
391 | case '7': | |
392 | { | |
393 | int reg = GET_FIELD (insn, 27, 31); | |
394 | ||
395 | reg |= (GET_FIELD (insn, 26, 26) << 4); | |
396 | fput_fp_reg (reg, info); | |
397 | break; | |
398 | } | |
399 | case '8': | |
400 | { | |
401 | int reg = GET_FIELD (insn, 16, 20); | |
402 | ||
403 | reg |= (GET_FIELD (insn, 26, 26) << 4); | |
404 | fput_fp_reg (reg, info); | |
405 | break; | |
406 | } | |
407 | case '9': | |
408 | { | |
409 | int reg = GET_FIELD (insn, 21, 25); | |
410 | ||
411 | reg |= (GET_FIELD (insn, 26, 26) << 4); | |
412 | fput_fp_reg (reg, info); | |
413 | break; | |
414 | } | |
415 | case '5': | |
416 | fput_const (extract_5_load (insn), info); | |
417 | break; | |
418 | case 's': | |
419 | (*info->fprintf_func) (info->stream, | |
420 | "sr%d", GET_FIELD (insn, 16, 17)); | |
421 | break; | |
b333b6c6 | 422 | |
252b5132 RH |
423 | case 'S': |
424 | (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn)); | |
425 | break; | |
3281117a JL |
426 | |
427 | /* Handle completers. */ | |
252b5132 | 428 | case 'c': |
3281117a JL |
429 | switch (*++s) |
430 | { | |
431 | case 'x': | |
432 | (*info->fprintf_func) (info->stream, "%s ", | |
433 | index_compl_names[GET_COMPL (insn)]); | |
434 | break; | |
435 | case 'm': | |
436 | (*info->fprintf_func) (info->stream, "%s ", | |
437 | short_ldst_compl_names[GET_COMPL (insn)]); | |
438 | break; | |
439 | case 's': | |
440 | (*info->fprintf_func) (info->stream, "%s ", | |
441 | short_bytes_compl_names[GET_COMPL (insn)]); | |
442 | break; | |
443 | case 'Z': | |
444 | if (GET_FIELD (insn, 26, 26)) | |
445 | (*info->fprintf_func) (info->stream, ",m "); | |
446 | else | |
447 | (*info->fprintf_func) (info->stream, " "); | |
448 | break; | |
1eee34f5 JL |
449 | case 'S': |
450 | /* EXTRD/W has a following condition. */ | |
451 | if (*(s + 1) == '?') | |
452 | (*info->fprintf_func) | |
453 | (info->stream, "%s", signed_unsigned_names[GET_FIELD | |
454 | (insn, 21, 21)]); | |
455 | else | |
456 | (*info->fprintf_func) | |
457 | (info->stream, "%s ", signed_unsigned_names[GET_FIELD | |
458 | (insn, 21, 21)]); | |
459 | break; | |
460 | case 'h': | |
461 | (*info->fprintf_func) | |
462 | (info->stream, "%s", mix_half_names[GET_FIELD | |
463 | (insn, 17, 17)]); | |
464 | break; | |
465 | case 'H': | |
466 | (*info->fprintf_func) | |
467 | (info->stream, "%s", saturation_names[GET_FIELD | |
468 | (insn, 24, 25)]); | |
469 | break; | |
470 | case '*': | |
471 | (*info->fprintf_func) | |
472 | (info->stream, ",%d%d%d%d ", | |
473 | GET_FIELD (insn, 17, 18), GET_FIELD (insn, 20, 21), | |
474 | GET_FIELD (insn, 22, 23), GET_FIELD (insn, 24, 25)); | |
475 | break; | |
3281117a | 476 | } |
252b5132 | 477 | break; |
feb12992 JL |
478 | |
479 | /* Handle conditions. */ | |
252b5132 | 480 | case '?': |
feb12992 JL |
481 | { |
482 | s++; | |
483 | switch (*s) | |
484 | { | |
485 | case 'f': | |
486 | (*info->fprintf_func) (info->stream, "%s ", | |
487 | float_comp_names[GET_FIELD | |
488 | (insn, 27, 31)]); | |
489 | break; | |
490 | ||
491 | /* these four conditions are for the set of instructions | |
492 | which distinguish true/false conditions by opcode | |
493 | rather than by the 'f' bit (sigh): comb, comib, | |
494 | addb, addib */ | |
495 | case 't': | |
496 | fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, | |
497 | 18)], | |
498 | info); | |
499 | break; | |
b333b6c6 JL |
500 | case 'T': |
501 | fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18) | |
502 | + 8], info); | |
503 | break; | |
504 | case 'r': | |
505 | fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)], | |
506 | info); | |
507 | break; | |
508 | case 'R': | |
509 | fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18) | |
510 | + 8], info); | |
511 | break; | |
512 | case 'Q': | |
513 | fputs_filtered (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)], | |
514 | info); | |
515 | break; | |
feb12992 JL |
516 | case 'n': |
517 | fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, | |
518 | 18) | |
519 | + GET_FIELD (insn, 4, 4) * 8], info); | |
520 | break; | |
521 | case '@': | |
522 | fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18) | |
523 | + GET_FIELD (insn, 4, 4) * 8], info); | |
524 | break; | |
525 | case 's': | |
526 | (*info->fprintf_func) (info->stream, "%s ", | |
527 | compare_cond_names[GET_COND (insn)]); | |
528 | break; | |
b333b6c6 JL |
529 | case 'S': |
530 | (*info->fprintf_func) (info->stream, "%s ", | |
531 | compare_cond_64_names[GET_COND (insn)]); | |
532 | break; | |
feb12992 JL |
533 | case 'a': |
534 | (*info->fprintf_func) (info->stream, "%s ", | |
535 | add_cond_names[GET_COND (insn)]); | |
536 | break; | |
b333b6c6 JL |
537 | case 'A': |
538 | (*info->fprintf_func) (info->stream, "%s ", | |
539 | add_cond_64_names[GET_COND (insn)]); | |
540 | break; | |
feb12992 JL |
541 | case 'd': |
542 | (*info->fprintf_func) (info->stream, "%s", | |
543 | add_cond_names[GET_FIELD (insn, | |
544 | 16, | |
545 | 18)]); | |
546 | break; | |
b333b6c6 JL |
547 | case 'D': |
548 | (*info->fprintf_func) (info->stream, "%s", | |
549 | add_cond_names[GET_FIELD (insn, | |
550 | 16, 18) | |
551 | + 8]); | |
552 | break; | |
553 | case 'w': | |
554 | (*info->fprintf_func) | |
555 | (info->stream, "%s", | |
556 | wide_add_cond_names[GET_FIELD (insn, 16, 18)]); | |
557 | break; | |
558 | ||
559 | case 'W': | |
560 | (*info->fprintf_func) | |
561 | (info->stream, "%s", | |
562 | wide_add_cond_names[GET_FIELD (insn, 16, 18) + 8]); | |
563 | break; | |
feb12992 JL |
564 | |
565 | case 'l': | |
566 | (*info->fprintf_func) (info->stream, "%s ", | |
567 | logical_cond_names[GET_COND (insn)]); | |
568 | break; | |
b333b6c6 JL |
569 | case 'L': |
570 | (*info->fprintf_func) (info->stream, "%s ", | |
571 | logical_cond_64_names[GET_COND (insn)]); | |
572 | break; | |
feb12992 JL |
573 | case 'u': |
574 | (*info->fprintf_func) (info->stream, "%s ", | |
575 | unit_cond_names[GET_COND (insn)]); | |
576 | break; | |
b333b6c6 JL |
577 | case 'U': |
578 | (*info->fprintf_func) (info->stream, "%s ", | |
579 | unit_cond_64_names[GET_COND (insn)]); | |
580 | break; | |
feb12992 JL |
581 | case 'y': |
582 | case 'x': | |
583 | case 'b': | |
584 | (*info->fprintf_func) | |
585 | (info->stream, "%s", | |
586 | shift_cond_names[GET_FIELD (insn, 16, 18)]); | |
587 | ||
588 | /* If the next character in args is 'n', it will handle | |
589 | putting out the space. */ | |
590 | if (s[1] != 'n') | |
591 | (*info->fprintf_func) (info->stream, " "); | |
592 | break; | |
b333b6c6 JL |
593 | case 'X': |
594 | (*info->fprintf_func) (info->stream, "%s", | |
595 | shift_cond_64_names[GET_FIELD (insn, 16, 18)]); | |
596 | break; | |
597 | case 'B': | |
598 | (*info->fprintf_func) | |
599 | (info->stream, "%s", | |
600 | bb_cond_64_names[GET_FIELD (insn, 16, 16)]); | |
feb12992 | 601 | |
b333b6c6 JL |
602 | /* If the next character in args is 'n', it will handle |
603 | putting out the space. */ | |
604 | if (s[1] != 'n') | |
605 | (*info->fprintf_func) (info->stream, " "); | |
606 | break; | |
feb12992 JL |
607 | } |
608 | break; | |
609 | } | |
252b5132 | 610 | |
252b5132 RH |
611 | case 'V': |
612 | fput_const (extract_5_store (insn), info); | |
613 | break; | |
614 | case 'r': | |
615 | fput_const (extract_5r_store (insn), info); | |
616 | break; | |
617 | case 'R': | |
618 | fput_const (extract_5R_store (insn), info); | |
619 | break; | |
620 | case 'Q': | |
621 | fput_const (extract_5Q_store (insn), info); | |
622 | break; | |
623 | case 'i': | |
624 | fput_const (extract_11 (insn), info); | |
625 | break; | |
626 | case 'j': | |
627 | fput_const (extract_14 (insn), info); | |
628 | break; | |
629 | case 'k': | |
630 | fput_const (extract_21 (insn), info); | |
631 | break; | |
632 | case 'n': | |
633 | if (insn & 0x2) | |
634 | (*info->fprintf_func) (info->stream, ",n "); | |
635 | else | |
636 | (*info->fprintf_func) (info->stream, " "); | |
637 | break; | |
638 | case 'N': | |
639 | if ((insn & 0x20) && s[1]) | |
640 | (*info->fprintf_func) (info->stream, ",n "); | |
641 | else if (insn & 0x20) | |
642 | (*info->fprintf_func) (info->stream, ",n"); | |
643 | else if (s[1]) | |
644 | (*info->fprintf_func) (info->stream, " "); | |
645 | break; | |
646 | case 'w': | |
647 | (*info->print_address_func) (memaddr + 8 + extract_12 (insn), | |
648 | info); | |
649 | break; | |
650 | case 'W': | |
651 | /* 17 bit PC-relative branch. */ | |
652 | (*info->print_address_func) ((memaddr + 8 | |
653 | + extract_17 (insn)), | |
654 | info); | |
655 | break; | |
656 | case 'z': | |
657 | /* 17 bit displacement. This is an offset from a register | |
658 | so it gets disasssembled as just a number, not any sort | |
659 | of address. */ | |
660 | fput_const (extract_17 (insn), info); | |
661 | break; | |
46424e05 JL |
662 | case '.': |
663 | (*info->fprintf_func) (info->stream, "%d", | |
664 | GET_FIELD (insn, 24, 25)); | |
665 | break; | |
b7d6d485 JL |
666 | case '!': |
667 | (*info->fprintf_func) (info->stream, "%sar"); | |
668 | break; | |
252b5132 RH |
669 | case 'p': |
670 | (*info->fprintf_func) (info->stream, "%d", | |
671 | 31 - GET_FIELD (insn, 22, 26)); | |
672 | break; | |
46424e05 JL |
673 | case '~': |
674 | { | |
675 | int num; | |
676 | num = GET_FIELD (insn, 20, 20) << 5; | |
677 | num |= GET_FIELD (insn, 22, 26); | |
678 | (*info->fprintf_func) (info->stream, "%d", 63 - num); | |
679 | break; | |
680 | } | |
252b5132 RH |
681 | case 'P': |
682 | (*info->fprintf_func) (info->stream, "%d", | |
683 | GET_FIELD (insn, 22, 26)); | |
684 | break; | |
685 | case 'T': | |
686 | (*info->fprintf_func) (info->stream, "%d", | |
687 | 32 - GET_FIELD (insn, 27, 31)); | |
688 | break; | |
46424e05 JL |
689 | case '$': |
690 | fput_const (GET_FIELD (insn, 20, 28), info); | |
691 | break; | |
252b5132 RH |
692 | case 'A': |
693 | fput_const (GET_FIELD (insn, 6, 18), info); | |
694 | break; | |
252b5132 RH |
695 | case 'D': |
696 | fput_const (GET_FIELD (insn, 6, 31), info); | |
697 | break; | |
698 | case 'f': | |
699 | (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25)); | |
700 | break; | |
701 | case 'O': | |
702 | fput_const ((GET_FIELD (insn, 6,20) << 5 | | |
703 | GET_FIELD (insn, 27, 31)), info); | |
704 | break; | |
705 | case 'o': | |
706 | fput_const (GET_FIELD (insn, 6, 20), info); | |
707 | break; | |
708 | case '3': | |
709 | { | |
710 | int reg = GET_FIELD (insn, 21, 22); | |
711 | reg |= GET_FIELD (insn, 16, 18) << 2; | |
712 | if (GET_FIELD (insn, 23, 23) != 0) | |
713 | fput_fp_reg_r (reg, info); | |
714 | else | |
715 | fput_fp_reg (reg, info); | |
716 | break; | |
717 | } | |
718 | ||
719 | case '2': | |
720 | fput_const ((GET_FIELD (insn, 6, 22) << 5 | | |
721 | GET_FIELD (insn, 27, 31)), info); | |
722 | break; | |
723 | case '1': | |
724 | fput_const ((GET_FIELD (insn, 11, 20) << 5 | | |
725 | GET_FIELD (insn, 27, 31)), info); | |
726 | break; | |
727 | case '0': | |
728 | fput_const ((GET_FIELD (insn, 16, 20) << 5 | | |
729 | GET_FIELD (insn, 27, 31)), info); | |
730 | break; | |
731 | case 'u': | |
732 | (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25)); | |
733 | break; | |
734 | case 'F': | |
735 | /* if no destination completer and not before a completer | |
736 | for fcmp, need a space here */ | |
4f312591 | 737 | if (s[1] == 'G' || s[1] == '?') |
252b5132 RH |
738 | fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)], |
739 | info); | |
740 | else | |
741 | (*info->fprintf_func) (info->stream, "%s ", | |
742 | float_format_names[GET_FIELD | |
743 | (insn, 19, 20)]); | |
744 | break; | |
745 | case 'G': | |
746 | (*info->fprintf_func) (info->stream, "%s ", | |
747 | float_format_names[GET_FIELD (insn, | |
748 | 17, 18)]); | |
749 | break; | |
750 | case 'H': | |
751 | if (GET_FIELD (insn, 26, 26) == 1) | |
752 | (*info->fprintf_func) (info->stream, "%s ", | |
753 | float_format_names[0]); | |
754 | else | |
755 | (*info->fprintf_func) (info->stream, "%s ", | |
756 | float_format_names[1]); | |
757 | break; | |
758 | case 'I': | |
759 | /* if no destination completer and not before a completer | |
760 | for fcmp, need a space here */ | |
4f312591 | 761 | if (s[1] == '?') |
252b5132 RH |
762 | fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)], |
763 | info); | |
764 | else | |
765 | (*info->fprintf_func) (info->stream, "%s ", | |
766 | float_format_names[GET_FIELD | |
767 | (insn, 20, 20)]); | |
768 | break; | |
769 | case 'J': | |
770 | if (GET_FIELD (insn, 24, 24)) | |
771 | fput_fp_reg_r (GET_FIELD (insn, 6, 10), info); | |
772 | else | |
773 | fput_fp_reg (GET_FIELD (insn, 6, 10), info); | |
774 | ||
775 | break; | |
776 | case 'K': | |
777 | if (GET_FIELD (insn, 19, 19)) | |
778 | fput_fp_reg_r (GET_FIELD (insn, 11, 15), info); | |
779 | else | |
780 | fput_fp_reg (GET_FIELD (insn, 11, 15), info); | |
781 | break; | |
252b5132 RH |
782 | default: |
783 | (*info->fprintf_func) (info->stream, "%c", *s); | |
784 | break; | |
785 | } | |
786 | } | |
787 | return sizeof(insn); | |
788 | } | |
789 | } | |
790 | (*info->fprintf_func) (info->stream, "#%8x", insn); | |
791 | return sizeof(insn); | |
792 | } |