projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
* emulparms/elf64hppa.sh (OTHER_READONLY_SYMBOLS): Remove ".stubs",
[deliverable/binutils-gdb.git] / opcodes / hppa-dis.c
CommitLineData
252b5132
RH		 1/* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
3
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include <ansidecl.h>
22#include "sysdep.h"
23#include "dis-asm.h"
24#include "libhppa.h"
25#include "opcode/hppa.h"
26
27/* Integer register names, indexed by the numbers which appear in the
28 opcodes. */
29static const char *const reg_names[] =
30 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
31 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
32 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
33 "sp", "r31"};
34
35/* Floating point register names, indexed by the numbers which appear in the
36 opcodes. */
37static const char *const fp_reg_names[] =
38 {"fpsr", "fpe2", "fpe4", "fpe6",
39 "fr4", "fr5", "fr6", "fr7", "fr8",
40 "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
41 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
42 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
43
44typedef unsigned int CORE_ADDR;
45
46/* Get at various relevent fields of an instruction word. */
47
48#define MASK_5 0x1f
3b67cf2b 49#define MASK_10 0x3ff
252b5132
RH		 50#define MASK_11 0x7ff
51#define MASK_14 0x3fff
52#define MASK_21 0x1fffff
53
54/* This macro gets bit fields using HP's numbering (MSB = 0) */
55
56#define GET_FIELD(X, FROM, TO) \
57 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
58
59/* Some of these have been converted to 2-d arrays because they
60 consume less storage this way. If the maintenance becomes a
61 problem, convert them back to const 1-d pointer arrays. */
62static const char control_reg[][6] = {
63 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
64 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
65 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
66 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
67 "tr4", "tr5", "tr6", "tr7"
68};
69
70static const char compare_cond_names[][5] = {
b333b6c6
JL		 71 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od",
72 ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev"
73};
74static const char compare_cond_64_names[][6] = {
75 "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od",
76 ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev"
77};
78static const char cmpib_cond_64_names[][6] = {
79 ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>"
252b5132
RH		 80};
81static const char add_cond_names[][5] = {
b333b6c6
JL		 82 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od",
83 ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev"
84};
85static const char add_cond_64_names[][6] = {
d1e9bd1f 86 "", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od",
b333b6c6
JL		 87 ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev"
88};
89static const char wide_add_cond_names[][5] = {
90 "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=",
91 ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>"
252b5132
RH		 92};
93static const char *const logical_cond_names[] = {
94 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
95 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
b333b6c6 96static const char *const logical_cond_64_names[] = {
d1e9bd1f 97 "", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
b333b6c6 98 ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
252b5132
RH		 99static const char *const unit_cond_names[] = {
100 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
101 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
102};
b333b6c6 103static const char *const unit_cond_64_names[] = {
d1e9bd1f 104 "", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
b333b6c6
JL		 105 ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc"
106};
252b5132
RH		 107static const char shift_cond_names[][4] = {
108 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
109};
b333b6c6 110static const char shift_cond_64_names[][5] = {
d1e9bd1f 111 "", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
b333b6c6
JL		 112};
113static const char bb_cond_64_names[][5] = {
114 ",*<", ",*>="
115};
252b5132
RH		 116static const char index_compl_names[][4] = {"", ",m", ",s", ",sm"};
117static const char short_ldst_compl_names[][4] = {"", ",ma", "", ",mb"};
118static const char *const short_bytes_compl_names[] = {
119 "", ",b,m", ",e", ",e,m"
120};
121static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"};
122static const char float_comp_names[][8] =
123{
124 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
125 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
126 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
127 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
128};
1eee34f5
JL		 129static const char *const signed_unsigned_names[][3] = {",u", ",s"};
130static const char *const mix_half_names[][3] = {",l", ",r"};
3b67cf2b
JL		 131static const char *const saturation_names[][4] = {",us", ",ss", 0, ""};
132static const char *const read_write_names[][3] = {",r", ",w"};
133static const char *const add_compl_names[] = {
134 0, "", ",l", ",tsv"
135};
252b5132
RH		 136
137/* For a bunch of different instructions form an index into a
138 completer name table. */
139#define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
140 GET_FIELD (insn, 18, 18) << 1)
141
142#define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
143 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
144
145/* Utility function to print registers. Put these first, so gcc's function
146 inlining can do its stuff. */
147
148#define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
149
150static void
151fput_reg (reg, info)
152 unsigned reg;
153 disassemble_info *info;
154{
155 (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
156}
157
158static void
159fput_fp_reg (reg, info)
160 unsigned reg;
161 disassemble_info *info;
162{
163 (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
164}
165
166static void
167fput_fp_reg_r (reg, info)
168 unsigned reg;
169 disassemble_info *info;
170{
171 /* Special case floating point exception registers. */
172 if (reg < 4)
173 (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1);
174 else
175 (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg]
176 : "fr0");
177}
178
179static void
180fput_creg (reg, info)
181 unsigned reg;
182 disassemble_info *info;
183{
184 (*info->fprintf_func) (info->stream, control_reg[reg]);
185}
186
187/* print constants with sign */
188
189static void
190fput_const (num, info)
191 unsigned num;
192 disassemble_info *info;
193{
194 if ((int)num < 0)
195 (*info->fprintf_func) (info->stream, "-%x", -(int)num);
196 else
197 (*info->fprintf_func) (info->stream, "%x", num);
198}
199
200/* Routines to extract various sized constants out of hppa
201 instructions. */
202
203/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
204static int
205extract_3 (word)
206 unsigned word;
207{
208 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
209}
210
211static int
212extract_5_load (word)
213 unsigned word;
214{
215 return low_sign_extend (word >> 16 & MASK_5, 5);
216}
217
218/* extract the immediate field from a st{bhw}s instruction */
219static int
220extract_5_store (word)
221 unsigned word;
222{
223 return low_sign_extend (word & MASK_5, 5);
224}
225
226/* extract the immediate field from a break instruction */
227static unsigned
228extract_5r_store (word)
229 unsigned word;
230{
231 return (word & MASK_5);
232}
233
234/* extract the immediate field from a {sr}sm instruction */
235static unsigned
236extract_5R_store (word)
237 unsigned word;
238{
239 return (word >> 16 & MASK_5);
240}
241
3b67cf2b
JL		 242/* extract the 10 bit immediate field from a {sr}sm instruction */
243static unsigned
244extract_10U_store (word)
245 unsigned word;
246{
247 return (word >> 16 & MASK_10);
248}
249
252b5132
RH		 250/* extract the immediate field from a bb instruction */
251static unsigned
252extract_5Q_store (word)
253 unsigned word;
254{
255 return (word >> 21 & MASK_5);
256}
257
258/* extract an 11 bit immediate field */
259static int
260extract_11 (word)
261 unsigned word;
262{
263 return low_sign_extend (word & MASK_11, 11);
264}
265
266/* extract a 14 bit immediate field */
267static int
268extract_14 (word)
269 unsigned word;
270{
271 return low_sign_extend (word & MASK_14, 14);
272}
273
274/* extract a 21 bit constant */
275
276static int
277extract_21 (word)
278 unsigned word;
279{
280 int val;
281
282 word &= MASK_21;
283 word <<= 11;
284 val = GET_FIELD (word, 20, 20);
285 val <<= 11;
286 val |= GET_FIELD (word, 9, 19);
287 val <<= 2;
288 val |= GET_FIELD (word, 5, 6);
289 val <<= 5;
290 val |= GET_FIELD (word, 0, 4);
291 val <<= 2;
292 val |= GET_FIELD (word, 7, 8);
293 return sign_extend (val, 21) << 11;
294}
295
296/* extract a 12 bit constant from branch instructions */
297
298static int
299extract_12 (word)
300 unsigned word;
301{
302 return sign_extend (GET_FIELD (word, 19, 28) |
303 GET_FIELD (word, 29, 29) << 10 |
304 (word & 0x1) << 11, 12) << 2;
305}
306
307/* extract a 17 bit constant from branch instructions, returning the
308 19 bit signed value. */
309
310static int
311extract_17 (word)
312 unsigned word;
313{
314 return sign_extend (GET_FIELD (word, 19, 28) |
315 GET_FIELD (word, 29, 29) << 10 |
316 GET_FIELD (word, 11, 15) << 11 |
317 (word & 0x1) << 16, 17) << 2;
318}
319
320/* Print one instruction. */
321int
322print_insn_hppa (memaddr, info)
323 bfd_vma memaddr;
324 disassemble_info *info;
325{
326 bfd_byte buffer[4];
327 unsigned int insn, i;
328
329 {
330 int status =
331 (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info);
332 if (status != 0)
333 {
334 (*info->memory_error_func) (status, memaddr, info);
335 return -1;
336 }
337 }
338
339 insn = bfd_getb32 (buffer);
340
341 for (i = 0; i < NUMOPCODES; ++i)
342 {
343 const struct pa_opcode *opcode = &pa_opcodes[i];
344 if ((insn & opcode->mask) == opcode->match)
345 {
346 register const char *s;
347
348 (*info->fprintf_func) (info->stream, "%s", opcode->name);
349
feb12992 350 if (!strchr ("cfCY?-+nHNZFIu", opcode->args[0]))
252b5132
RH		 351 (*info->fprintf_func) (info->stream, " ");
352 for (s = opcode->args; *s != '\0'; ++s)
353 {
354 switch (*s)
355 {
356 case 'x':
357 fput_reg (GET_FIELD (insn, 11, 15), info);
358 break;
1eee34f5 359 case 'a':
252b5132
RH		 360 case 'b':
361 fput_reg (GET_FIELD (insn, 6, 10), info);
362 break;
363 case '^':
364 fput_creg (GET_FIELD (insn, 6, 10), info);
365 break;
252b5132
RH		 366 case 't':
367 fput_reg (GET_FIELD (insn, 27, 31), info);
368 break;
a349b151
JL		 369
370 /* Handle floating point registers. */
371 case 'f':
372 switch (*++s)
373 {
374 case 't':
252b5132 375 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
a349b151
JL		 376 break;
377 case 'T':
378 if (GET_FIELD (insn, 25, 25))
379 fput_fp_reg_r (GET_FIELD (insn, 27, 31), info);
380 else
381 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
382 break;
383 case 'a':
384 if (GET_FIELD (insn, 25, 25))
385 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
386 else
387 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
388 break;
389 case 'A':
390 if (GET_FIELD (insn, 24, 24))
391 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
392 else
393 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
394
395 break;
396 case 'b':
397 if (GET_FIELD (insn, 25, 25))
398 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
399 else
400 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
401 break;
402 case 'B':
403 if (GET_FIELD (insn, 19, 19))
404 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
405 else
406 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
407 break;
408 case 'C':
409 {
410 int reg = GET_FIELD (insn, 21, 22);
411 reg |= GET_FIELD (insn, 16, 18) << 2;
412 if (GET_FIELD (insn, 23, 23) != 0)
413 fput_fp_reg_r (reg, info);
414 else
415 fput_fp_reg (reg, info);
416 break;
417 }
418 case 'i':
419 {
420 int reg = GET_FIELD (insn, 6, 10);
252b5132 421
a349b151
JL		 422 reg |= (GET_FIELD (insn, 26, 26) << 4);
423 fput_fp_reg (reg, info);
424 break;
425 }
426 case 'j':
427 {
428 int reg = GET_FIELD (insn, 11, 15);
252b5132 429
a349b151
JL		 430 reg |= (GET_FIELD (insn, 26, 26) << 4);
431 fput_fp_reg (reg, info);
432 break;
433 }
434 case 'k':
435 {
436 int reg = GET_FIELD (insn, 27, 31);
252b5132 437
a349b151
JL		 438 reg |= (GET_FIELD (insn, 26, 26) << 4);
439 fput_fp_reg (reg, info);
440 break;
441 }
442 case 'l':
443 {
444 int reg = GET_FIELD (insn, 21, 25);
252b5132 445
a349b151
JL		 446 reg |= (GET_FIELD (insn, 26, 26) << 4);
447 fput_fp_reg (reg, info);
448 break;
449 }
450 case 'm':
451 {
452 int reg = GET_FIELD (insn, 16, 20);
453
454 reg |= (GET_FIELD (insn, 26, 26) << 4);
455 fput_fp_reg (reg, info);
456 break;
457 }
458 }
252b5132 459
252b5132
RH		 460 case '5':
461 fput_const (extract_5_load (insn), info);
462 break;
463 case 's':
464 (*info->fprintf_func) (info->stream,
465 "sr%d", GET_FIELD (insn, 16, 17));
466 break;
b333b6c6 467
252b5132
RH		 468 case 'S':
469 (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn));
470 break;
3281117a
JL		 471
472 /* Handle completers. */
252b5132 473 case 'c':
3281117a
JL		 474 switch (*++s)
475 {
476 case 'x':
477 (*info->fprintf_func) (info->stream, "%s ",
478 index_compl_names[GET_COMPL (insn)]);
479 break;
480 case 'm':
481 (*info->fprintf_func) (info->stream, "%s ",
482 short_ldst_compl_names[GET_COMPL (insn)]);
483 break;
484 case 's':
485 (*info->fprintf_func) (info->stream, "%s ",
486 short_bytes_compl_names[GET_COMPL (insn)]);
487 break;
3b67cf2b
JL		 488 case 'L':
489 (*info->fprintf_func) (info->stream, ",l");
490 break;
491 case 'w':
492 (*info->fprintf_func) (info->stream, "%s ",
493 read_write_names[GET_FIELD (insn, 25, 25)]);
494 break;
495 case 'W':
496 (*info->fprintf_func) (info->stream, ",w");
497 break;
498 case 'r':
499 if (GET_FIELD (insn, 23, 26) == 5)
500 (*info->fprintf_func) (info->stream, ",r");
501 break;
3281117a
JL		 502 case 'Z':
503 if (GET_FIELD (insn, 26, 26))
504 (*info->fprintf_func) (info->stream, ",m ");
505 else
506 (*info->fprintf_func) (info->stream, " ");
507 break;
3b67cf2b
JL		 508 case 'i':
509 if (GET_FIELD (insn, 25, 25))
510 (*info->fprintf_func) (info->stream, ",i");
511 break;
af10de82
JL		 512 case 'z':
513 if (!GET_FIELD (insn, 21, 21))
514 (*info->fprintf_func) (info->stream, ",z");
515 break;
3b67cf2b
JL		 516 case 'a':
517 (*info->fprintf_func)
518 (info->stream, "%s", add_compl_names[GET_FIELD
519 (insn, 20, 21)]);
520 break;
521 case 'Y':
522 (*info->fprintf_func)
523 (info->stream, ",dc%s", add_compl_names[GET_FIELD
524 (insn, 20, 21)]);
525 break;
526 case 'y':
527 (*info->fprintf_func)
528 (info->stream, ",c%s", add_compl_names[GET_FIELD
529 (insn, 20, 21)]);
530 break;
531 case 'v':
532 if (GET_FIELD (insn, 20, 20))
533 (*info->fprintf_func) (info->stream, ",tsv");
534 break;
535 case 't':
536 (*info->fprintf_func) (info->stream, ",tc");
537 if (GET_FIELD (insn, 20, 20))
538 (*info->fprintf_func) (info->stream, ",tsv");
539 break;
540 case 'B':
541 (*info->fprintf_func) (info->stream, ",db");
542 if (GET_FIELD (insn, 20, 20))
543 (*info->fprintf_func) (info->stream, ",tsv");
544 break;
545 case 'b':
546 (*info->fprintf_func) (info->stream, ",b");
547 if (GET_FIELD (insn, 20, 20))
548 (*info->fprintf_func) (info->stream, ",tsv");
549 break;
550 case 'T':
551 if (GET_FIELD (insn, 25, 25))
552 (*info->fprintf_func) (info->stream, ",tc");
553 break;
1eee34f5
JL		 554 case 'S':
555 /* EXTRD/W has a following condition. */
556 if (*(s + 1) == '?')
557 (*info->fprintf_func)
558 (info->stream, "%s", signed_unsigned_names[GET_FIELD
559 (insn, 21, 21)]);
560 else
561 (*info->fprintf_func)
562 (info->stream, "%s ", signed_unsigned_names[GET_FIELD
563 (insn, 21, 21)]);
564 break;
565 case 'h':
566 (*info->fprintf_func)
567 (info->stream, "%s", mix_half_names[GET_FIELD
568 (insn, 17, 17)]);
569 break;
570 case 'H':
571 (*info->fprintf_func)
572 (info->stream, "%s", saturation_names[GET_FIELD
573 (insn, 24, 25)]);
574 break;
575 case '*':
576 (*info->fprintf_func)
577 (info->stream, ",%d%d%d%d ",
578 GET_FIELD (insn, 17, 18), GET_FIELD (insn, 20, 21),
579 GET_FIELD (insn, 22, 23), GET_FIELD (insn, 24, 25));
580 break;
3281117a 581 }
252b5132 582 break;
feb12992
JL		 583
584 /* Handle conditions. */
252b5132 585 case '?':
feb12992
JL		 586 {
587 s++;
588 switch (*s)
589 {
590 case 'f':
591 (*info->fprintf_func) (info->stream, "%s ",
592 float_comp_names[GET_FIELD
593 (insn, 27, 31)]);
594 break;
595
596 /* these four conditions are for the set of instructions
597 which distinguish true/false conditions by opcode
598 rather than by the 'f' bit (sigh): comb, comib,
599 addb, addib */
600 case 't':
a349b151 601 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)],
feb12992
JL		 602 info);
603 break;
b333b6c6
JL		 604 case 'T':
605 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
606 + 8], info);
607 break;
608 case 'r':
609 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)],
610 info);
611 break;
612 case 'R':
613 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)
614 + 8], info);
615 break;
616 case 'Q':
617 fputs_filtered (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)],
618 info);
619 break;
feb12992 620 case 'n':
a349b151 621 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
feb12992
JL		 622 + GET_FIELD (insn, 4, 4) * 8], info);
623 break;
624 case '@':
625 fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18)
626 + GET_FIELD (insn, 4, 4) * 8], info);
627 break;
628 case 's':
629 (*info->fprintf_func) (info->stream, "%s ",
630 compare_cond_names[GET_COND (insn)]);
631 break;
b333b6c6
JL		 632 case 'S':
633 (*info->fprintf_func) (info->stream, "%s ",
634 compare_cond_64_names[GET_COND (insn)]);
635 break;
feb12992
JL		 636 case 'a':
637 (*info->fprintf_func) (info->stream, "%s ",
638 add_cond_names[GET_COND (insn)]);
639 break;
b333b6c6
JL		 640 case 'A':
641 (*info->fprintf_func) (info->stream, "%s ",
642 add_cond_64_names[GET_COND (insn)]);
643 break;
feb12992
JL		 644 case 'd':
645 (*info->fprintf_func) (info->stream, "%s",
a349b151 646 add_cond_names[GET_FIELD (insn, 16, 18)]);
feb12992 647 break;
a349b151 648
b333b6c6
JL		 649 case 'D':
650 (*info->fprintf_func) (info->stream, "%s",
a349b151
JL		 651 add_cond_names[GET_FIELD (insn, 16, 18)
652 + 8]);
b333b6c6
JL		 653 break;
654 case 'w':
a349b151 655 (*info->fprintf_func)
b333b6c6
JL		 656 (info->stream, "%s",
657 wide_add_cond_names[GET_FIELD (insn, 16, 18)]);
658 break;
659
660 case 'W':
a349b151 661 (*info->fprintf_func)
b333b6c6
JL		 662 (info->stream, "%s",
663 wide_add_cond_names[GET_FIELD (insn, 16, 18) + 8]);
664 break;
feb12992
JL		 665
666 case 'l':
667 (*info->fprintf_func) (info->stream, "%s ",
668 logical_cond_names[GET_COND (insn)]);
669 break;
b333b6c6
JL		 670 case 'L':
671 (*info->fprintf_func) (info->stream, "%s ",
672 logical_cond_64_names[GET_COND (insn)]);
673 break;
feb12992
JL		 674 case 'u':
675 (*info->fprintf_func) (info->stream, "%s ",
676 unit_cond_names[GET_COND (insn)]);
677 break;
b333b6c6
JL		 678 case 'U':
679 (*info->fprintf_func) (info->stream, "%s ",
680 unit_cond_64_names[GET_COND (insn)]);
681 break;
feb12992
JL		 682 case 'y':
683 case 'x':
684 case 'b':
685 (*info->fprintf_func)
686 (info->stream, "%s",
687 shift_cond_names[GET_FIELD (insn, 16, 18)]);
688
689 /* If the next character in args is 'n', it will handle
690 putting out the space. */
691 if (s[1] != 'n')
692 (*info->fprintf_func) (info->stream, " ");
693 break;
b333b6c6
JL		 694 case 'X':
695 (*info->fprintf_func) (info->stream, "%s",
696 shift_cond_64_names[GET_FIELD (insn, 16, 18)]);
697 break;
698 case 'B':
699 (*info->fprintf_func)
700 (info->stream, "%s",
701 bb_cond_64_names[GET_FIELD (insn, 16, 16)]);
feb12992 702
b333b6c6
JL		 703 /* If the next character in args is 'n', it will handle
704 putting out the space. */
705 if (s[1] != 'n')
706 (*info->fprintf_func) (info->stream, " ");
707 break;
feb12992
JL		 708 }
709 break;
710 }
252b5132 711
252b5132
RH		 712 case 'V':
713 fput_const (extract_5_store (insn), info);
714 break;
715 case 'r':
716 fput_const (extract_5r_store (insn), info);
717 break;
718 case 'R':
719 fput_const (extract_5R_store (insn), info);
720 break;
3b67cf2b
JL		 721 case 'U':
722 fput_const (extract_10U_store (insn), info);
723 break;
252b5132
RH		 724 case 'Q':
725 fput_const (extract_5Q_store (insn), info);
726 break;
727 case 'i':
728 fput_const (extract_11 (insn), info);
729 break;
730 case 'j':
731 fput_const (extract_14 (insn), info);
732 break;
733 case 'k':
734 fput_const (extract_21 (insn), info);
735 break;
736 case 'n':
737 if (insn & 0x2)
738 (*info->fprintf_func) (info->stream, ",n ");
739 else
740 (*info->fprintf_func) (info->stream, " ");
741 break;
742 case 'N':
743 if ((insn & 0x20) && s[1])
744 (*info->fprintf_func) (info->stream, ",n ");
745 else if (insn & 0x20)
746 (*info->fprintf_func) (info->stream, ",n");
747 else if (s[1])
748 (*info->fprintf_func) (info->stream, " ");
749 break;
750 case 'w':
751 (*info->print_address_func) (memaddr + 8 + extract_12 (insn),
752 info);
753 break;
754 case 'W':
755 /* 17 bit PC-relative branch. */
756 (*info->print_address_func) ((memaddr + 8
757 + extract_17 (insn)),
758 info);
759 break;
760 case 'z':
761 /* 17 bit displacement. This is an offset from a register
762 so it gets disasssembled as just a number, not any sort
763 of address. */
764 fput_const (extract_17 (insn), info);
765 break;
d1e9bd1f
JL		 766
767 case 'Z':
768 /* addil %r1 implicit output. */
2beaab59 769 (*info->fprintf_func) (info->stream, "%%r1");
d1e9bd1f
JL		 770 break;
771
46424e05
JL		 772 case '.':
773 (*info->fprintf_func) (info->stream, "%d",
774 GET_FIELD (insn, 24, 25));
775 break;
3b67cf2b
JL		 776 case '*':
777 (*info->fprintf_func) (info->stream, "%d",
778 GET_FIELD (insn, 22, 25));
779 break;
b7d6d485 780 case '!':
2beaab59 781 (*info->fprintf_func) (info->stream, "%%sar");
b7d6d485 782 break;
252b5132
RH		 783 case 'p':
784 (*info->fprintf_func) (info->stream, "%d",
785 31 - GET_FIELD (insn, 22, 26));
786 break;
46424e05
JL		 787 case '~':
788 {
789 int num;
790 num = GET_FIELD (insn, 20, 20) << 5;
791 num |= GET_FIELD (insn, 22, 26);
792 (*info->fprintf_func) (info->stream, "%d", 63 - num);
793 break;
794 }
252b5132
RH		 795 case 'P':
796 (*info->fprintf_func) (info->stream, "%d",
797 GET_FIELD (insn, 22, 26));
798 break;
af10de82
JL		 799 case 'q':
800 {
801 int num;
802 num = GET_FIELD (insn, 20, 20) << 5;
803 num |= GET_FIELD (insn, 22, 26);
804 (*info->fprintf_func) (info->stream, "%d", num);
805 break;
806 }
252b5132
RH		 807 case 'T':
808 (*info->fprintf_func) (info->stream, "%d",
809 32 - GET_FIELD (insn, 27, 31));
810 break;
af10de82
JL		 811 case '%':
812 {
813 int num;
814 num = (GET_FIELD (insn, 23, 23) + 1) * 32;
815 num -= GET_FIELD (insn, 27, 31);
816 (*info->fprintf_func) (info->stream, "%d", num);
817 break;
818 }
819 case '|':
820 {
821 int num;
822 num = (GET_FIELD (insn, 19, 19) + 1) * 32;
823 num -= GET_FIELD (insn, 27, 31);
824 (*info->fprintf_func) (info->stream, "%d", num);
825 break;
826 }
46424e05
JL		 827 case '$':
828 fput_const (GET_FIELD (insn, 20, 28), info);
829 break;
252b5132
RH		 830 case 'A':
831 fput_const (GET_FIELD (insn, 6, 18), info);
832 break;
252b5132
RH		 833 case 'D':
834 fput_const (GET_FIELD (insn, 6, 31), info);
835 break;
a349b151 836 case 'v':
252b5132
RH		 837 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
838 break;
839 case 'O':
840 fput_const ((GET_FIELD (insn, 6,20) << 5 |
841 GET_FIELD (insn, 27, 31)), info);
842 break;
843 case 'o':
844 fput_const (GET_FIELD (insn, 6, 20), info);
845 break;
252b5132
RH		 846 case '2':
847 fput_const ((GET_FIELD (insn, 6, 22) << 5 |
848 GET_FIELD (insn, 27, 31)), info);
849 break;
850 case '1':
851 fput_const ((GET_FIELD (insn, 11, 20) << 5 |
852 GET_FIELD (insn, 27, 31)), info);
853 break;
854 case '0':
855 fput_const ((GET_FIELD (insn, 16, 20) << 5 |
856 GET_FIELD (insn, 27, 31)), info);
857 break;
858 case 'u':
859 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
860 break;
861 case 'F':
862 /* if no destination completer and not before a completer
863 for fcmp, need a space here */
4f312591 864 if (s[1] == 'G' || s[1] == '?')
252b5132
RH		 865 fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
866 info);
867 else
868 (*info->fprintf_func) (info->stream, "%s ",
869 float_format_names[GET_FIELD
870 (insn, 19, 20)]);
871 break;
872 case 'G':
873 (*info->fprintf_func) (info->stream, "%s ",
874 float_format_names[GET_FIELD (insn,
875 17, 18)]);
876 break;
877 case 'H':
878 if (GET_FIELD (insn, 26, 26) == 1)
879 (*info->fprintf_func) (info->stream, "%s ",
880 float_format_names[0]);
881 else
882 (*info->fprintf_func) (info->stream, "%s ",
883 float_format_names[1]);
884 break;
885 case 'I':
886 /* if no destination completer and not before a completer
887 for fcmp, need a space here */
4f312591 888 if (s[1] == '?')
252b5132
RH		 889 fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)],
890 info);
891 else
892 (*info->fprintf_func) (info->stream, "%s ",
893 float_format_names[GET_FIELD
894 (insn, 20, 20)]);
895 break;
252b5132
RH		 896 default:
897 (*info->fprintf_func) (info->stream, "%c", *s);
898 break;
899 }
900 }
901 return sizeof(insn);
902 }
903 }
904 (*info->fprintf_func) (info->stream, "#%8x", insn);
905 return sizeof(insn);
906}
GDB Binutils - Deliverables
This page took 0.074971 seconds and 4 git commands to generate.