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* gas/hppa/basic/basic.exp (do_branch2,do_media): New.
[deliverable/binutils-gdb.git] / opcodes / hppa-dis.c
CommitLineData
252b5132
RH		 1/* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
3
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include <ansidecl.h>
22#include "sysdep.h"
23#include "dis-asm.h"
24#include "libhppa.h"
25#include "opcode/hppa.h"
26
27/* Integer register names, indexed by the numbers which appear in the
28 opcodes. */
29static const char *const reg_names[] =
30 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
31 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
32 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
33 "sp", "r31"};
34
35/* Floating point register names, indexed by the numbers which appear in the
36 opcodes. */
37static const char *const fp_reg_names[] =
38 {"fpsr", "fpe2", "fpe4", "fpe6",
39 "fr4", "fr5", "fr6", "fr7", "fr8",
40 "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
41 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
42 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
43
44typedef unsigned int CORE_ADDR;
45
46/* Get at various relevent fields of an instruction word. */
47
48#define MASK_5 0x1f
49#define MASK_11 0x7ff
50#define MASK_14 0x3fff
51#define MASK_21 0x1fffff
52
53/* This macro gets bit fields using HP's numbering (MSB = 0) */
54
55#define GET_FIELD(X, FROM, TO) \
56 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
57
58/* Some of these have been converted to 2-d arrays because they
59 consume less storage this way. If the maintenance becomes a
60 problem, convert them back to const 1-d pointer arrays. */
61static const char control_reg[][6] = {
62 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
63 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
64 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
65 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
66 "tr4", "tr5", "tr6", "tr7"
67};
68
69static const char compare_cond_names[][5] = {
b333b6c6
JL		 70 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od",
71 ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev"
72};
73static const char compare_cond_64_names[][6] = {
74 "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od",
75 ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev"
76};
77static const char cmpib_cond_64_names[][6] = {
78 ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>"
252b5132
RH		 79};
80static const char add_cond_names[][5] = {
b333b6c6
JL		 81 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od",
82 ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev"
83};
84static const char add_cond_64_names[][6] = {
85 ",*", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od",
86 ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev"
87};
88static const char wide_add_cond_names[][5] = {
89 "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=",
90 ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>"
252b5132
RH		 91};
92static const char *const logical_cond_names[] = {
93 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
94 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
b333b6c6
JL		 95static const char *const logical_cond_64_names[] = {
96 ",*", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
97 ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
252b5132
RH		 98static const char *const unit_cond_names[] = {
99 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
100 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
101};
b333b6c6
JL		 102static const char *const unit_cond_64_names[] = {
103 ",*", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
104 ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc"
105};
252b5132
RH		 106static const char shift_cond_names[][4] = {
107 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
108};
b333b6c6
JL		 109static const char shift_cond_64_names[][5] = {
110 ",*", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
111};
112static const char bb_cond_64_names[][5] = {
113 ",*<", ",*>="
114};
252b5132
RH		 115static const char index_compl_names[][4] = {"", ",m", ",s", ",sm"};
116static const char short_ldst_compl_names[][4] = {"", ",ma", "", ",mb"};
117static const char *const short_bytes_compl_names[] = {
118 "", ",b,m", ",e", ",e,m"
119};
120static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"};
121static const char float_comp_names[][8] =
122{
123 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
124 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
125 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
126 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
127};
128
129/* For a bunch of different instructions form an index into a
130 completer name table. */
131#define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
132 GET_FIELD (insn, 18, 18) << 1)
133
134#define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
135 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
136
137/* Utility function to print registers. Put these first, so gcc's function
138 inlining can do its stuff. */
139
140#define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
141
142static void
143fput_reg (reg, info)
144 unsigned reg;
145 disassemble_info *info;
146{
147 (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
148}
149
150static void
151fput_fp_reg (reg, info)
152 unsigned reg;
153 disassemble_info *info;
154{
155 (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
156}
157
158static void
159fput_fp_reg_r (reg, info)
160 unsigned reg;
161 disassemble_info *info;
162{
163 /* Special case floating point exception registers. */
164 if (reg < 4)
165 (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1);
166 else
167 (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg]
168 : "fr0");
169}
170
171static void
172fput_creg (reg, info)
173 unsigned reg;
174 disassemble_info *info;
175{
176 (*info->fprintf_func) (info->stream, control_reg[reg]);
177}
178
179/* print constants with sign */
180
181static void
182fput_const (num, info)
183 unsigned num;
184 disassemble_info *info;
185{
186 if ((int)num < 0)
187 (*info->fprintf_func) (info->stream, "-%x", -(int)num);
188 else
189 (*info->fprintf_func) (info->stream, "%x", num);
190}
191
192/* Routines to extract various sized constants out of hppa
193 instructions. */
194
195/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
196static int
197extract_3 (word)
198 unsigned word;
199{
200 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
201}
202
203static int
204extract_5_load (word)
205 unsigned word;
206{
207 return low_sign_extend (word >> 16 & MASK_5, 5);
208}
209
210/* extract the immediate field from a st{bhw}s instruction */
211static int
212extract_5_store (word)
213 unsigned word;
214{
215 return low_sign_extend (word & MASK_5, 5);
216}
217
218/* extract the immediate field from a break instruction */
219static unsigned
220extract_5r_store (word)
221 unsigned word;
222{
223 return (word & MASK_5);
224}
225
226/* extract the immediate field from a {sr}sm instruction */
227static unsigned
228extract_5R_store (word)
229 unsigned word;
230{
231 return (word >> 16 & MASK_5);
232}
233
234/* extract the immediate field from a bb instruction */
235static unsigned
236extract_5Q_store (word)
237 unsigned word;
238{
239 return (word >> 21 & MASK_5);
240}
241
242/* extract an 11 bit immediate field */
243static int
244extract_11 (word)
245 unsigned word;
246{
247 return low_sign_extend (word & MASK_11, 11);
248}
249
250/* extract a 14 bit immediate field */
251static int
252extract_14 (word)
253 unsigned word;
254{
255 return low_sign_extend (word & MASK_14, 14);
256}
257
258/* extract a 21 bit constant */
259
260static int
261extract_21 (word)
262 unsigned word;
263{
264 int val;
265
266 word &= MASK_21;
267 word <<= 11;
268 val = GET_FIELD (word, 20, 20);
269 val <<= 11;
270 val |= GET_FIELD (word, 9, 19);
271 val <<= 2;
272 val |= GET_FIELD (word, 5, 6);
273 val <<= 5;
274 val |= GET_FIELD (word, 0, 4);
275 val <<= 2;
276 val |= GET_FIELD (word, 7, 8);
277 return sign_extend (val, 21) << 11;
278}
279
280/* extract a 12 bit constant from branch instructions */
281
282static int
283extract_12 (word)
284 unsigned word;
285{
286 return sign_extend (GET_FIELD (word, 19, 28) |
287 GET_FIELD (word, 29, 29) << 10 |
288 (word & 0x1) << 11, 12) << 2;
289}
290
291/* extract a 17 bit constant from branch instructions, returning the
292 19 bit signed value. */
293
294static int
295extract_17 (word)
296 unsigned word;
297{
298 return sign_extend (GET_FIELD (word, 19, 28) |
299 GET_FIELD (word, 29, 29) << 10 |
300 GET_FIELD (word, 11, 15) << 11 |
301 (word & 0x1) << 16, 17) << 2;
302}
303
304/* Print one instruction. */
305int
306print_insn_hppa (memaddr, info)
307 bfd_vma memaddr;
308 disassemble_info *info;
309{
310 bfd_byte buffer[4];
311 unsigned int insn, i;
312
313 {
314 int status =
315 (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info);
316 if (status != 0)
317 {
318 (*info->memory_error_func) (status, memaddr, info);
319 return -1;
320 }
321 }
322
323 insn = bfd_getb32 (buffer);
324
325 for (i = 0; i < NUMOPCODES; ++i)
326 {
327 const struct pa_opcode *opcode = &pa_opcodes[i];
328 if ((insn & opcode->mask) == opcode->match)
329 {
330 register const char *s;
331
332 (*info->fprintf_func) (info->stream, "%s", opcode->name);
333
feb12992 334 if (!strchr ("cfCY?-+nHNZFIu", opcode->args[0]))
252b5132
RH		 335 (*info->fprintf_func) (info->stream, " ");
336 for (s = opcode->args; *s != '\0'; ++s)
337 {
338 switch (*s)
339 {
340 case 'x':
341 fput_reg (GET_FIELD (insn, 11, 15), info);
342 break;
343 case 'X':
344 if (GET_FIELD (insn, 25, 25))
345 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
346 else
347 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
348 break;
349 case 'b':
350 fput_reg (GET_FIELD (insn, 6, 10), info);
351 break;
352 case '^':
353 fput_creg (GET_FIELD (insn, 6, 10), info);
354 break;
355 case 'E':
3ea80b33 356 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
25ef477f 357 break;
252b5132
RH		 358 case 't':
359 fput_reg (GET_FIELD (insn, 27, 31), info);
360 break;
361 case 'v':
362 if (GET_FIELD (insn, 25, 25))
363 fput_fp_reg_r (GET_FIELD (insn, 27, 31), info);
364 else
365 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
366 break;
367 case 'y':
368 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
369 break;
370 case '4':
371 {
372 int reg = GET_FIELD (insn, 6, 10);
373
374 reg |= (GET_FIELD (insn, 26, 26) << 4);
375 fput_fp_reg (reg, info);
376 break;
377 }
378 case '6':
379 {
380 int reg = GET_FIELD (insn, 11, 15);
381
382 reg |= (GET_FIELD (insn, 26, 26) << 4);
383 fput_fp_reg (reg, info);
384 break;
385 }
386 case '7':
387 {
388 int reg = GET_FIELD (insn, 27, 31);
389
390 reg |= (GET_FIELD (insn, 26, 26) << 4);
391 fput_fp_reg (reg, info);
392 break;
393 }
394 case '8':
395 {
396 int reg = GET_FIELD (insn, 16, 20);
397
398 reg |= (GET_FIELD (insn, 26, 26) << 4);
399 fput_fp_reg (reg, info);
400 break;
401 }
402 case '9':
403 {
404 int reg = GET_FIELD (insn, 21, 25);
405
406 reg |= (GET_FIELD (insn, 26, 26) << 4);
407 fput_fp_reg (reg, info);
408 break;
409 }
410 case '5':
411 fput_const (extract_5_load (insn), info);
412 break;
413 case 's':
414 (*info->fprintf_func) (info->stream,
415 "sr%d", GET_FIELD (insn, 16, 17));
416 break;
b333b6c6 417
252b5132
RH		 418 case 'S':
419 (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn));
420 break;
421 case 'c':
422 (*info->fprintf_func) (info->stream, "%s ",
423 index_compl_names[GET_COMPL (insn)]);
424 break;
425 case 'C':
426 (*info->fprintf_func) (info->stream, "%s ",
427 short_ldst_compl_names[GET_COMPL (insn)]);
428 break;
429 case 'Y':
430 (*info->fprintf_func) (info->stream, "%s ",
431 short_bytes_compl_names[GET_COMPL (insn)]);
432 break;
feb12992
JL		 433
434 /* Handle conditions. */
252b5132 435 case '?':
feb12992
JL		 436 {
437 s++;
438 switch (*s)
439 {
440 case 'f':
441 (*info->fprintf_func) (info->stream, "%s ",
442 float_comp_names[GET_FIELD
443 (insn, 27, 31)]);
444 break;
445
446 /* these four conditions are for the set of instructions
447 which distinguish true/false conditions by opcode
448 rather than by the 'f' bit (sigh): comb, comib,
449 addb, addib */
450 case 't':
451 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16,
452 18)],
453 info);
454 break;
b333b6c6
JL		 455 case 'T':
456 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
457 + 8], info);
458 break;
459 case 'r':
460 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)],
461 info);
462 break;
463 case 'R':
464 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)
465 + 8], info);
466 break;
467 case 'Q':
468 fputs_filtered (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)],
469 info);
470 break;
feb12992
JL		 471 case 'n':
472 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16,
473 18)
474 + GET_FIELD (insn, 4, 4) * 8], info);
475 break;
476 case '@':
477 fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18)
478 + GET_FIELD (insn, 4, 4) * 8], info);
479 break;
480 case 's':
481 (*info->fprintf_func) (info->stream, "%s ",
482 compare_cond_names[GET_COND (insn)]);
483 break;
b333b6c6
JL		 484 case 'S':
485 (*info->fprintf_func) (info->stream, "%s ",
486 compare_cond_64_names[GET_COND (insn)]);
487 break;
feb12992
JL		 488 case 'a':
489 (*info->fprintf_func) (info->stream, "%s ",
490 add_cond_names[GET_COND (insn)]);
491 break;
b333b6c6
JL		 492 case 'A':
493 (*info->fprintf_func) (info->stream, "%s ",
494 add_cond_64_names[GET_COND (insn)]);
495 break;
feb12992
JL		 496 case 'd':
497 (*info->fprintf_func) (info->stream, "%s",
498 add_cond_names[GET_FIELD (insn,
499 16,
500 18)]);
501 break;
b333b6c6
JL		 502 case 'D':
503 (*info->fprintf_func) (info->stream, "%s",
504 add_cond_names[GET_FIELD (insn,
505 16, 18)
506 + 8]);
507 break;
508 case 'w':
509 (*info->fprintf_func)
510 (info->stream, "%s",
511 wide_add_cond_names[GET_FIELD (insn, 16, 18)]);
512 break;
513
514 case 'W':
515 (*info->fprintf_func)
516 (info->stream, "%s",
517 wide_add_cond_names[GET_FIELD (insn, 16, 18) + 8]);
518 break;
feb12992
JL		 519
520 case 'l':
521 (*info->fprintf_func) (info->stream, "%s ",
522 logical_cond_names[GET_COND (insn)]);
523 break;
b333b6c6
JL		 524 case 'L':
525 (*info->fprintf_func) (info->stream, "%s ",
526 logical_cond_64_names[GET_COND (insn)]);
527 break;
feb12992
JL		 528 case 'u':
529 (*info->fprintf_func) (info->stream, "%s ",
530 unit_cond_names[GET_COND (insn)]);
531 break;
b333b6c6
JL		 532 case 'U':
533 (*info->fprintf_func) (info->stream, "%s ",
534 unit_cond_64_names[GET_COND (insn)]);
535 break;
feb12992
JL		 536 case 'y':
537 case 'x':
538 case 'b':
539 (*info->fprintf_func)
540 (info->stream, "%s",
541 shift_cond_names[GET_FIELD (insn, 16, 18)]);
542
543 /* If the next character in args is 'n', it will handle
544 putting out the space. */
545 if (s[1] != 'n')
546 (*info->fprintf_func) (info->stream, " ");
547 break;
b333b6c6
JL		 548 case 'X':
549 (*info->fprintf_func) (info->stream, "%s",
550 shift_cond_64_names[GET_FIELD (insn, 16, 18)]);
551 break;
552 case 'B':
553 (*info->fprintf_func)
554 (info->stream, "%s",
555 bb_cond_64_names[GET_FIELD (insn, 16, 16)]);
feb12992 556
b333b6c6
JL		 557 /* If the next character in args is 'n', it will handle
558 putting out the space. */
559 if (s[1] != 'n')
560 (*info->fprintf_func) (info->stream, " ");
561 break;
feb12992
JL		 562 }
563 break;
564 }
252b5132 565
252b5132
RH		 566 case 'V':
567 fput_const (extract_5_store (insn), info);
568 break;
569 case 'r':
570 fput_const (extract_5r_store (insn), info);
571 break;
572 case 'R':
573 fput_const (extract_5R_store (insn), info);
574 break;
575 case 'Q':
576 fput_const (extract_5Q_store (insn), info);
577 break;
578 case 'i':
579 fput_const (extract_11 (insn), info);
580 break;
581 case 'j':
582 fput_const (extract_14 (insn), info);
583 break;
584 case 'k':
585 fput_const (extract_21 (insn), info);
586 break;
587 case 'n':
588 if (insn & 0x2)
589 (*info->fprintf_func) (info->stream, ",n ");
590 else
591 (*info->fprintf_func) (info->stream, " ");
592 break;
593 case 'N':
594 if ((insn & 0x20) && s[1])
595 (*info->fprintf_func) (info->stream, ",n ");
596 else if (insn & 0x20)
597 (*info->fprintf_func) (info->stream, ",n");
598 else if (s[1])
599 (*info->fprintf_func) (info->stream, " ");
600 break;
601 case 'w':
602 (*info->print_address_func) (memaddr + 8 + extract_12 (insn),
603 info);
604 break;
605 case 'W':
606 /* 17 bit PC-relative branch. */
607 (*info->print_address_func) ((memaddr + 8
608 + extract_17 (insn)),
609 info);
610 break;
611 case 'z':
612 /* 17 bit displacement. This is an offset from a register
613 so it gets disasssembled as just a number, not any sort
614 of address. */
615 fput_const (extract_17 (insn), info);
616 break;
617 case 'p':
618 (*info->fprintf_func) (info->stream, "%d",
619 31 - GET_FIELD (insn, 22, 26));
620 break;
621 case 'P':
622 (*info->fprintf_func) (info->stream, "%d",
623 GET_FIELD (insn, 22, 26));
624 break;
625 case 'T':
626 (*info->fprintf_func) (info->stream, "%d",
627 32 - GET_FIELD (insn, 27, 31));
628 break;
629 case 'A':
630 fput_const (GET_FIELD (insn, 6, 18), info);
631 break;
632 case 'Z':
633 if (GET_FIELD (insn, 26, 26))
634 (*info->fprintf_func) (info->stream, ",m ");
635 else
636 (*info->fprintf_func) (info->stream, " ");
637 break;
638 case 'D':
639 fput_const (GET_FIELD (insn, 6, 31), info);
640 break;
641 case 'f':
642 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
643 break;
644 case 'O':
645 fput_const ((GET_FIELD (insn, 6,20) << 5 |
646 GET_FIELD (insn, 27, 31)), info);
647 break;
648 case 'o':
649 fput_const (GET_FIELD (insn, 6, 20), info);
650 break;
651 case '3':
652 {
653 int reg = GET_FIELD (insn, 21, 22);
654 reg |= GET_FIELD (insn, 16, 18) << 2;
655 if (GET_FIELD (insn, 23, 23) != 0)
656 fput_fp_reg_r (reg, info);
657 else
658 fput_fp_reg (reg, info);
659 break;
660 }
661
662 case '2':
663 fput_const ((GET_FIELD (insn, 6, 22) << 5 |
664 GET_FIELD (insn, 27, 31)), info);
665 break;
666 case '1':
667 fput_const ((GET_FIELD (insn, 11, 20) << 5 |
668 GET_FIELD (insn, 27, 31)), info);
669 break;
670 case '0':
671 fput_const ((GET_FIELD (insn, 16, 20) << 5 |
672 GET_FIELD (insn, 27, 31)), info);
673 break;
674 case 'u':
675 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
676 break;
677 case 'F':
678 /* if no destination completer and not before a completer
679 for fcmp, need a space here */
4f312591 680 if (s[1] == 'G' || s[1] == '?')
252b5132
RH		 681 fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
682 info);
683 else
684 (*info->fprintf_func) (info->stream, "%s ",
685 float_format_names[GET_FIELD
686 (insn, 19, 20)]);
687 break;
688 case 'G':
689 (*info->fprintf_func) (info->stream, "%s ",
690 float_format_names[GET_FIELD (insn,
691 17, 18)]);
692 break;
693 case 'H':
694 if (GET_FIELD (insn, 26, 26) == 1)
695 (*info->fprintf_func) (info->stream, "%s ",
696 float_format_names[0]);
697 else
698 (*info->fprintf_func) (info->stream, "%s ",
699 float_format_names[1]);
700 break;
701 case 'I':
702 /* if no destination completer and not before a completer
703 for fcmp, need a space here */
4f312591 704 if (s[1] == '?')
252b5132
RH		 705 fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)],
706 info);
707 else
708 (*info->fprintf_func) (info->stream, "%s ",
709 float_format_names[GET_FIELD
710 (insn, 20, 20)]);
711 break;
712 case 'J':
713 if (GET_FIELD (insn, 24, 24))
714 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
715 else
716 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
717
718 break;
719 case 'K':
720 if (GET_FIELD (insn, 19, 19))
721 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
722 else
723 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
724 break;
252b5132
RH		 725 default:
726 (*info->fprintf_func) (info->stream, "%c", *s);
727 break;
728 }
729 }
730 return sizeof(insn);
731 }
732 }
733 (*info->fprintf_func) (info->stream, "#%8x", insn);
734 return sizeof(insn);
735}
GDB Binutils - Deliverables
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