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* hppa.h (pa_opcodes): Fix mask for probe and probei.
[deliverable/binutils-gdb.git] / opcodes / hppa-dis.c
CommitLineData
252b5132
RH		 1/* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
3
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include <ansidecl.h>
22#include "sysdep.h"
23#include "dis-asm.h"
24#include "libhppa.h"
25#include "opcode/hppa.h"
26
27/* Integer register names, indexed by the numbers which appear in the
28 opcodes. */
29static const char *const reg_names[] =
30 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
31 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
32 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
33 "sp", "r31"};
34
35/* Floating point register names, indexed by the numbers which appear in the
36 opcodes. */
37static const char *const fp_reg_names[] =
38 {"fpsr", "fpe2", "fpe4", "fpe6",
39 "fr4", "fr5", "fr6", "fr7", "fr8",
40 "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
41 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
42 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
43
44typedef unsigned int CORE_ADDR;
45
46/* Get at various relevent fields of an instruction word. */
47
48#define MASK_5 0x1f
3b67cf2b 49#define MASK_10 0x3ff
252b5132
RH		 50#define MASK_11 0x7ff
51#define MASK_14 0x3fff
52#define MASK_21 0x1fffff
53
54/* This macro gets bit fields using HP's numbering (MSB = 0) */
55
56#define GET_FIELD(X, FROM, TO) \
57 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
58
59/* Some of these have been converted to 2-d arrays because they
60 consume less storage this way. If the maintenance becomes a
61 problem, convert them back to const 1-d pointer arrays. */
58d0c905 62static const char *const control_reg[] = {
252b5132
RH		 63 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
64 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
65 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
66 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
67 "tr4", "tr5", "tr6", "tr7"
68};
69
58d0c905 70static const char *const compare_cond_names[] = {
b333b6c6
JL		 71 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od",
72 ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev"
73};
58d0c905 74static const char *const compare_cond_64_names[] = {
b333b6c6
JL		 75 "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od",
76 ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev"
77};
58d0c905 78static const char *const cmpib_cond_64_names[] = {
b333b6c6 79 ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>"
252b5132 80};
58d0c905 81static const char *const add_cond_names[] = {
b333b6c6
JL		 82 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od",
83 ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev"
84};
58d0c905 85static const char *const add_cond_64_names[] = {
d1e9bd1f 86 "", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od",
b333b6c6
JL		 87 ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev"
88};
58d0c905 89static const char *const wide_add_cond_names[] = {
b333b6c6
JL		 90 "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=",
91 ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>"
252b5132
RH		 92};
93static const char *const logical_cond_names[] = {
94 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
95 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
b333b6c6 96static const char *const logical_cond_64_names[] = {
d1e9bd1f 97 "", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
b333b6c6 98 ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
252b5132
RH		 99static const char *const unit_cond_names[] = {
100 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
101 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
102};
b333b6c6 103static const char *const unit_cond_64_names[] = {
d1e9bd1f 104 "", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
b333b6c6
JL		 105 ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc"
106};
58d0c905 107static const char *const shift_cond_names[] = {
252b5132
RH		 108 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
109};
58d0c905 110static const char *const shift_cond_64_names[] = {
d1e9bd1f 111 "", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
b333b6c6 112};
58d0c905 113static const char *const bb_cond_64_names[] = {
b333b6c6
JL		 114 ",*<", ",*>="
115};
58d0c905
JL		 116static const char *const index_compl_names[] = {"", ",m", ",s", ",sm"};
117static const char *const short_ldst_compl_names[] = {"", ",ma", "", ",mb"};
252b5132
RH		 118static const char *const short_bytes_compl_names[] = {
119 "", ",b,m", ",e", ",e,m"
120};
121static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"};
58d0c905 122static const char *const float_comp_names[] =
252b5132
RH		 123{
124 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
125 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
126 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
127 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
128};
58d0c905
JL		 129static const char *const signed_unsigned_names[] = {",u", ",s"};
130static const char *const mix_half_names[] = {",l", ",r"};
131static const char *const saturation_names[] = {",us", ",ss", 0, ""};
132static const char *const read_write_names[] = {",r", ",w"};
133static const char *const add_compl_names[] = { 0, "", ",l", ",tsv" };
252b5132
RH		 134
135/* For a bunch of different instructions form an index into a
136 completer name table. */
137#define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
138 GET_FIELD (insn, 18, 18) << 1)
139
140#define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
141 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
142
143/* Utility function to print registers. Put these first, so gcc's function
144 inlining can do its stuff. */
145
146#define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
147
148static void
149fput_reg (reg, info)
150 unsigned reg;
151 disassemble_info *info;
152{
153 (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
154}
155
156static void
157fput_fp_reg (reg, info)
158 unsigned reg;
159 disassemble_info *info;
160{
161 (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
162}
163
164static void
165fput_fp_reg_r (reg, info)
166 unsigned reg;
167 disassemble_info *info;
168{
169 /* Special case floating point exception registers. */
170 if (reg < 4)
171 (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1);
172 else
173 (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg]
174 : "fr0");
175}
176
177static void
178fput_creg (reg, info)
179 unsigned reg;
180 disassemble_info *info;
181{
182 (*info->fprintf_func) (info->stream, control_reg[reg]);
183}
184
185/* print constants with sign */
186
187static void
188fput_const (num, info)
189 unsigned num;
190 disassemble_info *info;
191{
192 if ((int)num < 0)
193 (*info->fprintf_func) (info->stream, "-%x", -(int)num);
194 else
195 (*info->fprintf_func) (info->stream, "%x", num);
196}
197
198/* Routines to extract various sized constants out of hppa
199 instructions. */
200
201/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
202static int
203extract_3 (word)
204 unsigned word;
205{
206 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
207}
208
209static int
210extract_5_load (word)
211 unsigned word;
212{
213 return low_sign_extend (word >> 16 & MASK_5, 5);
214}
215
216/* extract the immediate field from a st{bhw}s instruction */
217static int
218extract_5_store (word)
219 unsigned word;
220{
221 return low_sign_extend (word & MASK_5, 5);
222}
223
224/* extract the immediate field from a break instruction */
225static unsigned
226extract_5r_store (word)
227 unsigned word;
228{
229 return (word & MASK_5);
230}
231
232/* extract the immediate field from a {sr}sm instruction */
233static unsigned
234extract_5R_store (word)
235 unsigned word;
236{
237 return (word >> 16 & MASK_5);
238}
239
3b67cf2b
JL		 240/* extract the 10 bit immediate field from a {sr}sm instruction */
241static unsigned
242extract_10U_store (word)
243 unsigned word;
244{
245 return (word >> 16 & MASK_10);
246}
247
252b5132
RH		 248/* extract the immediate field from a bb instruction */
249static unsigned
250extract_5Q_store (word)
251 unsigned word;
252{
253 return (word >> 21 & MASK_5);
254}
255
256/* extract an 11 bit immediate field */
257static int
258extract_11 (word)
259 unsigned word;
260{
261 return low_sign_extend (word & MASK_11, 11);
262}
263
264/* extract a 14 bit immediate field */
265static int
266extract_14 (word)
267 unsigned word;
268{
269 return low_sign_extend (word & MASK_14, 14);
270}
271
272/* extract a 21 bit constant */
273
274static int
275extract_21 (word)
276 unsigned word;
277{
278 int val;
279
280 word &= MASK_21;
281 word <<= 11;
282 val = GET_FIELD (word, 20, 20);
283 val <<= 11;
284 val |= GET_FIELD (word, 9, 19);
285 val <<= 2;
286 val |= GET_FIELD (word, 5, 6);
287 val <<= 5;
288 val |= GET_FIELD (word, 0, 4);
289 val <<= 2;
290 val |= GET_FIELD (word, 7, 8);
291 return sign_extend (val, 21) << 11;
292}
293
294/* extract a 12 bit constant from branch instructions */
295
296static int
297extract_12 (word)
298 unsigned word;
299{
300 return sign_extend (GET_FIELD (word, 19, 28) |
301 GET_FIELD (word, 29, 29) << 10 |
302 (word & 0x1) << 11, 12) << 2;
303}
304
305/* extract a 17 bit constant from branch instructions, returning the
306 19 bit signed value. */
307
308static int
309extract_17 (word)
310 unsigned word;
311{
312 return sign_extend (GET_FIELD (word, 19, 28) |
313 GET_FIELD (word, 29, 29) << 10 |
314 GET_FIELD (word, 11, 15) << 11 |
315 (word & 0x1) << 16, 17) << 2;
316}
317
318/* Print one instruction. */
319int
320print_insn_hppa (memaddr, info)
321 bfd_vma memaddr;
322 disassemble_info *info;
323{
324 bfd_byte buffer[4];
325 unsigned int insn, i;
326
327 {
328 int status =
329 (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info);
330 if (status != 0)
331 {
332 (*info->memory_error_func) (status, memaddr, info);
333 return -1;
334 }
335 }
336
337 insn = bfd_getb32 (buffer);
338
339 for (i = 0; i < NUMOPCODES; ++i)
340 {
341 const struct pa_opcode *opcode = &pa_opcodes[i];
342 if ((insn & opcode->mask) == opcode->match)
343 {
344 register const char *s;
345
346 (*info->fprintf_func) (info->stream, "%s", opcode->name);
347
feb12992 348 if (!strchr ("cfCY?-+nHNZFIu", opcode->args[0]))
252b5132
RH		 349 (*info->fprintf_func) (info->stream, " ");
350 for (s = opcode->args; *s != '\0'; ++s)
351 {
352 switch (*s)
353 {
354 case 'x':
355 fput_reg (GET_FIELD (insn, 11, 15), info);
356 break;
1eee34f5 357 case 'a':
252b5132
RH		 358 case 'b':
359 fput_reg (GET_FIELD (insn, 6, 10), info);
360 break;
361 case '^':
362 fput_creg (GET_FIELD (insn, 6, 10), info);
363 break;
252b5132
RH		 364 case 't':
365 fput_reg (GET_FIELD (insn, 27, 31), info);
366 break;
a349b151
JL		 367
368 /* Handle floating point registers. */
369 case 'f':
370 switch (*++s)
371 {
372 case 't':
252b5132 373 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
a349b151
JL		 374 break;
375 case 'T':
376 if (GET_FIELD (insn, 25, 25))
377 fput_fp_reg_r (GET_FIELD (insn, 27, 31), info);
378 else
379 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
380 break;
381 case 'a':
382 if (GET_FIELD (insn, 25, 25))
383 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
384 else
385 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
386 break;
387 case 'A':
388 if (GET_FIELD (insn, 24, 24))
389 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
390 else
391 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
392
393 break;
394 case 'b':
395 if (GET_FIELD (insn, 25, 25))
396 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
397 else
398 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
399 break;
400 case 'B':
401 if (GET_FIELD (insn, 19, 19))
402 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
403 else
404 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
405 break;
406 case 'C':
407 {
408 int reg = GET_FIELD (insn, 21, 22);
409 reg |= GET_FIELD (insn, 16, 18) << 2;
410 if (GET_FIELD (insn, 23, 23) != 0)
411 fput_fp_reg_r (reg, info);
412 else
413 fput_fp_reg (reg, info);
414 break;
415 }
416 case 'i':
417 {
418 int reg = GET_FIELD (insn, 6, 10);
252b5132 419
a349b151
JL		 420 reg |= (GET_FIELD (insn, 26, 26) << 4);
421 fput_fp_reg (reg, info);
422 break;
423 }
424 case 'j':
425 {
426 int reg = GET_FIELD (insn, 11, 15);
252b5132 427
a349b151
JL		 428 reg |= (GET_FIELD (insn, 26, 26) << 4);
429 fput_fp_reg (reg, info);
430 break;
431 }
432 case 'k':
433 {
434 int reg = GET_FIELD (insn, 27, 31);
252b5132 435
a349b151
JL		 436 reg |= (GET_FIELD (insn, 26, 26) << 4);
437 fput_fp_reg (reg, info);
438 break;
439 }
440 case 'l':
441 {
442 int reg = GET_FIELD (insn, 21, 25);
252b5132 443
a349b151
JL		 444 reg |= (GET_FIELD (insn, 26, 26) << 4);
445 fput_fp_reg (reg, info);
446 break;
447 }
448 case 'm':
449 {
450 int reg = GET_FIELD (insn, 16, 20);
451
452 reg |= (GET_FIELD (insn, 26, 26) << 4);
453 fput_fp_reg (reg, info);
454 break;
455 }
456 }
252b5132 457
252b5132
RH		 458 case '5':
459 fput_const (extract_5_load (insn), info);
460 break;
461 case 's':
462 (*info->fprintf_func) (info->stream,
463 "sr%d", GET_FIELD (insn, 16, 17));
464 break;
b333b6c6 465
252b5132
RH		 466 case 'S':
467 (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn));
468 break;
3281117a
JL		 469
470 /* Handle completers. */
252b5132 471 case 'c':
3281117a
JL		 472 switch (*++s)
473 {
474 case 'x':
475 (*info->fprintf_func) (info->stream, "%s ",
476 index_compl_names[GET_COMPL (insn)]);
477 break;
478 case 'm':
479 (*info->fprintf_func) (info->stream, "%s ",
480 short_ldst_compl_names[GET_COMPL (insn)]);
481 break;
482 case 's':
483 (*info->fprintf_func) (info->stream, "%s ",
484 short_bytes_compl_names[GET_COMPL (insn)]);
485 break;
3b67cf2b
JL		 486 case 'L':
487 (*info->fprintf_func) (info->stream, ",l");
488 break;
489 case 'w':
490 (*info->fprintf_func) (info->stream, "%s ",
491 read_write_names[GET_FIELD (insn, 25, 25)]);
492 break;
493 case 'W':
494 (*info->fprintf_func) (info->stream, ",w");
495 break;
496 case 'r':
497 if (GET_FIELD (insn, 23, 26) == 5)
498 (*info->fprintf_func) (info->stream, ",r");
499 break;
3281117a
JL		 500 case 'Z':
501 if (GET_FIELD (insn, 26, 26))
502 (*info->fprintf_func) (info->stream, ",m ");
503 else
504 (*info->fprintf_func) (info->stream, " ");
505 break;
3b67cf2b
JL		 506 case 'i':
507 if (GET_FIELD (insn, 25, 25))
508 (*info->fprintf_func) (info->stream, ",i");
509 break;
af10de82
JL		 510 case 'z':
511 if (!GET_FIELD (insn, 21, 21))
512 (*info->fprintf_func) (info->stream, ",z");
513 break;
3b67cf2b
JL		 514 case 'a':
515 (*info->fprintf_func)
516 (info->stream, "%s", add_compl_names[GET_FIELD
517 (insn, 20, 21)]);
518 break;
519 case 'Y':
520 (*info->fprintf_func)
521 (info->stream, ",dc%s", add_compl_names[GET_FIELD
522 (insn, 20, 21)]);
523 break;
524 case 'y':
525 (*info->fprintf_func)
526 (info->stream, ",c%s", add_compl_names[GET_FIELD
527 (insn, 20, 21)]);
528 break;
529 case 'v':
530 if (GET_FIELD (insn, 20, 20))
531 (*info->fprintf_func) (info->stream, ",tsv");
532 break;
533 case 't':
534 (*info->fprintf_func) (info->stream, ",tc");
535 if (GET_FIELD (insn, 20, 20))
536 (*info->fprintf_func) (info->stream, ",tsv");
537 break;
538 case 'B':
539 (*info->fprintf_func) (info->stream, ",db");
540 if (GET_FIELD (insn, 20, 20))
541 (*info->fprintf_func) (info->stream, ",tsv");
542 break;
543 case 'b':
544 (*info->fprintf_func) (info->stream, ",b");
545 if (GET_FIELD (insn, 20, 20))
546 (*info->fprintf_func) (info->stream, ",tsv");
547 break;
548 case 'T':
549 if (GET_FIELD (insn, 25, 25))
550 (*info->fprintf_func) (info->stream, ",tc");
551 break;
1eee34f5
JL		 552 case 'S':
553 /* EXTRD/W has a following condition. */
554 if (*(s + 1) == '?')
555 (*info->fprintf_func)
556 (info->stream, "%s", signed_unsigned_names[GET_FIELD
557 (insn, 21, 21)]);
558 else
559 (*info->fprintf_func)
560 (info->stream, "%s ", signed_unsigned_names[GET_FIELD
561 (insn, 21, 21)]);
562 break;
563 case 'h':
564 (*info->fprintf_func)
565 (info->stream, "%s", mix_half_names[GET_FIELD
566 (insn, 17, 17)]);
567 break;
568 case 'H':
569 (*info->fprintf_func)
570 (info->stream, "%s", saturation_names[GET_FIELD
571 (insn, 24, 25)]);
572 break;
573 case '*':
574 (*info->fprintf_func)
575 (info->stream, ",%d%d%d%d ",
576 GET_FIELD (insn, 17, 18), GET_FIELD (insn, 20, 21),
577 GET_FIELD (insn, 22, 23), GET_FIELD (insn, 24, 25));
578 break;
3281117a 579 }
252b5132 580 break;
feb12992
JL		 581
582 /* Handle conditions. */
252b5132 583 case '?':
feb12992
JL		 584 {
585 s++;
586 switch (*s)
587 {
588 case 'f':
589 (*info->fprintf_func) (info->stream, "%s ",
590 float_comp_names[GET_FIELD
591 (insn, 27, 31)]);
592 break;
593
594 /* these four conditions are for the set of instructions
595 which distinguish true/false conditions by opcode
596 rather than by the 'f' bit (sigh): comb, comib,
597 addb, addib */
598 case 't':
a349b151 599 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)],
feb12992
JL		 600 info);
601 break;
b333b6c6
JL		 602 case 'T':
603 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
604 + 8], info);
605 break;
606 case 'r':
607 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)],
608 info);
609 break;
610 case 'R':
611 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)
612 + 8], info);
613 break;
614 case 'Q':
615 fputs_filtered (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)],
616 info);
617 break;
feb12992 618 case 'n':
a349b151 619 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
feb12992
JL		 620 + GET_FIELD (insn, 4, 4) * 8], info);
621 break;
622 case '@':
623 fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18)
624 + GET_FIELD (insn, 4, 4) * 8], info);
625 break;
626 case 's':
627 (*info->fprintf_func) (info->stream, "%s ",
628 compare_cond_names[GET_COND (insn)]);
629 break;
b333b6c6
JL		 630 case 'S':
631 (*info->fprintf_func) (info->stream, "%s ",
632 compare_cond_64_names[GET_COND (insn)]);
633 break;
feb12992
JL		 634 case 'a':
635 (*info->fprintf_func) (info->stream, "%s ",
636 add_cond_names[GET_COND (insn)]);
637 break;
b333b6c6
JL		 638 case 'A':
639 (*info->fprintf_func) (info->stream, "%s ",
640 add_cond_64_names[GET_COND (insn)]);
641 break;
feb12992
JL		 642 case 'd':
643 (*info->fprintf_func) (info->stream, "%s",
a349b151 644 add_cond_names[GET_FIELD (insn, 16, 18)]);
feb12992 645 break;
a349b151 646
b333b6c6
JL		 647 case 'D':
648 (*info->fprintf_func) (info->stream, "%s",
a349b151
JL		 649 add_cond_names[GET_FIELD (insn, 16, 18)
650 + 8]);
b333b6c6
JL		 651 break;
652 case 'w':
a349b151 653 (*info->fprintf_func)
b333b6c6
JL		 654 (info->stream, "%s",
655 wide_add_cond_names[GET_FIELD (insn, 16, 18)]);
656 break;
657
658 case 'W':
a349b151 659 (*info->fprintf_func)
b333b6c6
JL		 660 (info->stream, "%s",
661 wide_add_cond_names[GET_FIELD (insn, 16, 18) + 8]);
662 break;
feb12992
JL		 663
664 case 'l':
665 (*info->fprintf_func) (info->stream, "%s ",
666 logical_cond_names[GET_COND (insn)]);
667 break;
b333b6c6
JL		 668 case 'L':
669 (*info->fprintf_func) (info->stream, "%s ",
670 logical_cond_64_names[GET_COND (insn)]);
671 break;
feb12992
JL		 672 case 'u':
673 (*info->fprintf_func) (info->stream, "%s ",
674 unit_cond_names[GET_COND (insn)]);
675 break;
b333b6c6
JL		 676 case 'U':
677 (*info->fprintf_func) (info->stream, "%s ",
678 unit_cond_64_names[GET_COND (insn)]);
679 break;
feb12992
JL		 680 case 'y':
681 case 'x':
682 case 'b':
683 (*info->fprintf_func)
684 (info->stream, "%s",
685 shift_cond_names[GET_FIELD (insn, 16, 18)]);
686
687 /* If the next character in args is 'n', it will handle
688 putting out the space. */
689 if (s[1] != 'n')
690 (*info->fprintf_func) (info->stream, " ");
691 break;
b333b6c6
JL		 692 case 'X':
693 (*info->fprintf_func) (info->stream, "%s",
694 shift_cond_64_names[GET_FIELD (insn, 16, 18)]);
695 break;
696 case 'B':
697 (*info->fprintf_func)
698 (info->stream, "%s",
699 bb_cond_64_names[GET_FIELD (insn, 16, 16)]);
feb12992 700
b333b6c6
JL		 701 /* If the next character in args is 'n', it will handle
702 putting out the space. */
703 if (s[1] != 'n')
704 (*info->fprintf_func) (info->stream, " ");
705 break;
feb12992
JL		 706 }
707 break;
708 }
252b5132 709
252b5132
RH		 710 case 'V':
711 fput_const (extract_5_store (insn), info);
712 break;
713 case 'r':
714 fput_const (extract_5r_store (insn), info);
715 break;
716 case 'R':
717 fput_const (extract_5R_store (insn), info);
718 break;
3b67cf2b
JL		 719 case 'U':
720 fput_const (extract_10U_store (insn), info);
721 break;
252b5132
RH		 722 case 'Q':
723 fput_const (extract_5Q_store (insn), info);
724 break;
725 case 'i':
726 fput_const (extract_11 (insn), info);
727 break;
728 case 'j':
729 fput_const (extract_14 (insn), info);
730 break;
731 case 'k':
732 fput_const (extract_21 (insn), info);
733 break;
734 case 'n':
735 if (insn & 0x2)
736 (*info->fprintf_func) (info->stream, ",n ");
737 else
738 (*info->fprintf_func) (info->stream, " ");
739 break;
740 case 'N':
741 if ((insn & 0x20) && s[1])
742 (*info->fprintf_func) (info->stream, ",n ");
743 else if (insn & 0x20)
744 (*info->fprintf_func) (info->stream, ",n");
745 else if (s[1])
746 (*info->fprintf_func) (info->stream, " ");
747 break;
748 case 'w':
749 (*info->print_address_func) (memaddr + 8 + extract_12 (insn),
750 info);
751 break;
752 case 'W':
753 /* 17 bit PC-relative branch. */
754 (*info->print_address_func) ((memaddr + 8
755 + extract_17 (insn)),
756 info);
757 break;
758 case 'z':
759 /* 17 bit displacement. This is an offset from a register
760 so it gets disasssembled as just a number, not any sort
761 of address. */
762 fput_const (extract_17 (insn), info);
763 break;
d1e9bd1f
JL		 764
765 case 'Z':
766 /* addil %r1 implicit output. */
2beaab59 767 (*info->fprintf_func) (info->stream, "%%r1");
d1e9bd1f
JL		 768 break;
769
46424e05
JL		 770 case '.':
771 (*info->fprintf_func) (info->stream, "%d",
772 GET_FIELD (insn, 24, 25));
773 break;
3b67cf2b
JL		 774 case '*':
775 (*info->fprintf_func) (info->stream, "%d",
776 GET_FIELD (insn, 22, 25));
777 break;
b7d6d485 778 case '!':
2beaab59 779 (*info->fprintf_func) (info->stream, "%%sar");
b7d6d485 780 break;
252b5132
RH		 781 case 'p':
782 (*info->fprintf_func) (info->stream, "%d",
783 31 - GET_FIELD (insn, 22, 26));
784 break;
46424e05
JL		 785 case '~':
786 {
787 int num;
788 num = GET_FIELD (insn, 20, 20) << 5;
789 num |= GET_FIELD (insn, 22, 26);
790 (*info->fprintf_func) (info->stream, "%d", 63 - num);
791 break;
792 }
252b5132
RH		 793 case 'P':
794 (*info->fprintf_func) (info->stream, "%d",
795 GET_FIELD (insn, 22, 26));
796 break;
af10de82
JL		 797 case 'q':
798 {
799 int num;
800 num = GET_FIELD (insn, 20, 20) << 5;
801 num |= GET_FIELD (insn, 22, 26);
802 (*info->fprintf_func) (info->stream, "%d", num);
803 break;
804 }
252b5132
RH		 805 case 'T':
806 (*info->fprintf_func) (info->stream, "%d",
807 32 - GET_FIELD (insn, 27, 31));
808 break;
af10de82
JL		 809 case '%':
810 {
811 int num;
812 num = (GET_FIELD (insn, 23, 23) + 1) * 32;
813 num -= GET_FIELD (insn, 27, 31);
814 (*info->fprintf_func) (info->stream, "%d", num);
815 break;
816 }
817 case '|':
818 {
819 int num;
820 num = (GET_FIELD (insn, 19, 19) + 1) * 32;
821 num -= GET_FIELD (insn, 27, 31);
822 (*info->fprintf_func) (info->stream, "%d", num);
823 break;
824 }
46424e05
JL		 825 case '$':
826 fput_const (GET_FIELD (insn, 20, 28), info);
827 break;
252b5132
RH		 828 case 'A':
829 fput_const (GET_FIELD (insn, 6, 18), info);
830 break;
252b5132
RH		 831 case 'D':
832 fput_const (GET_FIELD (insn, 6, 31), info);
833 break;
a349b151 834 case 'v':
252b5132
RH		 835 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
836 break;
837 case 'O':
838 fput_const ((GET_FIELD (insn, 6,20) << 5 |
839 GET_FIELD (insn, 27, 31)), info);
840 break;
841 case 'o':
842 fput_const (GET_FIELD (insn, 6, 20), info);
843 break;
252b5132
RH		 844 case '2':
845 fput_const ((GET_FIELD (insn, 6, 22) << 5 |
846 GET_FIELD (insn, 27, 31)), info);
847 break;
848 case '1':
849 fput_const ((GET_FIELD (insn, 11, 20) << 5 |
850 GET_FIELD (insn, 27, 31)), info);
851 break;
852 case '0':
853 fput_const ((GET_FIELD (insn, 16, 20) << 5 |
854 GET_FIELD (insn, 27, 31)), info);
855 break;
856 case 'u':
857 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
858 break;
859 case 'F':
860 /* if no destination completer and not before a completer
861 for fcmp, need a space here */
4f312591 862 if (s[1] == 'G' || s[1] == '?')
252b5132
RH		 863 fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
864 info);
865 else
866 (*info->fprintf_func) (info->stream, "%s ",
867 float_format_names[GET_FIELD
868 (insn, 19, 20)]);
869 break;
870 case 'G':
871 (*info->fprintf_func) (info->stream, "%s ",
872 float_format_names[GET_FIELD (insn,
873 17, 18)]);
874 break;
875 case 'H':
876 if (GET_FIELD (insn, 26, 26) == 1)
877 (*info->fprintf_func) (info->stream, "%s ",
878 float_format_names[0]);
879 else
880 (*info->fprintf_func) (info->stream, "%s ",
881 float_format_names[1]);
882 break;
883 case 'I':
884 /* if no destination completer and not before a completer
885 for fcmp, need a space here */
4f312591 886 if (s[1] == '?')
252b5132
RH		 887 fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)],
888 info);
889 else
890 (*info->fprintf_func) (info->stream, "%s ",
891 float_format_names[GET_FIELD
892 (insn, 20, 20)]);
893 break;
252b5132
RH		 894 default:
895 (*info->fprintf_func) (info->stream, "%c", *s);
896 break;
897 }
898 }
899 return sizeof(insn);
900 }
901 }
902 (*info->fprintf_func) (info->stream, "#%8x", insn);
903 return sizeof(insn);
904}
GDB Binutils - Deliverables
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