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[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
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252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
0112cd26 3 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
252b5132 4
20f0a1fc
NC		 5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
f4321104 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20f0a1fc
NC		 20
21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27/* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
252b5132
RH		 33
34#include "dis-asm.h"
35#include "sysdep.h"
36#include "opintl.h"
37
272c9217 38#define MAXLEN 15
252b5132
RH		 39
40#include <setjmp.h>
41
42#ifndef UNIXWARE_COMPAT
43/* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45#define UNIXWARE_COMPAT 1
46#endif
47
26ca5450
AJ		 48static int fetch_data (struct disassemble_info *, bfd_byte *);
49static void ckprefix (void);
50static const char *prefix_name (int, int);
51static int print_insn (bfd_vma, disassemble_info *);
52static void dofloat (int);
53static void OP_ST (int, int);
54static void OP_STi (int, int);
55static int putop (const char *, int);
56static void oappend (const char *);
57static void append_seg (void);
58static void OP_indirE (int, int);
59static void print_operand_value (char *, int, bfd_vma);
60static void OP_E (int, int);
61static void OP_G (int, int);
62static bfd_vma get64 (void);
63static bfd_signed_vma get32 (void);
64static bfd_signed_vma get32s (void);
65static int get16 (void);
66static void set_op (bfd_vma, int);
67static void OP_REG (int, int);
68static void OP_IMREG (int, int);
69static void OP_I (int, int);
70static void OP_I64 (int, int);
71static void OP_sI (int, int);
72static void OP_J (int, int);
73static void OP_SEG (int, int);
74static void OP_DIR (int, int);
75static void OP_OFF (int, int);
76static void OP_OFF64 (int, int);
77static void ptr_reg (int, int);
78static void OP_ESreg (int, int);
79static void OP_DSreg (int, int);
80static void OP_C (int, int);
81static void OP_D (int, int);
82static void OP_T (int, int);
83static void OP_Rd (int, int);
84static void OP_MMX (int, int);
85static void OP_XMM (int, int);
86static void OP_EM (int, int);
87static void OP_EX (int, int);
4d9567e0
MM		 88static void OP_EMC (int,int);
89static void OP_MXC (int,int);
26ca5450
AJ		 90static void OP_MS (int, int);
91static void OP_XS (int, int);
cc0ec051 92static void OP_M (int, int);
90700ea2 93static void OP_VMX (int, int);
cc0ec051
AM		 94static void OP_0fae (int, int);
95static void OP_0f07 (int, int);
46e883c5
L		 96static void NOP_Fixup1 (int, int);
97static void NOP_Fixup2 (int, int);
26ca5450
AJ		 98static void OP_3DNowSuffix (int, int);
99static void OP_SIMD_Suffix (int, int);
100static void SIMD_Fixup (int, int);
101static void PNI_Fixup (int, int);
30123838 102static void SVME_Fixup (int, int);
4fd61dcb 103static void INVLPG_Fixup (int, int);
26ca5450 104static void BadOp (void);
90700ea2 105static void VMX_Fixup (int, int);
35c52694 106static void REP_Fixup (int, int);
252b5132 107
6608db57 108struct dis_private {
252b5132
RH		 109 /* Points to first byte not fetched. */
110 bfd_byte *max_fetched;
111 bfd_byte the_buffer[MAXLEN];
112 bfd_vma insn_start;
e396998b 113 int orig_sizeflag;
252b5132
RH		 114 jmp_buf bailout;
115};
116
5076851f
ILT		 117/* The opcode for the fwait instruction, which we treat as a prefix
118 when we can. */
119#define FWAIT_OPCODE (0x9b)
120
cb712a9e
L		 121enum address_mode
122{
123 mode_16bit,
124 mode_32bit,
125 mode_64bit
126};
127
128enum address_mode address_mode;
52b15da3 129
5076851f
ILT		 130/* Flags for the prefixes for the current instruction. See below. */
131static int prefixes;
132
52b15da3
JH		 133/* REX prefix the current instruction. See below. */
134static int rex;
135/* Bits of REX we've already used. */
136static int rex_used;
137#define REX_MODE64 8
138#define REX_EXTX 4
139#define REX_EXTY 2
140#define REX_EXTZ 1
141/* Mark parts used in the REX prefix. When we are testing for
142 empty prefix (for 8bit register REX extension), just mask it
143 out. Otherwise test for REX bit is excuse for existence of REX
144 only in case value is nonzero. */
145#define USED_REX(value) \
146 { \
147 if (value) \
148 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
149 else \
150 rex_used |= 0x40; \
151 }
152
7d421014
ILT		 153/* Flags for prefixes which we somehow handled when printing the
154 current instruction. */
155static int used_prefixes;
156
5076851f
ILT		 157/* Flags stored in PREFIXES. */
158#define PREFIX_REPZ 1
159#define PREFIX_REPNZ 2
160#define PREFIX_LOCK 4
161#define PREFIX_CS 8
162#define PREFIX_SS 0x10
163#define PREFIX_DS 0x20
164#define PREFIX_ES 0x40
165#define PREFIX_FS 0x80
166#define PREFIX_GS 0x100
167#define PREFIX_DATA 0x200
168#define PREFIX_ADDR 0x400
169#define PREFIX_FWAIT 0x800
170
252b5132
RH		 171/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
172 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
173 on error. */
174#define FETCH_DATA(info, addr) \
6608db57 175 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
252b5132
RH		 176 ? 1 : fetch_data ((info), (addr)))
177
178static int
26ca5450 179fetch_data (struct disassemble_info *info, bfd_byte *addr)
252b5132
RH		 180{
181 int status;
6608db57 182 struct dis_private *priv = (struct dis_private *) info->private_data;
252b5132
RH		 183 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
184
272c9217
JB		 185 if (addr <= priv->the_buffer + MAXLEN)
186 status = (*info->read_memory_func) (start,
187 priv->max_fetched,
188 addr - priv->max_fetched,
189 info);
190 else
191 status = -1;
252b5132
RH		 192 if (status != 0)
193 {
7d421014 194 /* If we did manage to read at least one byte, then
db6eb5be
AM		 195 print_insn_i386 will do something sensible. Otherwise, print
196 an error. We do that here because this is where we know
197 STATUS. */
7d421014 198 if (priv->max_fetched == priv->the_buffer)
5076851f 199 (*info->memory_error_func) (status, start, info);
252b5132
RH		 200 longjmp (priv->bailout, 1);
201 }
202 else
203 priv->max_fetched = addr;
204 return 1;
205}
206
57d91c3c
ILT		 207#define XX NULL, 0
208
252b5132 209#define Eb OP_E, b_mode
52b15da3
JH		 210#define Ev OP_E, v_mode
211#define Ed OP_E, d_mode
9306ca4a 212#define Eq OP_E, q_mode
db6eb5be 213#define Edq OP_E, dq_mode
9306ca4a 214#define Edqw OP_E, dqw_mode
1a114b12 215#define indirEv OP_indirE, stack_v_mode
9306ca4a 216#define indirEp OP_indirE, f_mode
1a114b12 217#define stackEv OP_E, stack_v_mode
90700ea2 218#define Em OP_E, m_mode
252b5132
RH		 219#define Ew OP_E, w_mode
220#define Ma OP_E, v_mode
cc0ec051 221#define M OP_M, 0 /* lea, lgdt, etc. */
9306ca4a 222#define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
992aaec9 223#define Gb OP_G, b_mode
252b5132 224#define Gv OP_G, v_mode
992aaec9 225#define Gd OP_G, d_mode
9306ca4a 226#define Gdq OP_G, dq_mode
90700ea2 227#define Gm OP_G, m_mode
252b5132 228#define Gw OP_G, w_mode
2da11e11 229#define Rd OP_Rd, d_mode
52b15da3 230#define Rm OP_Rd, m_mode
252b5132
RH		 231#define Ib OP_I, b_mode
232#define sIb OP_sI, b_mode /* sign extened byte */
233#define Iv OP_I, v_mode
52b15da3
JH		 234#define Iq OP_I, q_mode
235#define Iv64 OP_I64, v_mode
252b5132 236#define Iw OP_I, w_mode
9306ca4a 237#define I1 OP_I, const_1_mode
252b5132
RH		 238#define Jb OP_J, b_mode
239#define Jv OP_J, v_mode
52b15da3
JH		 240#define Cm OP_C, m_mode
241#define Dm OP_D, m_mode
252b5132
RH		 242#define Td OP_T, d_mode
243
52b15da3
JH		 244#define RMeAX OP_REG, eAX_reg
245#define RMeBX OP_REG, eBX_reg
246#define RMeCX OP_REG, eCX_reg
247#define RMeDX OP_REG, eDX_reg
248#define RMeSP OP_REG, eSP_reg
249#define RMeBP OP_REG, eBP_reg
250#define RMeSI OP_REG, eSI_reg
251#define RMeDI OP_REG, eDI_reg
252#define RMrAX OP_REG, rAX_reg
253#define RMrBX OP_REG, rBX_reg
254#define RMrCX OP_REG, rCX_reg
255#define RMrDX OP_REG, rDX_reg
256#define RMrSP OP_REG, rSP_reg
257#define RMrBP OP_REG, rBP_reg
258#define RMrSI OP_REG, rSI_reg
259#define RMrDI OP_REG, rDI_reg
260#define RMAL OP_REG, al_reg
261#define RMAL OP_REG, al_reg
262#define RMCL OP_REG, cl_reg
263#define RMDL OP_REG, dl_reg
264#define RMBL OP_REG, bl_reg
265#define RMAH OP_REG, ah_reg
266#define RMCH OP_REG, ch_reg
267#define RMDH OP_REG, dh_reg
268#define RMBH OP_REG, bh_reg
269#define RMAX OP_REG, ax_reg
270#define RMDX OP_REG, dx_reg
271
272#define eAX OP_IMREG, eAX_reg
273#define eBX OP_IMREG, eBX_reg
274#define eCX OP_IMREG, eCX_reg
275#define eDX OP_IMREG, eDX_reg
276#define eSP OP_IMREG, eSP_reg
277#define eBP OP_IMREG, eBP_reg
278#define eSI OP_IMREG, eSI_reg
279#define eDI OP_IMREG, eDI_reg
280#define AL OP_IMREG, al_reg
52b15da3
JH		 281#define CL OP_IMREG, cl_reg
282#define DL OP_IMREG, dl_reg
283#define BL OP_IMREG, bl_reg
284#define AH OP_IMREG, ah_reg
285#define CH OP_IMREG, ch_reg
286#define DH OP_IMREG, dh_reg
287#define BH OP_IMREG, bh_reg
288#define AX OP_IMREG, ax_reg
289#define DX OP_IMREG, dx_reg
52fd6d94 290#define zAX OP_IMREG, z_mode_ax_reg
52b15da3 291#define indirDX OP_IMREG, indir_dx_reg
252b5132
RH		 292
293#define Sw OP_SEG, w_mode
ed7841b3 294#define Sv OP_SEG, v_mode
c608c12e 295#define Ap OP_DIR, 0
1a114b12
JB		 296#define Ob OP_OFF64, b_mode
297#define Ov OP_OFF64, v_mode
252b5132
RH		 298#define Xb OP_DSreg, eSI_reg
299#define Xv OP_DSreg, eSI_reg
52fd6d94 300#define Xz OP_DSreg, eSI_reg
252b5132
RH		 301#define Yb OP_ESreg, eDI_reg
302#define Yv OP_ESreg, eDI_reg
303#define DSBX OP_DSreg, eBX_reg
304
305#define es OP_REG, es_reg
306#define ss OP_REG, ss_reg
307#define cs OP_REG, cs_reg
308#define ds OP_REG, ds_reg
309#define fs OP_REG, fs_reg
310#define gs OP_REG, gs_reg
311
312#define MX OP_MMX, 0
c608c12e 313#define XM OP_XMM, 0
252b5132 314#define EM OP_EM, v_mode
c608c12e 315#define EX OP_EX, v_mode
2da11e11 316#define MS OP_MS, v_mode
992aaec9 317#define XS OP_XS, v_mode
4d9567e0
MM		 318#define EMC OP_EMC, v_mode
319#define MXC OP_MXC, 0
90700ea2 320#define VM OP_VMX, q_mode
252b5132 321#define OPSUF OP_3DNowSuffix, 0
c608c12e 322#define OPSIMD OP_SIMD_Suffix, 0
252b5132 323
35c52694
L		 324/* Used handle "rep" prefix for string instructions. */
325#define Xbr REP_Fixup, eSI_reg
326#define Xvr REP_Fixup, eSI_reg
327#define Ybr REP_Fixup, eDI_reg
328#define Yvr REP_Fixup, eDI_reg
52fd6d94 329#define Yzr REP_Fixup, eDI_reg
35c52694
L		 330#define indirDXr REP_Fixup, indir_dx_reg
331#define ALr REP_Fixup, al_reg
332#define eAXr REP_Fixup, eAX_reg
333
3ffd33cf
AM		 334#define cond_jump_flag NULL, cond_jump_mode
335#define loop_jcxz_flag NULL, loop_jcxz_mode
336
252b5132 337/* bits in sizeflag */
252b5132 338#define SUFFIX_ALWAYS 4
252b5132
RH		 339#define AFLAG 2
340#define DFLAG 1
341
52b15da3
JH		 342#define b_mode 1 /* byte operand */
343#define v_mode 2 /* operand size depends on prefixes */
344#define w_mode 3 /* word operand */
345#define d_mode 4 /* double word operand */
346#define q_mode 5 /* quad word operand */
9306ca4a
JB		 347#define t_mode 6 /* ten-byte operand */
348#define x_mode 7 /* 16-byte XMM operand */
349#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
350#define cond_jump_mode 9
351#define loop_jcxz_mode 10
352#define dq_mode 11 /* operand size depends on REX prefixes. */
353#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
354#define f_mode 13 /* 4- or 6-byte pointer operand */
355#define const_1_mode 14
1a114b12 356#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
52fd6d94 357#define z_mode 16 /* non-quad operand size depends on prefixes */
252b5132
RH		 358
359#define es_reg 100
360#define cs_reg 101
361#define ss_reg 102
362#define ds_reg 103
363#define fs_reg 104
364#define gs_reg 105
252b5132 365
c608c12e
AM		 366#define eAX_reg 108
367#define eCX_reg 109
368#define eDX_reg 110
369#define eBX_reg 111
370#define eSP_reg 112
371#define eBP_reg 113
372#define eSI_reg 114
373#define eDI_reg 115
252b5132
RH		 374
375#define al_reg 116
376#define cl_reg 117
377#define dl_reg 118
378#define bl_reg 119
379#define ah_reg 120
380#define ch_reg 121
381#define dh_reg 122
382#define bh_reg 123
383
384#define ax_reg 124
385#define cx_reg 125
386#define dx_reg 126
387#define bx_reg 127
388#define sp_reg 128
389#define bp_reg 129
390#define si_reg 130
391#define di_reg 131
392
52b15da3
JH		 393#define rAX_reg 132
394#define rCX_reg 133
395#define rDX_reg 134
396#define rBX_reg 135
397#define rSP_reg 136
398#define rBP_reg 137
399#define rSI_reg 138
400#define rDI_reg 139
401
52fd6d94 402#define z_mode_ax_reg 149
252b5132
RH		 403#define indir_dx_reg 150
404
6439fc28
AM		 405#define FLOATCODE 1
406#define USE_GROUPS 2
407#define USE_PREFIX_USER_TABLE 3
408#define X86_64_SPECIAL 4
331d2d0d 409#define IS_3BYTE_OPCODE 5
6439fc28 410
050dfa73
MM		 411#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0, NULL, 0
412
413#define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0, NULL, 0
414#define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0, NULL, 0
415#define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0, NULL, 0
416#define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0, NULL, 0
417#define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0, NULL, 0
418#define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0, NULL, 0
419#define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0, NULL, 0
420#define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0, NULL, 0
421#define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0, NULL, 0
422#define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0, NULL, 0
423#define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0, NULL, 0
424#define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0, NULL, 0
425#define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0, NULL, 0
426#define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0, NULL, 0
427#define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0, NULL, 0
428#define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0, NULL, 0
429#define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0, NULL, 0
7f4c972f
L		 430#define GRP11_C6 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0, NULL, 0
431#define GRP11_C7 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0, NULL, 0
a6bd098c
L		 432#define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0, NULL, 0
433#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0, NULL, 0
434#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0, NULL, 0
435#define GRP15 NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0, NULL, 0
436#define GRP16 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0, NULL, 0
437#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0, NULL, 0
438#define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 25, NULL, 0, NULL, 0
439#define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 26, NULL, 0, NULL, 0
050dfa73
MM		 440
441#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0, NULL, 0
442#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0, NULL, 0
443#define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0, NULL, 0
444#define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0, NULL, 0
445#define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0, NULL, 0
446#define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0, NULL, 0
447#define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0, NULL, 0
448#define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0, NULL, 0
449#define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0, NULL, 0
450#define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0, NULL, 0
451#define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0, NULL, 0
452#define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0, NULL, 0
453#define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0, NULL, 0
454#define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0, NULL, 0
455#define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0, NULL, 0
456#define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0, NULL, 0
457#define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0, NULL, 0
458#define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0, NULL, 0
459#define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0, NULL, 0
460#define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0, NULL, 0
461#define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0, NULL, 0
462#define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0, NULL, 0
463#define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0, NULL, 0
464#define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0, NULL, 0
465#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0, NULL, 0
466#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0, NULL, 0
467#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0, NULL, 0
468#define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0, NULL, 0
469#define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0, NULL, 0
470#define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0, NULL, 0
471#define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0, NULL, 0
472#define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0, NULL, 0
473#define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0, NULL, 0
474#define PREGRP33 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 33, NULL, 0, NULL, 0
475#define PREGRP34 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 34, NULL, 0, NULL, 0
476#define PREGRP35 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 35, NULL, 0, NULL, 0
477#define PREGRP36 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 36, NULL, 0, NULL, 0
7918206c
MM		 478#define PREGRP37 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 37, NULL, 0, NULL, 0
479
050dfa73 480
7f4c972f 481#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0, NULL, 0
5f754f58
L		 482#define X86_64_1 NULL, NULL, X86_64_SPECIAL, NULL, 1, NULL, 0, NULL, 0
483#define X86_64_2 NULL, NULL, X86_64_SPECIAL, NULL, 2, NULL, 0, NULL, 0
484#define X86_64_3 NULL, NULL, X86_64_SPECIAL, NULL, 3, NULL, 0, NULL, 0
050dfa73
MM		 485
486#define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0, NULL, 0
487#define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0, NULL, 0
331d2d0d 488
26ca5450 489typedef void (*op_rtn) (int bytemode, int sizeflag);
252b5132
RH		 490
491struct dis386 {
2da11e11 492 const char *name;
252b5132
RH		 493 op_rtn op1;
494 int bytemode1;
495 op_rtn op2;
496 int bytemode2;
497 op_rtn op3;
498 int bytemode3;
050dfa73
MM		 499 op_rtn op4;
500 int bytemode4;
252b5132
RH		 501};
502
503/* Upper case letters in the instruction names here are macros.
504 'A' => print 'b' if no register operands or suffix_always is true
505 'B' => print 'b' if suffix_always is true
9306ca4a
JB		 506 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
507 . size prefix
ed7841b3
JB		 508 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
509 . suffix_always is true
252b5132 510 'E' => print 'e' if 32-bit form of jcxz
3ffd33cf 511 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
52fd6d94 512 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
5dd0794d 513 'H' => print ",pt" or ",pn" branch hint
9306ca4a
JB		 514 'I' => honor following macro letter even in Intel mode (implemented only
515 . for some of the macro letters)
516 'J' => print 'l'
252b5132
RH		 517 'L' => print 'l' if suffix_always is true
518 'N' => print 'n' if instruction has no wait "prefix"
a35ca55a 519 'O' => print 'd' or 'o' (or 'q' in Intel mode)
52b15da3 520 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
e396998b
AM		 521 . or suffix_always is true. print 'q' if rex prefix is present.
522 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
523 . is true
a35ca55a 524 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
52b15da3 525 'S' => print 'w', 'l' or 'q' if suffix_always is true
6439fc28
AM		 526 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
527 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
1a114b12 528 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
a35ca55a 529 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
9306ca4a 530 'X' => print 's', 'd' depending on data16 prefix (for XMM)
76f227a5 531 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
6dd5059a 532 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
52b15da3 533
6439fc28
AM		 534 Many of the above letters print nothing in Intel mode. See "putop"
535 for the details.
52b15da3 536
6439fc28
AM		 537 Braces '{' and '}', and vertical bars '|', indicate alternative
538 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
539 modes. In cases where there are only two alternatives, the X86_64
540 instruction is reserved, and "(bad)" is printed.
541*/
252b5132 542
6439fc28 543static const struct dis386 dis386[] = {
252b5132 544 /* 00 */
050dfa73
MM		 545 { "addB", Eb, Gb, XX, XX },
546 { "addS", Ev, Gv, XX, XX },
547 { "addB", Gb, Eb, XX, XX },
548 { "addS", Gv, Ev, XX, XX },
549 { "addB", AL, Ib, XX, XX },
550 { "addS", eAX, Iv, XX, XX },
551 { "push{T|}", es, XX, XX, XX },
552 { "pop{T|}", es, XX, XX, XX },
252b5132 553 /* 08 */
050dfa73
MM		 554 { "orB", Eb, Gb, XX, XX },
555 { "orS", Ev, Gv, XX, XX },
556 { "orB", Gb, Eb, XX, XX },
7f4c972f 557 { "orS", Gv, Ev, XX, XX },
050dfa73
MM		 558 { "orB", AL, Ib, XX, XX },
559 { "orS", eAX, Iv, XX, XX },
560 { "push{T|}", cs, XX, XX, XX },
561 { "(bad)", XX, XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 562 /* 10 */
050dfa73
MM		 563 { "adcB", Eb, Gb, XX, XX },
564 { "adcS", Ev, Gv, XX, XX },
565 { "adcB", Gb, Eb, XX, XX },
566 { "adcS", Gv, Ev, XX, XX },
567 { "adcB", AL, Ib, XX, XX },
568 { "adcS", eAX, Iv, XX, XX },
569 { "push{T|}", ss, XX, XX, XX },
570 { "pop{T|}", ss, XX, XX, XX },
252b5132 571 /* 18 */
050dfa73
MM		 572 { "sbbB", Eb, Gb, XX, XX },
573 { "sbbS", Ev, Gv, XX, XX },
574 { "sbbB", Gb, Eb, XX, XX },
575 { "sbbS", Gv, Ev, XX, XX },
576 { "sbbB", AL, Ib, XX, XX },
577 { "sbbS", eAX, Iv, XX, XX },
578 { "push{T|}", ds, XX, XX, XX },
579 { "pop{T|}", ds, XX, XX, XX },
252b5132 580 /* 20 */
050dfa73
MM		 581 { "andB", Eb, Gb, XX, XX },
582 { "andS", Ev, Gv, XX, XX },
583 { "andB", Gb, Eb, XX, XX },
584 { "andS", Gv, Ev, XX, XX },
585 { "andB", AL, Ib, XX, XX },
586 { "andS", eAX, Iv, XX, XX },
587 { "(bad)", XX, XX, XX, XX }, /* SEG ES prefix */
588 { "daa{|}", XX, XX, XX, XX },
252b5132 589 /* 28 */
050dfa73 590 { "subB", Eb, Gb, XX, XX },
7f4c972f 591 { "subS", Ev, Gv, XX, XX },
050dfa73
MM		 592 { "subB", Gb, Eb, XX, XX },
593 { "subS", Gv, Ev, XX, XX },
594 { "subB", AL, Ib, XX, XX },
595 { "subS", eAX, Iv, XX, XX },
596 { "(bad)", XX, XX, XX, XX }, /* SEG CS prefix */
597 { "das{|}", XX, XX, XX, XX },
252b5132 598 /* 30 */
050dfa73
MM		 599 { "xorB", Eb, Gb, XX, XX },
600 { "xorS", Ev, Gv, XX, XX },
601 { "xorB", Gb, Eb, XX, XX },
602 { "xorS", Gv, Ev, XX, XX },
603 { "xorB", AL, Ib, XX, XX },
604 { "xorS", eAX, Iv, XX, XX },
605 { "(bad)", XX, XX, XX, XX }, /* SEG SS prefix */
606 { "aaa{|}", XX, XX, XX, XX },
252b5132 607 /* 38 */
050dfa73
MM		 608 { "cmpB", Eb, Gb, XX, XX },
609 { "cmpS", Ev, Gv, XX, XX },
610 { "cmpB", Gb, Eb, XX, XX },
611 { "cmpS", Gv, Ev, XX, XX },
612 { "cmpB", AL, Ib, XX, XX },
613 { "cmpS", eAX, Iv, XX, XX },
614 { "(bad)", XX, XX, XX, XX }, /* SEG DS prefix */
615 { "aas{|}", XX, XX, XX, XX },
252b5132 616 /* 40 */
050dfa73
MM		 617 { "inc{S|}", RMeAX, XX, XX, XX },
618 { "inc{S|}", RMeCX, XX, XX, XX },
619 { "inc{S|}", RMeDX, XX, XX, XX },
620 { "inc{S|}", RMeBX, XX, XX, XX },
621 { "inc{S|}", RMeSP, XX, XX, XX },
622 { "inc{S|}", RMeBP, XX, XX, XX },
623 { "inc{S|}", RMeSI, XX, XX, XX },
624 { "inc{S|}", RMeDI, XX, XX, XX },
252b5132 625 /* 48 */
050dfa73
MM		 626 { "dec{S|}", RMeAX, XX, XX, XX },
627 { "dec{S|}", RMeCX, XX, XX, XX },
628 { "dec{S|}", RMeDX, XX, XX, XX },
629 { "dec{S|}", RMeBX, XX, XX, XX },
630 { "dec{S|}", RMeSP, XX, XX, XX },
631 { "dec{S|}", RMeBP, XX, XX, XX },
632 { "dec{S|}", RMeSI, XX, XX, XX },
633 { "dec{S|}", RMeDI, XX, XX, XX },
252b5132 634 /* 50 */
050dfa73
MM		 635 { "pushV", RMrAX, XX, XX, XX },
636 { "pushV", RMrCX, XX, XX, XX },
637 { "pushV", RMrDX, XX, XX, XX },
638 { "pushV", RMrBX, XX, XX, XX },
639 { "pushV", RMrSP, XX, XX, XX },
640 { "pushV", RMrBP, XX, XX, XX },
641 { "pushV", RMrSI, XX, XX, XX },
642 { "pushV", RMrDI, XX, XX, XX },
252b5132 643 /* 58 */
050dfa73
MM		 644 { "popV", RMrAX, XX, XX, XX },
645 { "popV", RMrCX, XX, XX, XX },
646 { "popV", RMrDX, XX, XX, XX },
647 { "popV", RMrBX, XX, XX, XX },
648 { "popV", RMrSP, XX, XX, XX },
649 { "popV", RMrBP, XX, XX, XX },
650 { "popV", RMrSI, XX, XX, XX },
651 { "popV", RMrDI, XX, XX, XX },
252b5132 652 /* 60 */
6439fc28 653 { X86_64_0 },
5f754f58
L		 654 { X86_64_1 },
655 { X86_64_2 },
656 { X86_64_3 },
050dfa73
MM		 657 { "(bad)", XX, XX, XX, XX }, /* seg fs */
658 { "(bad)", XX, XX, XX, XX }, /* seg gs */
659 { "(bad)", XX, XX, XX, XX }, /* op size prefix */
660 { "(bad)", XX, XX, XX, XX }, /* adr size prefix */
252b5132 661 /* 68 */
050dfa73
MM		 662 { "pushT", Iq, XX, XX, XX },
663 { "imulS", Gv, Ev, Iv, XX },
664 { "pushT", sIb, XX, XX, XX },
665 { "imulS", Gv, Ev, sIb, XX },
666 { "ins{b||b|}", Ybr, indirDX, XX, XX },
52fd6d94 667 { "ins{R||G|}", Yzr, indirDX, XX, XX },
050dfa73 668 { "outs{b||b|}", indirDXr, Xb, XX, XX },
52fd6d94 669 { "outs{R||G|}", indirDXr, Xz, XX, XX },
252b5132 670 /* 70 */
050dfa73
MM		 671 { "joH", Jb, XX, cond_jump_flag, XX },
672 { "jnoH", Jb, XX, cond_jump_flag, XX },
673 { "jbH", Jb, XX, cond_jump_flag, XX },
674 { "jaeH", Jb, XX, cond_jump_flag, XX },
675 { "jeH", Jb, XX, cond_jump_flag, XX },
676 { "jneH", Jb, XX, cond_jump_flag, XX },
677 { "jbeH", Jb, XX, cond_jump_flag, XX },
678 { "jaH", Jb, XX, cond_jump_flag, XX },
252b5132 679 /* 78 */
050dfa73
MM		 680 { "jsH", Jb, XX, cond_jump_flag, XX },
681 { "jnsH", Jb, XX, cond_jump_flag, XX },
682 { "jpH", Jb, XX, cond_jump_flag, XX },
683 { "jnpH", Jb, XX, cond_jump_flag, XX },
684 { "jlH", Jb, XX, cond_jump_flag, XX },
685 { "jgeH", Jb, XX, cond_jump_flag, XX },
686 { "jleH", Jb, XX, cond_jump_flag, XX },
687 { "jgH", Jb, XX, cond_jump_flag, XX },
252b5132
RH		 688 /* 80 */
689 { GRP1b },
690 { GRP1S },
050dfa73 691 { "(bad)", XX, XX, XX, XX },
252b5132 692 { GRP1Ss },
050dfa73
MM		 693 { "testB", Eb, Gb, XX, XX },
694 { "testS", Ev, Gv, XX, XX },
695 { "xchgB", Eb, Gb, XX, XX },
696 { "xchgS", Ev, Gv, XX, XX },
252b5132 697 /* 88 */
050dfa73
MM		 698 { "movB", Eb, Gb, XX, XX },
699 { "movS", Ev, Gv, XX, XX },
700 { "movB", Gb, Eb, XX, XX },
701 { "movS", Gv, Ev, XX, XX },
ed7841b3 702 { "movD", Sv, Sw, XX, XX },
050dfa73 703 { "leaS", Gv, M, XX, XX },
ed7841b3 704 { "movD", Sw, Sv, XX, XX },
050dfa73 705 { "popU", stackEv, XX, XX, XX },
252b5132 706 /* 90 */
050dfa73
MM		 707 { "xchgS", NOP_Fixup1, eAX_reg, NOP_Fixup2, eAX_reg, XX, XX },
708 { "xchgS", RMeCX, eAX, XX, XX },
709 { "xchgS", RMeDX, eAX, XX, XX },
710 { "xchgS", RMeBX, eAX, XX, XX },
711 { "xchgS", RMeSP, eAX, XX, XX },
712 { "xchgS", RMeBP, eAX, XX, XX },
713 { "xchgS", RMeSI, eAX, XX, XX },
714 { "xchgS", RMeDI, eAX, XX, XX },
252b5132 715 /* 98 */
a35ca55a
JB		 716 { "cW{t||t|}R", XX, XX, XX, XX },
717 { "cR{t||t|}O", XX, XX, XX, XX },
050dfa73
MM		 718 { "Jcall{T|}", Ap, XX, XX, XX },
719 { "(bad)", XX, XX, XX, XX }, /* fwait */
720 { "pushfT", XX, XX, XX, XX },
721 { "popfT", XX, XX, XX, XX },
722 { "sahf{|}", XX, XX, XX, XX },
723 { "lahf{|}", XX, XX, XX, XX },
252b5132 724 /* a0 */
050dfa73
MM		 725 { "movB", AL, Ob, XX, XX },
726 { "movS", eAX, Ov, XX, XX },
727 { "movB", Ob, AL, XX, XX },
728 { "movS", Ov, eAX, XX, XX },
729 { "movs{b||b|}", Ybr, Xb, XX, XX },
730 { "movs{R||R|}", Yvr, Xv, XX, XX },
731 { "cmps{b||b|}", Xb, Yb, XX, XX },
732 { "cmps{R||R|}", Xv, Yv, XX, XX },
252b5132 733 /* a8 */
050dfa73
MM		 734 { "testB", AL, Ib, XX, XX },
735 { "testS", eAX, Iv, XX, XX },
736 { "stosB", Ybr, AL, XX, XX },
737 { "stosS", Yvr, eAX, XX, XX },
738 { "lodsB", ALr, Xb, XX, XX },
739 { "lodsS", eAXr, Xv, XX, XX },
740 { "scasB", AL, Yb, XX, XX },
741 { "scasS", eAX, Yv, XX, XX },
252b5132 742 /* b0 */
050dfa73
MM		 743 { "movB", RMAL, Ib, XX, XX },
744 { "movB", RMCL, Ib, XX, XX },
745 { "movB", RMDL, Ib, XX, XX },
746 { "movB", RMBL, Ib, XX, XX },
747 { "movB", RMAH, Ib, XX, XX },
748 { "movB", RMCH, Ib, XX, XX },
749 { "movB", RMDH, Ib, XX, XX },
750 { "movB", RMBH, Ib, XX, XX },
252b5132 751 /* b8 */
050dfa73
MM		 752 { "movS", RMeAX, Iv64, XX, XX },
753 { "movS", RMeCX, Iv64, XX, XX },
754 { "movS", RMeDX, Iv64, XX, XX },
755 { "movS", RMeBX, Iv64, XX, XX },
756 { "movS", RMeSP, Iv64, XX, XX },
757 { "movS", RMeBP, Iv64, XX, XX },
758 { "movS", RMeSI, Iv64, XX, XX },
759 { "movS", RMeDI, Iv64, XX, XX },
252b5132
RH		 760 /* c0 */
761 { GRP2b },
762 { GRP2S },
050dfa73
MM		 763 { "retT", Iw, XX, XX, XX },
764 { "retT", XX, XX, XX, XX },
765 { "les{S|}", Gv, Mp, XX, XX },
766 { "ldsS", Gv, Mp, XX, XX },
a6bd098c
L		 767 { GRP11_C6 },
768 { GRP11_C7 },
252b5132 769 /* c8 */
050dfa73
MM		 770 { "enterT", Iw, Ib, XX, XX },
771 { "leaveT", XX, XX, XX, XX },
772 { "lretP", Iw, XX, XX, XX },
773 { "lretP", XX, XX, XX, XX },
774 { "int3", XX, XX, XX, XX },
775 { "int", Ib, XX, XX, XX },
776 { "into{|}", XX, XX, XX, XX },
777 { "iretP", XX, XX, XX, XX },
252b5132
RH		 778 /* d0 */
779 { GRP2b_one },
780 { GRP2S_one },
781 { GRP2b_cl },
782 { GRP2S_cl },
050dfa73
MM		 783 { "aam{|}", sIb, XX, XX, XX },
784 { "aad{|}", sIb, XX, XX, XX },
785 { "(bad)", XX, XX, XX, XX },
786 { "xlat", DSBX, XX, XX, XX },
252b5132
RH		 787 /* d8 */
788 { FLOAT },
789 { FLOAT },
790 { FLOAT },
791 { FLOAT },
792 { FLOAT },
793 { FLOAT },
794 { FLOAT },
795 { FLOAT },
796 /* e0 */
050dfa73
MM		 797 { "loopneFH", Jb, XX, loop_jcxz_flag, XX },
798 { "loopeFH", Jb, XX, loop_jcxz_flag, XX },
799 { "loopFH", Jb, XX, loop_jcxz_flag, XX },
800 { "jEcxzH", Jb, XX, loop_jcxz_flag, XX },
801 { "inB", AL, Ib, XX, XX },
52fd6d94 802 { "inG", zAX, Ib, XX, XX },
050dfa73 803 { "outB", Ib, AL, XX, XX },
52fd6d94 804 { "outG", Ib, zAX, XX, XX },
252b5132 805 /* e8 */
050dfa73
MM		 806 { "callT", Jv, XX, XX, XX },
807 { "jmpT", Jv, XX, XX, XX },
808 { "Jjmp{T|}", Ap, XX, XX, XX },
809 { "jmp", Jb, XX, XX, XX },
810 { "inB", AL, indirDX, XX, XX },
52fd6d94 811 { "inG", zAX, indirDX, XX, XX },
050dfa73 812 { "outB", indirDX, AL, XX, XX },
52fd6d94 813 { "outG", indirDX, zAX, XX, XX },
252b5132 814 /* f0 */
050dfa73
MM		 815 { "(bad)", XX, XX, XX, XX }, /* lock prefix */
816 { "icebp", XX, XX, XX, XX },
817 { "(bad)", XX, XX, XX, XX }, /* repne */
818 { "(bad)", XX, XX, XX, XX }, /* repz */
819 { "hlt", XX, XX, XX, XX },
820 { "cmc", XX, XX, XX, XX },
252b5132
RH		 821 { GRP3b },
822 { GRP3S },
823 /* f8 */
050dfa73
MM		 824 { "clc", XX, XX, XX, XX },
825 { "stc", XX, XX, XX, XX },
826 { "cli", XX, XX, XX, XX },
827 { "sti", XX, XX, XX, XX },
828 { "cld", XX, XX, XX, XX },
829 { "std", XX, XX, XX, XX },
252b5132
RH		 830 { GRP4 },
831 { GRP5 },
832};
833
6439fc28 834static const struct dis386 dis386_twobyte[] = {
252b5132
RH		 835 /* 00 */
836 { GRP6 },
837 { GRP7 },
050dfa73
MM		 838 { "larS", Gv, Ew, XX, XX },
839 { "lslS", Gv, Ew, XX, XX },
840 { "(bad)", XX, XX, XX, XX },
841 { "syscall", XX, XX, XX, XX },
842 { "clts", XX, XX, XX, XX },
843 { "sysretP", XX, XX, XX, XX },
252b5132 844 /* 08 */
7f4c972f 845 { "invd", XX, XX, XX, XX },
050dfa73
MM		 846 { "wbinvd", XX, XX, XX, XX },
847 { "(bad)", XX, XX, XX, XX },
848 { "ud2a", XX, XX, XX, XX },
849 { "(bad)", XX, XX, XX, XX },
c608c12e 850 { GRPAMD },
050dfa73
MM		 851 { "femms", XX, XX, XX, XX },
852 { "", MX, EM, OPSUF, XX }, /* See OP_3DNowSuffix. */
252b5132 853 /* 10 */
c608c12e
AM		 854 { PREGRP8 },
855 { PREGRP9 },
ca164297 856 { PREGRP30 },
050dfa73
MM		 857 { "movlpX", EX, XM, SIMD_Fixup, 'h', XX },
858 { "unpcklpX", XM, EX, XX, XX },
859 { "unpckhpX", XM, EX, XX, XX },
ca164297 860 { PREGRP31 },
050dfa73 861 { "movhpX", EX, XM, SIMD_Fixup, 'l', XX },
252b5132 862 /* 18 */
b3882df9 863 { GRP16 },
050dfa73
MM		 864 { "(bad)", XX, XX, XX, XX },
865 { "(bad)", XX, XX, XX, XX },
866 { "(bad)", XX, XX, XX, XX },
867 { "(bad)", XX, XX, XX, XX },
868 { "(bad)", XX, XX, XX, XX },
869 { "(bad)", XX, XX, XX, XX },
870 { "nopQ", Ev, XX, XX, XX },
252b5132 871 /* 20 */
050dfa73
MM		 872 { "movZ", Rm, Cm, XX, XX },
873 { "movZ", Rm, Dm, XX, XX },
874 { "movZ", Cm, Rm, XX, XX },
875 { "movZ", Dm, Rm, XX, XX },
876 { "movL", Rd, Td, XX, XX },
877 { "(bad)", XX, XX, XX, XX },
878 { "movL", Td, Rd, XX, XX },
879 { "(bad)", XX, XX, XX, XX },
252b5132 880 /* 28 */
050dfa73
MM		 881 { "movapX", XM, EX, XX, XX },
882 { "movapX", EX, XM, XX, XX },
c608c12e 883 { PREGRP2 },
050dfa73 884 { PREGRP33 },
2da11e11 885 { PREGRP4 },
c608c12e 886 { PREGRP3 },
050dfa73
MM		 887 { "ucomisX", XM,EX, XX, XX },
888 { "comisX", XM,EX, XX, XX },
252b5132 889 /* 30 */
050dfa73
MM		 890 { "wrmsr", XX, XX, XX, XX },
891 { "rdtsc", XX, XX, XX, XX },
892 { "rdmsr", XX, XX, XX, XX },
893 { "rdpmc", XX, XX, XX, XX },
894 { "sysenter", XX, XX, XX, XX },
895 { "sysexit", XX, XX, XX, XX },
896 { "(bad)", XX, XX, XX, XX },
897 { "(bad)", XX, XX, XX, XX },
252b5132 898 /* 38 */
331d2d0d 899 { THREE_BYTE_0 },
050dfa73 900 { "(bad)", XX, XX, XX, XX },
331d2d0d 901 { THREE_BYTE_1 },
050dfa73
MM		 902 { "(bad)", XX, XX, XX, XX },
903 { "(bad)", XX, XX, XX, XX },
904 { "(bad)", XX, XX, XX, XX },
905 { "(bad)", XX, XX, XX, XX },
906 { "(bad)", XX, XX, XX, XX },
252b5132 907 /* 40 */
050dfa73
MM		 908 { "cmovo", Gv, Ev, XX, XX },
909 { "cmovno", Gv, Ev, XX, XX },
910 { "cmovb", Gv, Ev, XX, XX },
911 { "cmovae", Gv, Ev, XX, XX },
912 { "cmove", Gv, Ev, XX, XX },
913 { "cmovne", Gv, Ev, XX, XX },
914 { "cmovbe", Gv, Ev, XX, XX },
915 { "cmova", Gv, Ev, XX, XX },
252b5132 916 /* 48 */
050dfa73
MM		 917 { "cmovs", Gv, Ev, XX, XX },
918 { "cmovns", Gv, Ev, XX, XX },
919 { "cmovp", Gv, Ev, XX, XX },
920 { "cmovnp", Gv, Ev, XX, XX },
921 { "cmovl", Gv, Ev, XX, XX },
922 { "cmovge", Gv, Ev, XX, XX },
923 { "cmovle", Gv, Ev, XX, XX },
924 { "cmovg", Gv, Ev, XX, XX },
252b5132 925 /* 50 */
050dfa73 926 { "movmskpX", Gdq, XS, XX, XX },
c608c12e
AM		 927 { PREGRP13 },
928 { PREGRP12 },
929 { PREGRP11 },
050dfa73
MM		 930 { "andpX", XM, EX, XX, XX },
931 { "andnpX", XM, EX, XX, XX },
932 { "orpX", XM, EX, XX, XX },
933 { "xorpX", XM, EX, XX, XX },
252b5132 934 /* 58 */
c608c12e
AM		 935 { PREGRP0 },
936 { PREGRP10 },
041bd2e0
JH		 937 { PREGRP17 },
938 { PREGRP16 },
c608c12e
AM		 939 { PREGRP14 },
940 { PREGRP7 },
941 { PREGRP5 },
2da11e11 942 { PREGRP6 },
252b5132 943 /* 60 */
050dfa73
MM		 944 { "punpcklbw", MX, EM, XX, XX },
945 { "punpcklwd", MX, EM, XX, XX },
946 { "punpckldq", MX, EM, XX, XX },
947 { "packsswb", MX, EM, XX, XX },
948 { "pcmpgtb", MX, EM, XX, XX },
949 { "pcmpgtw", MX, EM, XX, XX },
950 { "pcmpgtd", MX, EM, XX, XX },
951 { "packuswb", MX, EM, XX, XX },
252b5132 952 /* 68 */
050dfa73
MM		 953 { "punpckhbw", MX, EM, XX, XX },
954 { "punpckhwd", MX, EM, XX, XX },
955 { "punpckhdq", MX, EM, XX, XX },
956 { "packssdw", MX, EM, XX, XX },
0f17484f 957 { PREGRP26 },
041bd2e0 958 { PREGRP24 },
050dfa73 959 { "movd", MX, Edq, XX, XX },
041bd2e0 960 { PREGRP19 },
252b5132 961 /* 70 */
041bd2e0 962 { PREGRP22 },
252b5132 963 { GRP12 },
b3882df9
L		 964 { GRP13 },
965 { GRP14 },
050dfa73
MM		 966 { "pcmpeqb", MX, EM, XX, XX },
967 { "pcmpeqw", MX, EM, XX, XX },
968 { "pcmpeqd", MX, EM, XX, XX },
969 { "emms", XX, XX, XX, XX },
252b5132 970 /* 78 */
050dfa73
MM		 971 { PREGRP34 },
972 { PREGRP35 },
973 { "(bad)", XX, XX, XX, XX },
974 { "(bad)", XX, XX, XX, XX },
ca164297
L		 975 { PREGRP28 },
976 { PREGRP29 },
041bd2e0
JH		 977 { PREGRP23 },
978 { PREGRP20 },
252b5132 979 /* 80 */
050dfa73
MM		 980 { "joH", Jv, XX, cond_jump_flag, XX },
981 { "jnoH", Jv, XX, cond_jump_flag, XX },
982 { "jbH", Jv, XX, cond_jump_flag, XX },
983 { "jaeH", Jv, XX, cond_jump_flag, XX },
984 { "jeH", Jv, XX, cond_jump_flag, XX },
985 { "jneH", Jv, XX, cond_jump_flag, XX },
986 { "jbeH", Jv, XX, cond_jump_flag, XX },
987 { "jaH", Jv, XX, cond_jump_flag, XX },
252b5132 988 /* 88 */
050dfa73
MM		 989 { "jsH", Jv, XX, cond_jump_flag, XX },
990 { "jnsH", Jv, XX, cond_jump_flag, XX },
991 { "jpH", Jv, XX, cond_jump_flag, XX },
992 { "jnpH", Jv, XX, cond_jump_flag, XX },
993 { "jlH", Jv, XX, cond_jump_flag, XX },
994 { "jgeH", Jv, XX, cond_jump_flag, XX },
995 { "jleH", Jv, XX, cond_jump_flag, XX },
996 { "jgH", Jv, XX, cond_jump_flag, XX },
252b5132 997 /* 90 */
050dfa73
MM		 998 { "seto", Eb, XX, XX, XX },
999 { "setno", Eb, XX, XX, XX },
1000 { "setb", Eb, XX, XX, XX },
1001 { "setae", Eb, XX, XX, XX },
1002 { "sete", Eb, XX, XX, XX },
1003 { "setne", Eb, XX, XX, XX },
1004 { "setbe", Eb, XX, XX, XX },
1005 { "seta", Eb, XX, XX, XX },
252b5132 1006 /* 98 */
050dfa73
MM		 1007 { "sets", Eb, XX, XX, XX },
1008 { "setns", Eb, XX, XX, XX },
1009 { "setp", Eb, XX, XX, XX },
1010 { "setnp", Eb, XX, XX, XX },
1011 { "setl", Eb, XX, XX, XX },
1012 { "setge", Eb, XX, XX, XX },
1013 { "setle", Eb, XX, XX, XX },
1014 { "setg", Eb, XX, XX, XX },
252b5132 1015 /* a0 */
050dfa73
MM		 1016 { "pushT", fs, XX, XX, XX },
1017 { "popT", fs, XX, XX, XX },
1018 { "cpuid", XX, XX, XX, XX },
1019 { "btS", Ev, Gv, XX, XX },
1020 { "shldS", Ev, Gv, Ib, XX },
1021 { "shldS", Ev, Gv, CL, XX },
30d1c836
ML		 1022 { GRPPADLCK2 },
1023 { GRPPADLCK1 },
252b5132 1024 /* a8 */
050dfa73
MM		 1025 { "pushT", gs, XX, XX, XX },
1026 { "popT", gs, XX, XX, XX },
1027 { "rsm", XX, XX, XX, XX },
1028 { "btsS", Ev, Gv, XX, XX },
1029 { "shrdS", Ev, Gv, Ib, XX },
1030 { "shrdS", Ev, Gv, CL, XX },
b3882df9 1031 { GRP15 },
050dfa73 1032 { "imulS", Gv, Ev, XX, XX },
252b5132 1033 /* b0 */
050dfa73
MM		 1034 { "cmpxchgB", Eb, Gb, XX, XX },
1035 { "cmpxchgS", Ev, Gv, XX, XX },
1036 { "lssS", Gv, Mp, XX, XX },
1037 { "btrS", Ev, Gv, XX, XX },
1038 { "lfsS", Gv, Mp, XX, XX },
1039 { "lgsS", Gv, Mp, XX, XX },
1040 { "movz{bR|x|bR|x}", Gv, Eb, XX, XX },
1041 { "movz{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movzww ! */
252b5132 1042 /* b8 */
7918206c 1043 { PREGRP37 },
050dfa73 1044 { "ud2b", XX, XX, XX, XX },
252b5132 1045 { GRP8 },
050dfa73
MM		 1046 { "btcS", Ev, Gv, XX, XX },
1047 { "bsfS", Gv, Ev, XX, XX },
1048 { PREGRP36 },
1049 { "movs{bR|x|bR|x}", Gv, Eb, XX, XX },
1050 { "movs{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movsww ! */
252b5132 1051 /* c0 */
050dfa73
MM		 1052 { "xaddB", Eb, Gb, XX, XX },
1053 { "xaddS", Ev, Gv, XX, XX },
c608c12e 1054 { PREGRP1 },
050dfa73
MM		 1055 { "movntiS", Ev, Gv, XX, XX },
1056 { "pinsrw", MX, Edqw, Ib, XX },
1057 { "pextrw", Gdq, MS, Ib, XX },
1058 { "shufpX", XM, EX, Ib, XX },
252b5132
RH		 1059 { GRP9 },
1060 /* c8 */
050dfa73
MM		 1061 { "bswap", RMeAX, XX, XX, XX },
1062 { "bswap", RMeCX, XX, XX, XX },
1063 { "bswap", RMeDX, XX, XX, XX },
1064 { "bswap", RMeBX, XX, XX, XX },
1065 { "bswap", RMeSP, XX, XX, XX },
1066 { "bswap", RMeBP, XX, XX, XX },
1067 { "bswap", RMeSI, XX, XX, XX },
1068 { "bswap", RMeDI, XX, XX, XX },
252b5132 1069 /* d0 */
ca164297 1070 { PREGRP27 },
050dfa73
MM		 1071 { "psrlw", MX, EM, XX, XX },
1072 { "psrld", MX, EM, XX, XX },
1073 { "psrlq", MX, EM, XX, XX },
1074 { "paddq", MX, EM, XX, XX },
1075 { "pmullw", MX, EM, XX, XX },
041bd2e0 1076 { PREGRP21 },
050dfa73 1077 { "pmovmskb", Gdq, MS, XX, XX },
252b5132 1078 /* d8 */
050dfa73
MM		 1079 { "psubusb", MX, EM, XX, XX },
1080 { "psubusw", MX, EM, XX, XX },
1081 { "pminub", MX, EM, XX, XX },
1082 { "pand", MX, EM, XX, XX },
1083 { "paddusb", MX, EM, XX, XX },
1084 { "paddusw", MX, EM, XX, XX },
1085 { "pmaxub", MX, EM, XX, XX },
1086 { "pandn", MX, EM, XX, XX },
252b5132 1087 /* e0 */
050dfa73
MM		 1088 { "pavgb", MX, EM, XX, XX },
1089 { "psraw", MX, EM, XX, XX },
1090 { "psrad", MX, EM, XX, XX },
1091 { "pavgw", MX, EM, XX, XX },
1092 { "pmulhuw", MX, EM, XX, XX },
1093 { "pmulhw", MX, EM, XX, XX },
041bd2e0 1094 { PREGRP15 },
0f17484f 1095 { PREGRP25 },
252b5132 1096 /* e8 */
050dfa73
MM		 1097 { "psubsb", MX, EM, XX, XX },
1098 { "psubsw", MX, EM, XX, XX },
1099 { "pminsw", MX, EM, XX, XX },
1100 { "por", MX, EM, XX, XX },
1101 { "paddsb", MX, EM, XX, XX },
1102 { "paddsw", MX, EM, XX, XX },
1103 { "pmaxsw", MX, EM, XX, XX },
1104 { "pxor", MX, EM, XX, XX },
252b5132 1105 /* f0 */
ca164297 1106 { PREGRP32 },
050dfa73
MM		 1107 { "psllw", MX, EM, XX, XX },
1108 { "pslld", MX, EM, XX, XX },
1109 { "psllq", MX, EM, XX, XX },
1110 { "pmuludq", MX, EM, XX, XX },
1111 { "pmaddwd", MX, EM, XX, XX },
1112 { "psadbw", MX, EM, XX, XX },
041bd2e0 1113 { PREGRP18 },
252b5132 1114 /* f8 */
050dfa73
MM		 1115 { "psubb", MX, EM, XX, XX },
1116 { "psubw", MX, EM, XX, XX },
1117 { "psubd", MX, EM, XX, XX },
1118 { "psubq", MX, EM, XX, XX },
1119 { "paddb", MX, EM, XX, XX },
1120 { "paddw", MX, EM, XX, XX },
1121 { "paddd", MX, EM, XX, XX },
1122 { "(bad)", XX, XX, XX, XX }
252b5132
RH		 1123};
1124
1125static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 1126 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1127 /* ------------------------------- */
1128 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1129 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1130 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1131 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1132 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1133 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1134 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1135 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1136 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1137 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1138 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1139 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1140 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1141 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1142 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1143 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1144 /* ------------------------------- */
1145 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1146};
1147
1148static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 1149 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1150 /* ------------------------------- */
252b5132 1151 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
15965411 1152 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
4bba6815 1153 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
331d2d0d 1154 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
252b5132 1155 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 1156 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1157 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
90700ea2 1158 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
252b5132
RH		 1159 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1160 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
30d1c836 1161 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
050dfa73 1162 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
252b5132 1163 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
ca164297 1164 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
4bba6815 1165 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
ca164297 1166 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 1167 /* ------------------------------- */
1168 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1169};
1170
eec0f4ca 1171static const unsigned char twobyte_uses_DATA_prefix[256] = {
c608c12e
AM		 1172 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1173 /* ------------------------------- */
1174 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
ca164297 1175 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
050dfa73 1176 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
331d2d0d 1177 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
c608c12e 1178 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 1179 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1180 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
050dfa73 1181 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
c608c12e
AM		 1182 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1183 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1184 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1185 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1186 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
ca164297 1187 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
041bd2e0 1188 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
ca164297 1189 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 1190 /* ------------------------------- */
1191 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1192};
1193
eec0f4ca
L		 1194static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1195 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1196 /* ------------------------------- */
1197 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1198 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1199 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1200 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1201 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1202 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1203 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1204 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1205 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1206 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1207 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1208 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1209 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1210 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1211 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1212 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1213 /* ------------------------------- */
1214 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1215};
1216
1217static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1218 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1219 /* ------------------------------- */
1220 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1221 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1222 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1223 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1224 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1225 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1226 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1227 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1228 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1229 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1230 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1231 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1232 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1233 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1234 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1235 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1236 /* ------------------------------- */
1237 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1238};
1239
1240/* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1241static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1242 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1243 /* ------------------------------- */
1244 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1245 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,0, /* 1f */
1246 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1247 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1248 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1249 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1250 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1251 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1252 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1253 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1254 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1255 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1256 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1257 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1258 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1259 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1260 /* ------------------------------- */
1261 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1262};
1263
1264/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1265static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1266 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1267 /* ------------------------------- */
1268 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1269 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1270 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1271 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1272 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1273 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1274 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1275 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1276 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1277 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1278 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1279 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1280 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1281 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1282 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1283 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1284 /* ------------------------------- */
1285 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1286};
1287
1288/* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1289static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1290 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1291 /* ------------------------------- */
1292 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1293 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1294 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1295 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1296 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1297 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1298 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1299 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1300 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1301 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1302 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1303 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1304 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1305 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1306 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1307 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1308 /* ------------------------------- */
1309 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1310};
1311
1312/* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1313static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1314 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1315 /* ------------------------------- */
1316 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 0f */
1317 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1318 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1319 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1320 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1321 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1322 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1323 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1324 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1325 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1326 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1327 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1328 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1329 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1330 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1331 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1332 /* ------------------------------- */
1333 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1334};
1335
1336/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1337static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1338 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1339 /* ------------------------------- */
1340 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1341 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1342 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1343 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1344 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1345 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1346 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1347 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1348 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1349 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1350 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1351 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1352 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1353 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1354 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1355 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1356 /* ------------------------------- */
1357 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1358};
1359
1360/* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1361static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1362 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1363 /* ------------------------------- */
1364 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1365 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1366 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1367 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1368 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1369 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1370 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1371 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1372 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1373 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1374 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1375 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1376 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1377 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1378 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1379 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1380 /* ------------------------------- */
1381 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1382};
1383
252b5132
RH		 1384static char obuf[100];
1385static char *obufp;
1386static char scratchbuf[100];
1387static unsigned char *start_codep;
1388static unsigned char *insn_codep;
1389static unsigned char *codep;
1390static disassemble_info *the_info;
1391static int mod;
1392static int rm;
1393static int reg;
4bba6815 1394static unsigned char need_modrm;
252b5132 1395
4bba6815
AM		 1396/* If we are accessing mod/rm/reg without need_modrm set, then the
1397 values are stale. Hitting this abort likely indicates that you
1398 need to update onebyte_has_modrm or twobyte_has_modrm. */
1399#define MODRM_CHECK if (!need_modrm) abort ()
1400
d708bcba
AM		 1401static const char **names64;
1402static const char **names32;
1403static const char **names16;
1404static const char **names8;
1405static const char **names8rex;
1406static const char **names_seg;
1407static const char **index16;
1408
1409static const char *intel_names64[] = {
1410 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1411 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1412};
1413static const char *intel_names32[] = {
1414 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1415 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1416};
1417static const char *intel_names16[] = {
1418 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1419 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1420};
1421static const char *intel_names8[] = {
1422 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1423};
1424static const char *intel_names8rex[] = {
1425 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1426 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1427};
1428static const char *intel_names_seg[] = {
1429 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1430};
1431static const char *intel_index16[] = {
1432 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1433};
1434
1435static const char *att_names64[] = {
1436 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
52b15da3
JH		 1437 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1438};
d708bcba
AM		 1439static const char *att_names32[] = {
1440 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
52b15da3 1441 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 1442};
d708bcba
AM		 1443static const char *att_names16[] = {
1444 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
52b15da3 1445 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 1446};
d708bcba
AM		 1447static const char *att_names8[] = {
1448 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
252b5132 1449};
d708bcba
AM		 1450static const char *att_names8rex[] = {
1451 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 1452 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1453};
d708bcba
AM		 1454static const char *att_names_seg[] = {
1455 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
252b5132 1456};
d708bcba
AM		 1457static const char *att_index16[] = {
1458 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
252b5132
RH		 1459};
1460
2da11e11 1461static const struct dis386 grps[][8] = {
252b5132
RH		 1462 /* GRP1b */
1463 {
050dfa73
MM		 1464 { "addA", Eb, Ib, XX, XX },
1465 { "orA", Eb, Ib, XX, XX },
1466 { "adcA", Eb, Ib, XX, XX },
1467 { "sbbA", Eb, Ib, XX, XX },
1468 { "andA", Eb, Ib, XX, XX },
1469 { "subA", Eb, Ib, XX, XX },
1470 { "xorA", Eb, Ib, XX, XX },
1471 { "cmpA", Eb, Ib, XX, XX }
252b5132
RH		 1472 },
1473 /* GRP1S */
1474 {
050dfa73
MM		 1475 { "addQ", Ev, Iv, XX, XX },
1476 { "orQ", Ev, Iv, XX, XX },
1477 { "adcQ", Ev, Iv, XX, XX },
1478 { "sbbQ", Ev, Iv, XX, XX },
1479 { "andQ", Ev, Iv, XX, XX },
1480 { "subQ", Ev, Iv, XX, XX },
1481 { "xorQ", Ev, Iv, XX, XX },
1482 { "cmpQ", Ev, Iv, XX, XX }
252b5132
RH		 1483 },
1484 /* GRP1Ss */
1485 {
050dfa73
MM		 1486 { "addQ", Ev, sIb, XX, XX },
1487 { "orQ", Ev, sIb, XX, XX },
1488 { "adcQ", Ev, sIb, XX, XX },
1489 { "sbbQ", Ev, sIb, XX, XX },
1490 { "andQ", Ev, sIb, XX, XX },
1491 { "subQ", Ev, sIb, XX, XX },
1492 { "xorQ", Ev, sIb, XX, XX },
1493 { "cmpQ", Ev, sIb, XX, XX }
252b5132
RH		 1494 },
1495 /* GRP2b */
1496 {
050dfa73
MM		 1497 { "rolA", Eb, Ib, XX, XX },
1498 { "rorA", Eb, Ib, XX, XX },
1499 { "rclA", Eb, Ib, XX, XX },
1500 { "rcrA", Eb, Ib, XX, XX },
1501 { "shlA", Eb, Ib, XX, XX },
1502 { "shrA", Eb, Ib, XX, XX },
1503 { "(bad)", XX, XX, XX, XX },
1504 { "sarA", Eb, Ib, XX, XX },
252b5132
RH		 1505 },
1506 /* GRP2S */
1507 {
050dfa73
MM		 1508 { "rolQ", Ev, Ib, XX, XX },
1509 { "rorQ", Ev, Ib, XX, XX },
1510 { "rclQ", Ev, Ib, XX, XX },
1511 { "rcrQ", Ev, Ib, XX, XX },
1512 { "shlQ", Ev, Ib, XX, XX },
1513 { "shrQ", Ev, Ib, XX, XX },
1514 { "(bad)", XX, XX, XX, XX },
1515 { "sarQ", Ev, Ib, XX, XX },
252b5132
RH		 1516 },
1517 /* GRP2b_one */
1518 {
050dfa73
MM		 1519 { "rolA", Eb, I1, XX, XX },
1520 { "rorA", Eb, I1, XX, XX },
1521 { "rclA", Eb, I1, XX, XX },
1522 { "rcrA", Eb, I1, XX, XX },
1523 { "shlA", Eb, I1, XX, XX },
1524 { "shrA", Eb, I1, XX, XX },
1525 { "(bad)", XX, XX, XX, XX },
1526 { "sarA", Eb, I1, XX, XX },
252b5132
RH		 1527 },
1528 /* GRP2S_one */
1529 {
050dfa73
MM		 1530 { "rolQ", Ev, I1, XX, XX },
1531 { "rorQ", Ev, I1, XX, XX },
1532 { "rclQ", Ev, I1, XX, XX },
1533 { "rcrQ", Ev, I1, XX, XX },
1534 { "shlQ", Ev, I1, XX, XX },
1535 { "shrQ", Ev, I1, XX, XX },
1536 { "(bad)", XX, XX, XX, XX },
1537 { "sarQ", Ev, I1, XX, XX },
252b5132
RH		 1538 },
1539 /* GRP2b_cl */
1540 {
050dfa73
MM		 1541 { "rolA", Eb, CL, XX, XX },
1542 { "rorA", Eb, CL, XX, XX },
1543 { "rclA", Eb, CL, XX, XX },
1544 { "rcrA", Eb, CL, XX, XX },
1545 { "shlA", Eb, CL, XX, XX },
1546 { "shrA", Eb, CL, XX, XX },
1547 { "(bad)", XX, XX, XX, XX },
1548 { "sarA", Eb, CL, XX, XX },
252b5132
RH		 1549 },
1550 /* GRP2S_cl */
1551 {
050dfa73
MM		 1552 { "rolQ", Ev, CL, XX, XX },
1553 { "rorQ", Ev, CL, XX, XX },
1554 { "rclQ", Ev, CL, XX, XX },
1555 { "rcrQ", Ev, CL, XX, XX },
1556 { "shlQ", Ev, CL, XX, XX },
1557 { "shrQ", Ev, CL, XX, XX },
1558 { "(bad)", XX, XX, XX, XX },
1559 { "sarQ", Ev, CL, XX, XX }
252b5132
RH		 1560 },
1561 /* GRP3b */
1562 {
050dfa73
MM		 1563 { "testA", Eb, Ib, XX, XX },
1564 { "(bad)", Eb, XX, XX, XX },
1565 { "notA", Eb, XX, XX, XX },
1566 { "negA", Eb, XX, XX, XX },
1567 { "mulA", Eb, XX, XX, XX }, /* Don't print the implicit %al register, */
1568 { "imulA", Eb, XX, XX, XX }, /* to distinguish these opcodes from other */
1569 { "divA", Eb, XX, XX, XX }, /* mul/imul opcodes. Do the same for div */
1570 { "idivA", Eb, XX, XX, XX } /* and idiv for consistency. */
252b5132
RH		 1571 },
1572 /* GRP3S */
1573 {
050dfa73
MM		 1574 { "testQ", Ev, Iv, XX, XX },
1575 { "(bad)", XX, XX, XX, XX },
1576 { "notQ", Ev, XX, XX, XX },
1577 { "negQ", Ev, XX, XX, XX },
1578 { "mulQ", Ev, XX, XX, XX }, /* Don't print the implicit register. */
1579 { "imulQ", Ev, XX, XX, XX },
1580 { "divQ", Ev, XX, XX, XX },
1581 { "idivQ", Ev, XX, XX, XX },
252b5132
RH		 1582 },
1583 /* GRP4 */
1584 {
050dfa73
MM		 1585 { "incA", Eb, XX, XX, XX },
1586 { "decA", Eb, XX, XX, XX },
1587 { "(bad)", XX, XX, XX, XX },
1588 { "(bad)", XX, XX, XX, XX },
1589 { "(bad)", XX, XX, XX, XX },
1590 { "(bad)", XX, XX, XX, XX },
1591 { "(bad)", XX, XX, XX, XX },
1592 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 1593 },
1594 /* GRP5 */
1595 {
050dfa73
MM		 1596 { "incQ", Ev, XX, XX, XX },
1597 { "decQ", Ev, XX, XX, XX },
1598 { "callT", indirEv, XX, XX, XX },
1599 { "JcallT", indirEp, XX, XX, XX },
1600 { "jmpT", indirEv, XX, XX, XX },
1601 { "JjmpT", indirEp, XX, XX, XX },
1602 { "pushU", stackEv, XX, XX, XX },
1603 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 1604 },
1605 /* GRP6 */
1606 {
ed7841b3
JB		 1607 { "sldtD", Sv, XX, XX, XX },
1608 { "strD", Sv, XX, XX, XX },
050dfa73
MM		 1609 { "lldt", Ew, XX, XX, XX },
1610 { "ltr", Ew, XX, XX, XX },
1611 { "verr", Ew, XX, XX, XX },
1612 { "verw", Ew, XX, XX, XX },
1613 { "(bad)", XX, XX, XX, XX },
1614 { "(bad)", XX, XX, XX, XX }
252b5132
RH		 1615 },
1616 /* GRP7 */
1617 {
050dfa73
MM		 1618 { "sgdt{Q|IQ||}", VMX_Fixup, 0, XX, XX, XX },
1619 { "sidt{Q|IQ||}", PNI_Fixup, 0, XX, XX, XX },
1620 { "lgdt{Q|Q||}", M, XX, XX, XX },
1621 { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX, XX },
ed7841b3 1622 { "smswD", Sv, XX, XX, XX },
050dfa73
MM		 1623 { "(bad)", XX, XX, XX, XX },
1624 { "lmsw", Ew, XX, XX, XX },
1625 { "invlpg", INVLPG_Fixup, w_mode, XX, XX, XX },
252b5132
RH		 1626 },
1627 /* GRP8 */
1628 {
050dfa73
MM		 1629 { "(bad)", XX, XX, XX, XX },
1630 { "(bad)", XX, XX, XX, XX },
1631 { "(bad)", XX, XX, XX, XX },
1632 { "(bad)", XX, XX, XX, XX },
1633 { "btQ", Ev, Ib, XX, XX },
1634 { "btsQ", Ev, Ib, XX, XX },
1635 { "btrQ", Ev, Ib, XX, XX },
1636 { "btcQ", Ev, Ib, XX, XX },
252b5132
RH		 1637 },
1638 /* GRP9 */
1639 {
050dfa73
MM		 1640 { "(bad)", XX, XX, XX, XX },
1641 { "cmpxchg8b", Eq, XX, XX, XX },
1642 { "(bad)", XX, XX, XX, XX },
1643 { "(bad)", XX, XX, XX, XX },
1644 { "(bad)", XX, XX, XX, XX },
1645 { "(bad)", XX, XX, XX, XX },
1646 { "", VM, XX, XX, XX }, /* See OP_VMX. */
1647 { "vmptrst", Eq, XX, XX, XX },
252b5132 1648 },
a6bd098c
L		 1649 /* GRP11_C6 */
1650 {
1651 { "movA", Eb, Ib, XX, XX },
1652 { "(bad)", XX, XX, XX, XX },
1653 { "(bad)", XX, XX, XX, XX },
1654 { "(bad)", XX, XX, XX, XX },
1655 { "(bad)", XX, XX, XX, XX },
1656 { "(bad)", XX, XX, XX, XX },
1657 { "(bad)", XX, XX, XX, XX },
1658 { "(bad)", XX, XX, XX, XX },
1659 },
1660 /* GRP11_C7 */
1661 {
1662 { "movQ", Ev, Iv, XX, XX },
1663 { "(bad)", XX, XX, XX, XX },
1664 { "(bad)", XX, XX, XX, XX },
1665 { "(bad)", XX, XX, XX, XX },
1666 { "(bad)", XX, XX, XX, XX },
1667 { "(bad)", XX, XX, XX, XX },
1668 { "(bad)", XX, XX, XX, XX },
1669 { "(bad)", XX, XX, XX, XX },
1670 },
b3882df9 1671 /* GRP12 */
252b5132 1672 {
050dfa73
MM		 1673 { "(bad)", XX, XX, XX, XX },
1674 { "(bad)", XX, XX, XX, XX },
1675 { "psrlw", MS, Ib, XX, XX },
1676 { "(bad)", XX, XX, XX, XX },
1677 { "psraw", MS, Ib, XX, XX },
1678 { "(bad)", XX, XX, XX, XX },
1679 { "psllw", MS, Ib, XX, XX },
1680 { "(bad)", XX, XX, XX, XX },
252b5132 1681 },
b3882df9 1682 /* GRP13 */
252b5132 1683 {
050dfa73
MM		 1684 { "(bad)", XX, XX, XX, XX },
1685 { "(bad)", XX, XX, XX, XX },
1686 { "psrld", MS, Ib, XX, XX },
1687 { "(bad)", XX, XX, XX, XX },
1688 { "psrad", MS, Ib, XX, XX },
1689 { "(bad)", XX, XX, XX, XX },
1690 { "pslld", MS, Ib, XX, XX },
1691 { "(bad)", XX, XX, XX, XX },
252b5132 1692 },
b3882df9 1693 /* GRP14 */
252b5132 1694 {
050dfa73
MM		 1695 { "(bad)", XX, XX, XX, XX },
1696 { "(bad)", XX, XX, XX, XX },
1697 { "psrlq", MS, Ib, XX, XX },
1698 { "psrldq", MS, Ib, XX, XX },
1699 { "(bad)", XX, XX, XX, XX },
1700 { "(bad)", XX, XX, XX, XX },
1701 { "psllq", MS, Ib, XX, XX },
1702 { "pslldq", MS, Ib, XX, XX },
252b5132 1703 },
b3882df9 1704 /* GRP15 */
252b5132 1705 {
050dfa73
MM		 1706 { "fxsave", Ev, XX, XX, XX },
1707 { "fxrstor", Ev, XX, XX, XX },
1708 { "ldmxcsr", Ev, XX, XX, XX },
1709 { "stmxcsr", Ev, XX, XX, XX },
1710 { "(bad)", XX, XX, XX, XX },
1711 { "lfence", OP_0fae, 0, XX, XX, XX },
1712 { "mfence", OP_0fae, 0, XX, XX, XX },
1713 { "clflush", OP_0fae, 0, XX, XX, XX },
c608c12e 1714 },
b3882df9 1715 /* GRP16 */
c608c12e 1716 {
050dfa73
MM		 1717 { "prefetchnta", Ev, XX, XX, XX },
1718 { "prefetcht0", Ev, XX, XX, XX },
1719 { "prefetcht1", Ev, XX, XX, XX },
1720 { "prefetcht2", Ev, XX, XX, XX },
1721 { "(bad)", XX, XX, XX, XX },
1722 { "(bad)", XX, XX, XX, XX },
1723 { "(bad)", XX, XX, XX, XX },
1724 { "(bad)", XX, XX, XX, XX },
252b5132 1725 },
c608c12e 1726 /* GRPAMD */
252b5132 1727 {
050dfa73
MM		 1728 { "prefetch", Eb, XX, XX, XX },
1729 { "prefetchw", Eb, XX, XX, XX },
1730 { "(bad)", XX, XX, XX, XX },
1731 { "(bad)", XX, XX, XX, XX },
1732 { "(bad)", XX, XX, XX, XX },
1733 { "(bad)", XX, XX, XX, XX },
1734 { "(bad)", XX, XX, XX, XX },
1735 { "(bad)", XX, XX, XX, XX },
0f10071e 1736 },
30d1c836 1737 /* GRPPADLCK1 */
cc0ec051 1738 {
050dfa73
MM		 1739 { "xstore-rng", OP_0f07, 0, XX, XX, XX },
1740 { "xcrypt-ecb", OP_0f07, 0, XX, XX, XX },
1741 { "xcrypt-cbc", OP_0f07, 0, XX, XX, XX },
1742 { "xcrypt-ctr", OP_0f07, 0, XX, XX, XX },
1743 { "xcrypt-cfb", OP_0f07, 0, XX, XX, XX },
1744 { "xcrypt-ofb", OP_0f07, 0, XX, XX, XX },
1745 { "(bad)", OP_0f07, 0, XX, XX, XX },
1746 { "(bad)", OP_0f07, 0, XX, XX, XX },
30d1c836
ML		 1747 },
1748 /* GRPPADLCK2 */
1749 {
050dfa73
MM		 1750 { "montmul", OP_0f07, 0, XX, XX, XX },
1751 { "xsha1", OP_0f07, 0, XX, XX, XX },
1752 { "xsha256", OP_0f07, 0, XX, XX, XX },
1753 { "(bad)", OP_0f07, 0, XX, XX, XX },
1754 { "(bad)", OP_0f07, 0, XX, XX, XX },
1755 { "(bad)", OP_0f07, 0, XX, XX, XX },
1756 { "(bad)", OP_0f07, 0, XX, XX, XX },
1757 { "(bad)", OP_0f07, 0, XX, XX, XX },
252b5132 1758 }
252b5132
RH		 1759};
1760
041bd2e0 1761static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 1762 /* PREGRP0 */
1763 {
050dfa73
MM		 1764 { "addps", XM, EX, XX, XX },
1765 { "addss", XM, EX, XX, XX },
1766 { "addpd", XM, EX, XX, XX },
1767 { "addsd", XM, EX, XX, XX },
c608c12e
AM		 1768 },
1769 /* PREGRP1 */
1770 {
050dfa73
MM		 1771 { "", XM, EX, OPSIMD, XX }, /* See OP_SIMD_SUFFIX. */
1772 { "", XM, EX, OPSIMD, XX },
1773 { "", XM, EX, OPSIMD, XX },
1774 { "", XM, EX, OPSIMD, XX },
c608c12e
AM		 1775 },
1776 /* PREGRP2 */
1777 {
4d9567e0 1778 { "cvtpi2ps", XM, EMC, XX, XX },
050dfa73 1779 { "cvtsi2ssY", XM, Ev, XX, XX },
4d9567e0 1780 { "cvtpi2pd", XM, EMC, XX, XX },
050dfa73 1781 { "cvtsi2sdY", XM, Ev, XX, XX },
c608c12e
AM		 1782 },
1783 /* PREGRP3 */
1784 {
4d9567e0 1785 { "cvtps2pi", MXC, EX, XX, XX },
050dfa73 1786 { "cvtss2siY", Gv, EX, XX, XX },
4d9567e0 1787 { "cvtpd2pi", MXC, EX, XX, XX },
050dfa73 1788 { "cvtsd2siY", Gv, EX, XX, XX },
c608c12e
AM		 1789 },
1790 /* PREGRP4 */
1791 {
4d9567e0 1792 { "cvttps2pi", MXC, EX, XX, XX },
050dfa73 1793 { "cvttss2siY", Gv, EX, XX, XX },
4d9567e0 1794 { "cvttpd2pi", MXC, EX, XX, XX },
050dfa73 1795 { "cvttsd2siY", Gv, EX, XX, XX },
c608c12e
AM		 1796 },
1797 /* PREGRP5 */
1798 {
050dfa73
MM		 1799 { "divps", XM, EX, XX, XX },
1800 { "divss", XM, EX, XX, XX },
1801 { "divpd", XM, EX, XX, XX },
1802 { "divsd", XM, EX, XX, XX },
c608c12e
AM		 1803 },
1804 /* PREGRP6 */
1805 {
050dfa73
MM		 1806 { "maxps", XM, EX, XX, XX },
1807 { "maxss", XM, EX, XX, XX },
1808 { "maxpd", XM, EX, XX, XX },
1809 { "maxsd", XM, EX, XX, XX },
c608c12e
AM		 1810 },
1811 /* PREGRP7 */
1812 {
050dfa73
MM		 1813 { "minps", XM, EX, XX, XX },
1814 { "minss", XM, EX, XX, XX },
1815 { "minpd", XM, EX, XX, XX },
1816 { "minsd", XM, EX, XX, XX },
c608c12e
AM		 1817 },
1818 /* PREGRP8 */
1819 {
050dfa73
MM		 1820 { "movups", XM, EX, XX, XX },
1821 { "movss", XM, EX, XX, XX },
1822 { "movupd", XM, EX, XX, XX },
1823 { "movsd", XM, EX, XX, XX },
c608c12e
AM		 1824 },
1825 /* PREGRP9 */
1826 {
050dfa73
MM		 1827 { "movups", EX, XM, XX, XX },
1828 { "movss", EX, XM, XX, XX },
1829 { "movupd", EX, XM, XX, XX },
1830 { "movsd", EX, XM, XX, XX },
c608c12e
AM		 1831 },
1832 /* PREGRP10 */
1833 {
050dfa73
MM		 1834 { "mulps", XM, EX, XX, XX },
1835 { "mulss", XM, EX, XX, XX },
1836 { "mulpd", XM, EX, XX, XX },
1837 { "mulsd", XM, EX, XX, XX },
c608c12e
AM		 1838 },
1839 /* PREGRP11 */
1840 {
050dfa73
MM		 1841 { "rcpps", XM, EX, XX, XX },
1842 { "rcpss", XM, EX, XX, XX },
1843 { "(bad)", XM, EX, XX, XX },
1844 { "(bad)", XM, EX, XX, XX },
c608c12e
AM		 1845 },
1846 /* PREGRP12 */
1847 {
050dfa73
MM		 1848 { "rsqrtps", XM, EX, XX, XX },
1849 { "rsqrtss", XM, EX, XX, XX },
1850 { "(bad)", XM, EX, XX, XX },
1851 { "(bad)", XM, EX, XX, XX },
c608c12e
AM		 1852 },
1853 /* PREGRP13 */
1854 {
050dfa73
MM		 1855 { "sqrtps", XM, EX, XX, XX },
1856 { "sqrtss", XM, EX, XX, XX },
1857 { "sqrtpd", XM, EX, XX, XX },
1858 { "sqrtsd", XM, EX, XX, XX },
c608c12e
AM		 1859 },
1860 /* PREGRP14 */
1861 {
050dfa73
MM		 1862 { "subps", XM, EX, XX, XX },
1863 { "subss", XM, EX, XX, XX },
1864 { "subpd", XM, EX, XX, XX },
1865 { "subsd", XM, EX, XX, XX },
041bd2e0
JH		 1866 },
1867 /* PREGRP15 */
1868 {
7f4c972f 1869 { "(bad)", XM, EX, XX, XX },
050dfa73
MM		 1870 { "cvtdq2pd", XM, EX, XX, XX },
1871 { "cvttpd2dq", XM, EX, XX, XX },
1872 { "cvtpd2dq", XM, EX, XX, XX },
041bd2e0
JH		 1873 },
1874 /* PREGRP16 */
1875 {
050dfa73
MM		 1876 { "cvtdq2ps", XM, EX, XX, XX },
1877 { "cvttps2dq",XM, EX, XX, XX },
1878 { "cvtps2dq",XM, EX, XX, XX },
1879 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1880 },
1881 /* PREGRP17 */
1882 {
050dfa73
MM		 1883 { "cvtps2pd", XM, EX, XX, XX },
1884 { "cvtss2sd", XM, EX, XX, XX },
1885 { "cvtpd2ps", XM, EX, XX, XX },
1886 { "cvtsd2ss", XM, EX, XX, XX },
041bd2e0
JH		 1887 },
1888 /* PREGRP18 */
1889 {
050dfa73
MM		 1890 { "maskmovq", MX, MS, XX, XX },
1891 { "(bad)", XM, EX, XX, XX },
c4b5fff9 1892 { "maskmovdqu", XM, XS, XX, XX },
050dfa73 1893 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1894 },
1895 /* PREGRP19 */
1896 {
050dfa73
MM		 1897 { "movq", MX, EM, XX, XX },
1898 { "movdqu", XM, EX, XX, XX },
1899 { "movdqa", XM, EX, XX, XX },
1900 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1901 },
1902 /* PREGRP20 */
1903 {
050dfa73
MM		 1904 { "movq", EM, MX, XX, XX },
1905 { "movdqu", EX, XM, XX, XX },
1906 { "movdqa", EX, XM, XX, XX },
1907 { "(bad)", EX, XM, XX, XX },
041bd2e0
JH		 1908 },
1909 /* PREGRP21 */
1910 {
050dfa73
MM		 1911 { "(bad)", EX, XM, XX, XX },
1912 { "movq2dq", XM, MS, XX, XX },
1913 { "movq", EX, XM, XX, XX },
1914 { "movdq2q", MX, XS, XX, XX },
041bd2e0
JH		 1915 },
1916 /* PREGRP22 */
1917 {
050dfa73
MM		 1918 { "pshufw", MX, EM, Ib, XX },
1919 { "pshufhw", XM, EX, Ib, XX },
1920 { "pshufd", XM, EX, Ib, XX },
7f4c972f 1921 { "pshuflw", XM, EX, Ib, XX },
041bd2e0
JH		 1922 },
1923 /* PREGRP23 */
1924 {
050dfa73
MM		 1925 { "movd", Edq, MX, XX, XX },
1926 { "movq", XM, EX, XX, XX },
1927 { "movd", Edq, XM, XX, XX },
1928 { "(bad)", Ed, XM, XX, XX },
041bd2e0
JH		 1929 },
1930 /* PREGRP24 */
1931 {
050dfa73
MM		 1932 { "(bad)", MX, EX, XX, XX },
1933 { "(bad)", XM, EX, XX, XX },
1934 { "punpckhqdq", XM, EX, XX, XX },
1935 { "(bad)", XM, EX, XX, XX },
0f17484f
AM		 1936 },
1937 /* PREGRP25 */
1938 {
050dfa73
MM		 1939 { "movntq", EM, MX, XX, XX },
1940 { "(bad)", EM, XM, XX, XX },
1941 { "movntdq", EM, XM, XX, XX },
1942 { "(bad)", EM, XM, XX, XX },
0f17484f
AM		 1943 },
1944 /* PREGRP26 */
1945 {
050dfa73
MM		 1946 { "(bad)", MX, EX, XX, XX },
1947 { "(bad)", XM, EX, XX, XX },
1948 { "punpcklqdq", XM, EX, XX, XX },
1949 { "(bad)", XM, EX, XX, XX },
041bd2e0 1950 },
ca164297
L		 1951 /* PREGRP27 */
1952 {
050dfa73
MM		 1953 { "(bad)", MX, EX, XX, XX },
1954 { "(bad)", XM, EX, XX, XX },
1955 { "addsubpd", XM, EX, XX, XX },
1956 { "addsubps", XM, EX, XX, XX },
ca164297
L		 1957 },
1958 /* PREGRP28 */
1959 {
050dfa73
MM		 1960 { "(bad)", MX, EX, XX, XX },
1961 { "(bad)", XM, EX, XX, XX },
1962 { "haddpd", XM, EX, XX, XX },
1963 { "haddps", XM, EX, XX, XX },
ca164297
L		 1964 },
1965 /* PREGRP29 */
1966 {
050dfa73
MM		 1967 { "(bad)", MX, EX, XX, XX },
1968 { "(bad)", XM, EX, XX, XX },
1969 { "hsubpd", XM, EX, XX, XX },
1970 { "hsubps", XM, EX, XX, XX },
ca164297
L		 1971 },
1972 /* PREGRP30 */
1973 {
050dfa73
MM		 1974 { "movlpX", XM, EX, SIMD_Fixup, 'h', XX }, /* really only 2 operands */
1975 { "movsldup", XM, EX, XX, XX },
1976 { "movlpd", XM, EX, XX, XX },
1977 { "movddup", XM, EX, XX, XX },
ca164297
L		 1978 },
1979 /* PREGRP31 */
1980 {
050dfa73
MM		 1981 { "movhpX", XM, EX, SIMD_Fixup, 'l', XX },
1982 { "movshdup", XM, EX, XX, XX },
1983 { "movhpd", XM, EX, XX, XX },
1984 { "(bad)", XM, EX, XX, XX },
ca164297
L		 1985 },
1986 /* PREGRP32 */
1987 {
050dfa73
MM		 1988 { "(bad)", XM, EX, XX, XX },
1989 { "(bad)", XM, EX, XX, XX },
1990 { "(bad)", XM, EX, XX, XX },
1991 { "lddqu", XM, M, XX, XX },
ca164297 1992 },
050dfa73
MM		 1993 /* PREGRP33 */
1994 {
7f4c972f
L		 1995 {"movntps",Ev, XM, XX, XX },
1996 {"movntss",Ev, XM, XX, XX },
1997 {"movntpd",Ev, XM, XX, XX },
1998 {"movntsd",Ev, XM, XX, XX },
050dfa73
MM		 1999 },
2000
2001 /* PREGRP34 */
2002 {
7f4c972f
L		 2003 {"vmread", Em, Gm, XX, XX },
2004 {"(bad)", XX, XX, XX, XX },
2005 {"extrq", XS, Ib, Ib, XX },
2006 {"insertq",XM, XS, Ib, Ib },
050dfa73
MM		 2007 },
2008
2009 /* PREGRP35 */
2010 {
7f4c972f
L		 2011 {"vmwrite", Gm, Em, XX, XX },
2012 {"(bad)", XX, XX, XX, XX },
2013 {"extrq", XM, XS, XX, XX },
2014 {"insertq", XM, XS, XX, XX },
050dfa73
MM		 2015 },
2016
2017 /* PREGRP36 */
2018 {
2019 { "bsrS", Gv, Ev, XX, XX },
2020 { "lzcntS", Gv, Ev, XX, XX },
2021 { "bsrS", Gv, Ev, XX, XX },
2022 { "(bad)", XX, XX, XX, XX },
2023 },
2024
7918206c
MM		 2025 /* PREGRP37 */
2026 {
2027 { "(bad)", XX, XX, XX, XX },
2028 { "popcntS",Gv, Ev, XX, XX },
2029 { "(bad)", XX, XX, XX, XX },
2030 { "(bad)", XX, XX, XX, XX },
2031 },
c608c12e
AM		 2032};
2033
6439fc28
AM		 2034static const struct dis386 x86_64_table[][2] = {
2035 {
5f754f58
L		 2036 { "pusha{P|}", XX, XX, XX, XX },
2037 { "(bad)", XX, XX, XX, XX },
2038 },
2039 {
2040 { "popa{P|}", XX, XX, XX, XX },
2041 { "(bad)", XX, XX, XX, XX },
2042 },
2043 {
2044 { "bound{S|}", Gv, Ma, XX, XX },
2045 { "(bad)", XX, XX, XX, XX },
2046 },
2047 {
2048 { "arpl", Ew, Gw, XX, XX },
2049 { "movs{||lq|xd}", Gv, Ed, XX, XX },
6439fc28
AM		 2050 },
2051};
2052
96fbad73 2053static const struct dis386 three_byte_table[][256] = {
331d2d0d
L		 2054 /* THREE_BYTE_0 */
2055 {
96fbad73 2056 /* 00 */
050dfa73
MM		 2057 { "pshufb", MX, EM, XX, XX },
2058 { "phaddw", MX, EM, XX, XX },
2059 { "phaddd", MX, EM, XX, XX },
2060 { "phaddsw", MX, EM, XX, XX },
2061 { "pmaddubsw", MX, EM, XX, XX },
2062 { "phsubw", MX, EM, XX, XX },
2063 { "phsubd", MX, EM, XX, XX },
2064 { "phsubsw", MX, EM, XX, XX },
96fbad73 2065 /* 08 */
050dfa73
MM		 2066 { "psignb", MX, EM, XX, XX },
2067 { "psignw", MX, EM, XX, XX },
2068 { "psignd", MX, EM, XX, XX },
2069 { "pmulhrsw", MX, EM, XX, XX },
2070 { "(bad)", XX, XX, XX, XX },
2071 { "(bad)", XX, XX, XX, XX },
2072 { "(bad)", XX, XX, XX, XX },
2073 { "(bad)", XX, XX, XX, XX },
96fbad73 2074 /* 10 */
050dfa73
MM		 2075 { "(bad)", XX, XX, XX, XX },
2076 { "(bad)", XX, XX, XX, XX },
2077 { "(bad)", XX, XX, XX, XX },
2078 { "(bad)", XX, XX, XX, XX },
2079 { "(bad)", XX, XX, XX, XX },
2080 { "(bad)", XX, XX, XX, XX },
2081 { "(bad)", XX, XX, XX, XX },
2082 { "(bad)", XX, XX, XX, XX },
96fbad73 2083 /* 18 */
050dfa73
MM		 2084 { "(bad)", XX, XX, XX, XX },
2085 { "(bad)", XX, XX, XX, XX },
2086 { "(bad)", XX, XX, XX, XX },
2087 { "(bad)", XX, XX, XX, XX },
2088 { "pabsb", MX, EM, XX, XX },
2089 { "pabsw", MX, EM, XX, XX },
2090 { "pabsd", MX, EM, XX, XX },
96fbad73
L		 2091 { "(bad)", XX, XX, XX, XX },
2092 /* 20 */
2093 { "(bad)", XX, XX, XX, XX },
2094 { "(bad)", XX, XX, XX, XX },
2095 { "(bad)", XX, XX, XX, XX },
2096 { "(bad)", XX, XX, XX, XX },
2097 { "(bad)", XX, XX, XX, XX },
2098 { "(bad)", XX, XX, XX, XX },
2099 { "(bad)", XX, XX, XX, XX },
2100 { "(bad)", XX, XX, XX, XX },
2101 /* 28 */
2102 { "(bad)", XX, XX, XX, XX },
2103 { "(bad)", XX, XX, XX, XX },
2104 { "(bad)", XX, XX, XX, XX },
2105 { "(bad)", XX, XX, XX, XX },
2106 { "(bad)", XX, XX, XX, XX },
2107 { "(bad)", XX, XX, XX, XX },
2108 { "(bad)", XX, XX, XX, XX },
2109 { "(bad)", XX, XX, XX, XX },
2110 /* 30 */
2111 { "(bad)", XX, XX, XX, XX },
2112 { "(bad)", XX, XX, XX, XX },
2113 { "(bad)", XX, XX, XX, XX },
2114 { "(bad)", XX, XX, XX, XX },
2115 { "(bad)", XX, XX, XX, XX },
2116 { "(bad)", XX, XX, XX, XX },
2117 { "(bad)", XX, XX, XX, XX },
2118 { "(bad)", XX, XX, XX, XX },
2119 /* 38 */
2120 { "(bad)", XX, XX, XX, XX },
2121 { "(bad)", XX, XX, XX, XX },
2122 { "(bad)", XX, XX, XX, XX },
2123 { "(bad)", XX, XX, XX, XX },
2124 { "(bad)", XX, XX, XX, XX },
2125 { "(bad)", XX, XX, XX, XX },
2126 { "(bad)", XX, XX, XX, XX },
2127 { "(bad)", XX, XX, XX, XX },
2128 /* 40 */
2129 { "(bad)", XX, XX, XX, XX },
2130 { "(bad)", XX, XX, XX, XX },
2131 { "(bad)", XX, XX, XX, XX },
2132 { "(bad)", XX, XX, XX, XX },
2133 { "(bad)", XX, XX, XX, XX },
2134 { "(bad)", XX, XX, XX, XX },
2135 { "(bad)", XX, XX, XX, XX },
2136 { "(bad)", XX, XX, XX, XX },
2137 /* 48 */
2138 { "(bad)", XX, XX, XX, XX },
2139 { "(bad)", XX, XX, XX, XX },
2140 { "(bad)", XX, XX, XX, XX },
2141 { "(bad)", XX, XX, XX, XX },
2142 { "(bad)", XX, XX, XX, XX },
2143 { "(bad)", XX, XX, XX, XX },
2144 { "(bad)", XX, XX, XX, XX },
2145 { "(bad)", XX, XX, XX, XX },
2146 /* 50 */
2147 { "(bad)", XX, XX, XX, XX },
2148 { "(bad)", XX, XX, XX, XX },
2149 { "(bad)", XX, XX, XX, XX },
2150 { "(bad)", XX, XX, XX, XX },
2151 { "(bad)", XX, XX, XX, XX },
2152 { "(bad)", XX, XX, XX, XX },
2153 { "(bad)", XX, XX, XX, XX },
2154 { "(bad)", XX, XX, XX, XX },
2155 /* 58 */
2156 { "(bad)", XX, XX, XX, XX },
2157 { "(bad)", XX, XX, XX, XX },
2158 { "(bad)", XX, XX, XX, XX },
2159 { "(bad)", XX, XX, XX, XX },
2160 { "(bad)", XX, XX, XX, XX },
2161 { "(bad)", XX, XX, XX, XX },
2162 { "(bad)", XX, XX, XX, XX },
2163 { "(bad)", XX, XX, XX, XX },
2164 /* 60 */
2165 { "(bad)", XX, XX, XX, XX },
2166 { "(bad)", XX, XX, XX, XX },
2167 { "(bad)", XX, XX, XX, XX },
2168 { "(bad)", XX, XX, XX, XX },
2169 { "(bad)", XX, XX, XX, XX },
2170 { "(bad)", XX, XX, XX, XX },
2171 { "(bad)", XX, XX, XX, XX },
2172 { "(bad)", XX, XX, XX, XX },
2173 /* 68 */
2174 { "(bad)", XX, XX, XX, XX },
2175 { "(bad)", XX, XX, XX, XX },
2176 { "(bad)", XX, XX, XX, XX },
2177 { "(bad)", XX, XX, XX, XX },
2178 { "(bad)", XX, XX, XX, XX },
2179 { "(bad)", XX, XX, XX, XX },
2180 { "(bad)", XX, XX, XX, XX },
2181 { "(bad)", XX, XX, XX, XX },
2182 /* 70 */
2183 { "(bad)", XX, XX, XX, XX },
2184 { "(bad)", XX, XX, XX, XX },
2185 { "(bad)", XX, XX, XX, XX },
2186 { "(bad)", XX, XX, XX, XX },
2187 { "(bad)", XX, XX, XX, XX },
2188 { "(bad)", XX, XX, XX, XX },
2189 { "(bad)", XX, XX, XX, XX },
2190 { "(bad)", XX, XX, XX, XX },
2191 /* 78 */
2192 { "(bad)", XX, XX, XX, XX },
2193 { "(bad)", XX, XX, XX, XX },
2194 { "(bad)", XX, XX, XX, XX },
2195 { "(bad)", XX, XX, XX, XX },
2196 { "(bad)", XX, XX, XX, XX },
2197 { "(bad)", XX, XX, XX, XX },
2198 { "(bad)", XX, XX, XX, XX },
2199 { "(bad)", XX, XX, XX, XX },
2200 /* 80 */
2201 { "(bad)", XX, XX, XX, XX },
2202 { "(bad)", XX, XX, XX, XX },
2203 { "(bad)", XX, XX, XX, XX },
2204 { "(bad)", XX, XX, XX, XX },
2205 { "(bad)", XX, XX, XX, XX },
2206 { "(bad)", XX, XX, XX, XX },
2207 { "(bad)", XX, XX, XX, XX },
2208 { "(bad)", XX, XX, XX, XX },
2209 /* 88 */
2210 { "(bad)", XX, XX, XX, XX },
2211 { "(bad)", XX, XX, XX, XX },
2212 { "(bad)", XX, XX, XX, XX },
2213 { "(bad)", XX, XX, XX, XX },
2214 { "(bad)", XX, XX, XX, XX },
2215 { "(bad)", XX, XX, XX, XX },
2216 { "(bad)", XX, XX, XX, XX },
2217 { "(bad)", XX, XX, XX, XX },
2218 /* 90 */
2219 { "(bad)", XX, XX, XX, XX },
2220 { "(bad)", XX, XX, XX, XX },
2221 { "(bad)", XX, XX, XX, XX },
2222 { "(bad)", XX, XX, XX, XX },
2223 { "(bad)", XX, XX, XX, XX },
2224 { "(bad)", XX, XX, XX, XX },
2225 { "(bad)", XX, XX, XX, XX },
2226 { "(bad)", XX, XX, XX, XX },
2227 /* 98 */
2228 { "(bad)", XX, XX, XX, XX },
2229 { "(bad)", XX, XX, XX, XX },
2230 { "(bad)", XX, XX, XX, XX },
2231 { "(bad)", XX, XX, XX, XX },
2232 { "(bad)", XX, XX, XX, XX },
2233 { "(bad)", XX, XX, XX, XX },
2234 { "(bad)", XX, XX, XX, XX },
2235 { "(bad)", XX, XX, XX, XX },
2236 /* a0 */
2237 { "(bad)", XX, XX, XX, XX },
2238 { "(bad)", XX, XX, XX, XX },
2239 { "(bad)", XX, XX, XX, XX },
2240 { "(bad)", XX, XX, XX, XX },
2241 { "(bad)", XX, XX, XX, XX },
2242 { "(bad)", XX, XX, XX, XX },
2243 { "(bad)", XX, XX, XX, XX },
2244 { "(bad)", XX, XX, XX, XX },
2245 /* a8 */
2246 { "(bad)", XX, XX, XX, XX },
2247 { "(bad)", XX, XX, XX, XX },
2248 { "(bad)", XX, XX, XX, XX },
2249 { "(bad)", XX, XX, XX, XX },
2250 { "(bad)", XX, XX, XX, XX },
2251 { "(bad)", XX, XX, XX, XX },
2252 { "(bad)", XX, XX, XX, XX },
2253 { "(bad)", XX, XX, XX, XX },
2254 /* b0 */
2255 { "(bad)", XX, XX, XX, XX },
2256 { "(bad)", XX, XX, XX, XX },
2257 { "(bad)", XX, XX, XX, XX },
2258 { "(bad)", XX, XX, XX, XX },
2259 { "(bad)", XX, XX, XX, XX },
2260 { "(bad)", XX, XX, XX, XX },
2261 { "(bad)", XX, XX, XX, XX },
2262 { "(bad)", XX, XX, XX, XX },
2263 /* b8 */
2264 { "(bad)", XX, XX, XX, XX },
2265 { "(bad)", XX, XX, XX, XX },
2266 { "(bad)", XX, XX, XX, XX },
2267 { "(bad)", XX, XX, XX, XX },
2268 { "(bad)", XX, XX, XX, XX },
2269 { "(bad)", XX, XX, XX, XX },
2270 { "(bad)", XX, XX, XX, XX },
2271 { "(bad)", XX, XX, XX, XX },
2272 /* c0 */
2273 { "(bad)", XX, XX, XX, XX },
2274 { "(bad)", XX, XX, XX, XX },
2275 { "(bad)", XX, XX, XX, XX },
2276 { "(bad)", XX, XX, XX, XX },
2277 { "(bad)", XX, XX, XX, XX },
2278 { "(bad)", XX, XX, XX, XX },
2279 { "(bad)", XX, XX, XX, XX },
2280 { "(bad)", XX, XX, XX, XX },
2281 /* c8 */
2282 { "(bad)", XX, XX, XX, XX },
2283 { "(bad)", XX, XX, XX, XX },
2284 { "(bad)", XX, XX, XX, XX },
2285 { "(bad)", XX, XX, XX, XX },
2286 { "(bad)", XX, XX, XX, XX },
2287 { "(bad)", XX, XX, XX, XX },
2288 { "(bad)", XX, XX, XX, XX },
2289 { "(bad)", XX, XX, XX, XX },
2290 /* d0 */
2291 { "(bad)", XX, XX, XX, XX },
2292 { "(bad)", XX, XX, XX, XX },
2293 { "(bad)", XX, XX, XX, XX },
2294 { "(bad)", XX, XX, XX, XX },
2295 { "(bad)", XX, XX, XX, XX },
2296 { "(bad)", XX, XX, XX, XX },
2297 { "(bad)", XX, XX, XX, XX },
2298 { "(bad)", XX, XX, XX, XX },
2299 /* d8 */
2300 { "(bad)", XX, XX, XX, XX },
2301 { "(bad)", XX, XX, XX, XX },
2302 { "(bad)", XX, XX, XX, XX },
2303 { "(bad)", XX, XX, XX, XX },
2304 { "(bad)", XX, XX, XX, XX },
2305 { "(bad)", XX, XX, XX, XX },
2306 { "(bad)", XX, XX, XX, XX },
2307 { "(bad)", XX, XX, XX, XX },
2308 /* e0 */
2309 { "(bad)", XX, XX, XX, XX },
2310 { "(bad)", XX, XX, XX, XX },
2311 { "(bad)", XX, XX, XX, XX },
2312 { "(bad)", XX, XX, XX, XX },
2313 { "(bad)", XX, XX, XX, XX },
2314 { "(bad)", XX, XX, XX, XX },
2315 { "(bad)", XX, XX, XX, XX },
2316 { "(bad)", XX, XX, XX, XX },
2317 /* e8 */
2318 { "(bad)", XX, XX, XX, XX },
2319 { "(bad)", XX, XX, XX, XX },
2320 { "(bad)", XX, XX, XX, XX },
2321 { "(bad)", XX, XX, XX, XX },
2322 { "(bad)", XX, XX, XX, XX },
2323 { "(bad)", XX, XX, XX, XX },
2324 { "(bad)", XX, XX, XX, XX },
2325 { "(bad)", XX, XX, XX, XX },
2326 /* f0 */
2327 { "(bad)", XX, XX, XX, XX },
2328 { "(bad)", XX, XX, XX, XX },
2329 { "(bad)", XX, XX, XX, XX },
2330 { "(bad)", XX, XX, XX, XX },
2331 { "(bad)", XX, XX, XX, XX },
2332 { "(bad)", XX, XX, XX, XX },
2333 { "(bad)", XX, XX, XX, XX },
2334 { "(bad)", XX, XX, XX, XX },
2335 /* f8 */
2336 { "(bad)", XX, XX, XX, XX },
2337 { "(bad)", XX, XX, XX, XX },
2338 { "(bad)", XX, XX, XX, XX },
2339 { "(bad)", XX, XX, XX, XX },
2340 { "(bad)", XX, XX, XX, XX },
2341 { "(bad)", XX, XX, XX, XX },
2342 { "(bad)", XX, XX, XX, XX },
050dfa73 2343 { "(bad)", XX, XX, XX, XX }
331d2d0d
L		 2344 },
2345 /* THREE_BYTE_1 */
2346 {
96fbad73 2347 /* 00 */
050dfa73
MM		 2348 { "(bad)", XX, XX, XX, XX },
2349 { "(bad)", XX, XX, XX, XX },
2350 { "(bad)", XX, XX, XX, XX },
2351 { "(bad)", XX, XX, XX, XX },
2352 { "(bad)", XX, XX, XX, XX },
2353 { "(bad)", XX, XX, XX, XX },
2354 { "(bad)", XX, XX, XX, XX },
2355 { "(bad)", XX, XX, XX, XX },
96fbad73 2356 /* 08 */
050dfa73
MM		 2357 { "(bad)", XX, XX, XX, XX },
2358 { "(bad)", XX, XX, XX, XX },
2359 { "(bad)", XX, XX, XX, XX },
2360 { "(bad)", XX, XX, XX, XX },
2361 { "(bad)", XX, XX, XX, XX },
2362 { "(bad)", XX, XX, XX, XX },
2363 { "(bad)", XX, XX, XX, XX },
2364 { "palignr", MX, EM, Ib, XX },
96fbad73
L		 2365 /* 10 */
2366 { "(bad)", XX, XX, XX, XX },
2367 { "(bad)", XX, XX, XX, XX },
2368 { "(bad)", XX, XX, XX, XX },
2369 { "(bad)", XX, XX, XX, XX },
2370 { "(bad)", XX, XX, XX, XX },
2371 { "(bad)", XX, XX, XX, XX },
2372 { "(bad)", XX, XX, XX, XX },
2373 { "(bad)", XX, XX, XX, XX },
2374 /* 18 */
2375 { "(bad)", XX, XX, XX, XX },
2376 { "(bad)", XX, XX, XX, XX },
2377 { "(bad)", XX, XX, XX, XX },
2378 { "(bad)", XX, XX, XX, XX },
2379 { "(bad)", XX, XX, XX, XX },
2380 { "(bad)", XX, XX, XX, XX },
2381 { "(bad)", XX, XX, XX, XX },
2382 { "(bad)", XX, XX, XX, XX },
2383 /* 20 */
2384 { "(bad)", XX, XX, XX, XX },
2385 { "(bad)", XX, XX, XX, XX },
2386 { "(bad)", XX, XX, XX, XX },
2387 { "(bad)", XX, XX, XX, XX },
2388 { "(bad)", XX, XX, XX, XX },
2389 { "(bad)", XX, XX, XX, XX },
2390 { "(bad)", XX, XX, XX, XX },
2391 { "(bad)", XX, XX, XX, XX },
2392 /* 28 */
2393 { "(bad)", XX, XX, XX, XX },
2394 { "(bad)", XX, XX, XX, XX },
2395 { "(bad)", XX, XX, XX, XX },
2396 { "(bad)", XX, XX, XX, XX },
2397 { "(bad)", XX, XX, XX, XX },
2398 { "(bad)", XX, XX, XX, XX },
2399 { "(bad)", XX, XX, XX, XX },
2400 { "(bad)", XX, XX, XX, XX },
2401 /* 30 */
2402 { "(bad)", XX, XX, XX, XX },
2403 { "(bad)", XX, XX, XX, XX },
2404 { "(bad)", XX, XX, XX, XX },
2405 { "(bad)", XX, XX, XX, XX },
2406 { "(bad)", XX, XX, XX, XX },
2407 { "(bad)", XX, XX, XX, XX },
2408 { "(bad)", XX, XX, XX, XX },
2409 { "(bad)", XX, XX, XX, XX },
2410 /* 38 */
2411 { "(bad)", XX, XX, XX, XX },
2412 { "(bad)", XX, XX, XX, XX },
2413 { "(bad)", XX, XX, XX, XX },
2414 { "(bad)", XX, XX, XX, XX },
2415 { "(bad)", XX, XX, XX, XX },
2416 { "(bad)", XX, XX, XX, XX },
2417 { "(bad)", XX, XX, XX, XX },
2418 { "(bad)", XX, XX, XX, XX },
2419 /* 40 */
2420 { "(bad)", XX, XX, XX, XX },
2421 { "(bad)", XX, XX, XX, XX },
2422 { "(bad)", XX, XX, XX, XX },
2423 { "(bad)", XX, XX, XX, XX },
2424 { "(bad)", XX, XX, XX, XX },
2425 { "(bad)", XX, XX, XX, XX },
2426 { "(bad)", XX, XX, XX, XX },
2427 { "(bad)", XX, XX, XX, XX },
2428 /* 48 */
2429 { "(bad)", XX, XX, XX, XX },
2430 { "(bad)", XX, XX, XX, XX },
2431 { "(bad)", XX, XX, XX, XX },
2432 { "(bad)", XX, XX, XX, XX },
2433 { "(bad)", XX, XX, XX, XX },
2434 { "(bad)", XX, XX, XX, XX },
2435 { "(bad)", XX, XX, XX, XX },
2436 { "(bad)", XX, XX, XX, XX },
2437 /* 50 */
2438 { "(bad)", XX, XX, XX, XX },
2439 { "(bad)", XX, XX, XX, XX },
2440 { "(bad)", XX, XX, XX, XX },
2441 { "(bad)", XX, XX, XX, XX },
2442 { "(bad)", XX, XX, XX, XX },
2443 { "(bad)", XX, XX, XX, XX },
2444 { "(bad)", XX, XX, XX, XX },
2445 { "(bad)", XX, XX, XX, XX },
2446 /* 58 */
2447 { "(bad)", XX, XX, XX, XX },
2448 { "(bad)", XX, XX, XX, XX },
2449 { "(bad)", XX, XX, XX, XX },
2450 { "(bad)", XX, XX, XX, XX },
2451 { "(bad)", XX, XX, XX, XX },
2452 { "(bad)", XX, XX, XX, XX },
2453 { "(bad)", XX, XX, XX, XX },
2454 { "(bad)", XX, XX, XX, XX },
2455 /* 60 */
2456 { "(bad)", XX, XX, XX, XX },
2457 { "(bad)", XX, XX, XX, XX },
2458 { "(bad)", XX, XX, XX, XX },
2459 { "(bad)", XX, XX, XX, XX },
2460 { "(bad)", XX, XX, XX, XX },
2461 { "(bad)", XX, XX, XX, XX },
2462 { "(bad)", XX, XX, XX, XX },
2463 { "(bad)", XX, XX, XX, XX },
2464 /* 68 */
2465 { "(bad)", XX, XX, XX, XX },
2466 { "(bad)", XX, XX, XX, XX },
2467 { "(bad)", XX, XX, XX, XX },
2468 { "(bad)", XX, XX, XX, XX },
2469 { "(bad)", XX, XX, XX, XX },
2470 { "(bad)", XX, XX, XX, XX },
2471 { "(bad)", XX, XX, XX, XX },
2472 { "(bad)", XX, XX, XX, XX },
2473 /* 70 */
2474 { "(bad)", XX, XX, XX, XX },
2475 { "(bad)", XX, XX, XX, XX },
2476 { "(bad)", XX, XX, XX, XX },
2477 { "(bad)", XX, XX, XX, XX },
2478 { "(bad)", XX, XX, XX, XX },
2479 { "(bad)", XX, XX, XX, XX },
2480 { "(bad)", XX, XX, XX, XX },
2481 { "(bad)", XX, XX, XX, XX },
2482 /* 78 */
2483 { "(bad)", XX, XX, XX, XX },
2484 { "(bad)", XX, XX, XX, XX },
2485 { "(bad)", XX, XX, XX, XX },
2486 { "(bad)", XX, XX, XX, XX },
2487 { "(bad)", XX, XX, XX, XX },
2488 { "(bad)", XX, XX, XX, XX },
2489 { "(bad)", XX, XX, XX, XX },
2490 { "(bad)", XX, XX, XX, XX },
2491 /* 80 */
2492 { "(bad)", XX, XX, XX, XX },
2493 { "(bad)", XX, XX, XX, XX },
2494 { "(bad)", XX, XX, XX, XX },
2495 { "(bad)", XX, XX, XX, XX },
2496 { "(bad)", XX, XX, XX, XX },
2497 { "(bad)", XX, XX, XX, XX },
2498 { "(bad)", XX, XX, XX, XX },
2499 { "(bad)", XX, XX, XX, XX },
2500 /* 88 */
2501 { "(bad)", XX, XX, XX, XX },
2502 { "(bad)", XX, XX, XX, XX },
2503 { "(bad)", XX, XX, XX, XX },
2504 { "(bad)", XX, XX, XX, XX },
2505 { "(bad)", XX, XX, XX, XX },
2506 { "(bad)", XX, XX, XX, XX },
2507 { "(bad)", XX, XX, XX, XX },
2508 { "(bad)", XX, XX, XX, XX },
2509 /* 90 */
2510 { "(bad)", XX, XX, XX, XX },
2511 { "(bad)", XX, XX, XX, XX },
2512 { "(bad)", XX, XX, XX, XX },
2513 { "(bad)", XX, XX, XX, XX },
2514 { "(bad)", XX, XX, XX, XX },
2515 { "(bad)", XX, XX, XX, XX },
2516 { "(bad)", XX, XX, XX, XX },
2517 { "(bad)", XX, XX, XX, XX },
2518 /* 98 */
2519 { "(bad)", XX, XX, XX, XX },
2520 { "(bad)", XX, XX, XX, XX },
2521 { "(bad)", XX, XX, XX, XX },
2522 { "(bad)", XX, XX, XX, XX },
2523 { "(bad)", XX, XX, XX, XX },
2524 { "(bad)", XX, XX, XX, XX },
2525 { "(bad)", XX, XX, XX, XX },
2526 { "(bad)", XX, XX, XX, XX },
2527 /* a0 */
2528 { "(bad)", XX, XX, XX, XX },
2529 { "(bad)", XX, XX, XX, XX },
2530 { "(bad)", XX, XX, XX, XX },
2531 { "(bad)", XX, XX, XX, XX },
2532 { "(bad)", XX, XX, XX, XX },
2533 { "(bad)", XX, XX, XX, XX },
2534 { "(bad)", XX, XX, XX, XX },
2535 { "(bad)", XX, XX, XX, XX },
2536 /* a8 */
2537 { "(bad)", XX, XX, XX, XX },
2538 { "(bad)", XX, XX, XX, XX },
2539 { "(bad)", XX, XX, XX, XX },
2540 { "(bad)", XX, XX, XX, XX },
2541 { "(bad)", XX, XX, XX, XX },
2542 { "(bad)", XX, XX, XX, XX },
2543 { "(bad)", XX, XX, XX, XX },
2544 { "(bad)", XX, XX, XX, XX },
2545 /* b0 */
2546 { "(bad)", XX, XX, XX, XX },
2547 { "(bad)", XX, XX, XX, XX },
2548 { "(bad)", XX, XX, XX, XX },
2549 { "(bad)", XX, XX, XX, XX },
2550 { "(bad)", XX, XX, XX, XX },
2551 { "(bad)", XX, XX, XX, XX },
2552 { "(bad)", XX, XX, XX, XX },
2553 { "(bad)", XX, XX, XX, XX },
2554 /* b8 */
2555 { "(bad)", XX, XX, XX, XX },
2556 { "(bad)", XX, XX, XX, XX },
2557 { "(bad)", XX, XX, XX, XX },
2558 { "(bad)", XX, XX, XX, XX },
2559 { "(bad)", XX, XX, XX, XX },
2560 { "(bad)", XX, XX, XX, XX },
2561 { "(bad)", XX, XX, XX, XX },
2562 { "(bad)", XX, XX, XX, XX },
2563 /* c0 */
2564 { "(bad)", XX, XX, XX, XX },
2565 { "(bad)", XX, XX, XX, XX },
2566 { "(bad)", XX, XX, XX, XX },
2567 { "(bad)", XX, XX, XX, XX },
2568 { "(bad)", XX, XX, XX, XX },
2569 { "(bad)", XX, XX, XX, XX },
2570 { "(bad)", XX, XX, XX, XX },
2571 { "(bad)", XX, XX, XX, XX },
2572 /* c8 */
2573 { "(bad)", XX, XX, XX, XX },
2574 { "(bad)", XX, XX, XX, XX },
2575 { "(bad)", XX, XX, XX, XX },
2576 { "(bad)", XX, XX, XX, XX },
2577 { "(bad)", XX, XX, XX, XX },
2578 { "(bad)", XX, XX, XX, XX },
2579 { "(bad)", XX, XX, XX, XX },
2580 { "(bad)", XX, XX, XX, XX },
2581 /* d0 */
2582 { "(bad)", XX, XX, XX, XX },
2583 { "(bad)", XX, XX, XX, XX },
2584 { "(bad)", XX, XX, XX, XX },
2585 { "(bad)", XX, XX, XX, XX },
2586 { "(bad)", XX, XX, XX, XX },
2587 { "(bad)", XX, XX, XX, XX },
2588 { "(bad)", XX, XX, XX, XX },
2589 { "(bad)", XX, XX, XX, XX },
2590 /* d8 */
2591 { "(bad)", XX, XX, XX, XX },
2592 { "(bad)", XX, XX, XX, XX },
2593 { "(bad)", XX, XX, XX, XX },
2594 { "(bad)", XX, XX, XX, XX },
2595 { "(bad)", XX, XX, XX, XX },
2596 { "(bad)", XX, XX, XX, XX },
2597 { "(bad)", XX, XX, XX, XX },
2598 { "(bad)", XX, XX, XX, XX },
2599 /* e0 */
2600 { "(bad)", XX, XX, XX, XX },
2601 { "(bad)", XX, XX, XX, XX },
2602 { "(bad)", XX, XX, XX, XX },
2603 { "(bad)", XX, XX, XX, XX },
2604 { "(bad)", XX, XX, XX, XX },
2605 { "(bad)", XX, XX, XX, XX },
2606 { "(bad)", XX, XX, XX, XX },
2607 { "(bad)", XX, XX, XX, XX },
2608 /* e8 */
2609 { "(bad)", XX, XX, XX, XX },
2610 { "(bad)", XX, XX, XX, XX },
2611 { "(bad)", XX, XX, XX, XX },
2612 { "(bad)", XX, XX, XX, XX },
2613 { "(bad)", XX, XX, XX, XX },
2614 { "(bad)", XX, XX, XX, XX },
2615 { "(bad)", XX, XX, XX, XX },
2616 { "(bad)", XX, XX, XX, XX },
2617 /* f0 */
050dfa73
MM		 2618 { "(bad)", XX, XX, XX, XX },
2619 { "(bad)", XX, XX, XX, XX },
2620 { "(bad)", XX, XX, XX, XX },
2621 { "(bad)", XX, XX, XX, XX },
2622 { "(bad)", XX, XX, XX, XX },
2623 { "(bad)", XX, XX, XX, XX },
2624 { "(bad)", XX, XX, XX, XX },
2625 { "(bad)", XX, XX, XX, XX },
96fbad73 2626 /* f8 */
050dfa73
MM		 2627 { "(bad)", XX, XX, XX, XX },
2628 { "(bad)", XX, XX, XX, XX },
2629 { "(bad)", XX, XX, XX, XX },
2630 { "(bad)", XX, XX, XX, XX },
2631 { "(bad)", XX, XX, XX, XX },
2632 { "(bad)", XX, XX, XX, XX },
2633 { "(bad)", XX, XX, XX, XX },
2634 { "(bad)", XX, XX, XX, XX }
331d2d0d
L		 2635 },
2636};
2637
c608c12e
AM		 2638#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
2639
252b5132 2640static void
26ca5450 2641ckprefix (void)
252b5132 2642{
52b15da3
JH		 2643 int newrex;
2644 rex = 0;
252b5132 2645 prefixes = 0;
7d421014 2646 used_prefixes = 0;
52b15da3 2647 rex_used = 0;
252b5132
RH		 2648 while (1)
2649 {
2650 FETCH_DATA (the_info, codep + 1);
52b15da3 2651 newrex = 0;
252b5132
RH		 2652 switch (*codep)
2653 {
52b15da3
JH		 2654 /* REX prefixes family. */
2655 case 0x40:
2656 case 0x41:
2657 case 0x42:
2658 case 0x43:
2659 case 0x44:
2660 case 0x45:
2661 case 0x46:
2662 case 0x47:
2663 case 0x48:
2664 case 0x49:
2665 case 0x4a:
2666 case 0x4b:
2667 case 0x4c:
2668 case 0x4d:
2669 case 0x4e:
2670 case 0x4f:
cb712a9e 2671 if (address_mode == mode_64bit)
52b15da3
JH		 2672 newrex = *codep;
2673 else
2674 return;
2675 break;
252b5132
RH		 2676 case 0xf3:
2677 prefixes |= PREFIX_REPZ;
2678 break;
2679 case 0xf2:
2680 prefixes |= PREFIX_REPNZ;
2681 break;
2682 case 0xf0:
2683 prefixes |= PREFIX_LOCK;
2684 break;
2685 case 0x2e:
2686 prefixes |= PREFIX_CS;
2687 break;
2688 case 0x36:
2689 prefixes |= PREFIX_SS;
2690 break;
2691 case 0x3e:
2692 prefixes |= PREFIX_DS;
2693 break;
2694 case 0x26:
2695 prefixes |= PREFIX_ES;
2696 break;
2697 case 0x64:
2698 prefixes |= PREFIX_FS;
2699 break;
2700 case 0x65:
2701 prefixes |= PREFIX_GS;
2702 break;
2703 case 0x66:
2704 prefixes |= PREFIX_DATA;
2705 break;
2706 case 0x67:
2707 prefixes |= PREFIX_ADDR;
2708 break;
5076851f 2709 case FWAIT_OPCODE:
252b5132
RH		 2710 /* fwait is really an instruction. If there are prefixes
2711 before the fwait, they belong to the fwait, *not* to the
2712 following instruction. */
3e7d61b2 2713 if (prefixes || rex)
252b5132
RH		 2714 {
2715 prefixes |= PREFIX_FWAIT;
2716 codep++;
2717 return;
2718 }
2719 prefixes = PREFIX_FWAIT;
2720 break;
2721 default:
2722 return;
2723 }
52b15da3
JH		 2724 /* Rex is ignored when followed by another prefix. */
2725 if (rex)
2726 {
3e7d61b2
AM		 2727 rex_used = rex;
2728 return;
52b15da3
JH		 2729 }
2730 rex = newrex;
252b5132
RH		 2731 codep++;
2732 }
2733}
2734
7d421014
ILT		 2735/* Return the name of the prefix byte PREF, or NULL if PREF is not a
2736 prefix byte. */
2737
2738static const char *
26ca5450 2739prefix_name (int pref, int sizeflag)
7d421014
ILT		 2740{
2741 switch (pref)
2742 {
52b15da3
JH		 2743 /* REX prefixes family. */
2744 case 0x40:
2745 return "rex";
2746 case 0x41:
2747 return "rexZ";
2748 case 0x42:
2749 return "rexY";
2750 case 0x43:
2751 return "rexYZ";
2752 case 0x44:
2753 return "rexX";
2754 case 0x45:
2755 return "rexXZ";
2756 case 0x46:
2757 return "rexXY";
2758 case 0x47:
2759 return "rexXYZ";
2760 case 0x48:
2761 return "rex64";
2762 case 0x49:
2763 return "rex64Z";
2764 case 0x4a:
2765 return "rex64Y";
2766 case 0x4b:
2767 return "rex64YZ";
2768 case 0x4c:
2769 return "rex64X";
2770 case 0x4d:
2771 return "rex64XZ";
2772 case 0x4e:
2773 return "rex64XY";
2774 case 0x4f:
2775 return "rex64XYZ";
7d421014
ILT		 2776 case 0xf3:
2777 return "repz";
2778 case 0xf2:
2779 return "repnz";
2780 case 0xf0:
2781 return "lock";
2782 case 0x2e:
2783 return "cs";
2784 case 0x36:
2785 return "ss";
2786 case 0x3e:
2787 return "ds";
2788 case 0x26:
2789 return "es";
2790 case 0x64:
2791 return "fs";
2792 case 0x65:
2793 return "gs";
2794 case 0x66:
2795 return (sizeflag & DFLAG) ? "data16" : "data32";
2796 case 0x67:
cb712a9e 2797 if (address_mode == mode_64bit)
db6eb5be 2798 return (sizeflag & AFLAG) ? "addr32" : "addr64";
c1a64871 2799 else
2888cb7a 2800 return (sizeflag & AFLAG) ? "addr16" : "addr32";
7d421014
ILT		 2801 case FWAIT_OPCODE:
2802 return "fwait";
2803 default:
2804 return NULL;
2805 }
2806}
2807
050dfa73
MM		 2808static char op1out[100], op2out[100], op3out[100], op4out[100];
2809static int op_ad, op_index[4];
1d9f512f 2810static int two_source_ops;
050dfa73
MM		 2811static bfd_vma op_address[4];
2812static bfd_vma op_riprel[4];
52b15da3 2813static bfd_vma start_pc;
252b5132
RH		 2814\f
2815/*
2816 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2817 * (see topic "Redundant prefixes" in the "Differences from 8086"
2818 * section of the "Virtual 8086 Mode" chapter.)
2819 * 'pc' should be the address of this instruction, it will
2820 * be used to print the target address if this is a relative jump or call
2821 * The function returns the length of this instruction in bytes.
2822 */
2823
252b5132
RH		 2824static char intel_syntax;
2825static char open_char;
2826static char close_char;
2827static char separator_char;
2828static char scale_char;
2829
e396998b
AM		 2830/* Here for backwards compatibility. When gdb stops using
2831 print_insn_i386_att and print_insn_i386_intel these functions can
2832 disappear, and print_insn_i386 be merged into print_insn. */
252b5132 2833int
26ca5450 2834print_insn_i386_att (bfd_vma pc, disassemble_info *info)
252b5132
RH		 2835{
2836 intel_syntax = 0;
e396998b
AM		 2837
2838 return print_insn (pc, info);
252b5132
RH		 2839}
2840
2841int
26ca5450 2842print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
252b5132
RH		 2843{
2844 intel_syntax = 1;
e396998b
AM		 2845
2846 return print_insn (pc, info);
252b5132
RH		 2847}
2848
e396998b 2849int
26ca5450 2850print_insn_i386 (bfd_vma pc, disassemble_info *info)
e396998b
AM		 2851{
2852 intel_syntax = -1;
2853
2854 return print_insn (pc, info);
2855}
2856
2857static int
26ca5450 2858print_insn (bfd_vma pc, disassemble_info *info)
252b5132 2859{
2da11e11 2860 const struct dis386 *dp;
252b5132 2861 int i;
050dfa73 2862 char *first, *second, *third, *fourth;
252b5132 2863 int needcomma;
eec0f4ca
L		 2864 unsigned char uses_DATA_prefix, uses_LOCK_prefix;
2865 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
e396998b
AM		 2866 int sizeflag;
2867 const char *p;
252b5132 2868 struct dis_private priv;
eec0f4ca 2869 unsigned char op;
252b5132 2870
cb712a9e
L		 2871 if (info->mach == bfd_mach_x86_64_intel_syntax
2872 || info->mach == bfd_mach_x86_64)
2873 address_mode = mode_64bit;
2874 else
2875 address_mode = mode_32bit;
52b15da3 2876
8373f971 2877 if (intel_syntax == (char) -1)
e396998b
AM		 2878 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
2879 || info->mach == bfd_mach_x86_64_intel_syntax);
2880
2da11e11 2881 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 2882 || info->mach == bfd_mach_x86_64
2883 || info->mach == bfd_mach_i386_i386_intel_syntax
2884 || info->mach == bfd_mach_x86_64_intel_syntax)
e396998b 2885 priv.orig_sizeflag = AFLAG | DFLAG;
2da11e11 2886 else if (info->mach == bfd_mach_i386_i8086)
e396998b 2887 priv.orig_sizeflag = 0;
2da11e11
AM		 2888 else
2889 abort ();
e396998b
AM		 2890
2891 for (p = info->disassembler_options; p != NULL; )
2892 {
0112cd26 2893 if (CONST_STRNEQ (p, "x86-64"))
e396998b 2894 {
cb712a9e 2895 address_mode = mode_64bit;
e396998b
AM		 2896 priv.orig_sizeflag = AFLAG | DFLAG;
2897 }
0112cd26 2898 else if (CONST_STRNEQ (p, "i386"))
e396998b 2899 {
cb712a9e 2900 address_mode = mode_32bit;
e396998b
AM		 2901 priv.orig_sizeflag = AFLAG | DFLAG;
2902 }
0112cd26 2903 else if (CONST_STRNEQ (p, "i8086"))
e396998b 2904 {
cb712a9e 2905 address_mode = mode_16bit;
e396998b
AM		 2906 priv.orig_sizeflag = 0;
2907 }
0112cd26 2908 else if (CONST_STRNEQ (p, "intel"))
e396998b
AM		 2909 {
2910 intel_syntax = 1;
2911 }
0112cd26 2912 else if (CONST_STRNEQ (p, "att"))
e396998b
AM		 2913 {
2914 intel_syntax = 0;
2915 }
0112cd26 2916 else if (CONST_STRNEQ (p, "addr"))
e396998b
AM		 2917 {
2918 if (p[4] == '1' && p[5] == '6')
2919 priv.orig_sizeflag &= ~AFLAG;
2920 else if (p[4] == '3' && p[5] == '2')
2921 priv.orig_sizeflag |= AFLAG;
2922 }
0112cd26 2923 else if (CONST_STRNEQ (p, "data"))
e396998b
AM		 2924 {
2925 if (p[4] == '1' && p[5] == '6')
2926 priv.orig_sizeflag &= ~DFLAG;
2927 else if (p[4] == '3' && p[5] == '2')
2928 priv.orig_sizeflag |= DFLAG;
2929 }
0112cd26 2930 else if (CONST_STRNEQ (p, "suffix"))
e396998b
AM		 2931 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2932
2933 p = strchr (p, ',');
2934 if (p != NULL)
2935 p++;
2936 }
2937
2938 if (intel_syntax)
2939 {
2940 names64 = intel_names64;
2941 names32 = intel_names32;
2942 names16 = intel_names16;
2943 names8 = intel_names8;
2944 names8rex = intel_names8rex;
2945 names_seg = intel_names_seg;
2946 index16 = intel_index16;
2947 open_char = '[';
2948 close_char = ']';
2949 separator_char = '+';
2950 scale_char = '*';
2951 }
2952 else
2953 {
2954 names64 = att_names64;
2955 names32 = att_names32;
2956 names16 = att_names16;
2957 names8 = att_names8;
2958 names8rex = att_names8rex;
2959 names_seg = att_names_seg;
2960 index16 = att_index16;
2961 open_char = '(';
2962 close_char = ')';
2963 separator_char = ',';
2964 scale_char = ',';
2965 }
2da11e11 2966
4fe53c98 2967 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 2968 puts most long word instructions on a single line. */
4fe53c98 2969 info->bytes_per_line = 7;
252b5132 2970
26ca5450 2971 info->private_data = &priv;
252b5132
RH		 2972 priv.max_fetched = priv.the_buffer;
2973 priv.insn_start = pc;
252b5132
RH		 2974
2975 obuf[0] = 0;
2976 op1out[0] = 0;
2977 op2out[0] = 0;
2978 op3out[0] = 0;
050dfa73 2979 op4out[0] = 0;
252b5132 2980
050dfa73 2981 op_index[0] = op_index[1] = op_index[2] = op_index[3] = -1;
252b5132
RH		 2982
2983 the_info = info;
2984 start_pc = pc;
e396998b
AM		 2985 start_codep = priv.the_buffer;
2986 codep = priv.the_buffer;
252b5132 2987
5076851f
ILT		 2988 if (setjmp (priv.bailout) != 0)
2989 {
7d421014
ILT		 2990 const char *name;
2991
5076851f 2992 /* Getting here means we tried for data but didn't get it. That
e396998b
AM		 2993 means we have an incomplete instruction of some sort. Just
2994 print the first byte as a prefix or a .byte pseudo-op. */
2995 if (codep > priv.the_buffer)
5076851f 2996 {
e396998b 2997 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2998 if (name != NULL)
2999 (*info->fprintf_func) (info->stream, "%s", name);
3000 else
5076851f 3001 {
7d421014
ILT		 3002 /* Just print the first byte as a .byte instruction. */
3003 (*info->fprintf_func) (info->stream, ".byte 0x%x",
e396998b 3004 (unsigned int) priv.the_buffer[0]);
5076851f 3005 }
5076851f 3006
7d421014 3007 return 1;
5076851f
ILT		 3008 }
3009
3010 return -1;
3011 }
3012
52b15da3 3013 obufp = obuf;
252b5132
RH		 3014 ckprefix ();
3015
3016 insn_codep = codep;
e396998b 3017 sizeflag = priv.orig_sizeflag;
252b5132
RH		 3018
3019 FETCH_DATA (info, codep + 1);
3020 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3021
3e7d61b2
AM		 3022 if (((prefixes & PREFIX_FWAIT)
3023 && ((*codep < 0xd8) || (*codep > 0xdf)))
3024 || (rex && rex_used))
252b5132 3025 {
7d421014
ILT		 3026 const char *name;
3027
3e7d61b2
AM		 3028 /* fwait not followed by floating point instruction, or rex followed
3029 by other prefixes. Print the first prefix. */
e396998b 3030 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3031 if (name == NULL)
3032 name = INTERNAL_DISASSEMBLER_ERROR;
3033 (*info->fprintf_func) (info->stream, "%s", name);
3034 return 1;
252b5132
RH		 3035 }
3036
eec0f4ca 3037 op = 0;
252b5132
RH		 3038 if (*codep == 0x0f)
3039 {
eec0f4ca 3040 unsigned char threebyte;
252b5132 3041 FETCH_DATA (info, codep + 2);
eec0f4ca
L		 3042 threebyte = *++codep;
3043 dp = &dis386_twobyte[threebyte];
252b5132 3044 need_modrm = twobyte_has_modrm[*codep];
eec0f4ca
L		 3045 uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep];
3046 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep];
3047 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep];
c4a530c5 3048 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
eec0f4ca
L		 3049 codep++;
3050 if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
3051 {
3052 FETCH_DATA (info, codep + 2);
3053 op = *codep++;
3054 switch (threebyte)
3055 {
3056 case 0x38:
3057 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
3058 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
3059 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
3060 break;
3061 case 0x3a:
3062 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
3063 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
3064 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
3065 break;
3066 default:
3067 break;
3068 }
3069 }
252b5132
RH		 3070 }
3071 else
3072 {
6439fc28 3073 dp = &dis386[*codep];
252b5132 3074 need_modrm = onebyte_has_modrm[*codep];
eec0f4ca
L		 3075 uses_DATA_prefix = 0;
3076 uses_REPNZ_prefix = 0;
3077 uses_REPZ_prefix = 0;
c4a530c5 3078 uses_LOCK_prefix = 0;
eec0f4ca 3079 codep++;
252b5132 3080 }
050dfa73 3081
eec0f4ca 3082 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
7d421014
ILT		 3083 {
3084 oappend ("repz ");
3085 used_prefixes |= PREFIX_REPZ;
3086 }
eec0f4ca 3087 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
7d421014
ILT		 3088 {
3089 oappend ("repnz ");
3090 used_prefixes |= PREFIX_REPNZ;
3091 }
050dfa73 3092
c4a530c5 3093 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
7d421014
ILT		 3094 {
3095 oappend ("lock ");
3096 used_prefixes |= PREFIX_LOCK;
3097 }
c608c12e 3098
c608c12e
AM		 3099 if (prefixes & PREFIX_ADDR)
3100 {
3101 sizeflag ^= AFLAG;
6439fc28 3102 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
3ffd33cf 3103 {
cb712a9e 3104 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3ffd33cf
AM		 3105 oappend ("addr32 ");
3106 else
3107 oappend ("addr16 ");
3108 used_prefixes |= PREFIX_ADDR;
3109 }
3110 }
3111
eec0f4ca 3112 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
3ffd33cf
AM		 3113 {
3114 sizeflag ^= DFLAG;
6439fc28
AM		 3115 if (dp->bytemode3 == cond_jump_mode
3116 && dp->bytemode1 == v_mode
3117 && !intel_syntax)
3ffd33cf
AM		 3118 {
3119 if (sizeflag & DFLAG)
3120 oappend ("data32 ");
3121 else
3122 oappend ("data16 ");
3123 used_prefixes |= PREFIX_DATA;
3124 }
3125 }
3126
331d2d0d
L		 3127 if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
3128 {
eec0f4ca 3129 dp = &three_byte_table[dp->bytemode2][op];
331d2d0d
L		 3130 mod = (*codep >> 6) & 3;
3131 reg = (*codep >> 3) & 7;
3132 rm = *codep & 7;
3133 }
3134 else if (need_modrm)
252b5132
RH		 3135 {
3136 FETCH_DATA (info, codep + 1);
3137 mod = (*codep >> 6) & 3;
3138 reg = (*codep >> 3) & 7;
3139 rm = *codep & 7;
3140 }
3141
3142 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
3143 {
3144 dofloat (sizeflag);
3145 }
3146 else
3147 {
041bd2e0 3148 int index;
252b5132 3149 if (dp->name == NULL)
c608c12e 3150 {
6439fc28 3151 switch (dp->bytemode1)
c608c12e 3152 {
6439fc28
AM		 3153 case USE_GROUPS:
3154 dp = &grps[dp->bytemode2][reg];
3155 break;
3156
3157 case USE_PREFIX_USER_TABLE:
3158 index = 0;
3159 used_prefixes |= (prefixes & PREFIX_REPZ);
3160 if (prefixes & PREFIX_REPZ)
3161 index = 1;
3162 else
3163 {
d81afd0c
L		 3164 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3165 before PREFIX_DATA. */
3166 used_prefixes |= (prefixes & PREFIX_REPNZ);
3167 if (prefixes & PREFIX_REPNZ)
3168 index = 3;
6439fc28
AM		 3169 else
3170 {
d81afd0c
L		 3171 used_prefixes |= (prefixes & PREFIX_DATA);
3172 if (prefixes & PREFIX_DATA)
3173 index = 2;
6439fc28
AM		 3174 }
3175 }
3176 dp = &prefix_user_table[dp->bytemode2][index];
3177 break;
252b5132 3178
6439fc28 3179 case X86_64_SPECIAL:
cb712a9e
L		 3180 index = address_mode == mode_64bit ? 1 : 0;
3181 dp = &x86_64_table[dp->bytemode2][index];
6439fc28 3182 break;
252b5132 3183
6439fc28
AM		 3184 default:
3185 oappend (INTERNAL_DISASSEMBLER_ERROR);
3186 break;
3187 }
3188 }
252b5132 3189
6439fc28
AM		 3190 if (putop (dp->name, sizeflag) == 0)
3191 {
3192 obufp = op1out;
050dfa73 3193 op_ad = 3;
6439fc28 3194 if (dp->op1)
6608db57 3195 (*dp->op1) (dp->bytemode1, sizeflag);
6439fc28
AM		 3196
3197 obufp = op2out;
050dfa73 3198 op_ad = 2;
6439fc28 3199 if (dp->op2)
6608db57 3200 (*dp->op2) (dp->bytemode2, sizeflag);
6439fc28
AM		 3201
3202 obufp = op3out;
050dfa73 3203 op_ad = 1;
6439fc28 3204 if (dp->op3)
6608db57 3205 (*dp->op3) (dp->bytemode3, sizeflag);
050dfa73
MM		 3206
3207 obufp = op4out;
3208 op_ad = 0;
3209 if (dp->op4)
3210 (*dp->op4) (dp->bytemode4, sizeflag);
6439fc28 3211 }
252b5132
RH		 3212 }
3213
7d421014
ILT		 3214 /* See if any prefixes were not used. If so, print the first one
3215 separately. If we don't do this, we'll wind up printing an
3216 instruction stream which does not precisely correspond to the
3217 bytes we are disassembling. */
3218 if ((prefixes & ~used_prefixes) != 0)
3219 {
3220 const char *name;
3221
e396998b 3222 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3223 if (name == NULL)
3224 name = INTERNAL_DISASSEMBLER_ERROR;
3225 (*info->fprintf_func) (info->stream, "%s", name);
3226 return 1;
3227 }
52b15da3
JH		 3228 if (rex & ~rex_used)
3229 {
3230 const char *name;
e396998b 3231 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
52b15da3
JH		 3232 if (name == NULL)
3233 name = INTERNAL_DISASSEMBLER_ERROR;
3234 (*info->fprintf_func) (info->stream, "%s ", name);
3235 }
7d421014 3236
252b5132
RH		 3237 obufp = obuf + strlen (obuf);
3238 for (i = strlen (obuf); i < 6; i++)
3239 oappend (" ");
3240 oappend (" ");
3241 (*info->fprintf_func) (info->stream, "%s", obuf);
3242
3243 /* The enter and bound instructions are printed with operands in the same
3244 order as the intel book; everything else is printed in reverse order. */
2da11e11 3245 if (intel_syntax || two_source_ops)
252b5132
RH		 3246 {
3247 first = op1out;
3248 second = op2out;
3249 third = op3out;
050dfa73 3250 fourth = op4out;
252b5132 3251 op_ad = op_index[0];
050dfa73
MM		 3252 op_index[0] = op_index[3];
3253 op_index[3] = op_ad;
3254 op_ad = op_index[1];
3255 op_index[1] = op_index[2];
252b5132 3256 op_index[2] = op_ad;
050dfa73 3257
252b5132
RH		 3258 }
3259 else
3260 {
050dfa73
MM		 3261 first = op4out;
3262 second = op3out;
3263 third = op2out;
3264 fourth = op1out;
252b5132
RH		 3265 }
3266 needcomma = 0;
3267 if (*first)
3268 {
52b15da3 3269 if (op_index[0] != -1 && !op_riprel[0])
252b5132
RH		 3270 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
3271 else
3272 (*info->fprintf_func) (info->stream, "%s", first);
3273 needcomma = 1;
3274 }
050dfa73 3275
252b5132
RH		 3276 if (*second)
3277 {
3278 if (needcomma)
3279 (*info->fprintf_func) (info->stream, ",");
52b15da3 3280 if (op_index[1] != -1 && !op_riprel[1])
252b5132
RH		 3281 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
3282 else
3283 (*info->fprintf_func) (info->stream, "%s", second);
3284 needcomma = 1;
3285 }
050dfa73 3286
252b5132
RH		 3287 if (*third)
3288 {
3289 if (needcomma)
3290 (*info->fprintf_func) (info->stream, ",");
52b15da3 3291 if (op_index[2] != -1 && !op_riprel[2])
252b5132
RH		 3292 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
3293 else
3294 (*info->fprintf_func) (info->stream, "%s", third);
050dfa73
MM		 3295 needcomma = 1;
3296 }
3297
3298 if (*fourth)
3299 {
3300 if (needcomma)
3301 (*info->fprintf_func) (info->stream, ",");
3302 if (op_index[3] != -1 && !op_riprel[3])
3303 (*info->print_address_func) ((bfd_vma) op_address[op_index[3]], info);
3304 else
3305 (*info->fprintf_func) (info->stream, "%s", fourth);
252b5132 3306 }
050dfa73
MM		 3307
3308 for (i = 0; i < 4; i++)
52b15da3
JH		 3309 if (op_index[i] != -1 && op_riprel[i])
3310 {
3311 (*info->fprintf_func) (info->stream, " # ");
3312 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3313 + op_address[op_index[i]]), info);
3314 }
e396998b 3315 return codep - priv.the_buffer;
252b5132
RH		 3316}
3317
6439fc28 3318static const char *float_mem[] = {
252b5132 3319 /* d8 */
6439fc28
AM		 3320 "fadd{s||s|}",
3321 "fmul{s||s|}",
3322 "fcom{s||s|}",
3323 "fcomp{s||s|}",
3324 "fsub{s||s|}",
3325 "fsubr{s||s|}",
3326 "fdiv{s||s|}",
3327 "fdivr{s||s|}",
db6eb5be 3328 /* d9 */
6439fc28 3329 "fld{s||s|}",
252b5132 3330 "(bad)",
6439fc28
AM		 3331 "fst{s||s|}",
3332 "fstp{s||s|}",
9306ca4a 3333 "fldenvIC",
252b5132 3334 "fldcw",
9306ca4a 3335 "fNstenvIC",
252b5132
RH		 3336 "fNstcw",
3337 /* da */
6439fc28
AM		 3338 "fiadd{l||l|}",
3339 "fimul{l||l|}",
3340 "ficom{l||l|}",
3341 "ficomp{l||l|}",
3342 "fisub{l||l|}",
3343 "fisubr{l||l|}",
3344 "fidiv{l||l|}",
3345 "fidivr{l||l|}",
252b5132 3346 /* db */
6439fc28 3347 "fild{l||l|}",
ca164297 3348 "fisttp{l||l|}",
6439fc28
AM		 3349 "fist{l||l|}",
3350 "fistp{l||l|}",
252b5132 3351 "(bad)",
6439fc28 3352 "fld{t||t|}",
252b5132 3353 "(bad)",
6439fc28 3354 "fstp{t||t|}",
252b5132 3355 /* dc */
6439fc28
AM		 3356 "fadd{l||l|}",
3357 "fmul{l||l|}",
3358 "fcom{l||l|}",
3359 "fcomp{l||l|}",
3360 "fsub{l||l|}",
3361 "fsubr{l||l|}",
3362 "fdiv{l||l|}",
3363 "fdivr{l||l|}",
252b5132 3364 /* dd */
6439fc28 3365 "fld{l||l|}",
1d9f512f 3366 "fisttp{ll||ll|}",
6439fc28
AM		 3367 "fst{l||l|}",
3368 "fstp{l||l|}",
9306ca4a 3369 "frstorIC",
252b5132 3370 "(bad)",
9306ca4a 3371 "fNsaveIC",
252b5132
RH		 3372 "fNstsw",
3373 /* de */
3374 "fiadd",
3375 "fimul",
3376 "ficom",
3377 "ficomp",
3378 "fisub",
3379 "fisubr",
3380 "fidiv",
3381 "fidivr",
3382 /* df */
3383 "fild",
ca164297 3384 "fisttp",
252b5132
RH		 3385 "fist",
3386 "fistp",
3387 "fbld",
6439fc28 3388 "fild{ll||ll|}",
252b5132 3389 "fbstp",
1d9f512f
AM		 3390 "fistp{ll||ll|}",
3391};
3392
3393static const unsigned char float_mem_mode[] = {
3394 /* d8 */
3395 d_mode,
3396 d_mode,
3397 d_mode,
3398 d_mode,
3399 d_mode,
3400 d_mode,
3401 d_mode,
3402 d_mode,
3403 /* d9 */
3404 d_mode,
3405 0,
3406 d_mode,
3407 d_mode,
3408 0,
3409 w_mode,
3410 0,
3411 w_mode,
3412 /* da */
3413 d_mode,
3414 d_mode,
3415 d_mode,
3416 d_mode,
3417 d_mode,
3418 d_mode,
3419 d_mode,
3420 d_mode,
3421 /* db */
3422 d_mode,
3423 d_mode,
3424 d_mode,
3425 d_mode,
3426 0,
9306ca4a 3427 t_mode,
1d9f512f 3428 0,
9306ca4a 3429 t_mode,
1d9f512f
AM		 3430 /* dc */
3431 q_mode,
3432 q_mode,
3433 q_mode,
3434 q_mode,
3435 q_mode,
3436 q_mode,
3437 q_mode,
3438 q_mode,
3439 /* dd */
3440 q_mode,
3441 q_mode,
3442 q_mode,
3443 q_mode,
3444 0,
3445 0,
3446 0,
3447 w_mode,
3448 /* de */
3449 w_mode,
3450 w_mode,
3451 w_mode,
3452 w_mode,
3453 w_mode,
3454 w_mode,
3455 w_mode,
3456 w_mode,
3457 /* df */
3458 w_mode,
3459 w_mode,
3460 w_mode,
3461 w_mode,
9306ca4a 3462 t_mode,
1d9f512f 3463 q_mode,
9306ca4a 3464 t_mode,
1d9f512f 3465 q_mode
252b5132
RH		 3466};
3467
3468#define ST OP_ST, 0
3469#define STi OP_STi, 0
3470
050dfa73
MM		 3471#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0, NULL, 0
3472#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0, NULL, 0
3473#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0, NULL, 0
3474#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0, NULL, 0
3475#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0, NULL, 0
3476#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0, NULL, 0
3477#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0, NULL, 0
3478#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0, NULL, 0
3479#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0, NULL, 0
252b5132 3480
2da11e11 3481static const struct dis386 float_reg[][8] = {
252b5132
RH		 3482 /* d8 */
3483 {
050dfa73
MM		 3484 { "fadd", ST, STi, XX, XX },
3485 { "fmul", ST, STi, XX, XX },
3486 { "fcom", STi, XX, XX, XX },
3487 { "fcomp", STi, XX, XX, XX },
3488 { "fsub", ST, STi, XX, XX },
3489 { "fsubr", ST, STi, XX, XX },
3490 { "fdiv", ST, STi, XX, XX },
3491 { "fdivr", ST, STi, XX, XX },
252b5132
RH		 3492 },
3493 /* d9 */
3494 {
050dfa73
MM		 3495 { "fld", STi, XX, XX, XX },
3496 { "fxch", STi, XX, XX, XX },
252b5132 3497 { FGRPd9_2 },
050dfa73 3498 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3499 { FGRPd9_4 },
3500 { FGRPd9_5 },
3501 { FGRPd9_6 },
3502 { FGRPd9_7 },
3503 },
3504 /* da */
3505 {
050dfa73
MM		 3506 { "fcmovb", ST, STi, XX, XX },
3507 { "fcmove", ST, STi, XX, XX },
3508 { "fcmovbe",ST, STi, XX, XX },
3509 { "fcmovu", ST, STi, XX, XX },
3510 { "(bad)", XX, XX, XX, XX },
252b5132 3511 { FGRPda_5 },
050dfa73
MM		 3512 { "(bad)", XX, XX, XX, XX },
3513 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3514 },
3515 /* db */
3516 {
050dfa73
MM		 3517 { "fcmovnb",ST, STi, XX, XX },
3518 { "fcmovne",ST, STi, XX, XX },
3519 { "fcmovnbe",ST, STi, XX, XX },
3520 { "fcmovnu",ST, STi, XX, XX },
252b5132 3521 { FGRPdb_4 },
050dfa73
MM		 3522 { "fucomi", ST, STi, XX, XX },
3523 { "fcomi", ST, STi, XX, XX },
3524 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3525 },
3526 /* dc */
3527 {
050dfa73
MM		 3528 { "fadd", STi, ST, XX, XX },
3529 { "fmul", STi, ST, XX, XX },
3530 { "(bad)", XX, XX, XX, XX },
3531 { "(bad)", XX, XX, XX, XX },
252b5132 3532#if UNIXWARE_COMPAT
050dfa73
MM		 3533 { "fsub", STi, ST, XX, XX },
3534 { "fsubr", STi, ST, XX, XX },
3535 { "fdiv", STi, ST, XX, XX },
3536 { "fdivr", STi, ST, XX, XX },
252b5132 3537#else
050dfa73
MM		 3538 { "fsubr", STi, ST, XX, XX },
3539 { "fsub", STi, ST, XX, XX },
3540 { "fdivr", STi, ST, XX, XX },
3541 { "fdiv", STi, ST, XX, XX },
252b5132
RH		 3542#endif
3543 },
3544 /* dd */
3545 {
050dfa73
MM		 3546 { "ffree", STi, XX, XX, XX },
3547 { "(bad)", XX, XX, XX, XX },
3548 { "fst", STi, XX, XX, XX },
3549 { "fstp", STi, XX, XX, XX },
3550 { "fucom", STi, XX, XX, XX },
3551 { "fucomp", STi, XX, XX, XX },
3552 { "(bad)", XX, XX, XX, XX },
3553 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3554 },
3555 /* de */
3556 {
050dfa73
MM		 3557 { "faddp", STi, ST, XX, XX },
3558 { "fmulp", STi, ST, XX, XX },
3559 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3560 { FGRPde_3 },
3561#if UNIXWARE_COMPAT
050dfa73
MM		 3562 { "fsubp", STi, ST, XX, XX },
3563 { "fsubrp", STi, ST, XX, XX },
3564 { "fdivp", STi, ST, XX, XX },
3565 { "fdivrp", STi, ST, XX, XX },
252b5132 3566#else
050dfa73
MM		 3567 { "fsubrp", STi, ST, XX, XX },
3568 { "fsubp", STi, ST, XX, XX },
3569 { "fdivrp", STi, ST, XX, XX },
3570 { "fdivp", STi, ST, XX, XX },
252b5132
RH		 3571#endif
3572 },
3573 /* df */
3574 {
050dfa73
MM		 3575 { "ffreep", STi, XX, XX, XX },
3576 { "(bad)", XX, XX, XX, XX },
3577 { "(bad)", XX, XX, XX, XX },
3578 { "(bad)", XX, XX, XX, XX },
252b5132 3579 { FGRPdf_4 },
050dfa73
MM		 3580 { "fucomip",ST, STi, XX, XX },
3581 { "fcomip", ST, STi, XX, XX },
3582 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3583 },
3584};
3585
252b5132
RH		 3586static char *fgrps[][8] = {
3587 /* d9_2 0 */
3588 {
3589 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3590 },
3591
3592 /* d9_4 1 */
3593 {
3594 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
3595 },
3596
3597 /* d9_5 2 */
3598 {
3599 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
3600 },
3601
3602 /* d9_6 3 */
3603 {
3604 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
3605 },
3606
3607 /* d9_7 4 */
3608 {
3609 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
3610 },
3611
3612 /* da_5 5 */
3613 {
3614 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3615 },
3616
3617 /* db_4 6 */
3618 {
3619 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
3620 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
3621 },
3622
3623 /* de_3 7 */
3624 {
3625 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3626 },
3627
3628 /* df_4 8 */
3629 {
3630 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3631 },
3632};
3633
3634static void
26ca5450 3635dofloat (int sizeflag)
252b5132 3636{
2da11e11 3637 const struct dis386 *dp;
252b5132
RH		 3638 unsigned char floatop;
3639
3640 floatop = codep[-1];
3641
3642 if (mod != 3)
3643 {
1d9f512f
AM		 3644 int fp_indx = (floatop - 0xd8) * 8 + reg;
3645
3646 putop (float_mem[fp_indx], sizeflag);
252b5132 3647 obufp = op1out;
6e50d963 3648 op_ad = 2;
1d9f512f 3649 OP_E (float_mem_mode[fp_indx], sizeflag);
252b5132
RH		 3650 return;
3651 }
6608db57 3652 /* Skip mod/rm byte. */
4bba6815 3653 MODRM_CHECK;
252b5132
RH		 3654 codep++;
3655
3656 dp = &float_reg[floatop - 0xd8][reg];
3657 if (dp->name == NULL)
3658 {
3659 putop (fgrps[dp->bytemode1][rm], sizeflag);
3660
6608db57 3661 /* Instruction fnstsw is only one with strange arg. */
252b5132
RH		 3662 if (floatop == 0xdf && codep[-1] == 0xe0)
3663 strcpy (op1out, names16[0]);
3664 }
3665 else
3666 {
3667 putop (dp->name, sizeflag);
3668
3669 obufp = op1out;
6e50d963 3670 op_ad = 2;
252b5132 3671 if (dp->op1)
6608db57 3672 (*dp->op1) (dp->bytemode1, sizeflag);
6e50d963 3673
252b5132 3674 obufp = op2out;
6e50d963 3675 op_ad = 1;
252b5132 3676 if (dp->op2)
6608db57 3677 (*dp->op2) (dp->bytemode2, sizeflag);
252b5132
RH		 3678 }
3679}
3680
252b5132 3681static void
26ca5450 3682OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 3683{
422673a9 3684 oappend ("%st" + intel_syntax);
252b5132
RH		 3685}
3686
252b5132 3687static void
26ca5450 3688OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 3689{
3690 sprintf (scratchbuf, "%%st(%d)", rm);
d708bcba 3691 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3692}
3693
6608db57 3694/* Capital letters in template are macros. */
6439fc28 3695static int
26ca5450 3696putop (const char *template, int sizeflag)
252b5132 3697{
2da11e11 3698 const char *p;
9306ca4a 3699 int alt = 0;
252b5132
RH		 3700
3701 for (p = template; *p; p++)
3702 {
3703 switch (*p)
3704 {
3705 default:
3706 *obufp++ = *p;
3707 break;
6439fc28
AM		 3708 case '{':
3709 alt = 0;
3710 if (intel_syntax)
3711 alt += 1;
cb712a9e 3712 if (address_mode == mode_64bit)
6439fc28
AM		 3713 alt += 2;
3714 while (alt != 0)
3715 {
3716 while (*++p != '|')
3717 {
3718 if (*p == '}')
3719 {
3720 /* Alternative not valid. */
3721 strcpy (obuf, "(bad)");
3722 obufp = obuf + 5;
3723 return 1;
3724 }
3725 else if (*p == '\0')
3726 abort ();
3727 }
3728 alt--;
3729 }
9306ca4a
JB		 3730 /* Fall through. */
3731 case 'I':
3732 alt = 1;
3733 continue;
6439fc28
AM		 3734 case '|':
3735 while (*++p != '}')
3736 {
3737 if (*p == '\0')
3738 abort ();
3739 }
3740 break;
3741 case '}':
3742 break;
252b5132 3743 case 'A':
db6eb5be
AM		 3744 if (intel_syntax)
3745 break;
e396998b 3746 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132
RH		 3747 *obufp++ = 'b';
3748 break;
3749 case 'B':
db6eb5be
AM		 3750 if (intel_syntax)
3751 break;
252b5132
RH		 3752 if (sizeflag & SUFFIX_ALWAYS)
3753 *obufp++ = 'b';
252b5132 3754 break;
9306ca4a
JB		 3755 case 'C':
3756 if (intel_syntax && !alt)
3757 break;
3758 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
3759 {
3760 if (sizeflag & DFLAG)
3761 *obufp++ = intel_syntax ? 'd' : 'l';
3762 else
3763 *obufp++ = intel_syntax ? 'w' : 's';
3764 used_prefixes |= (prefixes & PREFIX_DATA);
3765 }
3766 break;
ed7841b3
JB		 3767 case 'D':
3768 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
3769 break;
3770 USED_REX (REX_MODE64);
3771 if (mod == 3)
3772 {
3773 if (rex & REX_MODE64)
3774 *obufp++ = 'q';
3775 else if (sizeflag & DFLAG)
3776 *obufp++ = intel_syntax ? 'd' : 'l';
3777 else
3778 *obufp++ = 'w';
3779 used_prefixes |= (prefixes & PREFIX_DATA);
3780 }
3781 else
3782 *obufp++ = 'w';
3783 break;
252b5132 3784 case 'E': /* For jcxz/jecxz */
cb712a9e 3785 if (address_mode == mode_64bit)
c1a64871
JH		 3786 {
3787 if (sizeflag & AFLAG)
3788 *obufp++ = 'r';
3789 else
3790 *obufp++ = 'e';
3791 }
3792 else
3793 if (sizeflag & AFLAG)
3794 *obufp++ = 'e';
3ffd33cf
AM		 3795 used_prefixes |= (prefixes & PREFIX_ADDR);
3796 break;
3797 case 'F':
db6eb5be
AM		 3798 if (intel_syntax)
3799 break;
e396998b 3800 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3ffd33cf
AM		 3801 {
3802 if (sizeflag & AFLAG)
cb712a9e 3803 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
3ffd33cf 3804 else
cb712a9e 3805 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
3ffd33cf
AM		 3806 used_prefixes |= (prefixes & PREFIX_ADDR);
3807 }
252b5132 3808 break;
52fd6d94
JB		 3809 case 'G':
3810 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
3811 break;
3812 if ((rex & REX_MODE64) || (sizeflag & DFLAG))
3813 *obufp++ = 'l';
3814 else
3815 *obufp++ = 'w';
3816 if (!(rex & REX_MODE64))
3817 used_prefixes |= (prefixes & PREFIX_DATA);
3818 break;
5dd0794d 3819 case 'H':
db6eb5be
AM		 3820 if (intel_syntax)
3821 break;
5dd0794d
AM		 3822 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
3823 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
3824 {
3825 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
3826 *obufp++ = ',';
3827 *obufp++ = 'p';
3828 if (prefixes & PREFIX_DS)
3829 *obufp++ = 't';
3830 else
3831 *obufp++ = 'n';
3832 }
3833 break;
9306ca4a
JB		 3834 case 'J':
3835 if (intel_syntax)
3836 break;
3837 *obufp++ = 'l';
3838 break;
6dd5059a
L		 3839 case 'Z':
3840 if (intel_syntax)
3841 break;
3842 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
3843 {
3844 *obufp++ = 'q';
3845 break;
3846 }
3847 /* Fall through. */
252b5132 3848 case 'L':
db6eb5be
AM		 3849 if (intel_syntax)
3850 break;
252b5132
RH		 3851 if (sizeflag & SUFFIX_ALWAYS)
3852 *obufp++ = 'l';
252b5132
RH		 3853 break;
3854 case 'N':
3855 if ((prefixes & PREFIX_FWAIT) == 0)
3856 *obufp++ = 'n';
7d421014
ILT		 3857 else
3858 used_prefixes |= PREFIX_FWAIT;
252b5132 3859 break;
52b15da3
JH		 3860 case 'O':
3861 USED_REX (REX_MODE64);
3862 if (rex & REX_MODE64)
6439fc28 3863 *obufp++ = 'o';
a35ca55a
JB		 3864 else if (intel_syntax && (sizeflag & DFLAG))
3865 *obufp++ = 'q';
52b15da3
JH		 3866 else
3867 *obufp++ = 'd';
a35ca55a
JB		 3868 if (!(rex & REX_MODE64))
3869 used_prefixes |= (prefixes & PREFIX_DATA);
52b15da3 3870 break;
6439fc28 3871 case 'T':
db6eb5be
AM		 3872 if (intel_syntax)
3873 break;
cb712a9e 3874 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 3875 {
3876 *obufp++ = 'q';
3877 break;
3878 }
6608db57 3879 /* Fall through. */
252b5132 3880 case 'P':
db6eb5be
AM		 3881 if (intel_syntax)
3882 break;
252b5132 3883 if ((prefixes & PREFIX_DATA)
52b15da3 3884 || (rex & REX_MODE64)
e396998b 3885 || (sizeflag & SUFFIX_ALWAYS))
252b5132 3886 {
52b15da3
JH		 3887 USED_REX (REX_MODE64);
3888 if (rex & REX_MODE64)
3889 *obufp++ = 'q';
c2419411 3890 else
52b15da3
JH		 3891 {
3892 if (sizeflag & DFLAG)
3893 *obufp++ = 'l';
3894 else
3895 *obufp++ = 'w';
52b15da3 3896 }
1a114b12 3897 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3898 }
3899 break;
6439fc28 3900 case 'U':
db6eb5be
AM		 3901 if (intel_syntax)
3902 break;
cb712a9e 3903 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28 3904 {
1a114b12
JB		 3905 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
3906 *obufp++ = 'q';
6439fc28
AM		 3907 break;
3908 }
6608db57 3909 /* Fall through. */
252b5132 3910 case 'Q':
9306ca4a 3911 if (intel_syntax && !alt)
db6eb5be 3912 break;
90530880 3913 USED_REX (REX_MODE64);
e396998b 3914 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132 3915 {
52b15da3
JH		 3916 if (rex & REX_MODE64)
3917 *obufp++ = 'q';
252b5132 3918 else
52b15da3
JH		 3919 {
3920 if (sizeflag & DFLAG)
9306ca4a 3921 *obufp++ = intel_syntax ? 'd' : 'l';
52b15da3
JH		 3922 else
3923 *obufp++ = 'w';
52b15da3 3924 }
1a114b12 3925 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3926 }
3927 break;
3928 case 'R':
52b15da3 3929 USED_REX (REX_MODE64);
a35ca55a
JB		 3930 if (rex & REX_MODE64)
3931 *obufp++ = 'q';
3932 else if (sizeflag & DFLAG)
c608c12e 3933 {
a35ca55a 3934 if (intel_syntax)
c608c12e 3935 *obufp++ = 'd';
c608c12e 3936 else
a35ca55a 3937 *obufp++ = 'l';
c608c12e 3938 }
252b5132 3939 else
a35ca55a
JB		 3940 *obufp++ = 'w';
3941 if (intel_syntax && !p[1]
3942 && ((rex & REX_MODE64) || (sizeflag & DFLAG)))
3943 *obufp++ = 'e';
52b15da3
JH		 3944 if (!(rex & REX_MODE64))
3945 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 3946 break;
1a114b12
JB		 3947 case 'V':
3948 if (intel_syntax)
3949 break;
cb712a9e 3950 if (address_mode == mode_64bit && (sizeflag & DFLAG))
1a114b12
JB		 3951 {
3952 if (sizeflag & SUFFIX_ALWAYS)
3953 *obufp++ = 'q';
3954 break;
3955 }
3956 /* Fall through. */
252b5132 3957 case 'S':
db6eb5be
AM		 3958 if (intel_syntax)
3959 break;
252b5132
RH		 3960 if (sizeflag & SUFFIX_ALWAYS)
3961 {
52b15da3
JH		 3962 if (rex & REX_MODE64)
3963 *obufp++ = 'q';
252b5132 3964 else
52b15da3
JH		 3965 {
3966 if (sizeflag & DFLAG)
3967 *obufp++ = 'l';
3968 else
3969 *obufp++ = 'w';
3970 used_prefixes |= (prefixes & PREFIX_DATA);
3971 }
252b5132 3972 }
252b5132 3973 break;
041bd2e0
JH		 3974 case 'X':
3975 if (prefixes & PREFIX_DATA)
3976 *obufp++ = 'd';
3977 else
3978 *obufp++ = 's';
db6eb5be 3979 used_prefixes |= (prefixes & PREFIX_DATA);
041bd2e0 3980 break;
76f227a5 3981 case 'Y':
db6eb5be
AM		 3982 if (intel_syntax)
3983 break;
76f227a5
JH		 3984 if (rex & REX_MODE64)
3985 {
3986 USED_REX (REX_MODE64);
3987 *obufp++ = 'q';
3988 }
3989 break;
52b15da3 3990 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 3991 case 'W':
252b5132 3992 /* operand size flag for cwtl, cbtw */
a35ca55a
JB		 3993 USED_REX (REX_MODE64);
3994 if (rex & REX_MODE64)
3995 {
3996 if (intel_syntax)
3997 *obufp++ = 'd';
3998 else
3999 *obufp++ = 'l';
4000 }
52b15da3 4001 else if (sizeflag & DFLAG)
252b5132
RH		 4002 *obufp++ = 'w';
4003 else
4004 *obufp++ = 'b';
a35ca55a 4005 if (!(rex & REX_MODE64))
52b15da3 4006 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4007 break;
4008 }
9306ca4a 4009 alt = 0;
252b5132
RH		 4010 }
4011 *obufp = 0;
6439fc28 4012 return 0;
252b5132
RH		 4013}
4014
4015static void
26ca5450 4016oappend (const char *s)
252b5132
RH		 4017{
4018 strcpy (obufp, s);
4019 obufp += strlen (s);
4020}
4021
4022static void
26ca5450 4023append_seg (void)
252b5132
RH		 4024{
4025 if (prefixes & PREFIX_CS)
7d421014 4026 {
7d421014 4027 used_prefixes |= PREFIX_CS;
d708bcba 4028 oappend ("%cs:" + intel_syntax);
7d421014 4029 }
252b5132 4030 if (prefixes & PREFIX_DS)
7d421014 4031 {
7d421014 4032 used_prefixes |= PREFIX_DS;
d708bcba 4033 oappend ("%ds:" + intel_syntax);
7d421014 4034 }
252b5132 4035 if (prefixes & PREFIX_SS)
7d421014 4036 {
7d421014 4037 used_prefixes |= PREFIX_SS;
d708bcba 4038 oappend ("%ss:" + intel_syntax);
7d421014 4039 }
252b5132 4040 if (prefixes & PREFIX_ES)
7d421014 4041 {
7d421014 4042 used_prefixes |= PREFIX_ES;
d708bcba 4043 oappend ("%es:" + intel_syntax);
7d421014 4044 }
252b5132 4045 if (prefixes & PREFIX_FS)
7d421014 4046 {
7d421014 4047 used_prefixes |= PREFIX_FS;
d708bcba 4048 oappend ("%fs:" + intel_syntax);
7d421014 4049 }
252b5132 4050 if (prefixes & PREFIX_GS)
7d421014 4051 {
7d421014 4052 used_prefixes |= PREFIX_GS;
d708bcba 4053 oappend ("%gs:" + intel_syntax);
7d421014 4054 }
252b5132
RH		 4055}
4056
4057static void
26ca5450 4058OP_indirE (int bytemode, int sizeflag)
252b5132
RH		 4059{
4060 if (!intel_syntax)
4061 oappend ("*");
4062 OP_E (bytemode, sizeflag);
4063}
4064
52b15da3 4065static void
26ca5450 4066print_operand_value (char *buf, int hex, bfd_vma disp)
52b15da3 4067{
cb712a9e 4068 if (address_mode == mode_64bit)
52b15da3
JH		 4069 {
4070 if (hex)
4071 {
4072 char tmp[30];
4073 int i;
4074 buf[0] = '0';
4075 buf[1] = 'x';
4076 sprintf_vma (tmp, disp);
6608db57 4077 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
52b15da3
JH		 4078 strcpy (buf + 2, tmp + i);
4079 }
4080 else
4081 {
4082 bfd_signed_vma v = disp;
4083 char tmp[30];
4084 int i;
4085 if (v < 0)
4086 {
4087 *(buf++) = '-';
4088 v = -disp;
6608db57 4089 /* Check for possible overflow on 0x8000000000000000. */
52b15da3
JH		 4090 if (v < 0)
4091 {
4092 strcpy (buf, "9223372036854775808");
4093 return;
4094 }
4095 }
4096 if (!v)
4097 {
4098 strcpy (buf, "0");
4099 return;
4100 }
4101
4102 i = 0;
4103 tmp[29] = 0;
4104 while (v)
4105 {
6608db57 4106 tmp[28 - i] = (v % 10) + '0';
52b15da3
JH		 4107 v /= 10;
4108 i++;
4109 }
4110 strcpy (buf, tmp + 29 - i);
4111 }
4112 }
4113 else
4114 {
4115 if (hex)
4116 sprintf (buf, "0x%x", (unsigned int) disp);
4117 else
4118 sprintf (buf, "%d", (int) disp);
4119 }
4120}
4121
3f31e633
JB		 4122static void
4123intel_operand_size (int bytemode, int sizeflag)
4124{
4125 switch (bytemode)
4126 {
4127 case b_mode:
4128 oappend ("BYTE PTR ");
4129 break;
4130 case w_mode:
4131 case dqw_mode:
4132 oappend ("WORD PTR ");
4133 break;
1a114b12 4134 case stack_v_mode:
cb712a9e 4135 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3f31e633
JB		 4136 {
4137 oappend ("QWORD PTR ");
4138 used_prefixes |= (prefixes & PREFIX_DATA);
4139 break;
4140 }
4141 /* FALLTHRU */
4142 case v_mode:
4143 case dq_mode:
4144 USED_REX (REX_MODE64);
4145 if (rex & REX_MODE64)
4146 oappend ("QWORD PTR ");
4147 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4148 oappend ("DWORD PTR ");
4149 else
4150 oappend ("WORD PTR ");
4151 used_prefixes |= (prefixes & PREFIX_DATA);
4152 break;
52fd6d94
JB		 4153 case z_mode:
4154 if ((rex & REX_MODE64) || (sizeflag & DFLAG))
4155 *obufp++ = 'D';
4156 oappend ("WORD PTR ");
4157 if (!(rex & REX_MODE64))
4158 used_prefixes |= (prefixes & PREFIX_DATA);
4159 break;
3f31e633
JB		 4160 case d_mode:
4161 oappend ("DWORD PTR ");
4162 break;
4163 case q_mode:
4164 oappend ("QWORD PTR ");
4165 break;
4166 case m_mode:
cb712a9e 4167 if (address_mode == mode_64bit)
3f31e633
JB		 4168 oappend ("QWORD PTR ");
4169 else
4170 oappend ("DWORD PTR ");
4171 break;
4172 case f_mode:
4173 if (sizeflag & DFLAG)
4174 oappend ("FWORD PTR ");
4175 else
4176 oappend ("DWORD PTR ");
4177 used_prefixes |= (prefixes & PREFIX_DATA);
4178 break;
4179 case t_mode:
4180 oappend ("TBYTE PTR ");
4181 break;
4182 case x_mode:
4183 oappend ("XMMWORD PTR ");
4184 break;
4185 default:
4186 break;
4187 }
4188}
4189
252b5132 4190static void
26ca5450 4191OP_E (int bytemode, int sizeflag)
252b5132 4192{
52b15da3
JH		 4193 bfd_vma disp;
4194 int add = 0;
4195 int riprel = 0;
4196 USED_REX (REX_EXTZ);
4197 if (rex & REX_EXTZ)
4198 add += 8;
252b5132 4199
6608db57 4200 /* Skip mod/rm byte. */
4bba6815 4201 MODRM_CHECK;
252b5132
RH		 4202 codep++;
4203
4204 if (mod == 3)
4205 {
4206 switch (bytemode)
4207 {
4208 case b_mode:
52b15da3
JH		 4209 USED_REX (0);
4210 if (rex)
4211 oappend (names8rex[rm + add]);
4212 else
4213 oappend (names8[rm + add]);
252b5132
RH		 4214 break;
4215 case w_mode:
52b15da3 4216 oappend (names16[rm + add]);
252b5132 4217 break;
2da11e11 4218 case d_mode:
52b15da3
JH		 4219 oappend (names32[rm + add]);
4220 break;
4221 case q_mode:
4222 oappend (names64[rm + add]);
4223 break;
4224 case m_mode:
cb712a9e 4225 if (address_mode == mode_64bit)
52b15da3
JH		 4226 oappend (names64[rm + add]);
4227 else
4228 oappend (names32[rm + add]);
2da11e11 4229 break;
1a114b12 4230 case stack_v_mode:
cb712a9e 4231 if (address_mode == mode_64bit && (sizeflag & DFLAG))
003519a7 4232 {
1a114b12 4233 oappend (names64[rm + add]);
003519a7 4234 used_prefixes |= (prefixes & PREFIX_DATA);
1a114b12 4235 break;
003519a7 4236 }
1a114b12
JB		 4237 bytemode = v_mode;
4238 /* FALLTHRU */
252b5132 4239 case v_mode:
db6eb5be 4240 case dq_mode:
9306ca4a 4241 case dqw_mode:
52b15da3
JH		 4242 USED_REX (REX_MODE64);
4243 if (rex & REX_MODE64)
4244 oappend (names64[rm + add]);
9306ca4a 4245 else if ((sizeflag & DFLAG) || bytemode != v_mode)
52b15da3 4246 oappend (names32[rm + add]);
252b5132 4247 else
52b15da3 4248 oappend (names16[rm + add]);
7d421014 4249 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4250 break;
2da11e11 4251 case 0:
c608c12e 4252 break;
252b5132 4253 default:
c608c12e 4254 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 4255 break;
4256 }
4257 return;
4258 }
4259
4260 disp = 0;
3f31e633
JB		 4261 if (intel_syntax)
4262 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 4263 append_seg ();
4264
cb712a9e 4265 if ((sizeflag & AFLAG) || address_mode == mode_64bit) /* 32 bit address mode */
252b5132
RH		 4266 {
4267 int havesib;
4268 int havebase;
4269 int base;
4270 int index = 0;
4271 int scale = 0;
4272
4273 havesib = 0;
4274 havebase = 1;
4275 base = rm;
4276
4277 if (base == 4)
4278 {
4279 havesib = 1;
4280 FETCH_DATA (the_info, codep + 1);
252b5132 4281 index = (*codep >> 3) & 7;
cb712a9e 4282 if (address_mode == mode_64bit || index != 0x4)
9df48ba9 4283 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
2033b4b9 4284 scale = (*codep >> 6) & 3;
252b5132 4285 base = *codep & 7;
52b15da3 4286 USED_REX (REX_EXTY);
52b15da3
JH		 4287 if (rex & REX_EXTY)
4288 index += 8;
252b5132
RH		 4289 codep++;
4290 }
2888cb7a 4291 base += add;
252b5132
RH		 4292
4293 switch (mod)
4294 {
4295 case 0:
52b15da3 4296 if ((base & 7) == 5)
252b5132
RH		 4297 {
4298 havebase = 0;
cb712a9e 4299 if (address_mode == mode_64bit && !havesib)
52b15da3
JH		 4300 riprel = 1;
4301 disp = get32s ();
252b5132
RH		 4302 }
4303 break;
4304 case 1:
4305 FETCH_DATA (the_info, codep + 1);
4306 disp = *codep++;
4307 if ((disp & 0x80) != 0)
4308 disp -= 0x100;
4309 break;
4310 case 2:
52b15da3 4311 disp = get32s ();
252b5132
RH		 4312 break;
4313 }
4314
4315 if (!intel_syntax)
db6eb5be
AM		 4316 if (mod != 0 || (base & 7) == 5)
4317 {
52b15da3 4318 print_operand_value (scratchbuf, !riprel, disp);
db6eb5be 4319 oappend (scratchbuf);
52b15da3
JH		 4320 if (riprel)
4321 {
4322 set_op (disp, 1);
4323 oappend ("(%rip)");
4324 }
db6eb5be 4325 }
2da11e11 4326
252b5132
RH		 4327 if (havebase || (havesib && (index != 4 || scale != 0)))
4328 {
252b5132 4329 *obufp++ = open_char;
52b15da3
JH		 4330 if (intel_syntax && riprel)
4331 oappend ("rip + ");
db6eb5be 4332 *obufp = '\0';
252b5132 4333 if (havebase)
cb712a9e 4334 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
c1a64871 4335 ? names64[base] : names32[base]);
252b5132
RH		 4336 if (havesib)
4337 {
4338 if (index != 4)
4339 {
9306ca4a 4340 if (!intel_syntax || havebase)
db6eb5be 4341 {
9306ca4a
JB		 4342 *obufp++ = separator_char;
4343 *obufp = '\0';
db6eb5be 4344 }
cb712a9e 4345 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
9306ca4a 4346 ? names64[index] : names32[index]);
252b5132 4347 }
a02a862a 4348 if (scale != 0 || (!intel_syntax && index != 4))
db6eb5be
AM		 4349 {
4350 *obufp++ = scale_char;
4351 *obufp = '\0';
4352 sprintf (scratchbuf, "%d", 1 << scale);
4353 oappend (scratchbuf);
4354 }
252b5132 4355 }
3d456fa1
JB		 4356 if (intel_syntax && disp)
4357 {
4358 if ((bfd_signed_vma) disp > 0)
4359 {
4360 *obufp++ = '+';
4361 *obufp = '\0';
4362 }
4363 else if (mod != 1)
4364 {
4365 *obufp++ = '-';
4366 *obufp = '\0';
4367 disp = - (bfd_signed_vma) disp;
4368 }
4369
4370 print_operand_value (scratchbuf, mod != 1, disp);
4371 oappend (scratchbuf);
4372 }
252b5132
RH		 4373
4374 *obufp++ = close_char;
db6eb5be 4375 *obufp = '\0';
252b5132
RH		 4376 }
4377 else if (intel_syntax)
db6eb5be
AM		 4378 {
4379 if (mod != 0 || (base & 7) == 5)
4380 {
252b5132
RH		 4381 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4382 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4383 ;
4384 else
4385 {
d708bcba 4386 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 4387 oappend (":");
4388 }
52b15da3 4389 print_operand_value (scratchbuf, 1, disp);
db6eb5be
AM		 4390 oappend (scratchbuf);
4391 }
4392 }
252b5132
RH		 4393 }
4394 else
4395 { /* 16 bit address mode */
4396 switch (mod)
4397 {
4398 case 0:
2888cb7a 4399 if (rm == 6)
252b5132
RH		 4400 {
4401 disp = get16 ();
4402 if ((disp & 0x8000) != 0)
4403 disp -= 0x10000;
4404 }
4405 break;
4406 case 1:
4407 FETCH_DATA (the_info, codep + 1);
4408 disp = *codep++;
4409 if ((disp & 0x80) != 0)
4410 disp -= 0x100;
4411 break;
4412 case 2:
4413 disp = get16 ();
4414 if ((disp & 0x8000) != 0)
4415 disp -= 0x10000;
4416 break;
4417 }
4418
4419 if (!intel_syntax)
2888cb7a 4420 if (mod != 0 || rm == 6)
db6eb5be 4421 {
52b15da3 4422 print_operand_value (scratchbuf, 0, disp);
db6eb5be
AM		 4423 oappend (scratchbuf);
4424 }
252b5132 4425
2888cb7a 4426 if (mod != 0 || rm != 6)
252b5132
RH		 4427 {
4428 *obufp++ = open_char;
db6eb5be 4429 *obufp = '\0';
3d456fa1
JB		 4430 oappend (index16[rm]);
4431 if (intel_syntax && disp)
4432 {
4433 if ((bfd_signed_vma) disp > 0)
4434 {
4435 *obufp++ = '+';
4436 *obufp = '\0';
4437 }
4438 else if (mod != 1)
4439 {
4440 *obufp++ = '-';
4441 *obufp = '\0';
4442 disp = - (bfd_signed_vma) disp;
4443 }
4444
4445 print_operand_value (scratchbuf, mod != 1, disp);
4446 oappend (scratchbuf);
4447 }
4448
db6eb5be
AM		 4449 *obufp++ = close_char;
4450 *obufp = '\0';
252b5132 4451 }
3d456fa1
JB		 4452 else if (intel_syntax)
4453 {
4454 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4455 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4456 ;
4457 else
4458 {
4459 oappend (names_seg[ds_reg - es_reg]);
4460 oappend (":");
4461 }
4462 print_operand_value (scratchbuf, 1, disp & 0xffff);
4463 oappend (scratchbuf);
4464 }
252b5132
RH		 4465 }
4466}
4467
252b5132 4468static void
26ca5450 4469OP_G (int bytemode, int sizeflag)
252b5132 4470{
52b15da3
JH		 4471 int add = 0;
4472 USED_REX (REX_EXTX);
4473 if (rex & REX_EXTX)
4474 add += 8;
252b5132
RH		 4475 switch (bytemode)
4476 {
4477 case b_mode:
52b15da3
JH		 4478 USED_REX (0);
4479 if (rex)
4480 oappend (names8rex[reg + add]);
4481 else
4482 oappend (names8[reg + add]);
252b5132
RH		 4483 break;
4484 case w_mode:
52b15da3 4485 oappend (names16[reg + add]);
252b5132
RH		 4486 break;
4487 case d_mode:
52b15da3
JH		 4488 oappend (names32[reg + add]);
4489 break;
4490 case q_mode:
4491 oappend (names64[reg + add]);
252b5132
RH		 4492 break;
4493 case v_mode:
9306ca4a
JB		 4494 case dq_mode:
4495 case dqw_mode:
52b15da3
JH		 4496 USED_REX (REX_MODE64);
4497 if (rex & REX_MODE64)
4498 oappend (names64[reg + add]);
9306ca4a 4499 else if ((sizeflag & DFLAG) || bytemode != v_mode)
52b15da3 4500 oappend (names32[reg + add]);
252b5132 4501 else
52b15da3 4502 oappend (names16[reg + add]);
7d421014 4503 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4504 break;
90700ea2 4505 case m_mode:
cb712a9e 4506 if (address_mode == mode_64bit)
90700ea2
L		 4507 oappend (names64[reg + add]);
4508 else
4509 oappend (names32[reg + add]);
4510 break;
252b5132
RH		 4511 default:
4512 oappend (INTERNAL_DISASSEMBLER_ERROR);
4513 break;
4514 }
4515}
4516
52b15da3 4517static bfd_vma
26ca5450 4518get64 (void)
52b15da3 4519{
5dd0794d 4520 bfd_vma x;
52b15da3 4521#ifdef BFD64
5dd0794d
AM		 4522 unsigned int a;
4523 unsigned int b;
4524
52b15da3
JH		 4525 FETCH_DATA (the_info, codep + 8);
4526 a = *codep++ & 0xff;
4527 a |= (*codep++ & 0xff) << 8;
4528 a |= (*codep++ & 0xff) << 16;
4529 a |= (*codep++ & 0xff) << 24;
5dd0794d 4530 b = *codep++ & 0xff;
52b15da3
JH		 4531 b |= (*codep++ & 0xff) << 8;
4532 b |= (*codep++ & 0xff) << 16;
4533 b |= (*codep++ & 0xff) << 24;
4534 x = a + ((bfd_vma) b << 32);
4535#else
6608db57 4536 abort ();
5dd0794d 4537 x = 0;
52b15da3
JH		 4538#endif
4539 return x;
4540}
4541
4542static bfd_signed_vma
26ca5450 4543get32 (void)
252b5132 4544{
52b15da3 4545 bfd_signed_vma x = 0;
252b5132
RH		 4546
4547 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 4548 x = *codep++ & (bfd_signed_vma) 0xff;
4549 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4550 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4551 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4552 return x;
4553}
4554
4555static bfd_signed_vma
26ca5450 4556get32s (void)
52b15da3
JH		 4557{
4558 bfd_signed_vma x = 0;
4559
4560 FETCH_DATA (the_info, codep + 4);
4561 x = *codep++ & (bfd_signed_vma) 0xff;
4562 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4563 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4564 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4565
4566 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
4567
252b5132
RH		 4568 return x;
4569}
4570
4571static int
26ca5450 4572get16 (void)
252b5132
RH		 4573{
4574 int x = 0;
4575
4576 FETCH_DATA (the_info, codep + 2);
4577 x = *codep++ & 0xff;
4578 x |= (*codep++ & 0xff) << 8;
4579 return x;
4580}
4581
4582static void
26ca5450 4583set_op (bfd_vma op, int riprel)
252b5132
RH		 4584{
4585 op_index[op_ad] = op_ad;
cb712a9e 4586 if (address_mode == mode_64bit)
7081ff04
AJ		 4587 {
4588 op_address[op_ad] = op;
4589 op_riprel[op_ad] = riprel;
4590 }
4591 else
4592 {
4593 /* Mask to get a 32-bit address. */
4594 op_address[op_ad] = op & 0xffffffff;
4595 op_riprel[op_ad] = riprel & 0xffffffff;
4596 }
252b5132
RH		 4597}
4598
4599static void
26ca5450 4600OP_REG (int code, int sizeflag)
252b5132 4601{
2da11e11 4602 const char *s;
52b15da3
JH		 4603 int add = 0;
4604 USED_REX (REX_EXTZ);
4605 if (rex & REX_EXTZ)
4606 add = 8;
4607
4608 switch (code)
4609 {
52b15da3
JH		 4610 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4611 case sp_reg: case bp_reg: case si_reg: case di_reg:
4612 s = names16[code - ax_reg + add];
4613 break;
4614 case es_reg: case ss_reg: case cs_reg:
4615 case ds_reg: case fs_reg: case gs_reg:
4616 s = names_seg[code - es_reg + add];
4617 break;
4618 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4619 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
4620 USED_REX (0);
4621 if (rex)
4622 s = names8rex[code - al_reg + add];
4623 else
4624 s = names8[code - al_reg];
4625 break;
6439fc28
AM		 4626 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
4627 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
cb712a9e 4628 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 4629 {
4630 s = names64[code - rAX_reg + add];
4631 break;
4632 }
4633 code += eAX_reg - rAX_reg;
6608db57 4634 /* Fall through. */
52b15da3
JH		 4635 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4636 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
4637 USED_REX (REX_MODE64);
4638 if (rex & REX_MODE64)
4639 s = names64[code - eAX_reg + add];
4640 else if (sizeflag & DFLAG)
4641 s = names32[code - eAX_reg + add];
4642 else
4643 s = names16[code - eAX_reg + add];
4644 used_prefixes |= (prefixes & PREFIX_DATA);
4645 break;
52b15da3
JH		 4646 default:
4647 s = INTERNAL_DISASSEMBLER_ERROR;
4648 break;
4649 }
4650 oappend (s);
4651}
4652
4653static void
26ca5450 4654OP_IMREG (int code, int sizeflag)
52b15da3
JH		 4655{
4656 const char *s;
252b5132
RH		 4657
4658 switch (code)
4659 {
4660 case indir_dx_reg:
d708bcba 4661 if (intel_syntax)
52fd6d94 4662 s = "dx";
d708bcba 4663 else
db6eb5be 4664 s = "(%dx)";
252b5132
RH		 4665 break;
4666 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4667 case sp_reg: case bp_reg: case si_reg: case di_reg:
4668 s = names16[code - ax_reg];
4669 break;
4670 case es_reg: case ss_reg: case cs_reg:
4671 case ds_reg: case fs_reg: case gs_reg:
4672 s = names_seg[code - es_reg];
4673 break;
4674 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4675 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 4676 USED_REX (0);
4677 if (rex)
4678 s = names8rex[code - al_reg];
4679 else
4680 s = names8[code - al_reg];
252b5132
RH		 4681 break;
4682 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4683 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
52b15da3
JH		 4684 USED_REX (REX_MODE64);
4685 if (rex & REX_MODE64)
4686 s = names64[code - eAX_reg];
4687 else if (sizeflag & DFLAG)
252b5132
RH		 4688 s = names32[code - eAX_reg];
4689 else
4690 s = names16[code - eAX_reg];
7d421014 4691 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4692 break;
52fd6d94
JB		 4693 case z_mode_ax_reg:
4694 if ((rex & REX_MODE64) || (sizeflag & DFLAG))
4695 s = *names32;
4696 else
4697 s = *names16;
4698 if (!(rex & REX_MODE64))
4699 used_prefixes |= (prefixes & PREFIX_DATA);
4700 break;
252b5132
RH		 4701 default:
4702 s = INTERNAL_DISASSEMBLER_ERROR;
4703 break;
4704 }
4705 oappend (s);
4706}
4707
4708static void
26ca5450 4709OP_I (int bytemode, int sizeflag)
252b5132 4710{
52b15da3
JH		 4711 bfd_signed_vma op;
4712 bfd_signed_vma mask = -1;
252b5132
RH		 4713
4714 switch (bytemode)
4715 {
4716 case b_mode:
4717 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 4718 op = *codep++;
4719 mask = 0xff;
4720 break;
4721 case q_mode:
cb712a9e 4722 if (address_mode == mode_64bit)
6439fc28
AM		 4723 {
4724 op = get32s ();
4725 break;
4726 }
6608db57 4727 /* Fall through. */
252b5132 4728 case v_mode:
52b15da3
JH		 4729 USED_REX (REX_MODE64);
4730 if (rex & REX_MODE64)
4731 op = get32s ();
4732 else if (sizeflag & DFLAG)
4733 {
4734 op = get32 ();
4735 mask = 0xffffffff;
4736 }
252b5132 4737 else
52b15da3
JH		 4738 {
4739 op = get16 ();
4740 mask = 0xfffff;
4741 }
7d421014 4742 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4743 break;
4744 case w_mode:
52b15da3 4745 mask = 0xfffff;
252b5132
RH		 4746 op = get16 ();
4747 break;
9306ca4a
JB		 4748 case const_1_mode:
4749 if (intel_syntax)
4750 oappend ("1");
4751 return;
252b5132
RH		 4752 default:
4753 oappend (INTERNAL_DISASSEMBLER_ERROR);
4754 return;
4755 }
4756
52b15da3
JH		 4757 op &= mask;
4758 scratchbuf[0] = '$';
d708bcba
AM		 4759 print_operand_value (scratchbuf + 1, 1, op);
4760 oappend (scratchbuf + intel_syntax);
52b15da3
JH		 4761 scratchbuf[0] = '\0';
4762}
4763
4764static void
26ca5450 4765OP_I64 (int bytemode, int sizeflag)
52b15da3
JH		 4766{
4767 bfd_signed_vma op;
4768 bfd_signed_vma mask = -1;
4769
cb712a9e 4770 if (address_mode != mode_64bit)
6439fc28
AM		 4771 {
4772 OP_I (bytemode, sizeflag);
4773 return;
4774 }
4775
52b15da3
JH		 4776 switch (bytemode)
4777 {
4778 case b_mode:
4779 FETCH_DATA (the_info, codep + 1);
4780 op = *codep++;
4781 mask = 0xff;
4782 break;
4783 case v_mode:
4784 USED_REX (REX_MODE64);
4785 if (rex & REX_MODE64)
4786 op = get64 ();
4787 else if (sizeflag & DFLAG)
4788 {
4789 op = get32 ();
4790 mask = 0xffffffff;
4791 }
4792 else
4793 {
4794 op = get16 ();
4795 mask = 0xfffff;
4796 }
4797 used_prefixes |= (prefixes & PREFIX_DATA);
4798 break;
4799 case w_mode:
4800 mask = 0xfffff;
4801 op = get16 ();
4802 break;
4803 default:
4804 oappend (INTERNAL_DISASSEMBLER_ERROR);
4805 return;
4806 }
4807
4808 op &= mask;
4809 scratchbuf[0] = '$';
d708bcba
AM		 4810 print_operand_value (scratchbuf + 1, 1, op);
4811 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4812 scratchbuf[0] = '\0';
4813}
4814
4815static void
26ca5450 4816OP_sI (int bytemode, int sizeflag)
252b5132 4817{
52b15da3
JH		 4818 bfd_signed_vma op;
4819 bfd_signed_vma mask = -1;
252b5132
RH		 4820
4821 switch (bytemode)
4822 {
4823 case b_mode:
4824 FETCH_DATA (the_info, codep + 1);
4825 op = *codep++;
4826 if ((op & 0x80) != 0)
4827 op -= 0x100;
52b15da3 4828 mask = 0xffffffff;
252b5132
RH		 4829 break;
4830 case v_mode:
52b15da3
JH		 4831 USED_REX (REX_MODE64);
4832 if (rex & REX_MODE64)
4833 op = get32s ();
4834 else if (sizeflag & DFLAG)
4835 {
4836 op = get32s ();
4837 mask = 0xffffffff;
4838 }
252b5132
RH		 4839 else
4840 {
52b15da3 4841 mask = 0xffffffff;
6608db57 4842 op = get16 ();
252b5132
RH		 4843 if ((op & 0x8000) != 0)
4844 op -= 0x10000;
4845 }
7d421014 4846 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4847 break;
4848 case w_mode:
4849 op = get16 ();
52b15da3 4850 mask = 0xffffffff;
252b5132
RH		 4851 if ((op & 0x8000) != 0)
4852 op -= 0x10000;
4853 break;
4854 default:
4855 oappend (INTERNAL_DISASSEMBLER_ERROR);
4856 return;
4857 }
52b15da3
JH		 4858
4859 scratchbuf[0] = '$';
4860 print_operand_value (scratchbuf + 1, 1, op);
d708bcba 4861 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4862}
4863
4864static void
26ca5450 4865OP_J (int bytemode, int sizeflag)
252b5132 4866{
52b15da3 4867 bfd_vma disp;
7081ff04 4868 bfd_vma mask = -1;
252b5132
RH		 4869
4870 switch (bytemode)
4871 {
4872 case b_mode:
4873 FETCH_DATA (the_info, codep + 1);
4874 disp = *codep++;
4875 if ((disp & 0x80) != 0)
4876 disp -= 0x100;
4877 break;
4878 case v_mode:
1a114b12 4879 if ((sizeflag & DFLAG) || (rex & REX_MODE64))
52b15da3 4880 disp = get32s ();
252b5132
RH		 4881 else
4882 {
4883 disp = get16 ();
6608db57 4884 /* For some reason, a data16 prefix on a jump instruction
252b5132
RH		 4885 means that the pc is masked to 16 bits after the
4886 displacement is added! */
4887 mask = 0xffff;
4888 }
d807a492 4889 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4890 break;
4891 default:
4892 oappend (INTERNAL_DISASSEMBLER_ERROR);
4893 return;
4894 }
4895 disp = (start_pc + codep - start_codep + disp) & mask;
52b15da3
JH		 4896 set_op (disp, 0);
4897 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 4898 oappend (scratchbuf);
4899}
4900
252b5132 4901static void
ed7841b3 4902OP_SEG (int bytemode, int sizeflag)
252b5132 4903{
ed7841b3
JB		 4904 if (bytemode == w_mode)
4905 oappend (names_seg[reg]);
4906 else
4907 OP_E (mod == 3 ? bytemode : w_mode, sizeflag);
252b5132
RH		 4908}
4909
4910static void
26ca5450 4911OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
252b5132
RH		 4912{
4913 int seg, offset;
4914
c608c12e 4915 if (sizeflag & DFLAG)
252b5132 4916 {
c608c12e
AM		 4917 offset = get32 ();
4918 seg = get16 ();
252b5132 4919 }
c608c12e
AM		 4920 else
4921 {
4922 offset = get16 ();
4923 seg = get16 ();
4924 }
7d421014 4925 used_prefixes |= (prefixes & PREFIX_DATA);
d708bcba 4926 if (intel_syntax)
3f31e633 4927 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
d708bcba
AM		 4928 else
4929 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
c608c12e 4930 oappend (scratchbuf);
252b5132
RH		 4931}
4932
252b5132 4933static void
3f31e633 4934OP_OFF (int bytemode, int sizeflag)
252b5132 4935{
52b15da3 4936 bfd_vma off;
252b5132 4937
3f31e633
JB		 4938 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4939 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 4940 append_seg ();
4941
cb712a9e 4942 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
252b5132
RH		 4943 off = get32 ();
4944 else
4945 off = get16 ();
4946
4947 if (intel_syntax)
4948 {
4949 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 4950 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
252b5132 4951 {
d708bcba 4952 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 4953 oappend (":");
4954 }
4955 }
52b15da3
JH		 4956 print_operand_value (scratchbuf, 1, off);
4957 oappend (scratchbuf);
4958}
6439fc28 4959
52b15da3 4960static void
3f31e633 4961OP_OFF64 (int bytemode, int sizeflag)
52b15da3
JH		 4962{
4963 bfd_vma off;
4964
539e75ad
L		 4965 if (address_mode != mode_64bit
4966 || (prefixes & PREFIX_ADDR))
6439fc28
AM		 4967 {
4968 OP_OFF (bytemode, sizeflag);
4969 return;
4970 }
4971
3f31e633
JB		 4972 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4973 intel_operand_size (bytemode, sizeflag);
52b15da3
JH		 4974 append_seg ();
4975
6608db57 4976 off = get64 ();
52b15da3
JH		 4977
4978 if (intel_syntax)
4979 {
4980 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 4981 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
52b15da3 4982 {
d708bcba 4983 oappend (names_seg[ds_reg - es_reg]);
52b15da3
JH		 4984 oappend (":");
4985 }
4986 }
4987 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 4988 oappend (scratchbuf);
4989}
4990
4991static void
26ca5450 4992ptr_reg (int code, int sizeflag)
252b5132 4993{
2da11e11 4994 const char *s;
d708bcba 4995
1d9f512f 4996 *obufp++ = open_char;
20f0a1fc 4997 used_prefixes |= (prefixes & PREFIX_ADDR);
cb712a9e 4998 if (address_mode == mode_64bit)
c1a64871
JH		 4999 {
5000 if (!(sizeflag & AFLAG))
db6eb5be 5001 s = names32[code - eAX_reg];
c1a64871 5002 else
db6eb5be 5003 s = names64[code - eAX_reg];
c1a64871 5004 }
52b15da3 5005 else if (sizeflag & AFLAG)
252b5132
RH		 5006 s = names32[code - eAX_reg];
5007 else
5008 s = names16[code - eAX_reg];
5009 oappend (s);
1d9f512f
AM		 5010 *obufp++ = close_char;
5011 *obufp = 0;
252b5132
RH		 5012}
5013
5014static void
26ca5450 5015OP_ESreg (int code, int sizeflag)
252b5132 5016{
9306ca4a 5017 if (intel_syntax)
52fd6d94
JB		 5018 {
5019 switch (codep[-1])
5020 {
5021 case 0x6d: /* insw/insl */
5022 intel_operand_size (z_mode, sizeflag);
5023 break;
5024 case 0xa5: /* movsw/movsl/movsq */
5025 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5026 case 0xab: /* stosw/stosl */
5027 case 0xaf: /* scasw/scasl */
5028 intel_operand_size (v_mode, sizeflag);
5029 break;
5030 default:
5031 intel_operand_size (b_mode, sizeflag);
5032 }
5033 }
d708bcba 5034 oappend ("%es:" + intel_syntax);
252b5132
RH		 5035 ptr_reg (code, sizeflag);
5036}
5037
5038static void
26ca5450 5039OP_DSreg (int code, int sizeflag)
252b5132 5040{
9306ca4a 5041 if (intel_syntax)
52fd6d94
JB		 5042 {
5043 switch (codep[-1])
5044 {
5045 case 0x6f: /* outsw/outsl */
5046 intel_operand_size (z_mode, sizeflag);
5047 break;
5048 case 0xa5: /* movsw/movsl/movsq */
5049 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5050 case 0xad: /* lodsw/lodsl/lodsq */
5051 intel_operand_size (v_mode, sizeflag);
5052 break;
5053 default:
5054 intel_operand_size (b_mode, sizeflag);
5055 }
5056 }
252b5132
RH		 5057 if ((prefixes
5058 & (PREFIX_CS
5059 | PREFIX_DS
5060 | PREFIX_SS
5061 | PREFIX_ES
5062 | PREFIX_FS
5063 | PREFIX_GS)) == 0)
5064 prefixes |= PREFIX_DS;
6608db57 5065 append_seg ();
252b5132
RH		 5066 ptr_reg (code, sizeflag);
5067}
5068
252b5132 5069static void
26ca5450 5070OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5071{
52b15da3 5072 int add = 0;
52b15da3 5073 if (rex & REX_EXTX)
c4a530c5
JB		 5074 {
5075 USED_REX (REX_EXTX);
5076 add = 8;
5077 }
cb712a9e 5078 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
c4a530c5
JB		 5079 {
5080 used_prefixes |= PREFIX_LOCK;
5081 add = 8;
5082 }
d708bcba
AM		 5083 sprintf (scratchbuf, "%%cr%d", reg + add);
5084 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5085}
5086
252b5132 5087static void
26ca5450 5088OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5089{
52b15da3
JH		 5090 int add = 0;
5091 USED_REX (REX_EXTX);
5092 if (rex & REX_EXTX)
5093 add = 8;
d708bcba 5094 if (intel_syntax)
6608db57 5095 sprintf (scratchbuf, "db%d", reg + add);
d708bcba 5096 else
6608db57 5097 sprintf (scratchbuf, "%%db%d", reg + add);
252b5132
RH		 5098 oappend (scratchbuf);
5099}
5100
252b5132 5101static void
26ca5450 5102OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5103{
252b5132 5104 sprintf (scratchbuf, "%%tr%d", reg);
d708bcba 5105 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5106}
5107
5108static void
26ca5450 5109OP_Rd (int bytemode, int sizeflag)
252b5132 5110{
2da11e11
AM		 5111 if (mod == 3)
5112 OP_E (bytemode, sizeflag);
5113 else
6608db57 5114 BadOp ();
252b5132
RH		 5115}
5116
5117static void
26ca5450 5118OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5119{
041bd2e0
JH		 5120 used_prefixes |= (prefixes & PREFIX_DATA);
5121 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 5122 {
5123 int add = 0;
5124 USED_REX (REX_EXTX);
5125 if (rex & REX_EXTX)
5126 add = 8;
5127 sprintf (scratchbuf, "%%xmm%d", reg + add);
5128 }
041bd2e0 5129 else
20f0a1fc 5130 sprintf (scratchbuf, "%%mm%d", reg);
d708bcba 5131 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5132}
5133
c608c12e 5134static void
26ca5450 5135OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e 5136{
041bd2e0
JH		 5137 int add = 0;
5138 USED_REX (REX_EXTX);
5139 if (rex & REX_EXTX)
5140 add = 8;
5141 sprintf (scratchbuf, "%%xmm%d", reg + add);
d708bcba 5142 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 5143}
5144
252b5132 5145static void
26ca5450 5146OP_EM (int bytemode, int sizeflag)
252b5132
RH		 5147{
5148 if (mod != 3)
5149 {
9306ca4a
JB		 5150 if (intel_syntax && bytemode == v_mode)
5151 {
5152 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5153 used_prefixes |= (prefixes & PREFIX_DATA);
5154 }
252b5132
RH		 5155 OP_E (bytemode, sizeflag);
5156 return;
5157 }
5158
6608db57 5159 /* Skip mod/rm byte. */
4bba6815 5160 MODRM_CHECK;
252b5132 5161 codep++;
041bd2e0
JH		 5162 used_prefixes |= (prefixes & PREFIX_DATA);
5163 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 5164 {
5165 int add = 0;
5166
5167 USED_REX (REX_EXTZ);
5168 if (rex & REX_EXTZ)
5169 add = 8;
5170 sprintf (scratchbuf, "%%xmm%d", rm + add);
5171 }
041bd2e0 5172 else
20f0a1fc 5173 sprintf (scratchbuf, "%%mm%d", rm);
d708bcba 5174 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5175}
5176
4d9567e0
MM		 5177/* cvt* are the only instructions in sse2 which have
5178 both SSE and MMX operands and also have 0x66 prefix
5179 in their opcode. 0x66 was originally used to differentiate
5180 between SSE and MMX instruction(operands). So we have to handle the
5181 cvt* separately using OP_EMC and OP_MXC */
5182static void
5183OP_EMC (int bytemode, int sizeflag)
5184{
5185 if (mod != 3)
5186 {
5187 if (intel_syntax && bytemode == v_mode)
5188 {
5189 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5190 used_prefixes |= (prefixes & PREFIX_DATA);
5191 }
5192 OP_E (bytemode, sizeflag);
5193 return;
5194 }
5195
5196 /* Skip mod/rm byte. */
5197 MODRM_CHECK;
5198 codep++;
5199 used_prefixes |= (prefixes & PREFIX_DATA);
5200 sprintf (scratchbuf, "%%mm%d", rm);
5201 oappend (scratchbuf + intel_syntax);
5202}
5203
5204static void
5205OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5206{
5207 used_prefixes |= (prefixes & PREFIX_DATA);
5208 sprintf (scratchbuf, "%%mm%d", reg);
5209 oappend (scratchbuf + intel_syntax);
5210}
5211
c608c12e 5212static void
26ca5450 5213OP_EX (int bytemode, int sizeflag)
c608c12e 5214{
041bd2e0 5215 int add = 0;
c608c12e
AM		 5216 if (mod != 3)
5217 {
9306ca4a
JB		 5218 if (intel_syntax && bytemode == v_mode)
5219 {
5220 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
5221 {
5222 case 0: bytemode = x_mode; break;
5223 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
5224 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
5225 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
5226 default: bytemode = 0; break;
5227 }
5228 }
c608c12e
AM		 5229 OP_E (bytemode, sizeflag);
5230 return;
5231 }
041bd2e0
JH		 5232 USED_REX (REX_EXTZ);
5233 if (rex & REX_EXTZ)
5234 add = 8;
c608c12e 5235
6608db57 5236 /* Skip mod/rm byte. */
4bba6815 5237 MODRM_CHECK;
c608c12e 5238 codep++;
041bd2e0 5239 sprintf (scratchbuf, "%%xmm%d", rm + add);
d708bcba 5240 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 5241}
5242
252b5132 5243static void
26ca5450 5244OP_MS (int bytemode, int sizeflag)
252b5132 5245{
2da11e11
AM		 5246 if (mod == 3)
5247 OP_EM (bytemode, sizeflag);
5248 else
6608db57 5249 BadOp ();
252b5132
RH		 5250}
5251
992aaec9 5252static void
26ca5450 5253OP_XS (int bytemode, int sizeflag)
992aaec9
AM		 5254{
5255 if (mod == 3)
5256 OP_EX (bytemode, sizeflag);
5257 else
6608db57 5258 BadOp ();
992aaec9
AM		 5259}
5260
cc0ec051
AM		 5261static void
5262OP_M (int bytemode, int sizeflag)
5263{
5264 if (mod == 3)
5265 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
5266 else
5267 OP_E (bytemode, sizeflag);
5268}
5269
5270static void
5271OP_0f07 (int bytemode, int sizeflag)
5272{
5273 if (mod != 3 || rm != 0)
5274 BadOp ();
5275 else
5276 OP_E (bytemode, sizeflag);
5277}
5278
5279static void
5280OP_0fae (int bytemode, int sizeflag)
5281{
5282 if (mod == 3)
5283 {
5284 if (reg == 7)
5285 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
5286
5287 if (reg < 5 || rm != 0)
5288 {
5289 BadOp (); /* bad sfence, mfence, or lfence */
5290 return;
5291 }
5292 }
5293 else if (reg != 7)
5294 {
5295 BadOp (); /* bad clflush */
5296 return;
5297 }
5298
5299 OP_E (bytemode, sizeflag);
5300}
5301
46e883c5
L		 5302/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
5303 32bit mode and "xchg %rax,%rax" in 64bit mode. NOP with REPZ prefix
5304 is called PAUSE. We display "xchg %ax,%ax" instead of "data16 nop".
5305 */
5306
cc0ec051 5307static void
46e883c5 5308NOP_Fixup1 (int bytemode, int sizeflag)
cc0ec051 5309{
cc0ec051
AM		 5310 if (prefixes == PREFIX_REPZ)
5311 strcpy (obuf, "pause");
46e883c5
L		 5312 else if (prefixes == PREFIX_DATA
5313 || ((rex & REX_MODE64) && rex != 0x48))
5314 OP_REG (bytemode, sizeflag);
5315 else
5316 strcpy (obuf, "nop");
5317}
5318
5319static void
5320NOP_Fixup2 (int bytemode, int sizeflag)
5321{
5322 if (prefixes == PREFIX_DATA
5323 || ((rex & REX_MODE64) && rex != 0x48))
5324 OP_IMREG (bytemode, sizeflag);
cc0ec051
AM		 5325}
5326
84037f8c 5327static const char *const Suffix3DNow[] = {
252b5132
RH		 5328/* 00 */ NULL, NULL, NULL, NULL,
5329/* 04 */ NULL, NULL, NULL, NULL,
5330/* 08 */ NULL, NULL, NULL, NULL,
9e525108 5331/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 5332/* 10 */ NULL, NULL, NULL, NULL,
5333/* 14 */ NULL, NULL, NULL, NULL,
5334/* 18 */ NULL, NULL, NULL, NULL,
9e525108 5335/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 5336/* 20 */ NULL, NULL, NULL, NULL,
5337/* 24 */ NULL, NULL, NULL, NULL,
5338/* 28 */ NULL, NULL, NULL, NULL,
5339/* 2C */ NULL, NULL, NULL, NULL,
5340/* 30 */ NULL, NULL, NULL, NULL,
5341/* 34 */ NULL, NULL, NULL, NULL,
5342/* 38 */ NULL, NULL, NULL, NULL,
5343/* 3C */ NULL, NULL, NULL, NULL,
5344/* 40 */ NULL, NULL, NULL, NULL,
5345/* 44 */ NULL, NULL, NULL, NULL,
5346/* 48 */ NULL, NULL, NULL, NULL,
5347/* 4C */ NULL, NULL, NULL, NULL,
5348/* 50 */ NULL, NULL, NULL, NULL,
5349/* 54 */ NULL, NULL, NULL, NULL,
5350/* 58 */ NULL, NULL, NULL, NULL,
5351/* 5C */ NULL, NULL, NULL, NULL,
5352/* 60 */ NULL, NULL, NULL, NULL,
5353/* 64 */ NULL, NULL, NULL, NULL,
5354/* 68 */ NULL, NULL, NULL, NULL,
5355/* 6C */ NULL, NULL, NULL, NULL,
5356/* 70 */ NULL, NULL, NULL, NULL,
5357/* 74 */ NULL, NULL, NULL, NULL,
5358/* 78 */ NULL, NULL, NULL, NULL,
5359/* 7C */ NULL, NULL, NULL, NULL,
5360/* 80 */ NULL, NULL, NULL, NULL,
5361/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 5362/* 88 */ NULL, NULL, "pfnacc", NULL,
5363/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 5364/* 90 */ "pfcmpge", NULL, NULL, NULL,
5365/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
5366/* 98 */ NULL, NULL, "pfsub", NULL,
5367/* 9C */ NULL, NULL, "pfadd", NULL,
5368/* A0 */ "pfcmpgt", NULL, NULL, NULL,
5369/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
5370/* A8 */ NULL, NULL, "pfsubr", NULL,
5371/* AC */ NULL, NULL, "pfacc", NULL,
5372/* B0 */ "pfcmpeq", NULL, NULL, NULL,
5373/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
9e525108 5374/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 5375/* BC */ NULL, NULL, NULL, "pavgusb",
5376/* C0 */ NULL, NULL, NULL, NULL,
5377/* C4 */ NULL, NULL, NULL, NULL,
5378/* C8 */ NULL, NULL, NULL, NULL,
5379/* CC */ NULL, NULL, NULL, NULL,
5380/* D0 */ NULL, NULL, NULL, NULL,
5381/* D4 */ NULL, NULL, NULL, NULL,
5382/* D8 */ NULL, NULL, NULL, NULL,
5383/* DC */ NULL, NULL, NULL, NULL,
5384/* E0 */ NULL, NULL, NULL, NULL,
5385/* E4 */ NULL, NULL, NULL, NULL,
5386/* E8 */ NULL, NULL, NULL, NULL,
5387/* EC */ NULL, NULL, NULL, NULL,
5388/* F0 */ NULL, NULL, NULL, NULL,
5389/* F4 */ NULL, NULL, NULL, NULL,
5390/* F8 */ NULL, NULL, NULL, NULL,
5391/* FC */ NULL, NULL, NULL, NULL,
5392};
5393
5394static void
26ca5450 5395OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 5396{
5397 const char *mnemonic;
5398
5399 FETCH_DATA (the_info, codep + 1);
5400 /* AMD 3DNow! instructions are specified by an opcode suffix in the
5401 place where an 8-bit immediate would normally go. ie. the last
5402 byte of the instruction. */
6608db57 5403 obufp = obuf + strlen (obuf);
c608c12e 5404 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 5405 if (mnemonic)
2da11e11 5406 oappend (mnemonic);
252b5132
RH		 5407 else
5408 {
5409 /* Since a variable sized modrm/sib chunk is between the start
5410 of the opcode (0x0f0f) and the opcode suffix, we need to do
5411 all the modrm processing first, and don't know until now that
5412 we have a bad opcode. This necessitates some cleaning up. */
2da11e11
AM		 5413 op1out[0] = '\0';
5414 op2out[0] = '\0';
6608db57 5415 BadOp ();
252b5132
RH		 5416 }
5417}
c608c12e 5418
6608db57 5419static const char *simd_cmp_op[] = {
c608c12e
AM		 5420 "eq",
5421 "lt",
5422 "le",
5423 "unord",
5424 "neq",
5425 "nlt",
5426 "nle",
5427 "ord"
5428};
5429
5430static void
26ca5450 5431OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 5432{
5433 unsigned int cmp_type;
5434
5435 FETCH_DATA (the_info, codep + 1);
6608db57 5436 obufp = obuf + strlen (obuf);
c608c12e
AM		 5437 cmp_type = *codep++ & 0xff;
5438 if (cmp_type < 8)
5439 {
041bd2e0
JH		 5440 char suffix1 = 'p', suffix2 = 's';
5441 used_prefixes |= (prefixes & PREFIX_REPZ);
5442 if (prefixes & PREFIX_REPZ)
5443 suffix1 = 's';
5444 else
5445 {
5446 used_prefixes |= (prefixes & PREFIX_DATA);
5447 if (prefixes & PREFIX_DATA)
5448 suffix2 = 'd';
5449 else
5450 {
5451 used_prefixes |= (prefixes & PREFIX_REPNZ);
5452 if (prefixes & PREFIX_REPNZ)
5453 suffix1 = 's', suffix2 = 'd';
5454 }
5455 }
5456 sprintf (scratchbuf, "cmp%s%c%c",
5457 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 5458 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 5459 oappend (scratchbuf);
c608c12e
AM		 5460 }
5461 else
5462 {
5463 /* We have a bad extension byte. Clean up. */
2da11e11
AM		 5464 op1out[0] = '\0';
5465 op2out[0] = '\0';
6608db57 5466 BadOp ();
c608c12e
AM		 5467 }
5468}
5469
5470static void
26ca5450 5471SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 5472{
5473 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
5474 forms of these instructions. */
5475 if (mod == 3)
5476 {
6608db57
KH		 5477 char *p = obuf + strlen (obuf);
5478 *(p + 1) = '\0';
5479 *p = *(p - 1);
5480 *(p - 1) = *(p - 2);
5481 *(p - 2) = *(p - 3);
5482 *(p - 3) = extrachar;
c608c12e
AM		 5483 }
5484}
2da11e11 5485
ca164297 5486static void
4fd61dcb 5487PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
ca164297 5488{
1d9f512f 5489 if (mod == 3 && reg == 1 && rm <= 1)
ca164297 5490 {
ca164297 5491 /* Override "sidt". */
cb712a9e
L		 5492 size_t olen = strlen (obuf);
5493 char *p = obuf + olen - 4;
5494 const char **names = (address_mode == mode_64bit
5495 ? names64 : names32);
1d9f512f 5496
22cbf2e7 5497 /* We might have a suffix when disassembling with -Msuffix. */
1d9f512f
AM		 5498 if (*p == 'i')
5499 --p;
5500
cb712a9e
L		 5501 /* Remove "addr16/addr32" if we aren't in Intel mode. */
5502 if (!intel_syntax
5503 && (prefixes & PREFIX_ADDR)
5504 && olen >= (4 + 7)
5505 && *(p - 1) == ' '
0112cd26
NC		 5506 && CONST_STRNEQ (p - 7, "addr")
5507 && (CONST_STRNEQ (p - 3, "16")
5508 || CONST_STRNEQ (p - 3, "32")))
cb712a9e
L		 5509 p -= 7;
5510
ca164297
L		 5511 if (rm)
5512 {
5513 /* mwait %eax,%ecx */
1d9f512f 5514 strcpy (p, "mwait");
6128c599 5515 if (!intel_syntax)
cb712a9e 5516 strcpy (op1out, names[0]);
ca164297
L		 5517 }
5518 else
5519 {
5520 /* monitor %eax,%ecx,%edx" */
1d9f512f 5521 strcpy (p, "monitor");
6128c599
JB		 5522 if (!intel_syntax)
5523 {
cb712a9e
L		 5524 const char **op1_names;
5525 if (!(prefixes & PREFIX_ADDR))
5526 op1_names = (address_mode == mode_16bit
5527 ? names16 : names);
6128c599
JB		 5528 else
5529 {
cb712a9e
L		 5530 op1_names = (address_mode != mode_32bit
5531 ? names32 : names16);
6128c599
JB		 5532 used_prefixes |= PREFIX_ADDR;
5533 }
cb712a9e
L		 5534 strcpy (op1out, op1_names[0]);
5535 strcpy (op3out, names[2]);
6128c599
JB		 5536 }
5537 }
5538 if (!intel_syntax)
5539 {
cb712a9e 5540 strcpy (op2out, names[1]);
6128c599 5541 two_source_ops = 1;
ca164297
L		 5542 }
5543
5544 codep++;
5545 }
5546 else
30123838
JB		 5547 OP_M (0, sizeflag);
5548}
5549
5550static void
5551SVME_Fixup (int bytemode, int sizeflag)
5552{
5553 const char *alt;
5554 char *p;
5555
5556 switch (*codep)
5557 {
5558 case 0xd8:
5559 alt = "vmrun";
5560 break;
5561 case 0xd9:
5562 alt = "vmmcall";
5563 break;
5564 case 0xda:
5565 alt = "vmload";
5566 break;
5567 case 0xdb:
5568 alt = "vmsave";
5569 break;
5570 case 0xdc:
5571 alt = "stgi";
5572 break;
5573 case 0xdd:
5574 alt = "clgi";
5575 break;
5576 case 0xde:
5577 alt = "skinit";
5578 break;
5579 case 0xdf:
5580 alt = "invlpga";
5581 break;
5582 default:
5583 OP_M (bytemode, sizeflag);
5584 return;
5585 }
5586 /* Override "lidt". */
5587 p = obuf + strlen (obuf) - 4;
5588 /* We might have a suffix. */
5589 if (*p == 'i')
5590 --p;
5591 strcpy (p, alt);
5592 if (!(prefixes & PREFIX_ADDR))
5593 {
5594 ++codep;
5595 return;
5596 }
5597 used_prefixes |= PREFIX_ADDR;
5598 switch (*codep++)
5599 {
5600 case 0xdf:
5601 strcpy (op2out, names32[1]);
5602 two_source_ops = 1;
5603 /* Fall through. */
5604 case 0xd8:
5605 case 0xda:
5606 case 0xdb:
5607 *obufp++ = open_char;
cb712a9e 5608 if (address_mode == mode_64bit || (sizeflag & AFLAG))
30123838
JB		 5609 alt = names32[0];
5610 else
5611 alt = names16[0];
5612 strcpy (obufp, alt);
5613 obufp += strlen (alt);
5614 *obufp++ = close_char;
5615 *obufp = '\0';
5616 break;
5617 }
ca164297
L		 5618}
5619
4fd61dcb
JJ		 5620static void
5621INVLPG_Fixup (int bytemode, int sizeflag)
5622{
373ff435 5623 const char *alt;
4fd61dcb 5624
373ff435
JB		 5625 switch (*codep)
5626 {
5627 case 0xf8:
5628 alt = "swapgs";
5629 break;
5630 case 0xf9:
5631 alt = "rdtscp";
5632 break;
5633 default:
30123838 5634 OP_M (bytemode, sizeflag);
373ff435 5635 return;
4fd61dcb 5636 }
373ff435
JB		 5637 /* Override "invlpg". */
5638 strcpy (obuf + strlen (obuf) - 6, alt);
5639 codep++;
4fd61dcb
JJ		 5640}
5641
6608db57
KH		 5642static void
5643BadOp (void)
2da11e11 5644{
6608db57
KH		 5645 /* Throw away prefixes and 1st. opcode byte. */
5646 codep = insn_codep + 1;
2da11e11
AM		 5647 oappend ("(bad)");
5648}
4cc91dba 5649
90700ea2
L		 5650static void
5651VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
5652{
5653 if (mod == 3 && reg == 0 && rm >=1 && rm <= 4)
5654 {
5655 /* Override "sgdt". */
5656 char *p = obuf + strlen (obuf) - 4;
5657
22cbf2e7
L		 5658 /* We might have a suffix when disassembling with -Msuffix. */
5659 if (*p == 'g')
90700ea2
L		 5660 --p;
5661
5662 switch (rm)
5663 {
5664 case 1:
5665 strcpy (p, "vmcall");
5666 break;
5667 case 2:
5668 strcpy (p, "vmlaunch");
5669 break;
5670 case 3:
5671 strcpy (p, "vmresume");
5672 break;
5673 case 4:
5674 strcpy (p, "vmxoff");
5675 break;
5676 }
5677
5678 codep++;
5679 }
5680 else
5681 OP_E (0, sizeflag);
5682}
5683
5684static void
5685OP_VMX (int bytemode, int sizeflag)
5686{
5687 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
5688 if (prefixes & PREFIX_DATA)
5689 strcpy (obuf, "vmclear");
5690 else if (prefixes & PREFIX_REPZ)
5691 strcpy (obuf, "vmxon");
5692 else
5693 strcpy (obuf, "vmptrld");
5694 OP_E (bytemode, sizeflag);
5695}
35c52694
L		 5696
5697static void
5698REP_Fixup (int bytemode, int sizeflag)
5699{
5700 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
5701 lods and stos. */
5702 size_t ilen = 0;
5703
5704 if (prefixes & PREFIX_REPZ)
5705 switch (*insn_codep)
5706 {
5707 case 0x6e: /* outsb */
5708 case 0x6f: /* outsw/outsl */
5709 case 0xa4: /* movsb */
5710 case 0xa5: /* movsw/movsl/movsq */
5711 if (!intel_syntax)
5712 ilen = 5;
5713 else
5714 ilen = 4;
5715 break;
5716 case 0xaa: /* stosb */
5717 case 0xab: /* stosw/stosl/stosq */
5718 case 0xac: /* lodsb */
5719 case 0xad: /* lodsw/lodsl/lodsq */
5720 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5721 ilen = 5;
5722 else
5723 ilen = 4;
5724 break;
5725 case 0x6c: /* insb */
5726 case 0x6d: /* insl/insw */
5727 if (!intel_syntax)
5728 ilen = 4;
5729 else
5730 ilen = 3;
5731 break;
5732 default:
5733 abort ();
5734 break;
5735 }
5736
5737 if (ilen != 0)
5738 {
5739 size_t olen;
5740 char *p;
5741
5742 olen = strlen (obuf);
5743 p = obuf + olen - ilen - 1 - 4;
5744 /* Handle "repz [addr16|addr32]". */
5745 if ((prefixes & PREFIX_ADDR))
5746 p -= 1 + 6;
5747
5748 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
5749 }
5750
5751 switch (bytemode)
5752 {
5753 case al_reg:
5754 case eAX_reg:
5755 case indir_dx_reg:
5756 OP_IMREG (bytemode, sizeflag);
5757 break;
5758 case eDI_reg:
5759 OP_ESreg (bytemode, sizeflag);
5760 break;
5761 case eSI_reg:
5762 OP_DSreg (bytemode, sizeflag);
5763 break;
5764 default:
5765 abort ();
5766 break;
5767 }
5768}
GDB Binutils - Deliverables
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