projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 800eeca4 | 1 | /* ia64-opc-a.c -- IA-64 `A' opcode table. |
| 060d22b0 | 2 | Copyright 1998, 1999, 2000, 2001 Free Software Foundation, Inc. |
| 800eeca4 JW |
3 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
| 4 | ||
| 5 | This file is part of GDB, GAS, and the GNU binutils. | |
| 6 | ||
| 7 | GDB, GAS, and the GNU binutils are free software; you can redistribute | |
| 8 | them and/or modify them under the terms of the GNU General Public | |
| 9 | License as published by the Free Software Foundation; either version | |
| 10 | 2, or (at your option) any later version. | |
| 11 | ||
| 12 | GDB, GAS, and the GNU binutils are distributed in the hope that they | |
| 13 | will be useful, but WITHOUT ANY WARRANTY; without even the implied | |
| 14 | warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See | |
| 15 | the GNU General Public License for more details. | |
| 16 | ||
| 17 | You should have received a copy of the GNU General Public License | |
| 18 | along with this file; see the file COPYING. If not, write to the | |
| 19 | Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
| 20 | 02111-1307, USA. */ | |
| 21 | ||
| 22 | #include "ia64-opc.h" | |
| 23 | ||
| 24 | #define A IA64_TYPE_A, 1 | |
| 25 | #define A2 IA64_TYPE_A, 2 | |
| 26 | ||
| 27 | /* instruction bit fields: */ | |
| 28 | #define bC(x) (((ia64_insn) ((x) & 0x1)) << 12) | |
| 29 | #define bImm14(x) ((((ia64_insn) (((x) >> 0) & 0x7f)) << 13) | \ | |
| 30 | (((ia64_insn) (((x) >> 7) & 0x3f)) << 27) | \ | |
| 31 | (((ia64_insn) (((x) >> 13) & 0x01)) << 36)) | |
| 32 | #define bR3a(x) (((ia64_insn) ((x) & 0x7f)) << 20) | |
| 33 | #define bR3b(x) (((ia64_insn) ((x) & 0x3)) << 20) | |
| 34 | #define bTa(x) (((ia64_insn) ((x) & 0x1)) << 33) | |
| 35 | #define bTb(x) (((ia64_insn) ((x) & 0x1)) << 36) | |
| 36 | #define bVe(x) (((ia64_insn) ((x) & 0x1)) << 33) | |
| 37 | #define bX(x) (((ia64_insn) ((x) & 0x1)) << 33) | |
| 38 | #define bX2(x) (((ia64_insn) ((x) & 0x3)) << 34) | |
| 39 | #define bX2a(x) (((ia64_insn) ((x) & 0x3)) << 34) | |
| 40 | #define bX2b(x) (((ia64_insn) ((x) & 0x3)) << 27) | |
| 41 | #define bX4(x) (((ia64_insn) ((x) & 0xf)) << 29) | |
| 42 | #define bZa(x) (((ia64_insn) ((x) & 0x1)) << 36) | |
| 43 | #define bZb(x) (((ia64_insn) ((x) & 0x1)) << 33) | |
| 44 | ||
| 45 | /* instruction bit masks: */ | |
| 46 | #define mC bC (-1) | |
| 47 | #define mImm14 bImm14 (-1) | |
| 48 | #define mR3a bR3a (-1) | |
| 49 | #define mR3b bR3b (-1) | |
| 50 | #define mTa bTa (-1) | |
| 51 | #define mTb bTb (-1) | |
| 52 | #define mVe bVe (-1) | |
| 53 | #define mX bX (-1) | |
| 54 | #define mX2 bX2 (-1) | |
| 55 | #define mX2a bX2a (-1) | |
| 56 | #define mX2b bX2b (-1) | |
| 57 | #define mX4 bX4 (-1) | |
| 58 | #define mZa bZa (-1) | |
| 59 | #define mZb bZb (-1) | |
| 60 | ||
| 61 | #define OpR3b(a,b) (bOp (a) | bR3b (b)), (mOp | mR3b) | |
| 62 | #define OpX2aVe(a,b,c) (bOp (a) | bX2a (b) | bVe (c)), \ | |
| 63 | (mOp | mX2a | mVe) | |
| 64 | #define OpX2aVeR3a(a,b,c,d) (bOp (a) | bX2a (b) | bVe (c) | bR3a (d)), \ | |
| 65 | (mOp | mX2a | mVe | mR3a) | |
| 66 | #define OpX2aVeImm14(a,b,c,d) (bOp (a) | bX2a (b) | bVe (c) | bImm14 (d)), \ | |
| 67 | (mOp | mX2a | mVe | mImm14) | |
| 68 | #define OpX2aVeX4(a,b,c,d) (bOp (a) | bX2a (b) | bVe (c) | bX4 (d)), \ | |
| 69 | (mOp | mX2a | mVe | mX4) | |
| 70 | #define OpX2aVeX4X2b(a,b,c,d,e) \ | |
| 71 | (bOp (a) | bX2a (b) | bVe (c) | bX4 (d) | bX2b (e)), \ | |
| 72 | (mOp | mX2a | mVe | mX4 | mX2b) | |
| 73 | #define OpX2TbTaC(a,b,c,d,e) \ | |
| 74 | (bOp (a) | bX2 (b) | bTb (c) | bTa (d) | bC (e)), \ | |
| 75 | (mOp | mX2 | mTb | mTa | mC) | |
| 76 | #define OpX2TaC(a,b,c,d) (bOp (a) | bX2 (b) | bTa (c) | bC (d)), \ | |
| 77 | (mOp | mX2 | mTa | mC) | |
| 78 | #define OpX2aZaZbX4(a,b,c,d,e) \ | |
| 79 | (bOp (a) | bX2a (b) | bZa (c) | bZb (d) | bX4 (e)), \ | |
| 80 | (mOp | mX2a | mZa | mZb | mX4) | |
| 81 | #define OpX2aZaZbX4X2b(a,b,c,d,e,f) \ | |
| 82 | (bOp (a) | bX2a (b) | bZa (c) | bZb (d) | bX4 (e) | bX2b (f)), \ | |
| 83 | (mOp | mX2a | mZa | mZb | mX4 | mX2b) | |
| 84 | ||
| 85 | struct ia64_opcode ia64_opcodes_a[] = | |
| 86 | { | |
| 87 | /* A-type instruction encodings (sorted according to major opcode) */ | |
| 88 | ||
| 89 | {"add", A, OpX2aVeX4X2b (8, 0, 0, 0, 0), {R1, R2, R3}}, | |
| 90 | {"add", A, OpX2aVeX4X2b (8, 0, 0, 0, 1), {R1, R2, R3, C1}}, | |
| 91 | {"sub", A, OpX2aVeX4X2b (8, 0, 0, 1, 1), {R1, R2, R3}}, | |
| 92 | {"sub", A, OpX2aVeX4X2b (8, 0, 0, 1, 0), {R1, R2, R3, C1}}, | |
| 93 | {"addp4", A, OpX2aVeX4X2b (8, 0, 0, 2, 0), {R1, R2, R3}}, | |
| 94 | {"and", A, OpX2aVeX4X2b (8, 0, 0, 3, 0), {R1, R2, R3}}, | |
| 95 | {"andcm", A, OpX2aVeX4X2b (8, 0, 0, 3, 1), {R1, R2, R3}}, | |
| 96 | {"or", A, OpX2aVeX4X2b (8, 0, 0, 3, 2), {R1, R2, R3}}, | |
| 97 | {"xor", A, OpX2aVeX4X2b (8, 0, 0, 3, 3), {R1, R2, R3}}, | |
| 98 | {"shladd", A, OpX2aVeX4 (8, 0, 0, 4), {R1, R2, CNT2a, R3}}, | |
| 99 | {"shladdp4", A, OpX2aVeX4 (8, 0, 0, 6), {R1, R2, CNT2a, R3}}, | |
| 100 | {"sub", A, OpX2aVeX4X2b (8, 0, 0, 9, 1), {R1, IMM8, R3}}, | |
| 101 | {"and", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 0), {R1, IMM8, R3}}, | |
| 102 | {"andcm", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 1), {R1, IMM8, R3}}, | |
| 103 | {"or", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 2), {R1, IMM8, R3}}, | |
| 104 | {"xor", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 3), {R1, IMM8, R3}}, | |
| 105 | {"mov", A, OpX2aVeImm14 (8, 2, 0, 0), {R1, R3}}, | |
| 106 | {"mov", A, OpX2aVeR3a (8, 2, 0, 0), {R1, IMM14}, PSEUDO}, | |
| 107 | {"adds", A, OpX2aVe (8, 2, 0), {R1, IMM14, R3}}, | |
| 108 | {"addp4", A, OpX2aVe (8, 3, 0), {R1, IMM14, R3}}, | |
| 109 | {"padd1", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 0), {R1, R2, R3}}, | |
| 110 | {"padd2", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 0), {R1, R2, R3}}, | |
| 111 | {"padd4", A, OpX2aZaZbX4X2b (8, 1, 1, 0, 0, 0), {R1, R2, R3}}, | |
| 112 | {"padd1.sss", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 1), {R1, R2, R3}}, | |
| 113 | {"padd2.sss", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 1), {R1, R2, R3}}, | |
| 114 | {"padd1.uuu", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 2), {R1, R2, R3}}, | |
| 115 | {"padd2.uuu", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 2), {R1, R2, R3}}, | |
| 116 | {"padd1.uus", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 3), {R1, R2, R3}}, | |
| 117 | {"padd2.uus", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 3), {R1, R2, R3}}, | |
| 118 | {"psub1", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 0), {R1, R2, R3}}, | |
| 119 | {"psub2", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 0), {R1, R2, R3}}, | |
| 120 | {"psub4", A, OpX2aZaZbX4X2b (8, 1, 1, 0, 1, 0), {R1, R2, R3}}, | |
| 121 | {"psub1.sss", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 1), {R1, R2, R3}}, | |
| 122 | {"psub2.sss", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 1), {R1, R2, R3}}, | |
| 123 | {"psub1.uuu", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 2), {R1, R2, R3}}, | |
| 124 | {"psub2.uuu", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 2), {R1, R2, R3}}, | |
| 125 | {"psub1.uus", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 3), {R1, R2, R3}}, | |
| 126 | {"psub2.uus", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 3), {R1, R2, R3}}, | |
| 127 | {"pavg1", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 2, 2), {R1, R2, R3}}, | |
| 128 | {"pavg2", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 2, 2), {R1, R2, R3}}, | |
| 129 | {"pavg1.raz", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 2, 3), {R1, R2, R3}}, | |
| 130 | {"pavg2.raz", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 2, 3), {R1, R2, R3}}, | |
| 131 | {"pavgsub1", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 3, 2), {R1, R2, R3}}, | |
| 132 | {"pavgsub2", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 3, 2), {R1, R2, R3}}, | |
| 133 | {"pcmp1.eq", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 9, 0), {R1, R2, R3}}, | |
| 134 | {"pcmp2.eq", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 9, 0), {R1, R2, R3}}, | |
| 135 | {"pcmp4.eq", A, OpX2aZaZbX4X2b (8, 1, 1, 0, 9, 0), {R1, R2, R3}}, | |
| 136 | {"pcmp1.gt", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 9, 1), {R1, R2, R3}}, | |
| 137 | {"pcmp2.gt", A, OpX2aZaZbX4X2b (8, 1, 0, 1, 9, 1), {R1, R2, R3}}, | |
| 138 | {"pcmp4.gt", A, OpX2aZaZbX4X2b (8, 1, 1, 0, 9, 1), {R1, R2, R3}}, | |
| 139 | {"pshladd2", A, OpX2aZaZbX4 (8, 1, 0, 1, 4), {R1, R2, CNT2b, R3}}, | |
| 140 | {"pshradd2", A, OpX2aZaZbX4 (8, 1, 0, 1, 6), {R1, R2, CNT2b, R3}}, | |
| 141 | ||
| 142 | {"mov", A, OpR3b (9, 0), {R1, IMM22}, PSEUDO}, | |
| 143 | {"addl", A, Op (9), {R1, IMM22, R3_2}}, | |
| 144 | ||
| 145 | {"cmp.lt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R2, R3}}, | |
| 146 | {"cmp.le", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R3, R2}}, | |
| 147 | {"cmp.gt", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R3, R2}}, | |
| 148 | {"cmp.ge", A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R2, R3}}, | |
| 149 | {"cmp.lt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R2, R3}}, | |
| 150 | {"cmp.le.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R3, R2}}, | |
| 151 | {"cmp.gt.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R3, R2}}, | |
| 152 | {"cmp.ge.unc", A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R2, R3}}, | |
| 153 | {"cmp.eq.and", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}}, | |
| 154 | {"cmp.ne.andcm", A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO}, | |
| 155 | {"cmp.ne.and", A2, OpX2TbTaC (0xc, 0, 0, 1, 1), {P1, P2, R2, R3}}, | |
| 156 | {"cmp.eq.andcm", A2, OpX2TbTaC (0xc, 0, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO}, | |
| 157 | {"cmp4.lt", A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P1, P2, R2, R3}}, | |
| 158 | {"cmp4.le", A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P2, P1, R3, R2}}, | |
| 159 | {"cmp4.gt", A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P1, P2, R3, R2}}, | |
| 160 | {"cmp4.ge", A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P2, P1, R2, R3}}, | |
| 161 | {"cmp4.lt.unc", A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P1, P2, R2, R3}}, | |
| 162 | {"cmp4.le.unc", A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P2, P1, R3, R2}}, | |
| 163 | {"cmp4.gt.unc", A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P1, P2, R3, R2}}, | |
| 164 | {"cmp4.ge.unc", A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P2, P1, R2, R3}}, | |
| 165 | {"cmp4.eq.and", A2, OpX2TbTaC (0xc, 1, 0, 1, 0), {P1, P2, R2, R3}}, | |
| 166 | {"cmp4.ne.andcm", A2, OpX2TbTaC (0xc, 1, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO}, | |
| 167 | {"cmp4.ne.and", A2, OpX2TbTaC (0xc, 1, 0, 1, 1), {P1, P2, R2, R3}}, | |
| 168 | {"cmp4.eq.andcm", A2, OpX2TbTaC (0xc, 1, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO}, | |
| 169 | {"cmp.gt.and", A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, GR0, R3}}, | |
| b8e0eda2 | 170 | {"cmp.lt.and", A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 171 | {"cmp.le.andcm", A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 172 | {"cmp.ge.andcm", A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 173 | {"cmp.le.and", A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 174 | {"cmp.ge.and", A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 175 | {"cmp.gt.andcm", A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 176 | {"cmp.lt.andcm", A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 177 | {"cmp.ge.and", A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 178 | {"cmp.le.and", A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 179 | {"cmp.lt.andcm", A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 180 | {"cmp.gt.andcm", A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 181 | {"cmp.lt.and", A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 182 | {"cmp.gt.and", A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 183 | {"cmp.ge.andcm", A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 184 | {"cmp.le.andcm", A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 185 | {"cmp4.gt.and", A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 186 | {"cmp4.lt.and", A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 187 | {"cmp4.le.andcm", A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 188 | {"cmp4.ge.andcm", A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 189 | {"cmp4.le.and", A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 190 | {"cmp4.ge.and", A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 191 | {"cmp4.gt.andcm", A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 192 | {"cmp4.lt.andcm", A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 193 | {"cmp4.ge.and", A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 194 | {"cmp4.le.and", A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 195 | {"cmp4.lt.andcm", A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 196 | {"cmp4.gt.andcm", A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 197 | {"cmp4.lt.and", A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 198 | {"cmp4.gt.and", A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 199 | {"cmp4.ge.andcm", A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 200 | {"cmp4.le.andcm", A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 JW |
201 | {"cmp.lt", A2, OpX2TaC (0xc, 2, 0, 0), {P1, P2, IMM8, R3}}, |
| 202 | {"cmp.le", A2, OpX2TaC (0xc, 2, 0, 0), {P1, P2, IMM8M1, R3}}, | |
| 203 | {"cmp.gt", A2, OpX2TaC (0xc, 2, 0, 0), {P2, P1, IMM8M1, R3}}, | |
| 204 | {"cmp.ge", A2, OpX2TaC (0xc, 2, 0, 0), {P2, P1, IMM8, R3}}, | |
| 205 | {"cmp.lt.unc", A2, OpX2TaC (0xc, 2, 0, 1), {P1, P2, IMM8, R3}}, | |
| 206 | {"cmp.le.unc", A2, OpX2TaC (0xc, 2, 0, 1), {P1, P2, IMM8M1, R3}}, | |
| 207 | {"cmp.gt.unc", A2, OpX2TaC (0xc, 2, 0, 1), {P2, P1, IMM8M1, R3}}, | |
| 208 | {"cmp.ge.unc", A2, OpX2TaC (0xc, 2, 0, 1), {P2, P1, IMM8, R3}}, | |
| 209 | {"cmp.eq.and", A2, OpX2TaC (0xc, 2, 1, 0), {P1, P2, IMM8, R3}}, | |
| 210 | {"cmp.ne.andcm", A2, OpX2TaC (0xc, 2, 1, 0), {P1, P2, IMM8, R3}, PSEUDO}, | |
| 211 | {"cmp.ne.and", A2, OpX2TaC (0xc, 2, 1, 1), {P1, P2, IMM8, R3}}, | |
| 212 | {"cmp.eq.andcm", A2, OpX2TaC (0xc, 2, 1, 1), {P1, P2, IMM8, R3}, PSEUDO}, | |
| 213 | {"cmp4.lt", A2, OpX2TaC (0xc, 3, 0, 0), {P1, P2, IMM8, R3}}, | |
| 214 | {"cmp4.le", A2, OpX2TaC (0xc, 3, 0, 0), {P1, P2, IMM8M1, R3}}, | |
| 215 | {"cmp4.gt", A2, OpX2TaC (0xc, 3, 0, 0), {P2, P1, IMM8M1, R3}}, | |
| 216 | {"cmp4.ge", A2, OpX2TaC (0xc, 3, 0, 0), {P2, P1, IMM8, R3}}, | |
| 217 | {"cmp4.lt.unc", A2, OpX2TaC (0xc, 3, 0, 1), {P1, P2, IMM8, R3}}, | |
| 218 | {"cmp4.le.unc", A2, OpX2TaC (0xc, 3, 0, 1), {P1, P2, IMM8M1, R3}}, | |
| 219 | {"cmp4.gt.unc", A2, OpX2TaC (0xc, 3, 0, 1), {P2, P1, IMM8M1, R3}}, | |
| 220 | {"cmp4.ge.unc", A2, OpX2TaC (0xc, 3, 0, 1), {P2, P1, IMM8, R3}}, | |
| 221 | {"cmp4.eq.and", A2, OpX2TaC (0xc, 3, 1, 0), {P1, P2, IMM8, R3}}, | |
| 222 | {"cmp4.ne.andcm", A2, OpX2TaC (0xc, 3, 1, 0), {P1, P2, IMM8, R3}, PSEUDO}, | |
| 223 | {"cmp4.ne.and", A2, OpX2TaC (0xc, 3, 1, 1), {P1, P2, IMM8, R3}}, | |
| 224 | {"cmp4.eq.andcm", A2, OpX2TaC (0xc, 3, 1, 1), {P1, P2, IMM8, R3}, PSEUDO}, | |
| 225 | {"cmp.ltu", A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P1, P2, R2, R3}}, | |
| 226 | {"cmp.leu", A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P2, P1, R3, R2}}, | |
| 227 | {"cmp.gtu", A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P1, P2, R3, R2}}, | |
| 228 | {"cmp.geu", A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P2, P1, R2, R3}}, | |
| 229 | {"cmp.ltu.unc", A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P1, P2, R2, R3}}, | |
| 230 | {"cmp.leu.unc", A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P2, P1, R3, R2}}, | |
| 231 | {"cmp.gtu.unc", A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P1, P2, R3, R2}}, | |
| 232 | {"cmp.geu.unc", A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P2, P1, R2, R3}}, | |
| 233 | {"cmp.eq.or", A2, OpX2TbTaC (0xd, 0, 0, 1, 0), {P1, P2, R2, R3}}, | |
| 234 | {"cmp.ne.orcm", A2, OpX2TbTaC (0xd, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO}, | |
| 235 | {"cmp.ne.or", A2, OpX2TbTaC (0xd, 0, 0, 1, 1), {P1, P2, R2, R3}}, | |
| 236 | {"cmp.eq.orcm", A2, OpX2TbTaC (0xd, 0, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO}, | |
| 237 | {"cmp4.ltu", A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P1, P2, R2, R3}}, | |
| 238 | {"cmp4.leu", A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P2, P1, R3, R2}}, | |
| 239 | {"cmp4.gtu", A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P1, P2, R3, R2}}, | |
| 240 | {"cmp4.geu", A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P2, P1, R2, R3}}, | |
| 241 | {"cmp4.ltu.unc", A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P1, P2, R2, R3}}, | |
| 242 | {"cmp4.leu.unc", A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P2, P1, R3, R2}}, | |
| 243 | {"cmp4.gtu.unc", A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P1, P2, R3, R2}}, | |
| 244 | {"cmp4.geu.unc", A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P2, P1, R2, R3}}, | |
| 245 | {"cmp4.eq.or", A2, OpX2TbTaC (0xd, 1, 0, 1, 0), {P1, P2, R2, R3}}, | |
| 246 | {"cmp4.ne.orcm", A2, OpX2TbTaC (0xd, 1, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO}, | |
| 247 | {"cmp4.ne.or", A2, OpX2TbTaC (0xd, 1, 0, 1, 1), {P1, P2, R2, R3}}, | |
| 248 | {"cmp4.eq.orcm", A2, OpX2TbTaC (0xd, 1, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO}, | |
| 249 | {"cmp.gt.or", A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, GR0, R3}}, | |
| b8e0eda2 | 250 | {"cmp.lt.or", A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 251 | {"cmp.le.orcm", A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 252 | {"cmp.ge.orcm", A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 253 | {"cmp.le.or", A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 254 | {"cmp.ge.or", A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 255 | {"cmp.gt.orcm", A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 256 | {"cmp.lt.orcm", A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 257 | {"cmp.ge.or", A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 258 | {"cmp.le.or", A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 259 | {"cmp.lt.orcm", A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 260 | {"cmp.gt.orcm", A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 261 | {"cmp.lt.or", A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 262 | {"cmp.gt.or", A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 263 | {"cmp.ge.orcm", A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 264 | {"cmp.le.orcm", A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 265 | {"cmp4.gt.or", A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 266 | {"cmp4.lt.or", A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 267 | {"cmp4.le.orcm", A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 268 | {"cmp4.ge.orcm", A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 269 | {"cmp4.le.or", A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 270 | {"cmp4.ge.or", A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 271 | {"cmp4.gt.orcm", A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 272 | {"cmp4.lt.orcm", A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 273 | {"cmp4.ge.or", A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 274 | {"cmp4.le.or", A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 275 | {"cmp4.lt.orcm", A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 276 | {"cmp4.gt.orcm", A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 277 | {"cmp4.lt.or", A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 278 | {"cmp4.gt.or", A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 279 | {"cmp4.ge.orcm", A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 280 | {"cmp4.le.orcm", A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 JW |
281 | {"cmp.ltu", A2, OpX2TaC (0xd, 2, 0, 0), {P1, P2, IMM8, R3}}, |
| 282 | {"cmp.leu", A2, OpX2TaC (0xd, 2, 0, 0), {P1, P2, IMM8M1U8, R3}}, | |
| 283 | {"cmp.gtu", A2, OpX2TaC (0xd, 2, 0, 0), {P2, P1, IMM8M1U8, R3}}, | |
| 284 | {"cmp.geu", A2, OpX2TaC (0xd, 2, 0, 0), {P2, P1, IMM8, R3}}, | |
| 285 | {"cmp.ltu.unc", A2, OpX2TaC (0xd, 2, 0, 1), {P1, P2, IMM8, R3}}, | |
| 286 | {"cmp.leu.unc", A2, OpX2TaC (0xd, 2, 0, 1), {P1, P2, IMM8M1U8, R3}}, | |
| 287 | {"cmp.gtu.unc", A2, OpX2TaC (0xd, 2, 0, 1), {P2, P1, IMM8M1U8, R3}}, | |
| 288 | {"cmp.geu.unc", A2, OpX2TaC (0xd, 2, 0, 1), {P2, P1, IMM8, R3}}, | |
| 289 | {"cmp.eq.or", A2, OpX2TaC (0xd, 2, 1, 0), {P1, P2, IMM8, R3}}, | |
| 290 | {"cmp.ne.orcm", A2, OpX2TaC (0xd, 2, 1, 0), {P1, P2, IMM8, R3}, PSEUDO}, | |
| 291 | {"cmp.ne.or", A2, OpX2TaC (0xd, 2, 1, 1), {P1, P2, IMM8, R3}}, | |
| 292 | {"cmp.eq.orcm", A2, OpX2TaC (0xd, 2, 1, 1), {P1, P2, IMM8, R3}, PSEUDO}, | |
| 293 | {"cmp4.ltu", A2, OpX2TaC (0xd, 3, 0, 0), {P1, P2, IMM8U4, R3}}, | |
| 294 | {"cmp4.leu", A2, OpX2TaC (0xd, 3, 0, 0), {P1, P2, IMM8M1U4, R3}}, | |
| 295 | {"cmp4.gtu", A2, OpX2TaC (0xd, 3, 0, 0), {P2, P1, IMM8M1U4, R3}}, | |
| 296 | {"cmp4.geu", A2, OpX2TaC (0xd, 3, 0, 0), {P2, P1, IMM8U4, R3}}, | |
| 297 | {"cmp4.ltu.unc", A2, OpX2TaC (0xd, 3, 0, 1), {P1, P2, IMM8U4, R3}}, | |
| 298 | {"cmp4.leu.unc", A2, OpX2TaC (0xd, 3, 0, 1), {P1, P2, IMM8M1U4, R3}}, | |
| 299 | {"cmp4.gtu.unc", A2, OpX2TaC (0xd, 3, 0, 1), {P2, P1, IMM8M1U4, R3}}, | |
| 300 | {"cmp4.geu.unc", A2, OpX2TaC (0xd, 3, 0, 1), {P2, P1, IMM8U4, R3}}, | |
| 301 | {"cmp4.eq.or", A2, OpX2TaC (0xd, 3, 1, 0), {P1, P2, IMM8, R3}}, | |
| 302 | {"cmp4.ne.orcm", A2, OpX2TaC (0xd, 3, 1, 0), {P1, P2, IMM8, R3}, PSEUDO}, | |
| 303 | {"cmp4.ne.or", A2, OpX2TaC (0xd, 3, 1, 1), {P1, P2, IMM8, R3}}, | |
| 304 | {"cmp4.eq.orcm", A2, OpX2TaC (0xd, 3, 1, 1), {P1, P2, IMM8, R3}, PSEUDO}, | |
| 305 | {"cmp.eq", A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P1, P2, R2, R3}}, | |
| 306 | {"cmp.ne", A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P2, P1, R2, R3}}, | |
| 307 | {"cmp.eq.unc", A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P1, P2, R2, R3}}, | |
| 308 | {"cmp.ne.unc", A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P2, P1, R2, R3}}, | |
| 309 | {"cmp.eq.or.andcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P1, P2, R2, R3}}, | |
| 310 | {"cmp.ne.and.orcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO}, | |
| 311 | {"cmp.ne.or.andcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P1, P2, R2, R3}}, | |
| 312 | {"cmp.eq.and.orcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO}, | |
| 313 | {"cmp4.eq", A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P1, P2, R2, R3}}, | |
| 314 | {"cmp4.ne", A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P2, P1, R2, R3}}, | |
| 315 | {"cmp4.eq.unc", A2, OpX2TbTaC (0xe, 1, 0, 0, 1), {P1, P2, R2, R3}}, | |
| 316 | {"cmp4.ne.unc", A2, OpX2TbTaC (0xe, 1, 0, 0, 1), {P2, P1, R2, R3}}, | |
| 317 | {"cmp4.eq.or.andcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 0), {P1, P2, R2, R3}}, | |
| 318 | {"cmp4.ne.and.orcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO}, | |
| 319 | {"cmp4.ne.or.andcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 1), {P1, P2, R2, R3}}, | |
| 320 | {"cmp4.eq.and.orcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO}, | |
| 321 | {"cmp.gt.or.andcm", A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P1, P2, GR0, R3}}, | |
| b8e0eda2 | 322 | {"cmp.lt.or.andcm", A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 323 | {"cmp.le.and.orcm", A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P2, P1, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 324 | {"cmp.ge.and.orcm", A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P2, P1, R3, GR0}, PSEUDO}, |
| 800eeca4 | 325 | {"cmp.le.or.andcm", A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 326 | {"cmp.ge.or.andcm", A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 327 | {"cmp.gt.and.orcm", A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P2, P1, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 328 | {"cmp.lt.and.orcm", A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P2, P1, R3, GR0}, PSEUDO}, |
| 800eeca4 | 329 | {"cmp.ge.or.andcm", A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 330 | {"cmp.le.or.andcm", A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 331 | {"cmp.lt.and.orcm", A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P2, P1, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 332 | {"cmp.gt.and.orcm", A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P2, P1, R3, GR0}, PSEUDO}, |
| 800eeca4 | 333 | {"cmp.lt.or.andcm", A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 334 | {"cmp.gt.or.andcm", A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 335 | {"cmp.ge.and.orcm", A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P2, P1, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 336 | {"cmp.le.and.orcm", A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P2, P1, R3, GR0}, PSEUDO}, |
| 800eeca4 | 337 | {"cmp4.gt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 338 | {"cmp4.lt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 339 | {"cmp4.le.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P2, P1, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 340 | {"cmp4.ge.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P2, P1, R3, GR0}, PSEUDO}, |
| 800eeca4 | 341 | {"cmp4.le.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 342 | {"cmp4.ge.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 343 | {"cmp4.gt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P2, P1, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 344 | {"cmp4.lt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P2, P1, R3, GR0}, PSEUDO}, |
| 800eeca4 | 345 | {"cmp4.ge.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 346 | {"cmp4.le.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 347 | {"cmp4.lt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P2, P1, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 348 | {"cmp4.gt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P2, P1, R3, GR0}, PSEUDO}, |
| 800eeca4 | 349 | {"cmp4.lt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P1, P2, GR0, R3}}, |
| b8e0eda2 | 350 | {"cmp4.gt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO}, |
| 800eeca4 | 351 | {"cmp4.ge.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P2, P1, GR0, R3}, PSEUDO}, |
| b8e0eda2 | 352 | {"cmp4.le.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P2, P1, R3, GR0}, PSEUDO}, |
| 800eeca4 JW |
353 | {"cmp.eq", A2, OpX2TaC (0xe, 2, 0, 0), {P1, P2, IMM8, R3}}, |
| 354 | {"cmp.ne", A2, OpX2TaC (0xe, 2, 0, 0), {P2, P1, IMM8, R3}}, | |
| 355 | {"cmp.eq.unc", A2, OpX2TaC (0xe, 2, 0, 1), {P1, P2, IMM8, R3}}, | |
| 356 | {"cmp.ne.unc", A2, OpX2TaC (0xe, 2, 0, 1), {P2, P1, IMM8, R3}}, | |
| 357 | {"cmp.eq.or.andcm", A2, OpX2TaC (0xe, 2, 1, 0), {P1, P2, IMM8, R3}}, | |
| 358 | {"cmp.ne.and.orcm", A2, OpX2TaC (0xe, 2, 1, 0), {P2, P1, IMM8, R3}, PSEUDO}, | |
| 359 | {"cmp.ne.or.andcm", A2, OpX2TaC (0xe, 2, 1, 1), {P1, P2, IMM8, R3}}, | |
| 360 | {"cmp.eq.and.orcm", A2, OpX2TaC (0xe, 2, 1, 1), {P2, P1, IMM8, R3}, PSEUDO}, | |
| 361 | {"cmp4.eq", A2, OpX2TaC (0xe, 3, 0, 0), {P1, P2, IMM8, R3}}, | |
| 362 | {"cmp4.ne", A2, OpX2TaC (0xe, 3, 0, 0), {P2, P1, IMM8, R3}}, | |
| 363 | {"cmp4.eq.unc", A2, OpX2TaC (0xe, 3, 0, 1), {P1, P2, IMM8, R3}}, | |
| 364 | {"cmp4.ne.unc", A2, OpX2TaC (0xe, 3, 0, 1), {P2, P1, IMM8, R3}}, | |
| 365 | {"cmp4.eq.or.andcm", A2, OpX2TaC (0xe, 3, 1, 0), {P1, P2, IMM8, R3}}, | |
| 366 | {"cmp4.ne.and.orcm", A2, OpX2TaC (0xe, 3, 1, 0), {P2, P1, IMM8, R3}, PSEUDO}, | |
| 367 | {"cmp4.ne.or.andcm", A2, OpX2TaC (0xe, 3, 1, 1), {P1, P2, IMM8, R3}}, | |
| 368 | {"cmp4.eq.and.orcm", A2, OpX2TaC (0xe, 3, 1, 1), {P2, P1, IMM8, R3}, PSEUDO}, | |
| 369 | ||
| 370 | {0} | |
| 371 | }; | |
| 372 | ||
| 373 | #undef A | |
| 374 | #undef A2 | |
| 375 | #undef bC | |
| 376 | #undef bImm14 | |
| 377 | #undef bR3a | |
| 378 | #undef bR3b | |
| 379 | #undef bTa | |
| 380 | #undef bTb | |
| 381 | #undef bVe | |
| 382 | #undef bX | |
| 383 | #undef bX2 | |
| 384 | #undef bX2a | |
| 385 | #undef bX2b | |
| 386 | #undef bX4 | |
| 387 | #undef bZa | |
| 388 | #undef bZb | |
| 389 | #undef mC | |
| 390 | #undef mImm14 | |
| 391 | #undef mR3a | |
| 392 | #undef mR3b | |
| 393 | #undef mTa | |
| 394 | #undef mTb | |
| 395 | #undef mVe | |
| 396 | #undef mX | |
| 397 | #undef mX2 | |
| 398 | #undef mX2a | |
| 399 | #undef mX2b | |
| 400 | #undef mX4 | |
| 401 | #undef mZa | |
| 402 | #undef mZb | |
| 403 | #undef OpR3a | |
| 404 | #undef OpR3b | |
| 405 | #undef OpX2aVe | |
| 406 | #undef OpX2aVeImm14 | |
| 407 | #undef OpX2aVeX4 | |
| 408 | #undef OpX2aVeX4X2b | |
| 409 | #undef OpX2TbTaC | |
| 410 | #undef OpX2TaC | |
| 411 | #undef OpX2aZaZbX4 | |
| 412 | #undef OpX2aZaZbX4X2b |