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[deliverable/binutils-gdb.git] / opcodes / m32c-dis.c
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49f58d10
JB		 1/* Disassembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5- the resultant file is machine generated, cgen-dis.in isn't
6
7Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005
8Free Software Foundation, Inc.
9
10This file is part of the GNU Binutils and GDB, the GNU debugger.
11
12This program is free software; you can redistribute it and/or modify
13it under the terms of the GNU General Public License as published by
14the Free Software Foundation; either version 2, or (at your option)
15any later version.
16
17This program is distributed in the hope that it will be useful,
18but WITHOUT ANY WARRANTY; without even the implied warranty of
19MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20GNU General Public License for more details.
21
22You should have received a copy of the GNU General Public License
23along with this program; if not, write to the Free Software Foundation, Inc.,
2451 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25
26/* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29#include "sysdep.h"
30#include <stdio.h>
31#include "ansidecl.h"
32#include "dis-asm.h"
33#include "bfd.h"
34#include "symcat.h"
35#include "libiberty.h"
36#include "m32c-desc.h"
37#include "m32c-opc.h"
38#include "opintl.h"
39
40/* Default text to print if an instruction isn't recognized. */
41#define UNKNOWN_INSN_MSG _("*unknown*")
42
43static void print_normal
44 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
45static void print_address
46 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
47static void print_keyword
48 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
49static void print_insn_normal
50 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
51static int print_insn
52 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
53static int default_print_insn
54 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
55static int read_insn
56 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
57 unsigned long *);
58\f
59/* -- disassembler routines inserted here */
60
61/* -- dis.c */
62
63#include "elf/m32c.h"
64#include "elf-bfd.h"
65
66/* Always print the short insn format suffix as ':<char>' */
67static void
68print_suffix (PTR dis_info, char suffix)
69{
70 disassemble_info *info = dis_info;
71 (*info->fprintf_func) (info->stream, ":%c", suffix);
72}
73
74static void
75print_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
76 PTR dis_info,
77 long value ATTRIBUTE_UNUSED,
78 unsigned int attrs ATTRIBUTE_UNUSED,
79 bfd_vma pc ATTRIBUTE_UNUSED,
80 int length ATTRIBUTE_UNUSED)
81{
82 print_suffix (dis_info, 's');
83}
84
85
86static void
87print_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
88 PTR dis_info,
89 long value ATTRIBUTE_UNUSED,
90 unsigned int attrs ATTRIBUTE_UNUSED,
91 bfd_vma pc ATTRIBUTE_UNUSED,
92 int length ATTRIBUTE_UNUSED)
93{
94 print_suffix (dis_info, 'g');
95}
96
97static void
98print_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
99 PTR dis_info,
100 long value ATTRIBUTE_UNUSED,
101 unsigned int attrs ATTRIBUTE_UNUSED,
102 bfd_vma pc ATTRIBUTE_UNUSED,
103 int length ATTRIBUTE_UNUSED)
104{
105 print_suffix (dis_info, 'q');
106}
107
108static void
109print_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
110 PTR dis_info,
111 long value ATTRIBUTE_UNUSED,
112 unsigned int attrs ATTRIBUTE_UNUSED,
113 bfd_vma pc ATTRIBUTE_UNUSED,
114 int length ATTRIBUTE_UNUSED)
115{
116 print_suffix (dis_info, 'z');
117}
118
119/* Print the empty suffix */
120static void
121print_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
122 PTR dis_info ATTRIBUTE_UNUSED,
123 long value ATTRIBUTE_UNUSED,
124 unsigned int attrs ATTRIBUTE_UNUSED,
125 bfd_vma pc ATTRIBUTE_UNUSED,
126 int length ATTRIBUTE_UNUSED)
127{
128 return;
129}
130
131static void
132print_r0l_r0h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
133 PTR dis_info,
134 long value,
135 unsigned int attrs ATTRIBUTE_UNUSED,
136 bfd_vma pc ATTRIBUTE_UNUSED,
137 int length ATTRIBUTE_UNUSED)
138{
139 disassemble_info *info = dis_info;
140 if (value == 0)
141 (*info->fprintf_func) (info->stream, "r0h,r0l");
142 else
143 (*info->fprintf_func) (info->stream, "r0l,r0h");
144}
145
146static void
147print_unsigned_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
148 PTR dis_info,
149 unsigned long value,
150 unsigned int attrs ATTRIBUTE_UNUSED,
151 bfd_vma pc ATTRIBUTE_UNUSED,
152 int length ATTRIBUTE_UNUSED)
153{
154 disassemble_info *info = dis_info;
155 (*info->fprintf_func) (info->stream, "%ld,0x%lx", value & 0x7, value >> 3);
156}
157
158static void
159print_signed_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
160 PTR dis_info,
161 signed long value,
162 unsigned int attrs ATTRIBUTE_UNUSED,
163 bfd_vma pc ATTRIBUTE_UNUSED,
164 int length ATTRIBUTE_UNUSED)
165{
166 disassemble_info *info = dis_info;
167 (*info->fprintf_func) (info->stream, "%ld,%ld", value & 0x7, value >> 3);
168}
169
170static void
171print_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
172 PTR dis_info,
173 long value ATTRIBUTE_UNUSED,
174 unsigned int attrs ATTRIBUTE_UNUSED,
175 bfd_vma pc ATTRIBUTE_UNUSED,
176 int length ATTRIBUTE_UNUSED)
177{
178 /* Always print the size as '.w' */
179 disassemble_info *info = dis_info;
180 (*info->fprintf_func) (info->stream, ".w");
181}
182
183#define POP 0
184#define PUSH 1
185
186static void print_pop_regset (CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int);
187static void print_push_regset (CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int);
188
189/* Print a set of registers, R0,R1,A0,A1,SB,FB. */
190
191static void
192print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
193 PTR dis_info,
194 long value,
195 unsigned int attrs ATTRIBUTE_UNUSED,
196 bfd_vma pc ATTRIBUTE_UNUSED,
197 int length ATTRIBUTE_UNUSED,
198 int push)
199{
200 static char * m16c_register_names [] =
201 {
202 "r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
203 };
204 disassemble_info *info = dis_info;
205 int mask;
206 int index = 0;
207 char* comma = "";
208
209 if (push)
210 mask = 0x80;
211 else
212 mask = 1;
213
214 if (value & mask)
215 {
216 (*info->fprintf_func) (info->stream, "%s", m16c_register_names [0]);
217 comma = ",";
218 }
219
220 for (index = 1; index <= 7; ++index)
221 {
222 if (push)
223 mask >>= 1;
224 else
225 mask <<= 1;
226
227 if (value & mask)
228 {
229 (*info->fprintf_func) (info->stream, "%s%s", comma,
230 m16c_register_names [index]);
231 comma = ",";
232 }
233 }
234}
235
236static void
237print_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
238 PTR dis_info,
239 long value,
240 unsigned int attrs ATTRIBUTE_UNUSED,
241 bfd_vma pc ATTRIBUTE_UNUSED,
242 int length ATTRIBUTE_UNUSED)
243{
244 print_regset (cd, dis_info, value, attrs, pc, length, POP);
245}
246
247static void
248print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
249 PTR dis_info,
250 long value,
251 unsigned int attrs ATTRIBUTE_UNUSED,
252 bfd_vma pc ATTRIBUTE_UNUSED,
253 int length ATTRIBUTE_UNUSED)
254{
255 print_regset (cd, dis_info, value, attrs, pc, length, PUSH);
256}
257#if 0 /* not used? */
258static void
259print_boff (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
260 PTR dis_info,
261 long value,
262 unsigned int attrs ATTRIBUTE_UNUSED,
263 bfd_vma pc ATTRIBUTE_UNUSED,
264 int length ATTRIBUTE_UNUSED)
265{
266 disassemble_info *info = dis_info;
267 if (value)
268 info->fprintf_func (info->stream, "%d,%d", value % 16,
269 (value / 16) * 2);
270}
271
272#endif /* not used? */
273
274void m32c_cgen_print_operand
275 PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *,
276 void const *, bfd_vma, int));
277
278/* Main entry point for printing operands.
279 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
280 of dis-asm.h on cgen.h.
281
282 This function is basically just a big switch statement. Earlier versions
283 used tables to look up the function to use, but
284 - if the table contains both assembler and disassembler functions then
285 the disassembler contains much of the assembler and vice-versa,
286 - there's a lot of inlining possibilities as things grow,
287 - using a switch statement avoids the function call overhead.
288
289 This function could be moved into `print_insn_normal', but keeping it
290 separate makes clear the interface between `print_insn_normal' and each of
291 the handlers. */
292
293void
294m32c_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
295 CGEN_CPU_DESC cd;
296 int opindex;
297 PTR xinfo;
298 CGEN_FIELDS *fields;
299 void const *attrs ATTRIBUTE_UNUSED;
300 bfd_vma pc;
301 int length;
302{
303 disassemble_info *info = (disassemble_info *) xinfo;
304
305 switch (opindex)
306 {
307 case M32C_OPERAND_A0 :
308 print_keyword (cd, info, & m32c_cgen_opval_h_a0, 0, 0);
309 break;
310 case M32C_OPERAND_A1 :
311 print_keyword (cd, info, & m32c_cgen_opval_h_a1, 0, 0);
312 break;
313 case M32C_OPERAND_AN16_PUSH_S :
314 print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_4_1, 0);
315 break;
316 case M32C_OPERAND_BIT16AN :
317 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
318 break;
319 case M32C_OPERAND_BIT16RN :
320 print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
321 break;
322 case M32C_OPERAND_BIT32ANPREFIXED :
323 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
324 break;
325 case M32C_OPERAND_BIT32ANUNPREFIXED :
326 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
327 break;
328 case M32C_OPERAND_BIT32RNPREFIXED :
329 print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
330 break;
331 case M32C_OPERAND_BIT32RNUNPREFIXED :
332 print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
333 break;
334 case M32C_OPERAND_BITBASE16_16_S8 :
335 print_signed_bitbase (cd, info, fields->f_dsp_16_s8, 0, pc, length);
336 break;
337 case M32C_OPERAND_BITBASE16_16_U16 :
338 print_unsigned_bitbase (cd, info, fields->f_dsp_16_u16, 0, pc, length);
339 break;
340 case M32C_OPERAND_BITBASE16_16_U8 :
341 print_unsigned_bitbase (cd, info, fields->f_dsp_16_u8, 0, pc, length);
342 break;
343 case M32C_OPERAND_BITBASE16_8_U11_S :
344 print_unsigned_bitbase (cd, info, fields->f_bitbase16_u11_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
345 break;
346 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
347 print_signed_bitbase (cd, info, fields->f_bitbase32_16_s11_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
348 break;
349 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
350 print_signed_bitbase (cd, info, fields->f_bitbase32_16_s19_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
351 break;
352 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
353 print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u11_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
354 break;
355 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
356 print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u19_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
357 break;
358 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
359 print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u27_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
360 break;
361 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
362 print_signed_bitbase (cd, info, fields->f_bitbase32_24_s11_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
363 break;
364 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
365 print_signed_bitbase (cd, info, fields->f_bitbase32_24_s19_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
366 break;
367 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
368 print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u11_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
369 break;
370 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
371 print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u19_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
372 break;
373 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
374 print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u27_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
375 break;
376 case M32C_OPERAND_BITNO16R :
377 print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
378 break;
379 case M32C_OPERAND_BITNO32PREFIXED :
380 print_normal (cd, info, fields->f_bitno32_prefixed, 0, pc, length);
381 break;
382 case M32C_OPERAND_BITNO32UNPREFIXED :
383 print_normal (cd, info, fields->f_bitno32_unprefixed, 0, pc, length);
384 break;
385 case M32C_OPERAND_DSP_10_U6 :
386 print_normal (cd, info, fields->f_dsp_10_u6, 0, pc, length);
387 break;
388 case M32C_OPERAND_DSP_16_S16 :
389 print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
390 break;
391 case M32C_OPERAND_DSP_16_S8 :
392 print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
393 break;
394 case M32C_OPERAND_DSP_16_U16 :
395 print_normal (cd, info, fields->f_dsp_16_u16, 0, pc, length);
396 break;
397 case M32C_OPERAND_DSP_16_U20 :
398 print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
399 break;
400 case M32C_OPERAND_DSP_16_U24 :
401 print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
402 break;
403 case M32C_OPERAND_DSP_16_U8 :
404 print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
405 break;
406 case M32C_OPERAND_DSP_24_S16 :
407 print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
408 break;
409 case M32C_OPERAND_DSP_24_S8 :
410 print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
411 break;
412 case M32C_OPERAND_DSP_24_U16 :
413 print_normal (cd, info, fields->f_dsp_24_u16, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
414 break;
415 case M32C_OPERAND_DSP_24_U20 :
416 print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
417 break;
418 case M32C_OPERAND_DSP_24_U24 :
419 print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
420 break;
421 case M32C_OPERAND_DSP_24_U8 :
422 print_normal (cd, info, fields->f_dsp_24_u8, 0, pc, length);
423 break;
424 case M32C_OPERAND_DSP_32_S16 :
425 print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
426 break;
427 case M32C_OPERAND_DSP_32_S8 :
428 print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
429 break;
430 case M32C_OPERAND_DSP_32_U16 :
431 print_normal (cd, info, fields->f_dsp_32_u16, 0, pc, length);
432 break;
433 case M32C_OPERAND_DSP_32_U20 :
434 print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
435 break;
436 case M32C_OPERAND_DSP_32_U24 :
437 print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
438 break;
439 case M32C_OPERAND_DSP_32_U8 :
440 print_normal (cd, info, fields->f_dsp_32_u8, 0, pc, length);
441 break;
442 case M32C_OPERAND_DSP_40_S16 :
443 print_normal (cd, info, fields->f_dsp_40_s16, 0, pc, length);
444 break;
445 case M32C_OPERAND_DSP_40_S8 :
446 print_normal (cd, info, fields->f_dsp_40_s8, 0, pc, length);
447 break;
448 case M32C_OPERAND_DSP_40_U16 :
449 print_normal (cd, info, fields->f_dsp_40_u16, 0, pc, length);
450 break;
451 case M32C_OPERAND_DSP_40_U24 :
452 print_normal (cd, info, fields->f_dsp_40_u24, 0, pc, length);
453 break;
454 case M32C_OPERAND_DSP_40_U8 :
455 print_normal (cd, info, fields->f_dsp_40_u8, 0, pc, length);
456 break;
457 case M32C_OPERAND_DSP_48_S16 :
458 print_normal (cd, info, fields->f_dsp_48_s16, 0, pc, length);
459 break;
460 case M32C_OPERAND_DSP_48_S8 :
461 print_normal (cd, info, fields->f_dsp_48_s8, 0, pc, length);
462 break;
463 case M32C_OPERAND_DSP_48_U16 :
464 print_normal (cd, info, fields->f_dsp_48_u16, 0, pc, length);
465 break;
466 case M32C_OPERAND_DSP_48_U24 :
467 print_normal (cd, info, fields->f_dsp_48_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
468 break;
469 case M32C_OPERAND_DSP_48_U8 :
470 print_normal (cd, info, fields->f_dsp_48_u8, 0, pc, length);
471 break;
472 case M32C_OPERAND_DSP_8_S8 :
473 print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
474 break;
475 case M32C_OPERAND_DSP_8_U16 :
476 print_normal (cd, info, fields->f_dsp_8_u16, 0, pc, length);
477 break;
478 case M32C_OPERAND_DSP_8_U6 :
479 print_normal (cd, info, fields->f_dsp_8_u6, 0, pc, length);
480 break;
481 case M32C_OPERAND_DSP_8_U8 :
482 print_normal (cd, info, fields->f_dsp_8_u8, 0, pc, length);
483 break;
484 case M32C_OPERAND_DST16AN :
485 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
486 break;
487 case M32C_OPERAND_DST16AN_S :
488 print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an_s, 0);
489 break;
490 case M32C_OPERAND_DST16ANHI :
491 print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an, 0);
492 break;
493 case M32C_OPERAND_DST16ANQI :
494 print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_an, 0);
495 break;
496 case M32C_OPERAND_DST16ANQI_S :
497 print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_rn_QI_s, 0);
498 break;
499 case M32C_OPERAND_DST16ANSI :
500 print_keyword (cd, info, & m32c_cgen_opval_h_ar_SI, fields->f_dst16_an, 0);
501 break;
502 case M32C_OPERAND_DST16RNEXTQI :
503 print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst16_rn_ext, 0);
504 break;
505 case M32C_OPERAND_DST16RNHI :
506 print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
507 break;
508 case M32C_OPERAND_DST16RNQI :
509 print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst16_rn, 0);
510 break;
511 case M32C_OPERAND_DST16RNQI_S :
512 print_keyword (cd, info, & m32c_cgen_opval_h_r0l_r0h, fields->f_dst16_rn_QI_s, 0);
513 break;
514 case M32C_OPERAND_DST16RNSI :
515 print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst16_rn, 0);
516 break;
517 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
518 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
519 break;
520 case M32C_OPERAND_DST32ANPREFIXED :
521 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
522 break;
523 case M32C_OPERAND_DST32ANPREFIXEDHI :
524 print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_prefixed, 0);
525 break;
526 case M32C_OPERAND_DST32ANPREFIXEDQI :
527 print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_prefixed, 0);
528 break;
529 case M32C_OPERAND_DST32ANPREFIXEDSI :
530 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
531 break;
532 case M32C_OPERAND_DST32ANUNPREFIXED :
533 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
534 break;
535 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
536 print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_unprefixed, 0);
537 break;
538 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
539 print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_unprefixed, 0);
540 break;
541 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
542 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
543 break;
544 case M32C_OPERAND_DST32R0HI_S :
545 print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
546 break;
547 case M32C_OPERAND_DST32R0QI_S :
548 print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
549 break;
550 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
551 print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_HI, fields->f_dst32_rn_ext_unprefixed, 0);
552 break;
553 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
554 print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst32_rn_ext_unprefixed, 0);
555 break;
556 case M32C_OPERAND_DST32RNPREFIXEDHI :
557 print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_prefixed_HI, 0);
558 break;
559 case M32C_OPERAND_DST32RNPREFIXEDQI :
560 print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
561 break;
562 case M32C_OPERAND_DST32RNPREFIXEDSI :
563 print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_prefixed_SI, 0);
564 break;
565 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
566 print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_unprefixed_HI, 0);
567 break;
568 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
569 print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
570 break;
571 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
572 print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_unprefixed_SI, 0);
573 break;
574 case M32C_OPERAND_G :
575 print_G (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
576 break;
577 case M32C_OPERAND_IMM_12_S4 :
578 print_normal (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
579 break;
580 case M32C_OPERAND_IMM_13_U3 :
581 print_normal (cd, info, fields->f_imm_13_u3, 0, pc, length);
582 break;
583 case M32C_OPERAND_IMM_16_HI :
584 print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
585 break;
586 case M32C_OPERAND_IMM_16_QI :
587 print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
588 break;
589 case M32C_OPERAND_IMM_16_SI :
590 print_normal (cd, info, fields->f_dsp_16_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
591 break;
592 case M32C_OPERAND_IMM_20_S4 :
593 print_normal (cd, info, fields->f_imm_20_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
594 break;
595 case M32C_OPERAND_IMM_24_HI :
596 print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
597 break;
598 case M32C_OPERAND_IMM_24_QI :
599 print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
600 break;
601 case M32C_OPERAND_IMM_24_SI :
602 print_normal (cd, info, fields->f_dsp_24_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
603 break;
604 case M32C_OPERAND_IMM_32_HI :
605 print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
606 break;
607 case M32C_OPERAND_IMM_32_QI :
608 print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
609 break;
610 case M32C_OPERAND_IMM_32_SI :
611 print_normal (cd, info, fields->f_dsp_32_s32, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
612 break;
613 case M32C_OPERAND_IMM_40_HI :
614 print_normal (cd, info, fields->f_dsp_40_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
615 break;
616 case M32C_OPERAND_IMM_40_QI :
617 print_normal (cd, info, fields->f_dsp_40_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
618 break;
619 case M32C_OPERAND_IMM_40_SI :
620 print_normal (cd, info, fields->f_dsp_40_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
621 break;
622 case M32C_OPERAND_IMM_48_HI :
623 print_normal (cd, info, fields->f_dsp_48_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
624 break;
625 case M32C_OPERAND_IMM_48_QI :
626 print_normal (cd, info, fields->f_dsp_48_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
627 break;
628 case M32C_OPERAND_IMM_48_SI :
629 print_normal (cd, info, fields->f_dsp_48_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
630 break;
631 case M32C_OPERAND_IMM_56_HI :
632 print_normal (cd, info, fields->f_dsp_56_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
633 break;
634 case M32C_OPERAND_IMM_56_QI :
635 print_normal (cd, info, fields->f_dsp_56_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
636 break;
637 case M32C_OPERAND_IMM_64_HI :
638 print_normal (cd, info, fields->f_dsp_64_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
639 break;
640 case M32C_OPERAND_IMM_8_HI :
641 print_normal (cd, info, fields->f_dsp_8_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
642 break;
643 case M32C_OPERAND_IMM_8_QI :
644 print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
645 break;
646 case M32C_OPERAND_IMM_8_S4 :
647 print_normal (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
648 break;
649 case M32C_OPERAND_IMM_SH_12_S4 :
650 print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_12_s4, 0);
651 break;
652 case M32C_OPERAND_IMM_SH_20_S4 :
653 print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_20_s4, 0);
654 break;
655 case M32C_OPERAND_IMM_SH_8_S4 :
656 print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_8_s4, 0);
657 break;
658 case M32C_OPERAND_IMM1_S :
659 print_normal (cd, info, fields->f_imm1_S, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
660 break;
661 case M32C_OPERAND_IMM3_S :
662 print_normal (cd, info, fields->f_imm3_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
663 break;
664 case M32C_OPERAND_LAB_16_8 :
665 print_address (cd, info, fields->f_lab_16_8, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
666 break;
667 case M32C_OPERAND_LAB_24_8 :
668 print_address (cd, info, fields->f_lab_24_8, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
669 break;
670 case M32C_OPERAND_LAB_32_8 :
671 print_address (cd, info, fields->f_lab_32_8, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
672 break;
673 case M32C_OPERAND_LAB_40_8 :
674 print_address (cd, info, fields->f_lab_40_8, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
675 break;
676 case M32C_OPERAND_LAB_5_3 :
677 print_address (cd, info, fields->f_lab_5_3, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
678 break;
679 case M32C_OPERAND_LAB_8_16 :
680 print_address (cd, info, fields->f_lab_8_16, 0|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
681 break;
682 case M32C_OPERAND_LAB_8_24 :
683 print_address (cd, info, fields->f_lab_8_24, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
684 break;
685 case M32C_OPERAND_LAB_8_8 :
686 print_address (cd, info, fields->f_lab_8_8, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
687 break;
688 case M32C_OPERAND_LAB32_JMP_S :
689 print_address (cd, info, fields->f_lab32_jmp_s, 0|(1<<CGEN_OPERAND_PCREL_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
690 break;
691 case M32C_OPERAND_Q :
692 print_Q (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
693 break;
694 case M32C_OPERAND_R0 :
695 print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
696 break;
697 case M32C_OPERAND_R0H :
698 print_keyword (cd, info, & m32c_cgen_opval_h_r0h, 0, 0);
699 break;
700 case M32C_OPERAND_R0L :
701 print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
702 break;
703 case M32C_OPERAND_R1 :
704 print_keyword (cd, info, & m32c_cgen_opval_h_r1, 0, 0);
705 break;
706 case M32C_OPERAND_R1R2R0 :
707 print_keyword (cd, info, & m32c_cgen_opval_h_r1r2r0, 0, 0);
708 break;
709 case M32C_OPERAND_R2 :
710 print_keyword (cd, info, & m32c_cgen_opval_h_r2, 0, 0);
711 break;
712 case M32C_OPERAND_R2R0 :
713 print_keyword (cd, info, & m32c_cgen_opval_h_r2r0, 0, 0);
714 break;
715 case M32C_OPERAND_R3 :
716 print_keyword (cd, info, & m32c_cgen_opval_h_r3, 0, 0);
717 break;
718 case M32C_OPERAND_R3R1 :
719 print_keyword (cd, info, & m32c_cgen_opval_h_r3r1, 0, 0);
720 break;
721 case M32C_OPERAND_REGSETPOP :
722 print_pop_regset (cd, info, fields->f_8_8, 0, pc, length);
723 break;
724 case M32C_OPERAND_REGSETPUSH :
725 print_push_regset (cd, info, fields->f_8_8, 0, pc, length);
726 break;
727 case M32C_OPERAND_RN16_PUSH_S :
728 print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_4_1, 0);
729 break;
730 case M32C_OPERAND_S :
731 print_S (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
732 break;
733 case M32C_OPERAND_SRC16AN :
734 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src16_an, 0);
735 break;
736 case M32C_OPERAND_SRC16ANHI :
737 print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src16_an, 0);
738 break;
739 case M32C_OPERAND_SRC16ANQI :
740 print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src16_an, 0);
741 break;
742 case M32C_OPERAND_SRC16RNHI :
743 print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src16_rn, 0);
744 break;
745 case M32C_OPERAND_SRC16RNQI :
746 print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src16_rn, 0);
747 break;
748 case M32C_OPERAND_SRC32ANPREFIXED :
749 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
750 break;
751 case M32C_OPERAND_SRC32ANPREFIXEDHI :
752 print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_prefixed, 0);
753 break;
754 case M32C_OPERAND_SRC32ANPREFIXEDQI :
755 print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_prefixed, 0);
756 break;
757 case M32C_OPERAND_SRC32ANPREFIXEDSI :
758 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
759 break;
760 case M32C_OPERAND_SRC32ANUNPREFIXED :
761 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
762 break;
763 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
764 print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_unprefixed, 0);
765 break;
766 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
767 print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_unprefixed, 0);
768 break;
769 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
770 print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
771 break;
772 case M32C_OPERAND_SRC32RNPREFIXEDHI :
773 print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_prefixed_HI, 0);
774 break;
775 case M32C_OPERAND_SRC32RNPREFIXEDQI :
776 print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_prefixed_QI, 0);
777 break;
778 case M32C_OPERAND_SRC32RNPREFIXEDSI :
779 print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_prefixed_SI, 0);
780 break;
781 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
782 print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_unprefixed_HI, 0);
783 break;
784 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
785 print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_unprefixed_QI, 0);
786 break;
787 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
788 print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_unprefixed_SI, 0);
789 break;
790 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
791 print_r0l_r0h (cd, info, fields->f_5_1, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
792 break;
793 case M32C_OPERAND_X :
794 print_X (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
795 break;
796 case M32C_OPERAND_Z :
797 print_Z (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
798 break;
799 case M32C_OPERAND_COND16_16 :
800 print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_16_u8, 0);
801 break;
802 case M32C_OPERAND_COND16_24 :
803 print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_24_u8, 0);
804 break;
805 case M32C_OPERAND_COND16_32 :
806 print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_32_u8, 0);
807 break;
808 case M32C_OPERAND_COND16C :
809 print_keyword (cd, info, & m32c_cgen_opval_h_cond16c, fields->f_cond16, 0);
810 break;
811 case M32C_OPERAND_COND16J :
812 print_keyword (cd, info, & m32c_cgen_opval_h_cond16j, fields->f_cond16, 0);
813 break;
814 case M32C_OPERAND_COND16J5 :
815 print_keyword (cd, info, & m32c_cgen_opval_h_cond16j_5, fields->f_cond16j_5, 0);
816 break;
817 case M32C_OPERAND_COND32 :
818 print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32, 0|(1<<CGEN_OPERAND_VIRTUAL));
819 break;
820 case M32C_OPERAND_COND32_16 :
821 print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_16_u8, 0);
822 break;
823 case M32C_OPERAND_COND32_24 :
824 print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_24_u8, 0);
825 break;
826 case M32C_OPERAND_COND32_32 :
827 print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_32_u8, 0);
828 break;
829 case M32C_OPERAND_COND32_40 :
830 print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_40_u8, 0);
831 break;
832 case M32C_OPERAND_COND32J :
833 print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32j, 0|(1<<CGEN_OPERAND_VIRTUAL));
834 break;
835 case M32C_OPERAND_CR1_PREFIXED_32 :
836 print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_21_3, 0);
837 break;
838 case M32C_OPERAND_CR1_UNPREFIXED_32 :
839 print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_13_3, 0);
840 break;
841 case M32C_OPERAND_CR16 :
842 print_keyword (cd, info, & m32c_cgen_opval_h_cr_16, fields->f_9_3, 0);
843 break;
844 case M32C_OPERAND_CR2_32 :
845 print_keyword (cd, info, & m32c_cgen_opval_h_cr2_32, fields->f_13_3, 0);
846 break;
847 case M32C_OPERAND_CR3_PREFIXED_32 :
848 print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_21_3, 0);
849 break;
850 case M32C_OPERAND_CR3_UNPREFIXED_32 :
851 print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_13_3, 0);
852 break;
853 case M32C_OPERAND_FLAGS16 :
854 print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_9_3, 0);
855 break;
856 case M32C_OPERAND_FLAGS32 :
857 print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_13_3, 0);
858 break;
859 case M32C_OPERAND_SCCOND32 :
860 print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond16, 0);
861 break;
862 case M32C_OPERAND_SIZE :
863 print_size (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
864 break;
865
866 default :
867 /* xgettext:c-format */
868 fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
869 opindex);
870 abort ();
871 }
872}
873
874cgen_print_fn * const m32c_cgen_print_handlers[] =
875{
876 print_insn_normal,
877};
878
879
880void
881m32c_cgen_init_dis (cd)
882 CGEN_CPU_DESC cd;
883{
884 m32c_cgen_init_opcode_table (cd);
885 m32c_cgen_init_ibld_table (cd);
886 cd->print_handlers = & m32c_cgen_print_handlers[0];
887 cd->print_operand = m32c_cgen_print_operand;
888}
889
890\f
891/* Default print handler. */
892
893static void
894print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
895 void *dis_info,
896 long value,
897 unsigned int attrs,
898 bfd_vma pc ATTRIBUTE_UNUSED,
899 int length ATTRIBUTE_UNUSED)
900{
901 disassemble_info *info = (disassemble_info *) dis_info;
902
903#ifdef CGEN_PRINT_NORMAL
904 CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
905#endif
906
907 /* Print the operand as directed by the attributes. */
908 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
909 ; /* nothing to do */
910 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
911 (*info->fprintf_func) (info->stream, "%ld", value);
912 else
913 (*info->fprintf_func) (info->stream, "0x%lx", value);
914}
915
916/* Default address handler. */
917
918static void
919print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
920 void *dis_info,
921 bfd_vma value,
922 unsigned int attrs,
923 bfd_vma pc ATTRIBUTE_UNUSED,
924 int length ATTRIBUTE_UNUSED)
925{
926 disassemble_info *info = (disassemble_info *) dis_info;
927
928#ifdef CGEN_PRINT_ADDRESS
929 CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
930#endif
931
932 /* Print the operand as directed by the attributes. */
933 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
934 ; /* nothing to do */
935 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
936 (*info->print_address_func) (value, info);
937 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
938 (*info->print_address_func) (value, info);
939 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
940 (*info->fprintf_func) (info->stream, "%ld", (long) value);
941 else
942 (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
943}
944
945/* Keyword print handler. */
946
947static void
948print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
949 void *dis_info,
950 CGEN_KEYWORD *keyword_table,
951 long value,
952 unsigned int attrs ATTRIBUTE_UNUSED)
953{
954 disassemble_info *info = (disassemble_info *) dis_info;
955 const CGEN_KEYWORD_ENTRY *ke;
956
957 ke = cgen_keyword_lookup_value (keyword_table, value);
958 if (ke != NULL)
959 (*info->fprintf_func) (info->stream, "%s", ke->name);
960 else
961 (*info->fprintf_func) (info->stream, "???");
962}
963\f
964/* Default insn printer.
965
966 DIS_INFO is defined as `void *' so the disassembler needn't know anything
967 about disassemble_info. */
968
969static void
970print_insn_normal (CGEN_CPU_DESC cd,
971 void *dis_info,
972 const CGEN_INSN *insn,
973 CGEN_FIELDS *fields,
974 bfd_vma pc,
975 int length)
976{
977 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
978 disassemble_info *info = (disassemble_info *) dis_info;
979 const CGEN_SYNTAX_CHAR_TYPE *syn;
980
981 CGEN_INIT_PRINT (cd);
982
983 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
984 {
985 if (CGEN_SYNTAX_MNEMONIC_P (*syn))
986 {
987 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
988 continue;
989 }
990 if (CGEN_SYNTAX_CHAR_P (*syn))
991 {
992 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
993 continue;
994 }
995
996 /* We have an operand. */
997 m32c_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
998 fields, CGEN_INSN_ATTRS (insn), pc, length);
999 }
1000}
1001\f
1002/* Subroutine of print_insn. Reads an insn into the given buffers and updates
1003 the extract info.
1004 Returns 0 if all is well, non-zero otherwise. */
1005
1006static int
1007read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1008 bfd_vma pc,
1009 disassemble_info *info,
1010 bfd_byte *buf,
1011 int buflen,
1012 CGEN_EXTRACT_INFO *ex_info,
1013 unsigned long *insn_value)
1014{
1015 int status = (*info->read_memory_func) (pc, buf, buflen, info);
1016 if (status != 0)
1017 {
1018 (*info->memory_error_func) (status, pc, info);
1019 return -1;
1020 }
1021
1022 ex_info->dis_info = info;
1023 ex_info->valid = (1 << buflen) - 1;
1024 ex_info->insn_bytes = buf;
1025
1026 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
1027 return 0;
1028}
1029
1030/* Utility to print an insn.
1031 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
1032 The result is the size of the insn in bytes or zero for an unknown insn
1033 or -1 if an error occurs fetching data (memory_error_func will have
1034 been called). */
1035
1036static int
1037print_insn (CGEN_CPU_DESC cd,
1038 bfd_vma pc,
1039 disassemble_info *info,
1040 bfd_byte *buf,
1041 unsigned int buflen)
1042{
1043 CGEN_INSN_INT insn_value;
1044 const CGEN_INSN_LIST *insn_list;
1045 CGEN_EXTRACT_INFO ex_info;
1046 int basesize;
1047
1048 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
1049 basesize = cd->base_insn_bitsize < buflen * 8 ?
1050 cd->base_insn_bitsize : buflen * 8;
1051 insn_value = cgen_get_insn_value (cd, buf, basesize);
1052
1053
1054 /* Fill in ex_info fields like read_insn would. Don't actually call
1055 read_insn, since the incoming buffer is already read (and possibly
1056 modified a la m32r). */
1057 ex_info.valid = (1 << buflen) - 1;
1058 ex_info.dis_info = info;
1059 ex_info.insn_bytes = buf;
1060
1061 /* The instructions are stored in hash lists.
1062 Pick the first one and keep trying until we find the right one. */
1063
1064 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
1065 while (insn_list != NULL)
1066 {
1067 const CGEN_INSN *insn = insn_list->insn;
1068 CGEN_FIELDS fields;
1069 int length;
1070 unsigned long insn_value_cropped;
1071
1072#ifdef CGEN_VALIDATE_INSN_SUPPORTED
1073 /* Not needed as insn shouldn't be in hash lists if not supported. */
1074 /* Supported by this cpu? */
1075 if (! m32c_cgen_insn_supported (cd, insn))
1076 {
1077 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
1078 continue;
1079 }
1080#endif
1081
1082 /* Basic bit mask must be correct. */
1083 /* ??? May wish to allow target to defer this check until the extract
1084 handler. */
1085
1086 /* Base size may exceed this instruction's size. Extract the
1087 relevant part from the buffer. */
1088 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
1089 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
1090 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
1091 info->endian == BFD_ENDIAN_BIG);
1092 else
1093 insn_value_cropped = insn_value;
1094
1095 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
1096 == CGEN_INSN_BASE_VALUE (insn))
1097 {
1098 /* Printing is handled in two passes. The first pass parses the
1099 machine insn and extracts the fields. The second pass prints
1100 them. */
1101
1102 /* Make sure the entire insn is loaded into insn_value, if it
1103 can fit. */
1104 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
1105 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
1106 {
1107 unsigned long full_insn_value;
1108 int rc = read_insn (cd, pc, info, buf,
1109 CGEN_INSN_BITSIZE (insn) / 8,
1110 & ex_info, & full_insn_value);
1111 if (rc != 0)
1112 return rc;
1113 length = CGEN_EXTRACT_FN (cd, insn)
1114 (cd, insn, &ex_info, full_insn_value, &fields, pc);
1115 }
1116 else
1117 length = CGEN_EXTRACT_FN (cd, insn)
1118 (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
1119
1120 /* length < 0 -> error */
1121 if (length < 0)
1122 return length;
1123 if (length > 0)
1124 {
1125 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
1126 /* length is in bits, result is in bytes */
1127 return length / 8;
1128 }
1129 }
1130
1131 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
1132 }
1133
1134 return 0;
1135}
1136
1137/* Default value for CGEN_PRINT_INSN.
1138 The result is the size of the insn in bytes or zero for an unknown insn
1139 or -1 if an error occured fetching bytes. */
1140
1141#ifndef CGEN_PRINT_INSN
1142#define CGEN_PRINT_INSN default_print_insn
1143#endif
1144
1145static int
1146default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
1147{
1148 bfd_byte buf[CGEN_MAX_INSN_SIZE];
1149 int buflen;
1150 int status;
1151
1152 /* Attempt to read the base part of the insn. */
1153 buflen = cd->base_insn_bitsize / 8;
1154 status = (*info->read_memory_func) (pc, buf, buflen, info);
1155
1156 /* Try again with the minimum part, if min < base. */
1157 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
1158 {
1159 buflen = cd->min_insn_bitsize / 8;
1160 status = (*info->read_memory_func) (pc, buf, buflen, info);
1161 }
1162
1163 if (status != 0)
1164 {
1165 (*info->memory_error_func) (status, pc, info);
1166 return -1;
1167 }
1168
1169 return print_insn (cd, pc, info, buf, buflen);
1170}
1171
1172/* Main entry point.
1173 Print one instruction from PC on INFO->STREAM.
1174 Return the size of the instruction (in bytes). */
1175
1176typedef struct cpu_desc_list {
1177 struct cpu_desc_list *next;
1178 int isa;
1179 int mach;
1180 int endian;
1181 CGEN_CPU_DESC cd;
1182} cpu_desc_list;
1183
1184int
1185print_insn_m32c (bfd_vma pc, disassemble_info *info)
1186{
1187 static cpu_desc_list *cd_list = 0;
1188 cpu_desc_list *cl = 0;
1189 static CGEN_CPU_DESC cd = 0;
1190 static int prev_isa;
1191 static int prev_mach;
1192 static int prev_endian;
1193 int length;
1194 int isa,mach;
1195 int endian = (info->endian == BFD_ENDIAN_BIG
1196 ? CGEN_ENDIAN_BIG
1197 : CGEN_ENDIAN_LITTLE);
1198 enum bfd_architecture arch;
1199
1200 /* ??? gdb will set mach but leave the architecture as "unknown" */
1201#ifndef CGEN_BFD_ARCH
1202#define CGEN_BFD_ARCH bfd_arch_m32c
1203#endif
1204 arch = info->arch;
1205 if (arch == bfd_arch_unknown)
1206 arch = CGEN_BFD_ARCH;
1207
1208 /* There's no standard way to compute the machine or isa number
1209 so we leave it to the target. */
1210#ifdef CGEN_COMPUTE_MACH
1211 mach = CGEN_COMPUTE_MACH (info);
1212#else
1213 mach = info->mach;
1214#endif
1215
1216#ifdef CGEN_COMPUTE_ISA
1217 isa = CGEN_COMPUTE_ISA (info);
1218#else
1219 isa = info->insn_sets;
1220#endif
1221
1222 /* If we've switched cpu's, try to find a handle we've used before */
1223 if (cd
1224 && (isa != prev_isa
1225 || mach != prev_mach
1226 || endian != prev_endian))
1227 {
1228 cd = 0;
1229 for (cl = cd_list; cl; cl = cl->next)
1230 {
1231 if (cl->isa == isa &&
1232 cl->mach == mach &&
1233 cl->endian == endian)
1234 {
1235 cd = cl->cd;
1236 break;
1237 }
1238 }
1239 }
1240
1241 /* If we haven't initialized yet, initialize the opcode table. */
1242 if (! cd)
1243 {
1244 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
1245 const char *mach_name;
1246
1247 if (!arch_type)
1248 abort ();
1249 mach_name = arch_type->printable_name;
1250
1251 prev_isa = isa;
1252 prev_mach = mach;
1253 prev_endian = endian;
1254 cd = m32c_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
1255 CGEN_CPU_OPEN_BFDMACH, mach_name,
1256 CGEN_CPU_OPEN_ENDIAN, prev_endian,
1257 CGEN_CPU_OPEN_END);
1258 if (!cd)
1259 abort ();
1260
1261 /* save this away for future reference */
1262 cl = xmalloc (sizeof (struct cpu_desc_list));
1263 cl->cd = cd;
1264 cl->isa = isa;
1265 cl->mach = mach;
1266 cl->endian = endian;
1267 cl->next = cd_list;
1268 cd_list = cl;
1269
1270 m32c_cgen_init_dis (cd);
1271 }
1272
1273 /* We try to have as much common code as possible.
1274 But at this point some targets need to take over. */
1275 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
1276 but if not possible try to move this hook elsewhere rather than
1277 have two hooks. */
1278 length = CGEN_PRINT_INSN (cd, pc, info);
1279 if (length > 0)
1280 return length;
1281 if (length < 0)
1282 return -1;
1283
1284 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
1285 return cd->default_insn_bitsize / 8;
1286}
GDB Binutils - Deliverables
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