* m32r.opc (parse_slo16): Fix bad application of previous patch.
[deliverable/binutils-gdb.git] / opcodes / m32r-asm.c
CommitLineData
252b5132
RH
1/* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
47b0e7ad
NC
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
252b5132 6
47b0e7ad
NC
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
252b5132 9
47b0e7ad 10 This file is part of the GNU Binutils and GDB, the GNU debugger.
252b5132 11
47b0e7ad
NC
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
252b5132 16
47b0e7ad
NC
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
252b5132 21
47b0e7ad
NC
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132
RH
25
26/* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29#include "sysdep.h"
252b5132
RH
30#include <stdio.h>
31#include "ansidecl.h"
32#include "bfd.h"
33#include "symcat.h"
34#include "m32r-desc.h"
35#include "m32r-opc.h"
36#include "opintl.h"
fc7bc883 37#include "xregex.h"
fc05c67f 38#include "libiberty.h"
37111cc7 39#include "safe-ctype.h"
252b5132 40
37111cc7 41#undef min
252b5132 42#define min(a,b) ((a) < (b) ? (a) : (b))
37111cc7 43#undef max
252b5132
RH
44#define max(a,b) ((a) > (b) ? (a) : (b))
45
0e2ee3ca 46static const char * parse_insn_normal
ffead7ae 47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
252b5132 48\f
37111cc7 49/* -- assembler routines inserted here. */
252b5132
RH
50
51/* -- asm.c */
47b0e7ad 52static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
252b5132
RH
53
54/* Handle '#' prefixes (i.e. skip over them). */
55
56static const char *
47b0e7ad
NC
57parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
58 const char **strp,
59 int opindex ATTRIBUTE_UNUSED,
60 long *valuep ATTRIBUTE_UNUSED)
252b5132
RH
61{
62 if (**strp == '#')
63 ++*strp;
64 return NULL;
65}
66
67/* Handle shigh(), high(). */
68
69static const char *
47b0e7ad
NC
70parse_hi16 (CGEN_CPU_DESC cd,
71 const char **strp,
72 int opindex,
73 unsigned long *valuep)
252b5132
RH
74{
75 const char *errmsg;
76 enum cgen_parse_operand_result result_type;
77 bfd_vma value;
78
79 if (**strp == '#')
80 ++*strp;
81
82 if (strncasecmp (*strp, "high(", 5) == 0)
83 {
84 *strp += 5;
85 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
47b0e7ad 86 & result_type, & value);
252b5132 87 if (**strp != ')')
47b0e7ad 88 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
89 ++*strp;
90 if (errmsg == NULL
91 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
92 value >>= 16;
93 *valuep = value;
94 return errmsg;
95 }
96 else if (strncasecmp (*strp, "shigh(", 6) == 0)
97 {
98 *strp += 6;
99 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
47b0e7ad 100 & result_type, & value);
252b5132 101 if (**strp != ')')
47b0e7ad 102 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
103 ++*strp;
104 if (errmsg == NULL
105 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
f4453dfa
NC
106 {
107 value = value + (value & 0x8000 ? 0x10000 : 0);
108 value >>= 16;
109 }
252b5132
RH
110 *valuep = value;
111 return errmsg;
112 }
113
114 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
115}
116
117/* Handle low() in a signed context. Also handle sda().
118 The signedness of the value doesn't matter to low(), but this also
119 handles the case where low() isn't present. */
120
121static const char *
d125c27b
AM
122parse_slo16 (CGEN_CPU_DESC cd,
123 const char ** strp,
124 int opindex,
125 long * valuep)
252b5132
RH
126{
127 const char *errmsg;
128 enum cgen_parse_operand_result result_type;
129 bfd_vma value;
130
131 if (**strp == '#')
132 ++*strp;
133
134 if (strncasecmp (*strp, "low(", 4) == 0)
135 {
136 *strp += 4;
137 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
47b0e7ad 138 & result_type, & value);
252b5132 139 if (**strp != ')')
47b0e7ad 140 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
141 ++*strp;
142 if (errmsg == NULL
143 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
e74eb924 144 value = ((value & 0xffff) ^ 0x8000) - 0x8000;
252b5132
RH
145 *valuep = value;
146 return errmsg;
147 }
148
149 if (strncasecmp (*strp, "sda(", 4) == 0)
150 {
151 *strp += 4;
152 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
47b0e7ad 153 NULL, & value);
252b5132 154 if (**strp != ')')
47b0e7ad 155 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
156 ++*strp;
157 *valuep = value;
158 return errmsg;
159 }
160
161 return cgen_parse_signed_integer (cd, strp, opindex, valuep);
162}
163
164/* Handle low() in an unsigned context.
165 The signedness of the value doesn't matter to low(), but this also
166 handles the case where low() isn't present. */
167
168static const char *
47b0e7ad
NC
169parse_ulo16 (CGEN_CPU_DESC cd,
170 const char **strp,
171 int opindex,
172 unsigned long *valuep)
252b5132
RH
173{
174 const char *errmsg;
175 enum cgen_parse_operand_result result_type;
176 bfd_vma value;
177
178 if (**strp == '#')
179 ++*strp;
180
181 if (strncasecmp (*strp, "low(", 4) == 0)
182 {
183 *strp += 4;
184 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
47b0e7ad 185 & result_type, & value);
252b5132 186 if (**strp != ')')
47b0e7ad 187 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
188 ++*strp;
189 if (errmsg == NULL
190 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
191 value &= 0xffff;
192 *valuep = value;
193 return errmsg;
194 }
195
196 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
197}
198
199/* -- */
200
0e2ee3ca 201const char * m32r_cgen_parse_operand
47b0e7ad 202 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
0e2ee3ca 203
252b5132
RH
204/* Main entry point for operand parsing.
205
206 This function is basically just a big switch statement. Earlier versions
207 used tables to look up the function to use, but
208 - if the table contains both assembler and disassembler functions then
209 the disassembler contains much of the assembler and vice-versa,
210 - there's a lot of inlining possibilities as things grow,
211 - using a switch statement avoids the function call overhead.
212
213 This function could be moved into `parse_insn_normal', but keeping it
214 separate makes clear the interface between `parse_insn_normal' and each of
9a2e995d 215 the handlers. */
252b5132
RH
216
217const char *
47b0e7ad
NC
218m32r_cgen_parse_operand (CGEN_CPU_DESC cd,
219 int opindex,
220 const char ** strp,
221 CGEN_FIELDS * fields)
252b5132 222{
eb1b03df
DE
223 const char * errmsg = NULL;
224 /* Used by scalar operands that still need to be parsed. */
0e2ee3ca 225 long junk ATTRIBUTE_UNUSED;
252b5132
RH
226
227 switch (opindex)
228 {
1fa60b5d
DE
229 case M32R_OPERAND_ACC :
230 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
231 break;
232 case M32R_OPERAND_ACCD :
233 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
234 break;
235 case M32R_OPERAND_ACCS :
236 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
237 break;
252b5132
RH
238 case M32R_OPERAND_DCR :
239 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
240 break;
241 case M32R_OPERAND_DISP16 :
242 {
9494d739 243 bfd_vma value = 0;
252b5132
RH
244 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
245 fields->f_disp16 = value;
246 }
247 break;
248 case M32R_OPERAND_DISP24 :
249 {
9494d739 250 bfd_vma value = 0;
252b5132
RH
251 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
252 fields->f_disp24 = value;
253 }
254 break;
255 case M32R_OPERAND_DISP8 :
256 {
9494d739 257 bfd_vma value = 0;
252b5132
RH
258 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
259 fields->f_disp8 = value;
260 }
261 break;
262 case M32R_OPERAND_DR :
263 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
264 break;
265 case M32R_OPERAND_HASH :
33b71eeb 266 errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, (long *) (& junk));
252b5132
RH
267 break;
268 case M32R_OPERAND_HI16 :
33b71eeb 269 errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, (unsigned long *) (& fields->f_hi16));
252b5132 270 break;
1fa60b5d 271 case M32R_OPERAND_IMM1 :
33b71eeb 272 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, (unsigned long *) (& fields->f_imm1));
1fa60b5d 273 break;
252b5132
RH
274 case M32R_OPERAND_SCR :
275 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
276 break;
277 case M32R_OPERAND_SIMM16 :
33b71eeb 278 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, (long *) (& fields->f_simm16));
252b5132
RH
279 break;
280 case M32R_OPERAND_SIMM8 :
33b71eeb 281 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, (long *) (& fields->f_simm8));
252b5132
RH
282 break;
283 case M32R_OPERAND_SLO16 :
33b71eeb 284 errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, (long *) (& fields->f_simm16));
252b5132
RH
285 break;
286 case M32R_OPERAND_SR :
287 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
288 break;
289 case M32R_OPERAND_SRC1 :
290 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
291 break;
292 case M32R_OPERAND_SRC2 :
293 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
294 break;
295 case M32R_OPERAND_UIMM16 :
33b71eeb 296 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, (unsigned long *) (& fields->f_uimm16));
252b5132
RH
297 break;
298 case M32R_OPERAND_UIMM24 :
299 {
9494d739 300 bfd_vma value = 0;
252b5132
RH
301 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
302 fields->f_uimm24 = value;
303 }
304 break;
88845958 305 case M32R_OPERAND_UIMM3 :
33b71eeb 306 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, (unsigned long *) (& fields->f_uimm3));
88845958 307 break;
252b5132 308 case M32R_OPERAND_UIMM4 :
33b71eeb 309 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, (unsigned long *) (& fields->f_uimm4));
252b5132
RH
310 break;
311 case M32R_OPERAND_UIMM5 :
33b71eeb 312 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, (unsigned long *) (& fields->f_uimm5));
252b5132 313 break;
88845958 314 case M32R_OPERAND_UIMM8 :
33b71eeb 315 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, (unsigned long *) (& fields->f_uimm8));
88845958 316 break;
252b5132 317 case M32R_OPERAND_ULO16 :
33b71eeb 318 errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, (unsigned long *) (& fields->f_uimm16));
252b5132
RH
319 break;
320
321 default :
322 /* xgettext:c-format */
323 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
324 abort ();
325 }
326
327 return errmsg;
328}
329
330cgen_parse_fn * const m32r_cgen_parse_handlers[] =
331{
332 parse_insn_normal,
333};
334
335void
47b0e7ad 336m32r_cgen_init_asm (CGEN_CPU_DESC cd)
252b5132
RH
337{
338 m32r_cgen_init_opcode_table (cd);
339 m32r_cgen_init_ibld_table (cd);
340 cd->parse_handlers = & m32r_cgen_parse_handlers[0];
341 cd->parse_operand = m32r_cgen_parse_operand;
342}
343
fc7bc883
RH
344\f
345
37111cc7 346/* Regex construction routine.
fc7bc883 347
37111cc7
NC
348 This translates an opcode syntax string into a regex string,
349 by replacing any non-character syntax element (such as an
350 opcode) with the pattern '.*'
fc7bc883 351
37111cc7
NC
352 It then compiles the regex and stores it in the opcode, for
353 later use by m32r_cgen_assemble_insn
fc7bc883 354
37111cc7 355 Returns NULL for success, an error message for failure. */
fc7bc883
RH
356
357char *
ffead7ae 358m32r_cgen_build_insn_regex (CGEN_INSN *insn)
fc7bc883 359{
fc05c67f 360 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
fc7bc883 361 const char *mnem = CGEN_INSN_MNEMONIC (insn);
fc7bc883
RH
362 char rxbuf[CGEN_MAX_RX_ELEMENTS];
363 char *rx = rxbuf;
364 const CGEN_SYNTAX_CHAR_TYPE *syn;
365 int reg_err;
366
367 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
368
f3a55c17
NC
369 /* Mnemonics come first in the syntax string. */
370 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
371 return _("missing mnemonic in syntax string");
fc7bc883
RH
372 ++syn;
373
f3a55c17
NC
374 /* Generate a case sensitive regular expression that emulates case
375 insensitive matching in the "C" locale. We cannot generate a case
376 insensitive regular expression because in Turkish locales, 'i' and 'I'
377 are not equal modulo case conversion. */
fc7bc883 378
f3a55c17
NC
379 /* Copy the literal mnemonic out of the insn. */
380 for (; *mnem; mnem++)
381 {
382 char c = *mnem;
383
384 if (ISALPHA (c))
385 {
386 *rx++ = '[';
387 *rx++ = TOLOWER (c);
388 *rx++ = TOUPPER (c);
389 *rx++ = ']';
390 }
391 else
392 *rx++ = c;
393 }
394
395 /* Copy any remaining literals from the syntax string into the rx. */
396 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
fc7bc883
RH
397 {
398 if (CGEN_SYNTAX_CHAR_P (* syn))
399 {
f3a55c17
NC
400 char c = CGEN_SYNTAX_CHAR (* syn);
401
402 switch (c)
403 {
404 /* Escape any regex metacharacters in the syntax. */
405 case '.': case '[': case '\\':
406 case '*': case '^': case '$':
fc7bc883
RH
407
408#ifdef CGEN_ESCAPE_EXTENDED_REGEX
f3a55c17
NC
409 case '?': case '{': case '}':
410 case '(': case ')': case '*':
411 case '|': case '+': case ']':
fc7bc883 412#endif
f3a55c17
NC
413 *rx++ = '\\';
414 *rx++ = c;
415 break;
416
417 default:
418 if (ISALPHA (c))
419 {
420 *rx++ = '[';
421 *rx++ = TOLOWER (c);
422 *rx++ = TOUPPER (c);
423 *rx++ = ']';
424 }
425 else
426 *rx++ = c;
427 break;
428 }
fc7bc883
RH
429 }
430 else
431 {
f3a55c17
NC
432 /* Replace non-syntax fields with globs. */
433 *rx++ = '.';
434 *rx++ = '*';
fc7bc883
RH
435 }
436 }
437
f3a55c17 438 /* Trailing whitespace ok. */
fc7bc883
RH
439 * rx++ = '[';
440 * rx++ = ' ';
441 * rx++ = '\t';
442 * rx++ = ']';
443 * rx++ = '*';
444
f3a55c17 445 /* But anchor it after that. */
fc7bc883
RH
446 * rx++ = '$';
447 * rx = '\0';
448
449 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
f3a55c17 450 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
fc7bc883
RH
451
452 if (reg_err == 0)
453 return NULL;
454 else
455 {
456 static char msg[80];
f3a55c17 457
fc7bc883
RH
458 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
459 regfree ((regex_t *) CGEN_INSN_RX (insn));
460 free (CGEN_INSN_RX (insn));
461 (CGEN_INSN_RX (insn)) = NULL;
37111cc7 462 return msg;
fc7bc883
RH
463 }
464}
465
252b5132
RH
466\f
467/* Default insn parser.
468
469 The syntax string is scanned and operands are parsed and stored in FIELDS.
470 Relocs are queued as we go via other callbacks.
471
472 ??? Note that this is currently an all-or-nothing parser. If we fail to
473 parse the instruction, we return 0 and the caller will start over from
474 the beginning. Backtracking will be necessary in parsing subexpressions,
475 but that can be handled there. Not handling backtracking here may get
476 expensive in the case of the m68k. Deal with later.
477
f3a55c17 478 Returns NULL for success, an error message for failure. */
252b5132
RH
479
480static const char *
ffead7ae
MM
481parse_insn_normal (CGEN_CPU_DESC cd,
482 const CGEN_INSN *insn,
483 const char **strp,
484 CGEN_FIELDS *fields)
252b5132
RH
485{
486 /* ??? Runtime added insns not handled yet. */
487 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
488 const char *str = *strp;
489 const char *errmsg;
490 const char *p;
b3466c39 491 const CGEN_SYNTAX_CHAR_TYPE * syn;
252b5132
RH
492#ifdef CGEN_MNEMONIC_OPERANDS
493 /* FIXME: wip */
494 int past_opcode_p;
495#endif
496
497 /* For now we assume the mnemonic is first (there are no leading operands).
498 We can parse it without needing to set up operand parsing.
499 GAS's input scrubber will ensure mnemonics are lowercase, but we may
500 not be called from GAS. */
501 p = CGEN_INSN_MNEMONIC (insn);
37111cc7 502 while (*p && TOLOWER (*p) == TOLOWER (*str))
252b5132 503 ++p, ++str;
1fa60b5d
DE
504
505 if (* p)
506 return _("unrecognized instruction");
507
508#ifndef CGEN_MNEMONIC_OPERANDS
37111cc7 509 if (* str && ! ISSPACE (* str))
252b5132 510 return _("unrecognized instruction");
1fa60b5d 511#endif
252b5132
RH
512
513 CGEN_INIT_PARSE (cd);
514 cgen_init_parse_operand (cd);
515#ifdef CGEN_MNEMONIC_OPERANDS
516 past_opcode_p = 0;
517#endif
518
519 /* We don't check for (*str != '\0') here because we want to parse
520 any trailing fake arguments in the syntax string. */
521 syn = CGEN_SYNTAX_STRING (syntax);
522
523 /* Mnemonics come first for now, ensure valid string. */
524 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
525 abort ();
526
527 ++syn;
528
529 while (* syn != 0)
530 {
531 /* Non operand chars must match exactly. */
532 if (CGEN_SYNTAX_CHAR_P (* syn))
533 {
1fa60b5d
DE
534 /* FIXME: While we allow for non-GAS callers above, we assume the
535 first char after the mnemonic part is a space. */
536 /* FIXME: We also take inappropriate advantage of the fact that
537 GAS's input scrubber will remove extraneous blanks. */
37111cc7 538 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
252b5132
RH
539 {
540#ifdef CGEN_MNEMONIC_OPERANDS
b3466c39 541 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
252b5132
RH
542 past_opcode_p = 1;
543#endif
544 ++ syn;
545 ++ str;
546 }
b3466c39 547 else if (*str)
252b5132
RH
548 {
549 /* Syntax char didn't match. Can't be this insn. */
6bb95a0f 550 static char msg [80];
f3a55c17 551
6bb95a0f
DB
552 /* xgettext:c-format */
553 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
b3466c39
DB
554 CGEN_SYNTAX_CHAR(*syn), *str);
555 return msg;
556 }
557 else
558 {
559 /* Ran out of input. */
560 static char msg [80];
f3a55c17 561
b3466c39
DB
562 /* xgettext:c-format */
563 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
564 CGEN_SYNTAX_CHAR(*syn));
6bb95a0f 565 return msg;
252b5132
RH
566 }
567 continue;
568 }
569
570 /* We have an operand of some sort. */
a978a3e5 571 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
252b5132
RH
572 &str, fields);
573 if (errmsg)
574 return errmsg;
575
576 /* Done with this operand, continue with next one. */
577 ++ syn;
578 }
579
580 /* If we're at the end of the syntax string, we're done. */
b3466c39 581 if (* syn == 0)
252b5132
RH
582 {
583 /* FIXME: For the moment we assume a valid `str' can only contain
584 blanks now. IE: We needn't try again with a longer version of
585 the insn and it is assumed that longer versions of insns appear
586 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
37111cc7 587 while (ISSPACE (* str))
252b5132
RH
588 ++ str;
589
590 if (* str != '\0')
591 return _("junk at end of line"); /* FIXME: would like to include `str' */
592
593 return NULL;
594 }
595
596 /* We couldn't parse it. */
597 return _("unrecognized instruction");
598}
599\f
600/* Main entry point.
601 This routine is called for each instruction to be assembled.
602 STR points to the insn to be assembled.
603 We assume all necessary tables have been initialized.
604 The assembled instruction, less any fixups, is stored in BUF.
605 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
606 still needs to be converted to target byte order, otherwise BUF is an array
607 of bytes in target byte order.
608 The result is a pointer to the insn's entry in the opcode table,
609 or NULL if an error occured (an error message will have already been
610 printed).
611
612 Note that when processing (non-alias) macro-insns,
613 this function recurses.
614
615 ??? It's possible to make this cpu-independent.
616 One would have to deal with a few minor things.
617 At this point in time doing so would be more of a curiosity than useful
618 [for example this file isn't _that_ big], but keeping the possibility in
619 mind helps keep the design clean. */
620
621const CGEN_INSN *
ffead7ae
MM
622m32r_cgen_assemble_insn (CGEN_CPU_DESC cd,
623 const char *str,
624 CGEN_FIELDS *fields,
625 CGEN_INSN_BYTES_PTR buf,
626 char **errmsg)
252b5132
RH
627{
628 const char *start;
629 CGEN_INSN_LIST *ilist;
b3466c39
DB
630 const char *parse_errmsg = NULL;
631 const char *insert_errmsg = NULL;
fc7bc883 632 int recognized_mnemonic = 0;
252b5132
RH
633
634 /* Skip leading white space. */
37111cc7 635 while (ISSPACE (* str))
252b5132
RH
636 ++ str;
637
638 /* The instructions are stored in hashed lists.
639 Get the first in the list. */
640 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
641
642 /* Keep looking until we find a match. */
252b5132
RH
643 start = str;
644 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
645 {
646 const CGEN_INSN *insn = ilist->insn;
fc7bc883 647 recognized_mnemonic = 1;
252b5132 648
cfcdbe97 649#ifdef CGEN_VALIDATE_INSN_SUPPORTED
f3a55c17
NC
650 /* Not usually needed as unsupported opcodes
651 shouldn't be in the hash lists. */
252b5132
RH
652 /* Is this insn supported by the selected cpu? */
653 if (! m32r_cgen_insn_supported (cd, insn))
654 continue;
655#endif
b11dcf4e 656 /* If the RELAXED attribute is set, this is an insn that shouldn't be
252b5132
RH
657 chosen immediately. Instead, it is used during assembler/linker
658 relaxation if possible. */
b11dcf4e 659 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
252b5132
RH
660 continue;
661
662 str = start;
663
f3a55c17 664 /* Skip this insn if str doesn't look right lexically. */
fc7bc883
RH
665 if (CGEN_INSN_RX (insn) != NULL &&
666 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
667 continue;
668
252b5132
RH
669 /* Allow parse/insert handlers to obtain length of insn. */
670 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
671
b3466c39
DB
672 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
673 if (parse_errmsg != NULL)
6bb95a0f 674 continue;
252b5132 675
f3a55c17 676 /* ??? 0 is passed for `pc'. */
b3466c39
DB
677 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
678 (bfd_vma) 0);
679 if (insert_errmsg != NULL)
6bb95a0f
DB
680 continue;
681
682 /* It is up to the caller to actually output the insn and any
683 queued relocs. */
684 return insn;
252b5132
RH
685 }
686
252b5132 687 {
cfcdbe97 688 static char errbuf[150];
52646233 689#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
b3466c39 690 const char *tmp_errmsg;
cfcdbe97 691
b3466c39 692 /* If requesting verbose error messages, use insert_errmsg.
f3a55c17 693 Failing that, use parse_errmsg. */
b3466c39
DB
694 tmp_errmsg = (insert_errmsg ? insert_errmsg :
695 parse_errmsg ? parse_errmsg :
f3a55c17
NC
696 recognized_mnemonic ?
697 _("unrecognized form of instruction") :
b3466c39
DB
698 _("unrecognized instruction"));
699
cfcdbe97
AH
700 if (strlen (start) > 50)
701 /* xgettext:c-format */
702 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
703 else
704 /* xgettext:c-format */
705 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
706#else
252b5132
RH
707 if (strlen (start) > 50)
708 /* xgettext:c-format */
709 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
710 else
711 /* xgettext:c-format */
712 sprintf (errbuf, _("bad instruction `%.50s'"), start);
cfcdbe97 713#endif
252b5132
RH
714
715 *errmsg = errbuf;
716 return NULL;
717 }
718}
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