[deliverable/binutils-gdb.git] / opcodes / m68hc11-dis.c

/* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
   Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
   Written by Stephane Carrez (stcarrez@nerim.fr)

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#include <stdio.h>

#include "ansidecl.h"
#include "opcode/m68hc11.h"
#include "dis-asm.h"

#define PC_REGNUM 3

static const char *const reg_name[] = {
  "X", "Y", "SP", "PC"
};

static const char *const reg_src_table[] = {
  "A", "B", "CCR", "TMP3", "D", "X", "Y", "SP"
};

static const char *const reg_dst_table[] = {
  "A", "B", "CCR", "TMP2", "D", "X", "Y", "SP"
};

#define OP_PAGE_MASK (M6811_OP_PAGE2|M6811_OP_PAGE3|M6811_OP_PAGE4)

/* Prototypes for local functions.  */
static int read_memory
  PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
static int print_indexed_operand
  PARAMS ((bfd_vma, struct disassemble_info *, int*, int, int, bfd_vma));
static int print_insn
  PARAMS ((bfd_vma, struct disassemble_info *, int));

static int
read_memory (memaddr, buffer, size, info)
     bfd_vma memaddr;
     bfd_byte *buffer;
     int size;
     struct disassemble_info *info;
{
  int status;

  /* Get first byte.  Only one at a time because we don't know the
     size of the insn.  */
  status = (*info->read_memory_func) (memaddr, buffer, size, info);
  if (status != 0)
    {
      (*info->memory_error_func) (status, memaddr, info);
      return -1;
    }
  return 0;
}


/* Read the 68HC12 indexed operand byte and print the corresponding mode.
   Returns the number of bytes read or -1 if failure.  */
static int
print_indexed_operand (memaddr, info, indirect, mov_insn, pc_offset, endaddr)
     bfd_vma memaddr;
     struct disassemble_info *info;
     int *indirect;
     int mov_insn;
     int pc_offset;
     bfd_vma endaddr;
{
  bfd_byte buffer[4];
  int reg;
  int status;
  short sval;
  int pos = 1;

  if (indirect)
    *indirect = 0;

  status = read_memory (memaddr, &buffer[0], 1, info);
  if (status != 0)
    {
      return status;
    }

  /* n,r with 5-bits signed constant.  */
  if ((buffer[0] & 0x20) == 0)
    {
      reg = (buffer[0] >> 6) & 3;
      sval = (buffer[0] & 0x1f);
      if (sval & 0x10)
	sval |= 0xfff0;
      /* 68HC12 requires an adjustment for movb/movw pc relative modes.  */
      if (reg == PC_REGNUM && info->mach == bfd_mach_m6812 && mov_insn)
        sval += pc_offset;
      (*info->fprintf_func) (info->stream, "%d,%s",
			     (int) sval, reg_name[reg]);

      if (reg == PC_REGNUM)
        {
          (* info->fprintf_func) (info->stream, " {");
          (* info->print_address_func) (endaddr + sval, info);
          (* info->fprintf_func) (info->stream, "}");
        }
    }

  /* Auto pre/post increment/decrement.  */
  else if ((buffer[0] & 0xc0) != 0xc0)
    {
      const char *mode;

      reg = (buffer[0] >> 6) & 3;
      sval = (buffer[0] & 0x0f);
      if (sval & 0x8)
	{
	  sval |= 0xfff0;
	  sval = -sval;
	  mode = "-";
	}
      else
	{
	  sval = sval + 1;
	  mode = "+";
	}
      (*info->fprintf_func) (info->stream, "%d,%s%s%s",
			     (int) sval,
			     (buffer[0] & 0x10 ? "" : mode),
			     reg_name[reg], (buffer[0] & 0x10 ? mode : ""));
    }

  /* [n,r] 16-bits offset indexed indirect.  */
  else if ((buffer[0] & 0x07) == 3)
    {
      if (mov_insn)
	{
	  (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
				 buffer[0] & 0x0ff);
	  return 0;
	}
      reg = (buffer[0] >> 3) & 0x03;
      status = read_memory (memaddr + pos, &buffer[0], 2, info);
      if (status != 0)
	{
	  return status;
	}

      pos += 2;
      sval = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
      (*info->fprintf_func) (info->stream, "[%u,%s]",
			     sval & 0x0ffff, reg_name[reg]);
      if (indirect)
        *indirect = 1;
    }

  /* n,r with 9 and 16 bit signed constant.  */
  else if ((buffer[0] & 0x4) == 0)
    {
      if (mov_insn)
	{
	  (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
				 buffer[0] & 0x0ff);
	  return 0;
	}
      reg = (buffer[0] >> 3) & 0x03;
      status = read_memory (memaddr + pos,
			    &buffer[1], (buffer[0] & 0x2 ? 2 : 1), info);
      if (status != 0)
	{
	  return status;
	}
      if (buffer[0] & 2)
	{
	  sval = ((buffer[1] << 8) | (buffer[2] & 0x0FF));
	  sval &= 0x0FFFF;
	  pos += 2;
	}
      else
	{
	  sval = buffer[1] & 0x00ff;
	  if (buffer[0] & 0x01)
	    sval |= 0xff00;
	  pos++;
	}
      (*info->fprintf_func) (info->stream, "%d,%s",
			     (int) sval, reg_name[reg]);
      if (reg == PC_REGNUM)
        {
          (* info->fprintf_func) (info->stream, " {");
          (* info->print_address_func) (endaddr + sval, info);
          (* info->fprintf_func) (info->stream, "}");
        }
    }
  else
    {
      reg = (buffer[0] >> 3) & 0x03;
      switch (buffer[0] & 3)
	{
	case 0:
	  (*info->fprintf_func) (info->stream, "A,%s", reg_name[reg]);
	  break;
	case 1:
	  (*info->fprintf_func) (info->stream, "B,%s", reg_name[reg]);
	  break;
	case 2:
	  (*info->fprintf_func) (info->stream, "D,%s", reg_name[reg]);
	  break;
	case 3:
	default:
	  (*info->fprintf_func) (info->stream, "[D,%s]", reg_name[reg]);
          if (indirect)
            *indirect = 1;
	  break;
	}
    }

  return pos;
}

/* Disassemble one instruction at address 'memaddr'.  Returns the number
   of bytes used by that instruction.  */
static int
print_insn (memaddr, info, arch)
     bfd_vma memaddr;
     struct disassemble_info *info;
     int arch;
{
  int status;
  bfd_byte buffer[4];
  unsigned char code;
  long format, pos, i;
  short sval;
  const struct m68hc11_opcode *opcode;

  /* Get first byte.  Only one at a time because we don't know the
     size of the insn.  */
  status = read_memory (memaddr, buffer, 1, info);
  if (status != 0)
    {
      return status;
    }

  format = 0;
  code = buffer[0];
  pos = 0;

  /* Look for page2,3,4 opcodes.  */
  if (code == M6811_OPCODE_PAGE2)
    {
      pos++;
      format = M6811_OP_PAGE2;
    }
  else if (code == M6811_OPCODE_PAGE3 && arch == cpu6811)
    {
      pos++;
      format = M6811_OP_PAGE3;
    }
  else if (code == M6811_OPCODE_PAGE4 && arch == cpu6811)
    {
      pos++;
      format = M6811_OP_PAGE4;
    }

  /* We are in page2,3,4; get the real opcode.  */
  if (pos == 1)
    {
      status = read_memory (memaddr + pos, &buffer[1], 1, info);
      if (status != 0)
	{
	  return status;
	}
      code = buffer[1];
    }


  /* Look first for a 68HC12 alias.  All of them are 2-bytes long and
     in page 1.  There is no operand to print.  We read the second byte
     only when we have a possible match.  */
  if ((arch & cpu6812) && format == 0)
    {
      int must_read = 1;

      /* Walk the alias table to find a code1+code2 match.  */
      for (i = 0; i < m68hc12_num_alias; i++)
	{
	  if (m68hc12_alias[i].code1 == code)
	    {
	      if (must_read)
		{
		  status = read_memory (memaddr + pos + 1,
					&buffer[1], 1, info);
		  if (status != 0)
		    break;

		  must_read = 1;
		}
	      if (m68hc12_alias[i].code2 == (unsigned char) buffer[1])
		{
		  (*info->fprintf_func) (info->stream, "%s",
					 m68hc12_alias[i].name);
		  return 2;
		}
	    }
	}
    }

  pos++;

  /* Scan the opcode table until we find the opcode
     with the corresponding page.  */
  opcode = m68hc11_opcodes;
  for (i = 0; i < m68hc11_num_opcodes; i++, opcode++)
    {
      int offset;
      int pc_src_offset;
      int pc_dst_offset;

      if ((opcode->arch & arch) == 0)
	continue;
      if (opcode->opcode != code)
	continue;
      if ((opcode->format & OP_PAGE_MASK) != format)
	continue;

      if (opcode->format & M6812_OP_REG)
	{
	  int j;
	  int is_jump;

	  if (opcode->format & M6811_OP_JUMP_REL)
	    is_jump = 1;
	  else
	    is_jump = 0;

	  status = read_memory (memaddr + pos, &buffer[0], 1, info);
	  if (status != 0)
	    {
	      return status;
	    }
	  for (j = 0; i + j < m68hc11_num_opcodes; j++)
	    {
	      if ((opcode[j].arch & arch) == 0)
		continue;
	      if (opcode[j].opcode != code)
		continue;
	      if (is_jump)
		{
		  if (!(opcode[j].format & M6811_OP_JUMP_REL))
		    continue;

		  if ((opcode[j].format & M6812_OP_IBCC_MARKER)
		      && (buffer[0] & 0xc0) != 0x80)
		    continue;
		  if ((opcode[j].format & M6812_OP_TBCC_MARKER)
		      && (buffer[0] & 0xc0) != 0x40)
		    continue;
		  if ((opcode[j].format & M6812_OP_DBCC_MARKER)
		      && (buffer[0] & 0xc0) != 0)
		    continue;
		  if ((opcode[j].format & M6812_OP_EQ_MARKER)
		      && (buffer[0] & 0x20) == 0)
		    break;
		  if (!(opcode[j].format & M6812_OP_EQ_MARKER)
		      && (buffer[0] & 0x20) != 0)
		    break;
		  continue;
		}
	      if (opcode[j].format & M6812_OP_EXG_MARKER && buffer[0] & 0x80)
		break;
	      if ((opcode[j].format & M6812_OP_SEX_MARKER)
		  && (((buffer[0] & 0x07) >= 3 && (buffer[0] & 7) <= 7))
		  && ((buffer[0] & 0x0f0) <= 0x20))
		break;
	      if (opcode[j].format & M6812_OP_TFR_MARKER
		  && !(buffer[0] & 0x80))
		break;
	    }
	  if (i + j < m68hc11_num_opcodes)
	    opcode = &opcode[j];
	}

      /* We have found the opcode.  Extract the operand and print it.  */
      (*info->fprintf_func) (info->stream, "%s", opcode->name);

      format = opcode->format;
      if (format & (M6811_OP_MASK | M6811_OP_BITMASK
		    | M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16))
	{
	  (*info->fprintf_func) (info->stream, "\t");
	}

      /* The movb and movw must be handled in a special way...
         The source constant 'ii' is not always at the same place.
         This is the same for the destination for the post-indexed byte.
         The 'offset' is used to do the appropriate correction.

                                   offset          offset
                              for constant     for destination
         movb   18 OB ii hh ll       0          0
                18 08 xb ii          1          -1
                18 0C hh ll hh ll    0          0
                18 09 xb hh ll       1          -1
                18 0D xb hh ll       0          0
                18 0A xb xb          0          0

         movw   18 03 jj kk hh ll    0          0
                18 00 xb jj kk       1          -1
                18 04 hh ll hh ll    0          0
                18 01 xb hh ll       1          -1
                18 05 xb hh ll       0          0
                18 02 xb xb          0          0

         After the source operand is read, the position 'pos' is incremented
         this explains the negative offset for destination.

         movb/movw above are the only instructions with this matching
         format.  */
      offset = ((format & M6812_OP_IDX_P2)
                && (format & (M6811_OP_IMM8 | M6811_OP_IMM16 |
                              M6811_OP_IND16)));

      /* Operand with one more byte: - immediate, offset,
         direct-low address.  */
      if (format &
	  (M6811_OP_IMM8 | M6811_OP_IX | M6811_OP_IY | M6811_OP_DIRECT))
	{
	  status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
	  if (status != 0)
	    {
	      return status;
	    }

	  pos++;

          /* This movb/movw is special (see above).  */
          offset = -offset;

          pc_dst_offset = 2;
	  if (format & M6811_OP_IMM8)
	    {
	      (*info->fprintf_func) (info->stream, "#%d", (int) buffer[0]);
	      format &= ~M6811_OP_IMM8;
              /* Set PC destination offset.  */
              pc_dst_offset = 1;
	    }
	  else if (format & M6811_OP_IX)
	    {
	      /* Offsets are in range 0..255, print them unsigned.  */
	      (*info->fprintf_func) (info->stream, "%u,x", buffer[0] & 0x0FF);
	      format &= ~M6811_OP_IX;
	    }
	  else if (format & M6811_OP_IY)
	    {
	      (*info->fprintf_func) (info->stream, "%u,y", buffer[0] & 0x0FF);
	      format &= ~M6811_OP_IY;
	    }
	  else if (format & M6811_OP_DIRECT)
	    {
	      (*info->fprintf_func) (info->stream, "*");
	      (*info->print_address_func) (buffer[0] & 0x0FF, info);
	      format &= ~M6811_OP_DIRECT;
	    }
	}

#define M6812_DST_MOVE  (M6812_OP_IND16_P2 | M6812_OP_IDX_P2)
#define M6812_INDEXED_FLAGS (M6812_OP_IDX|M6812_OP_IDX_1|M6812_OP_IDX_2)
      /* Analyze the 68HC12 indexed byte.  */
      if (format & M6812_INDEXED_FLAGS)
	{
          int indirect;
          bfd_vma endaddr;

          endaddr = memaddr + pos + 1;
          if (format & M6811_OP_IND16)
            endaddr += 2;
          pc_src_offset = -1;
          pc_dst_offset = 1;
	  status = print_indexed_operand (memaddr + pos, info, &indirect,
                                          (format & M6812_DST_MOVE),
                                          pc_src_offset, endaddr);
	  if (status < 0)
	    {
	      return status;
	    }
	  pos += status;

          /* The indirect addressing mode of the call instruction does
             not need the page code.  */
          if ((format & M6812_OP_PAGE) && indirect)
            format &= ~M6812_OP_PAGE;
	}

      /* 68HC12 dbcc/ibcc/tbcc operands.  */
      if ((format & M6812_OP_REG) && (format & M6811_OP_JUMP_REL))
	{
	  status = read_memory (memaddr + pos, &buffer[0], 2, info);
	  if (status != 0)
	    {
	      return status;
	    }
	  (*info->fprintf_func) (info->stream, "%s,",
				 reg_src_table[buffer[0] & 0x07]);
	  sval = buffer[1] & 0x0ff;
	  if (buffer[0] & 0x10)
	    sval |= 0xff00;

	  pos += 2;
	  (*info->print_address_func) (memaddr + pos + sval, info);
	  format &= ~(M6812_OP_REG | M6811_OP_JUMP_REL);
	}
      else if (format & (M6812_OP_REG | M6812_OP_REG_2))
	{
	  status = read_memory (memaddr + pos, &buffer[0], 1, info);
	  if (status != 0)
	    {
	      return status;
	    }

	  pos++;
	  (*info->fprintf_func) (info->stream, "%s,%s",
				 reg_src_table[(buffer[0] >> 4) & 7],
				 reg_dst_table[(buffer[0] & 7)]);
	}

      if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
	{
	  int val;
          bfd_vma addr;
          unsigned page = 0;

	  status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
	  if (status != 0)
	    {
	      return status;
	    }
	  if (format & M6812_OP_IDX_P2)
	    offset = -2;
	  else
	    offset = 0;
	  pos += 2;

	  val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
	  val &= 0x0FFFF;
          addr = val;
          pc_dst_offset = 2;
          if (format & M6812_OP_PAGE)
            {
              status = read_memory (memaddr + pos + offset, buffer, 1, info);
              if (status != 0)
                return status;

              page = (unsigned) buffer[0];
              if (addr >= M68HC12_BANK_BASE && addr < 0x0c000)
                addr = ((val - M68HC12_BANK_BASE)
                        | (page << M68HC12_BANK_SHIFT))
                   + M68HC12_BANK_VIRT;
            }
          else if ((arch & cpu6812)
                   && addr >= M68HC12_BANK_BASE && addr < 0x0c000)
             {
                int cur_page;
                bfd_vma vaddr;
                
                if (memaddr >= M68HC12_BANK_VIRT)
                   cur_page = ((memaddr - M68HC12_BANK_VIRT)
                               >> M68HC12_BANK_SHIFT);
                else
                   cur_page = 0;

                vaddr = ((addr - M68HC12_BANK_BASE)
                         + (cur_page << M68HC12_BANK_SHIFT))
                   + M68HC12_BANK_VIRT;
                if (!info->symbol_at_address_func (addr, info)
                    && info->symbol_at_address_func (vaddr, info))
                   addr = vaddr;
             }
	  if (format & M6811_OP_IMM16)
	    {
	      format &= ~M6811_OP_IMM16;
	      (*info->fprintf_func) (info->stream, "#");
	    }
	  else
	    format &= ~M6811_OP_IND16;

	  (*info->print_address_func) (addr, info);
          if (format & M6812_OP_PAGE)
            {
              (* info->fprintf_func) (info->stream, " {");
              (* info->print_address_func) (val, info);
              (* info->fprintf_func) (info->stream, ", %d}", page);
              format &= ~M6812_OP_PAGE;
              pos += 1;
            }
	}

      if (format & M6812_OP_IDX_P2)
	{
	  (*info->fprintf_func) (info->stream, ", ");
	  status = print_indexed_operand (memaddr + pos + offset, info,
                                          0, 1, pc_dst_offset,
                                          memaddr + pos + offset + 1);
	  if (status < 0)
	    return status;
	  pos += status;
	}

      if (format & M6812_OP_IND16_P2)
	{
	  int val;

	  (*info->fprintf_func) (info->stream, ", ");

	  status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
	  if (status != 0)
	    {
	      return status;
	    }
	  pos += 2;

	  val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
	  val &= 0x0FFFF;
	  (*info->print_address_func) (val, info);
	}

      /* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
         and in that order.  The brset/brclr insn have a bitmask and then
         a relative branch offset.  */
      if (format & M6811_OP_BITMASK)
	{
	  status = read_memory (memaddr + pos, &buffer[0], 1, info);
	  if (status != 0)
	    {
	      return status;
	    }
	  pos++;
	  (*info->fprintf_func) (info->stream, " #$%02x%s",
				 buffer[0] & 0x0FF,
				 (format & M6811_OP_JUMP_REL ? " " : ""));
	  format &= ~M6811_OP_BITMASK;
	}
      if (format & M6811_OP_JUMP_REL)
	{
	  int val;

	  status = read_memory (memaddr + pos, &buffer[0], 1, info);
	  if (status != 0)
	    {
	      return status;
	    }

	  pos++;
	  val = (buffer[0] & 0x80) ? buffer[0] | 0xFFFFFF00 : buffer[0];
	  (*info->print_address_func) (memaddr + pos + val, info);
	  format &= ~M6811_OP_JUMP_REL;
	}
      else if (format & M6812_OP_JUMP_REL16)
	{
	  int val;

	  status = read_memory (memaddr + pos, &buffer[0], 2, info);
	  if (status != 0)
	    {
	      return status;
	    }

	  pos += 2;
	  val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
	  if (val & 0x8000)
	    val |= 0xffff0000;

	  (*info->print_address_func) (memaddr + pos + val, info);
	  format &= ~M6812_OP_JUMP_REL16;
	}

      if (format & M6812_OP_PAGE)
	{
	  int val;

	  status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
	  if (status != 0)
	    {
	      return status;
	    }
	  pos += 1;

	  val = buffer[0] & 0x0ff;
	  (*info->fprintf_func) (info->stream, ", %d", val);
	}
      
#ifdef DEBUG
      /* Consistency check.  'format' must be 0, so that we have handled
         all formats; and the computed size of the insn must match the
         opcode table content.  */
      if (format & ~(M6811_OP_PAGE4 | M6811_OP_PAGE3 | M6811_OP_PAGE2))
	{
	  (*info->fprintf_func) (info->stream, "; Error, format: %x", format);
	}
      if (pos != opcode->size)
	{
	  (*info->fprintf_func) (info->stream, "; Error, size: %d expect %d",
				 pos, opcode->size);
	}
#endif
      return pos;
    }

  /* Opcode not recognized.  */
  if (format == M6811_OP_PAGE2 && arch & cpu6812
      && ((code >= 0x30 && code <= 0x39) || (code >= 0x40 && code <= 0xff)))
    (*info->fprintf_func) (info->stream, "trap\t#%d", code & 0x0ff);

  else if (format == M6811_OP_PAGE2)
    (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
			   M6811_OPCODE_PAGE2, code);
  else if (format == M6811_OP_PAGE3)
    (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
			   M6811_OPCODE_PAGE3, code);
  else if (format == M6811_OP_PAGE4)
    (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
			   M6811_OPCODE_PAGE4, code);
  else
    (*info->fprintf_func) (info->stream, ".byte\t0x%02x", code);

  return pos;
}

/* Disassemble one instruction at address 'memaddr'.  Returns the number
   of bytes used by that instruction.  */
int
print_insn_m68hc11 (memaddr, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  return print_insn (memaddr, info, cpu6811);
}

int
print_insn_m68hc12 (memaddr, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  return print_insn (memaddr, info, cpu6812);
}
Commit	Line	Data
60bcf0fa	1	/* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
f07534f6 SC	2	Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
f07534f6 SC	3	Written by Stephane Carrez (stcarrez@nerim.fr)
60bcf0fa NC	4
	5	This program is free software; you can redistribute it and/or modify
	6	it under the terms of the GNU General Public License as published by
	7	the Free Software Foundation; either version 2 of the License, or
	8	(at your option) any later version.
	9
	10	This program is distributed in the hope that it will be useful,
	11	but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	GNU General Public License for more details.
	14
	15	You should have received a copy of the GNU General Public License
	16	along with this program; if not, write to the Free Software
	17	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	18
	19	#include <stdio.h>
	20
	21	#include "ansidecl.h"
	22	#include "opcode/m68hc11.h"
	23	#include "dis-asm.h"
	24
2fd84db3 SC	25	#define PC_REGNUM 3
2fd84db3 SC	26
60bcf0fa NC	27	static const char *const reg_name[] = {
	28	"X", "Y", "SP", "PC"
	29	};
	30
	31	static const char *const reg_src_table[] = {
	32	"A", "B", "CCR", "TMP3", "D", "X", "Y", "SP"
	33	};
	34
	35	static const char *const reg_dst_table[] = {
	36	"A", "B", "CCR", "TMP2", "D", "X", "Y", "SP"
	37	};
	38
	39	#define OP_PAGE_MASK (M6811_OP_PAGE2\|M6811_OP_PAGE3\|M6811_OP_PAGE4)
	40
b849bb42 AJ	41	/* Prototypes for local functions. */
	42	static int read_memory
	43	PARAMS ((bfd_vma, bfd_byte , int, struct disassemble_info ));
	44	static int print_indexed_operand
2fd84db3	45	PARAMS ((bfd_vma, struct disassemble_info , int, int, int, bfd_vma));
b849bb42 AJ	46	static int print_insn
	47	PARAMS ((bfd_vma, struct disassemble_info *, int));
	48
60bcf0fa NC	49	static int
	50	read_memory (memaddr, buffer, size, info)
	51	bfd_vma memaddr;
	52	bfd_byte *buffer;
	53	int size;
	54	struct disassemble_info *info;
	55	{
	56	int status;
	57
	58	/* Get first byte. Only one at a time because we don't know the
	59	size of the insn. */
	60	status = (*info->read_memory_func) (memaddr, buffer, size, info);
	61	if (status != 0)
	62	{
	63	(*info->memory_error_func) (status, memaddr, info);
	64	return -1;
	65	}
	66	return 0;
	67	}
	68
	69
	70	/* Read the 68HC12 indexed operand byte and print the corresponding mode.
	71	Returns the number of bytes read or -1 if failure. */
	72	static int
2fd84db3	73	print_indexed_operand (memaddr, info, indirect, mov_insn, pc_offset, endaddr)
60bcf0fa NC	74	bfd_vma memaddr;
60bcf0fa NC	75	struct disassemble_info *info;
f07534f6	76	int *indirect;
60bcf0fa	77	int mov_insn;
2fd84db3 SC	78	int pc_offset;
2fd84db3 SC	79	bfd_vma endaddr;
60bcf0fa NC	80	{
	81	bfd_byte buffer[4];
	82	int reg;
	83	int status;
	84	short sval;
	85	int pos = 1;
	86
f07534f6 SC	87	if (indirect)
	88	*indirect = 0;
	89
60bcf0fa NC	90	status = read_memory (memaddr, &buffer[0], 1, info);
	91	if (status != 0)
	92	{
	93	return status;
	94	}
	95
	96	/* n,r with 5-bits signed constant. */
	97	if ((buffer[0] & 0x20) == 0)
	98	{
	99	reg = (buffer[0] >> 6) & 3;
	100	sval = (buffer[0] & 0x1f);
	101	if (sval & 0x10)
	102	sval \|= 0xfff0;
2fd84db3 SC	103	/* 68HC12 requires an adjustment for movb/movw pc relative modes. */
	104	if (reg == PC_REGNUM && info->mach == bfd_mach_m6812 && mov_insn)
	105	sval += pc_offset;
60bcf0fa NC	106	(*info->fprintf_func) (info->stream, "%d,%s",
60bcf0fa NC	107	(int) sval, reg_name[reg]);
2fd84db3 SC	108
	109	if (reg == PC_REGNUM)
	110	{
	111	(* info->fprintf_func) (info->stream, " {");
	112	(* info->print_address_func) (endaddr + sval, info);
	113	(* info->fprintf_func) (info->stream, "}");
	114	}
60bcf0fa NC	115	}
	116
	117	/* Auto pre/post increment/decrement. */
	118	else if ((buffer[0] & 0xc0) != 0xc0)
	119	{
	120	const char *mode;
	121
	122	reg = (buffer[0] >> 6) & 3;
	123	sval = (buffer[0] & 0x0f);
	124	if (sval & 0x8)
	125	{
	126	sval \|= 0xfff0;
	127	sval = -sval;
	128	mode = "-";
	129	}
	130	else
	131	{
	132	sval = sval + 1;
	133	mode = "+";
	134	}
	135	(*info->fprintf_func) (info->stream, "%d,%s%s%s",
	136	(int) sval,
	137	(buffer[0] & 0x10 ? "" : mode),
	138	reg_name[reg], (buffer[0] & 0x10 ? mode : ""));
	139	}
	140
	141	/* [n,r] 16-bits offset indexed indirect. */
	142	else if ((buffer[0] & 0x07) == 3)
	143	{
	144	if (mov_insn)
	145	{
	146	(*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
	147	buffer[0] & 0x0ff);
	148	return 0;
	149	}
	150	reg = (buffer[0] >> 3) & 0x03;
	151	status = read_memory (memaddr + pos, &buffer[0], 2, info);
	152	if (status != 0)
	153	{
	154	return status;
	155	}
	156
	157	pos += 2;
	158	sval = ((buffer[0] << 8) \| (buffer[1] & 0x0FF));
	159	(*info->fprintf_func) (info->stream, "[%u,%s]",
	160	sval & 0x0ffff, reg_name[reg]);
f07534f6 SC	161	if (indirect)
f07534f6 SC	162	*indirect = 1;
60bcf0fa	163	}
2fd84db3 SC	164
2fd84db3 SC	165	/* n,r with 9 and 16 bit signed constant. */
60bcf0fa NC	166	else if ((buffer[0] & 0x4) == 0)
	167	{
	168	if (mov_insn)
	169	{
	170	(*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
	171	buffer[0] & 0x0ff);
	172	return 0;
	173	}
	174	reg = (buffer[0] >> 3) & 0x03;
	175	status = read_memory (memaddr + pos,
	176	&buffer[1], (buffer[0] & 0x2 ? 2 : 1), info);
	177	if (status != 0)
	178	{
	179	return status;
	180	}
	181	if (buffer[0] & 2)
	182	{
	183	sval = ((buffer[1] << 8) \| (buffer[2] & 0x0FF));
	184	sval &= 0x0FFFF;
	185	pos += 2;
	186	}
	187	else
	188	{
	189	sval = buffer[1] & 0x00ff;
	190	if (buffer[0] & 0x01)
	191	sval \|= 0xff00;
	192	pos++;
	193	}
	194	(*info->fprintf_func) (info->stream, "%d,%s",
	195	(int) sval, reg_name[reg]);
2fd84db3 SC	196	if (reg == PC_REGNUM)
	197	{
	198	(* info->fprintf_func) (info->stream, " {");
	199	(* info->print_address_func) (endaddr + sval, info);
	200	(* info->fprintf_func) (info->stream, "}");
	201	}
60bcf0fa NC	202	}
	203	else
	204	{
	205	reg = (buffer[0] >> 3) & 0x03;
	206	switch (buffer[0] & 3)
	207	{
	208	case 0:
	209	(*info->fprintf_func) (info->stream, "A,%s", reg_name[reg]);
	210	break;
	211	case 1:
	212	(*info->fprintf_func) (info->stream, "B,%s", reg_name[reg]);
	213	break;
	214	case 2:
	215	(*info->fprintf_func) (info->stream, "D,%s", reg_name[reg]);
	216	break;
	217	case 3:
	218	default:
	219	(*info->fprintf_func) (info->stream, "[D,%s]", reg_name[reg]);
f07534f6 SC	220	if (indirect)
f07534f6 SC	221	*indirect = 1;
60bcf0fa NC	222	break;
	223	}
	224	}
	225
	226	return pos;
	227	}
	228
	229	/* Disassemble one instruction at address 'memaddr'. Returns the number
	230	of bytes used by that instruction. */
	231	static int
	232	print_insn (memaddr, info, arch)
	233	bfd_vma memaddr;
	234	struct disassemble_info *info;
	235	int arch;
	236	{
	237	int status;
	238	bfd_byte buffer[4];
	239	unsigned char code;
	240	long format, pos, i;
	241	short sval;
	242	const struct m68hc11_opcode *opcode;
	243
	244	/* Get first byte. Only one at a time because we don't know the
	245	size of the insn. */
	246	status = read_memory (memaddr, buffer, 1, info);
	247	if (status != 0)
	248	{
	249	return status;
	250	}
	251
	252	format = 0;
	253	code = buffer[0];
	254	pos = 0;
	255
	256	/* Look for page2,3,4 opcodes. */
	257	if (code == M6811_OPCODE_PAGE2)
	258	{
	259	pos++;
	260	format = M6811_OP_PAGE2;
	261	}
	262	else if (code == M6811_OPCODE_PAGE3 && arch == cpu6811)
	263	{
	264	pos++;
	265	format = M6811_OP_PAGE3;
	266	}
	267	else if (code == M6811_OPCODE_PAGE4 && arch == cpu6811)
	268	{
	269	pos++;
	270	format = M6811_OP_PAGE4;
	271	}
	272
	273	/* We are in page2,3,4; get the real opcode. */
	274	if (pos == 1)
	275	{
	276	status = read_memory (memaddr + pos, &buffer[1], 1, info);
	277	if (status != 0)
	278	{
	279	return status;
	280	}
	281	code = buffer[1];
	282	}
	283
	284
	285	/* Look first for a 68HC12 alias. All of them are 2-bytes long and
286	in page 1. There is no operand to print. We read the second byte
287	only when we have a possible match. */
288	if ((arch & cpu6812) && format == 0)
289	{
290	int must_read = 1;
291
292	/* Walk the alias table to find a code1+code2 match. */
293	for (i = 0; i < m68hc12_num_alias; i++)
294	{
295	if (m68hc12_alias[i].code1 == code)
296	{
297	if (must_read)
298	{
299	status = read_memory (memaddr + pos + 1,
300	&buffer[1], 1, info);
301	if (status != 0)
302	break;
303
304	must_read = 1;
305	}
306	if (m68hc12_alias[i].code2 == (unsigned char) buffer[1])
307	{
308	(*info->fprintf_func) (info->stream, "%s",
309	m68hc12_alias[i].name);
310	return 2;
311	}
312	}
313	}
314	}
315
316	pos++;
317
318	/* Scan the opcode table until we find the opcode
319	with the corresponding page. */
320	opcode = m68hc11_opcodes;
321	for (i = 0; i < m68hc11_num_opcodes; i++, opcode++)
322	{
323	int offset;
2fd84db3 SC	324	int pc_src_offset;
2fd84db3 SC	325	int pc_dst_offset;
60bcf0fa NC	326
	327	if ((opcode->arch & arch) == 0)
	328	continue;
	329	if (opcode->opcode != code)
	330	continue;
	331	if ((opcode->format & OP_PAGE_MASK) != format)
	332	continue;
	333
	334	if (opcode->format & M6812_OP_REG)
	335	{
	336	int j;
	337	int is_jump;
	338
	339	if (opcode->format & M6811_OP_JUMP_REL)
	340	is_jump = 1;
	341	else
	342	is_jump = 0;
	343
	344	status = read_memory (memaddr + pos, &buffer[0], 1, info);
	345	if (status != 0)
	346	{
	347	return status;
	348	}
	349	for (j = 0; i + j < m68hc11_num_opcodes; j++)
	350	{
	351	if ((opcode[j].arch & arch) == 0)
	352	continue;
	353	if (opcode[j].opcode != code)
	354	continue;
	355	if (is_jump)
	356	{
	357	if (!(opcode[j].format & M6811_OP_JUMP_REL))
	358	continue;
	359
	360	if ((opcode[j].format & M6812_OP_IBCC_MARKER)
	361	&& (buffer[0] & 0xc0) != 0x80)
	362	continue;
	363	if ((opcode[j].format & M6812_OP_TBCC_MARKER)
	364	&& (buffer[0] & 0xc0) != 0x40)
	365	continue;
	366	if ((opcode[j].format & M6812_OP_DBCC_MARKER)
	367	&& (buffer[0] & 0xc0) != 0)
	368	continue;
	369	if ((opcode[j].format & M6812_OP_EQ_MARKER)
	370	&& (buffer[0] & 0x20) == 0)
	371	break;
	372	if (!(opcode[j].format & M6812_OP_EQ_MARKER)
	373	&& (buffer[0] & 0x20) != 0)
	374	break;
	375	continue;
	376	}
	377	if (opcode[j].format & M6812_OP_EXG_MARKER && buffer[0] & 0x80)
	378	break;
	379	if ((opcode[j].format & M6812_OP_SEX_MARKER)
	380	&& (((buffer[0] & 0x07) >= 3 && (buffer[0] & 7) <= 7))
	381	&& ((buffer[0] & 0x0f0) <= 0x20))
	382	break;
	383	if (opcode[j].format & M6812_OP_TFR_MARKER
	384	&& !(buffer[0] & 0x80))
	385	break;
	386	}
	387	if (i + j < m68hc11_num_opcodes)
	388	opcode = &opcode[j];
	389	}
390
391	/* We have found the opcode. Extract the operand and print it. */
392	(*info->fprintf_func) (info->stream, "%s", opcode->name);
393
394	format = opcode->format;
395	if (format & (M6811_OP_MASK \| M6811_OP_BITMASK
396	\| M6811_OP_JUMP_REL \| M6812_OP_JUMP_REL16))
397	{
398	(*info->fprintf_func) (info->stream, "\t");
399	}
400
64e38312 SC	401	/* The movb and movw must be handled in a special way...
	402	The source constant 'ii' is not always at the same place.
	403	This is the same for the destination for the post-indexed byte.
	404	The 'offset' is used to do the appropriate correction.
	405
	406	offset offset
	407	for constant for destination
	408	movb 18 OB ii hh ll 0 0
	409	18 08 xb ii 1 -1
	410	18 0C hh ll hh ll 0 0
	411	18 09 xb hh ll 1 -1
	412	18 0D xb hh ll 0 0
	413	18 0A xb xb 0 0
	414
	415	movw 18 03 jj kk hh ll 0 0
	416	18 00 xb jj kk 1 -1
	417	18 04 hh ll hh ll 0 0
	418	18 01 xb hh ll 1 -1
	419	18 05 xb hh ll 0 0
	420	18 02 xb xb 0 0
	421
	422	After the source operand is read, the position 'pos' is incremented
	423	this explains the negative offset for destination.
	424
	425	movb/movw above are the only instructions with this matching
	426	format. */
	427	offset = ((format & M6812_OP_IDX_P2)
	428	&& (format & (M6811_OP_IMM8 \| M6811_OP_IMM16 \|
	429	M6811_OP_IND16)));
60bcf0fa NC	430
	431	/* Operand with one more byte: - immediate, offset,
	432	direct-low address. */
	433	if (format &
	434	(M6811_OP_IMM8 \| M6811_OP_IX \| M6811_OP_IY \| M6811_OP_DIRECT))
	435	{
	436	status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
	437	if (status != 0)
	438	{
	439	return status;
	440	}
	441
	442	pos++;
64e38312 SC	443
	444	/* This movb/movw is special (see above). */
	445	offset = -offset;
	446
2fd84db3	447	pc_dst_offset = 2;
60bcf0fa NC	448	if (format & M6811_OP_IMM8)
	449	{
	450	(*info->fprintf_func) (info->stream, "#%d", (int) buffer[0]);
	451	format &= ~M6811_OP_IMM8;
2fd84db3 SC	452	/* Set PC destination offset. */
2fd84db3 SC	453	pc_dst_offset = 1;
60bcf0fa NC	454	}
	455	else if (format & M6811_OP_IX)
	456	{
	457	/* Offsets are in range 0..255, print them unsigned. */
	458	(*info->fprintf_func) (info->stream, "%u,x", buffer[0] & 0x0FF);
	459	format &= ~M6811_OP_IX;
	460	}
	461	else if (format & M6811_OP_IY)
	462	{
	463	(*info->fprintf_func) (info->stream, "%u,y", buffer[0] & 0x0FF);
	464	format &= ~M6811_OP_IY;
	465	}
	466	else if (format & M6811_OP_DIRECT)
	467	{
	468	(info->fprintf_func) (info->stream, "");
	469	(*info->print_address_func) (buffer[0] & 0x0FF, info);
	470	format &= ~M6811_OP_DIRECT;
	471	}
	472	}
	473
2fd84db3	474	#define M6812_DST_MOVE (M6812_OP_IND16_P2 \| M6812_OP_IDX_P2)
60bcf0fa NC	475	#define M6812_INDEXED_FLAGS (M6812_OP_IDX\|M6812_OP_IDX_1\|M6812_OP_IDX_2)
	476	/* Analyze the 68HC12 indexed byte. */
	477	if (format & M6812_INDEXED_FLAGS)
	478	{
f07534f6	479	int indirect;
2fd84db3 SC	480	bfd_vma endaddr;
	481
	482	endaddr = memaddr + pos + 1;
	483	if (format & M6811_OP_IND16)
	484	endaddr += 2;
	485	pc_src_offset = -1;
	486	pc_dst_offset = 1;
	487	status = print_indexed_operand (memaddr + pos, info, &indirect,
	488	(format & M6812_DST_MOVE),
	489	pc_src_offset, endaddr);
60bcf0fa NC	490	if (status < 0)
	491	{
	492	return status;
	493	}
	494	pos += status;
f07534f6 SC	495
	496	/* The indirect addressing mode of the call instruction does
	497	not need the page code. */
	498	if ((format & M6812_OP_PAGE) && indirect)
	499	format &= ~M6812_OP_PAGE;
60bcf0fa NC	500	}
	501
	502	/* 68HC12 dbcc/ibcc/tbcc operands. */
	503	if ((format & M6812_OP_REG) && (format & M6811_OP_JUMP_REL))
	504	{
	505	status = read_memory (memaddr + pos, &buffer[0], 2, info);
	506	if (status != 0)
	507	{
	508	return status;
	509	}
	510	(*info->fprintf_func) (info->stream, "%s,",
	511	reg_src_table[buffer[0] & 0x07]);
	512	sval = buffer[1] & 0x0ff;
	513	if (buffer[0] & 0x10)
	514	sval \|= 0xff00;
	515
	516	pos += 2;
	517	(*info->print_address_func) (memaddr + pos + sval, info);
	518	format &= ~(M6812_OP_REG \| M6811_OP_JUMP_REL);
	519	}
	520	else if (format & (M6812_OP_REG \| M6812_OP_REG_2))
	521	{
	522	status = read_memory (memaddr + pos, &buffer[0], 1, info);
	523	if (status != 0)
	524	{
	525	return status;
	526	}
	527
	528	pos++;
	529	(*info->fprintf_func) (info->stream, "%s,%s",
	530	reg_src_table[(buffer[0] >> 4) & 7],
	531	reg_dst_table[(buffer[0] & 7)]);
	532	}
	533
60bcf0fa NC	534	if (format & (M6811_OP_IMM16 \| M6811_OP_IND16))
	535	{
	536	int val;
f07534f6 SC	537	bfd_vma addr;
f07534f6 SC	538	unsigned page = 0;
60bcf0fa NC	539
	540	status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
	541	if (status != 0)
	542	{
	543	return status;
	544	}
	545	if (format & M6812_OP_IDX_P2)
	546	offset = -2;
	547	else
	548	offset = 0;
	549	pos += 2;
	550
	551	val = ((buffer[0] << 8) \| (buffer[1] & 0x0FF));
	552	val &= 0x0FFFF;
f07534f6	553	addr = val;
2fd84db3	554	pc_dst_offset = 2;
f07534f6 SC	555	if (format & M6812_OP_PAGE)
	556	{
	557	status = read_memory (memaddr + pos + offset, buffer, 1, info);
	558	if (status != 0)
	559	return status;
	560
	561	page = (unsigned) buffer[0];
	562	if (addr >= M68HC12_BANK_BASE && addr < 0x0c000)
	563	addr = ((val - M68HC12_BANK_BASE)
	564	\| (page << M68HC12_BANK_SHIFT))
	565	+ M68HC12_BANK_VIRT;
	566	}
	567	else if ((arch & cpu6812)
	568	&& addr >= M68HC12_BANK_BASE && addr < 0x0c000)
	569	{
	570	int cur_page;
	571	bfd_vma vaddr;
	572
	573	if (memaddr >= M68HC12_BANK_VIRT)
	574	cur_page = ((memaddr - M68HC12_BANK_VIRT)
	575	>> M68HC12_BANK_SHIFT);
	576	else
	577	cur_page = 0;
	578
	579	vaddr = ((addr - M68HC12_BANK_BASE)
	580	+ (cur_page << M68HC12_BANK_SHIFT))
	581	+ M68HC12_BANK_VIRT;
	582	if (!info->symbol_at_address_func (addr, info)
	583	&& info->symbol_at_address_func (vaddr, info))
	584	addr = vaddr;
	585	}
60bcf0fa NC	586	if (format & M6811_OP_IMM16)
	587	{
	588	format &= ~M6811_OP_IMM16;
	589	(*info->fprintf_func) (info->stream, "#");
	590	}
	591	else
	592	format &= ~M6811_OP_IND16;
	593
f07534f6 SC	594	(*info->print_address_func) (addr, info);
	595	if (format & M6812_OP_PAGE)
	596	{
	597	(* info->fprintf_func) (info->stream, " {");
	598	(* info->print_address_func) (val, info);
	599	(* info->fprintf_func) (info->stream, ", %d}", page);
	600	format &= ~M6812_OP_PAGE;
	601	pos += 1;
	602	}
60bcf0fa NC	603	}
	604
	605	if (format & M6812_OP_IDX_P2)
	606	{
	607	(*info->fprintf_func) (info->stream, ", ");
2fd84db3 SC	608	status = print_indexed_operand (memaddr + pos + offset, info,
	609	0, 1, pc_dst_offset,
	610	memaddr + pos + offset + 1);
60bcf0fa NC	611	if (status < 0)
	612	return status;
	613	pos += status;
	614	}
	615
	616	if (format & M6812_OP_IND16_P2)
	617	{
	618	int val;
	619
	620	(*info->fprintf_func) (info->stream, ", ");
	621
	622	status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
	623	if (status != 0)
	624	{
	625	return status;
	626	}
	627	pos += 2;
	628
	629	val = ((buffer[0] << 8) \| (buffer[1] & 0x0FF));
	630	val &= 0x0FFFF;
	631	(*info->print_address_func) (val, info);
	632	}
	633
ac8c616a SC	634	/* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
	635	and in that order. The brset/brclr insn have a bitmask and then
	636	a relative branch offset. */
	637	if (format & M6811_OP_BITMASK)
	638	{
	639	status = read_memory (memaddr + pos, &buffer[0], 1, info);
	640	if (status != 0)
	641	{
	642	return status;
	643	}
	644	pos++;
	645	(*info->fprintf_func) (info->stream, " #$%02x%s",
	646	buffer[0] & 0x0FF,
	647	(format & M6811_OP_JUMP_REL ? " " : ""));
	648	format &= ~M6811_OP_BITMASK;
	649	}
	650	if (format & M6811_OP_JUMP_REL)
	651	{
	652	int val;
	653
	654	status = read_memory (memaddr + pos, &buffer[0], 1, info);
	655	if (status != 0)
	656	{
	657	return status;
	658	}
	659
	660	pos++;
	661	val = (buffer[0] & 0x80) ? buffer[0] \| 0xFFFFFF00 : buffer[0];
	662	(*info->print_address_func) (memaddr + pos + val, info);
	663	format &= ~M6811_OP_JUMP_REL;
	664	}
	665	else if (format & M6812_OP_JUMP_REL16)
	666	{
	667	int val;
	668
	669	status = read_memory (memaddr + pos, &buffer[0], 2, info);
	670	if (status != 0)
	671	{
	672	return status;
	673	}
	674
	675	pos += 2;
	676	val = ((buffer[0] << 8) \| (buffer[1] & 0x0FF));
	677	if (val & 0x8000)
	678	val \|= 0xffff0000;
	679
	680	(*info->print_address_func) (memaddr + pos + val, info);
	681	format &= ~M6812_OP_JUMP_REL16;
	682	}
	683
f07534f6 SC	684	if (format & M6812_OP_PAGE)
	685	{
	686	int val;
	687
	688	status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
	689	if (status != 0)
	690	{
	691	return status;
	692	}
	693	pos += 1;
	694
	695	val = buffer[0] & 0x0ff;
	696	(*info->fprintf_func) (info->stream, ", %d", val);
	697	}
	698
60bcf0fa NC	699	#ifdef DEBUG
	700	/* Consistency check. 'format' must be 0, so that we have handled
	701	all formats; and the computed size of the insn must match the
	702	opcode table content. */
	703	if (format & ~(M6811_OP_PAGE4 \| M6811_OP_PAGE3 \| M6811_OP_PAGE2))
	704	{
	705	(*info->fprintf_func) (info->stream, "; Error, format: %x", format);
	706	}
	707	if (pos != opcode->size)
	708	{
	709	(*info->fprintf_func) (info->stream, "; Error, size: %d expect %d",
	710	pos, opcode->size);
	711	}
	712	#endif
	713	return pos;
	714	}
	715
	716	/* Opcode not recognized. */
	717	if (format == M6811_OP_PAGE2 && arch & cpu6812
	718	&& ((code >= 0x30 && code <= 0x39) \|\| (code >= 0x40 && code <= 0xff)))
	719	(*info->fprintf_func) (info->stream, "trap\t#%d", code & 0x0ff);
	720
	721	else if (format == M6811_OP_PAGE2)
	722	(*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
	723	M6811_OPCODE_PAGE2, code);
	724	else if (format == M6811_OP_PAGE3)
	725	(*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
	726	M6811_OPCODE_PAGE3, code);
	727	else if (format == M6811_OP_PAGE4)
	728	(*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
	729	M6811_OPCODE_PAGE4, code);
	730	else
	731	(*info->fprintf_func) (info->stream, ".byte\t0x%02x", code);
	732
	733	return pos;
	734	}
	735
	736	/* Disassemble one instruction at address 'memaddr'. Returns the number
	737	of bytes used by that instruction. */
	738	int
	739	print_insn_m68hc11 (memaddr, info)
	740	bfd_vma memaddr;
	741	struct disassemble_info *info;
	742	{
	743	return print_insn (memaddr, info, cpu6811);
	744	}
	745
	746	int
	747	print_insn_m68hc12 (memaddr, info)
	748	bfd_vma memaddr;
	749	struct disassemble_info *info;
	750	{
	751	return print_insn (memaddr, info, cpu6812);
	752	}