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* config/djgpp/fnchange.lst: Add ns32knbsd-nat.c, ns32knbsd-tdep.c,
[deliverable/binutils-gdb.git] / opcodes / mips-opc.c
CommitLineData
657e7cec 1/* mips-opc.c -- MIPS opcode list.
1f25f5d3 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
060d22b0 3 Free Software Foundation, Inc.
252b5132
RH		 4 Contributed by Ralph Campbell and OSF
5 Commented and modified by Ian Lance Taylor, Cygnus Support
e70f2590 6 Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
1f25f5d3 7 MIPS-3D support added by Broadcom Corporation (SiByte).
252b5132
RH		 8
9This file is part of GDB, GAS, and the GNU binutils.
10
11GDB, GAS, and the GNU binutils are free software; you can redistribute
12them and/or modify them under the terms of the GNU General Public
13License as published by the Free Software Foundation; either version
141, or (at your option) any later version.
15
16GDB, GAS, and the GNU binutils are distributed in the hope that they
17will be useful, but WITHOUT ANY WARRANTY; without even the implied
18warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
19the GNU General Public License for more details.
20
21You should have received a copy of the GNU General Public License
22along with this file; see the file COPYING. If not, write to the Free
23Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25#include <stdio.h>
0d8dfecf 26#include "sysdep.h"
252b5132
RH		 27#include "opcode/mips.h"
28
29/* Short hand so the lines aren't too long. */
30
31#define LDD INSN_LOAD_MEMORY_DELAY
32#define LCD INSN_LOAD_COPROC_DELAY
33#define UBD INSN_UNCOND_BRANCH_DELAY
34#define CBD INSN_COND_BRANCH_DELAY
35#define COD INSN_COPROC_MOVE_DELAY
36#define CLD INSN_COPROC_MEMORY_DELAY
37#define CBL INSN_COND_BRANCH_LIKELY
38#define TRAP INSN_TRAP
39#define SM INSN_STORE_MEMORY
40
41#define WR_d INSN_WRITE_GPR_D
42#define WR_t INSN_WRITE_GPR_T
e93d7199
NC		 43#define WR_31 INSN_WRITE_GPR_31
44#define WR_D INSN_WRITE_FPR_D
252b5132
RH		 45#define WR_T INSN_WRITE_FPR_T
46#define WR_S INSN_WRITE_FPR_S
e93d7199
NC		 47#define RD_s INSN_READ_GPR_S
48#define RD_b INSN_READ_GPR_S
49#define RD_t INSN_READ_GPR_T
50#define RD_S INSN_READ_FPR_S
51#define RD_T INSN_READ_FPR_T
252b5132
RH		 52#define RD_R INSN_READ_FPR_R
53#define WR_CC INSN_WRITE_COND_CODE
54#define RD_CC INSN_READ_COND_CODE
55#define RD_C0 INSN_COP
56#define RD_C1 INSN_COP
57#define RD_C2 INSN_COP
58#define RD_C3 INSN_COP
59#define WR_C0 INSN_COP
60#define WR_C1 INSN_COP
61#define WR_C2 INSN_COP
62#define WR_C3 INSN_COP
63
64#define WR_HI INSN_WRITE_HI
65#define RD_HI INSN_READ_HI
66#define MOD_HI WR_HI|RD_HI
67
68#define WR_LO INSN_WRITE_LO
69#define RD_LO INSN_READ_LO
70#define MOD_LO WR_LO|RD_LO
71
72#define WR_HILO WR_HI|WR_LO
73#define RD_HILO RD_HI|RD_LO
74#define MOD_HILO WR_HILO|RD_HILO
75
76#define IS_M INSN_MULT
77
78#define I1 INSN_ISA1
79#define I2 INSN_ISA2
80#define I3 INSN_ISA3
81#define I4 INSN_ISA4
5fce5ddf 82#define I5 INSN_ISA5
e7af610e 83#define I32 INSN_ISA32
84ea6cf2 84#define I64 INSN_ISA64
e7af610e 85
44426910 86/* MIPS64 MIPS-3D ASE support. */
1f25f5d3
CD		 87#define M3D INSN_MIPS3D
88
252b5132
RH		 89#define P3 INSN_4650
90#define L1 INSN_4010
91#define V1 INSN_4100
92#define T3 INSN_3900
99c14723 93#define M1 INSN_10000
2228315b 94#define SB1 INSN_SB1
252b5132 95
e93d7199 96#define G1 (T3 \
252b5132
RH		 97 )
98
99c14723 99#define G2 (T3 \
252b5132
RH		 100 )
101
99c14723
TS		 102#define G3 (I4 \
103 )
252b5132
RH		 104
105/* The order of overloaded instructions matters. Label arguments and
106 register arguments look the same. Instructions that can have either
107 for arguments must apear in the correct order in this table for the
108 assembler to pick the right one. In other words, entries with
109 immediate operands must apear after the same instruction with
110 registers.
111
44426910
CD		 112 Because of the lookup algorithm used, entries with the same opcode
113 name must be contiguous.
114
252b5132
RH		 115 Many instructions are short hand for other instructions (i.e., The
116 jal <register> instruction is short for jalr <register>). */
117
4372b673
NC		 118const struct mips_opcode mips_builtin_opcodes[] =
119{
252b5132
RH		 120/* These instructions appear first so that the disassembler will find
121 them first. The assemblers uses a hash table based on the
122 instruction name anyhow. */
08fe7a7e 123/* name, args, match, mask, pinfo, membership */
aa084229 124{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, I4|I32|G3 },
564e8ad9 125{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
08fe7a7e 126{"nop", "", 0x00000000, 0xffffffff, 0, I1 },
15305553 127{"ssnop", "", 0x00000040, 0xffffffff, 0, I32 },
08fe7a7e
NC		 128{"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */
129{"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */
130{"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 },
d98bb281 131{"move", "d,s", 0, (int) M_MOVE, INSN_MACRO, I1 },
08fe7a7e
NC		 132{"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
133{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, I1 },/* addu */
134{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1 },/* or */
135{"b", "p", 0x10000000, 0xffff0000, UBD, I1 },/* beq 0,0 */
136{"b", "p", 0x04010000, 0xffff0000, UBD, I1 },/* bgez 0 */
137{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, I1 },/* bgezal 0*/
252b5132 138
e70f2590
NC		 139{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, I1 },
140{"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D|RD_S|FP_S, I1 },
141{"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D|RD_S|FP_D, I1 },
142{"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_D|RD_S|FP_D, I5 },
143{"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
144{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, I1 },
145{"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
146{"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
147{"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
148{"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t|RD_s, I1 },
149{"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t|RD_s, I1 },
1f25f5d3 150{"addr.ps", "D,S,T", 0x46c00018, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
e70f2590
NC		 151{"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
152{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, I1 },
153{"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_D|RD_S|RD_T|FP_D, I5 },
154{"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
155{"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, I1 },
156{"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, I1 },
252b5132
RH		 157/* b is at the top of the table. */
158/* bal is at the top of the table. */
08fe7a7e
NC		 159{"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, I1 },
160{"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, I2|T3 },
ff8a5556
CD		 161{"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, I1 },
162{"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, I2|T3 },
1f25f5d3
CD		 163{"bc1any2f", "N,p", 0x45200000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
164{"bc1any2t", "N,p", 0x45210000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
165{"bc1any4f", "N,p", 0x45400000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
166{"bc1any4t", "N,p", 0x45410000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
15305553
NC		 167{"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
168{"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32 },
169{"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
170{"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32 },
08fe7a7e 171{"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
15305553 172{"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32 },
08fe7a7e 173{"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
15305553 174{"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32 },
ff8a5556
CD		 175{"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, I1 },
176{"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC, I2|T3 },
08fe7a7e
NC		 177{"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC, I1 },
178{"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC, I2|T3 },
ff8a5556
CD		 179{"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC, I1 },
180{"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC, I2|T3 },
08fe7a7e
NC		 181{"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC, I1 },
182{"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC, I2|T3 },
183{"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s, I1 },
184{"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
185{"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
186{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, I1 },
187{"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
2cd89590 188{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, I2|T3 },
08fe7a7e
NC		 189{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, I1 },
190{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, I1 },
2cd89590
JL		 191{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, I2|T3 },
192{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, I2|T3 },
08fe7a7e
NC		 193{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, I1 },
194{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, I1 },
2cd89590
JL		 195{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, I2|T3 },
196{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, I2|T3 },
08fe7a7e
NC		 197{"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s, I1 },
198{"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s, I2|T3 },
199{"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
9bb28706 200{"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s|WR_31, I2|T3 },
08fe7a7e
NC		 201{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, I1 },
202{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, I1 },
2cd89590
JL		 203{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, I2|T3 },
204{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, I2|T3 },
08fe7a7e
NC		 205{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, I1 },
206{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, I1 },
2cd89590
JL		 207{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, I2|T3 },
208{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, I2|T3 },
08fe7a7e
NC		 209{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s, I1 },
210{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
211{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, I1 },
212{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, I1 },
2cd89590
JL		 213{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, I2|T3 },
214{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, I2|T3 },
08fe7a7e
NC		 215{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, I1 },
216{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, I1 },
2cd89590
JL		 217{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, I2|T3 },
218{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, I2|T3 },
08fe7a7e
NC		 219{"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s, I1 },
220{"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
221{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, I1 },
222{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, I1 },
2cd89590
JL		 223{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, I2|T3 },
224{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, I2|T3 },
08fe7a7e
NC		 225{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, I1 },
226{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, I1 },
2cd89590
JL		 227{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, I2|T3 },
228{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, I2|T3 },
08fe7a7e
NC		 229{"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s, I1 },
230{"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s, I2|T3 },
231{"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
9bb28706 232{"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s|WR_31, I2|T3 },
08fe7a7e
NC		 233{"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s, I1 },
234{"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
235{"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
236{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, I1 },
237{"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
2cd89590 238{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2|T3 },
08fe7a7e
NC		 239{"break", "", 0x0000000d, 0xffffffff, TRAP, I1 },
240{"break", "B", 0x0000000d, 0xfc00003f, TRAP, I32 },
241{"break", "c", 0x0000000d, 0xfc00ffff, TRAP, I1 },
242{"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, I1 },
252b5132 243{"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 244{"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 245{"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 246{"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 247{"c.f.ps", "S,T", 0x46c00030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
248{"c.f.ps", "M,S,T", 0x46c00030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 249{"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 250{"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 251{"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 252{"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 253{"c.un.ps", "S,T", 0x46c00031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
254{"c.un.ps", "M,S,T", 0x46c00031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 255{"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 256{"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 257{"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 258{"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 259{"c.eq.ps", "S,T", 0x46c00032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
260{"c.eq.ps", "M,S,T", 0x46c00032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 261{"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 262{"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 263{"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 264{"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 265{"c.ueq.ps","S,T", 0x46c00033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
266{"c.ueq.ps","M,S,T", 0x46c00033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
e70f2590 267{"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 268{"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
252b5132 269{"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 270{"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 271{"c.olt.ps","S,T", 0x46c00034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
272{"c.olt.ps","M,S,T", 0x46c00034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 273{"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 274{"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 275{"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 276{"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 277{"c.ult.ps","S,T", 0x46c00035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
278{"c.ult.ps","M,S,T", 0x46c00035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
e70f2590 279{"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 280{"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 281{"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 282{"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 283{"c.ole.ps","S,T", 0x46c00036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
284{"c.ole.ps","M,S,T", 0x46c00036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 285{"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 286{"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 287{"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 288{"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 289{"c.ule.ps","S,T", 0x46c00037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
290{"c.ule.ps","M,S,T", 0x46c00037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 291{"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 292{"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 293{"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 294{"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 295{"c.sf.ps", "S,T", 0x46c00038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
296{"c.sf.ps", "M,S,T", 0x46c00038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 297{"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 298{"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 299{"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 300{"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 301{"c.ngle.ps","S,T", 0x46c00039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
302{"c.ngle.ps","M,S,T", 0x46c00039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 303{"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 304{"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 305{"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 306{"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 307{"c.seq.ps","S,T", 0x46c0003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
308{"c.seq.ps","M,S,T", 0x46c0003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 309{"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 310{"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 311{"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 312{"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 313{"c.ngl.ps","S,T", 0x46c0003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
314{"c.ngl.ps","M,S,T", 0x46c0003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 315{"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 316{"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
209fd667
CD		 317{"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
318{"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 319{"c.lt.ps", "S,T", 0x46c0003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
320{"c.lt.ps", "M,S,T", 0x46c0003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 321{"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 322{"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 323{"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 324{"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 325{"c.nge.ps","S,T", 0x46c0003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
326{"c.nge.ps","M,S,T", 0x46c0003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 327{"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 328{"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
209fd667
CD		 329{"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
330{"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 331{"c.le.ps", "S,T", 0x46c0003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
332{"c.le.ps", "M,S,T", 0x46c0003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 333{"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 334{"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 335{"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 336{"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 337{"c.ngt.ps","S,T", 0x46c0003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
338{"c.ngt.ps","M,S,T", 0x46c0003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
1f25f5d3
CD		 339{"cabs.eq.d", "M,S,T", 0x46200072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
340{"cabs.eq.ps", "M,S,T", 0x46c00072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
341{"cabs.eq.s", "M,S,T", 0x46000072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
342{"cabs.f.d", "M,S,T", 0x46200070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
343{"cabs.f.ps", "M,S,T", 0x46c00070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
344{"cabs.f.s", "M,S,T", 0x46000070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
345{"cabs.le.d", "M,S,T", 0x4620007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
346{"cabs.le.ps", "M,S,T", 0x46c0007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
347{"cabs.le.s", "M,S,T", 0x4600007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
348{"cabs.lt.d", "M,S,T", 0x4620007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
349{"cabs.lt.ps", "M,S,T", 0x46c0007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
350{"cabs.lt.s", "M,S,T", 0x4600007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
351{"cabs.nge.d", "M,S,T", 0x4620007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
352{"cabs.nge.ps","M,S,T", 0x46c0007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
353{"cabs.nge.s", "M,S,T", 0x4600007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
354{"cabs.ngl.d", "M,S,T", 0x4620007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
355{"cabs.ngl.ps","M,S,T", 0x46c0007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
356{"cabs.ngl.s", "M,S,T", 0x4600007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
357{"cabs.ngle.d","M,S,T", 0x46200079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
358{"cabs.ngle.ps","M,S,T",0x46c00079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
359{"cabs.ngle.s","M,S,T", 0x46000079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
360{"cabs.ngt.d", "M,S,T", 0x4620007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
361{"cabs.ngt.ps","M,S,T", 0x46c0007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
362{"cabs.ngt.s", "M,S,T", 0x4600007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
363{"cabs.ole.d", "M,S,T", 0x46200076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
364{"cabs.ole.ps","M,S,T", 0x46c00076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
365{"cabs.ole.s", "M,S,T", 0x46000076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
366{"cabs.olt.d", "M,S,T", 0x46200074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
367{"cabs.olt.ps","M,S,T", 0x46c00074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
368{"cabs.olt.s", "M,S,T", 0x46000074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
369{"cabs.seq.d", "M,S,T", 0x4620007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
370{"cabs.seq.ps","M,S,T", 0x46c0007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
371{"cabs.seq.s", "M,S,T", 0x4600007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
372{"cabs.sf.d", "M,S,T", 0x46200078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
373{"cabs.sf.ps", "M,S,T", 0x46c00078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
374{"cabs.sf.s", "M,S,T", 0x46000078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
375{"cabs.ueq.d", "M,S,T", 0x46200073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
376{"cabs.ueq.ps","M,S,T", 0x46c00073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
377{"cabs.ueq.s", "M,S,T", 0x46000073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
378{"cabs.ule.d", "M,S,T", 0x46200077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
379{"cabs.ule.ps","M,S,T", 0x46c00077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
380{"cabs.ule.s", "M,S,T", 0x46000077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
381{"cabs.ult.d", "M,S,T", 0x46200075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
382{"cabs.ult.ps","M,S,T", 0x46c00075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
383{"cabs.ult.s", "M,S,T", 0x46000075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
384{"cabs.un.d", "M,S,T", 0x46200071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
385{"cabs.un.ps", "M,S,T", 0x46c00071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
386{"cabs.un.s", "M,S,T", 0x46000071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
15305553 387{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|I32|T3},
e70f2590
NC		 388{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3 },
389{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3 },
390{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, I2 },
391{"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D|RD_S|FP_S, I2 },
392{"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
252b5132
RH		 393{"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
394{"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
e70f2590
NC		 395{"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
396{"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
397{"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d|WR_t|RD_s, I32 },
398{"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d|WR_t|RD_s, I32 },
399{"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
252b5132
RH		 400{"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
401{"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
e70f2590
NC		 402{"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
403{"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
404{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, I3 },
252b5132 405{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S, I1 },
e70f2590
NC		 406{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S|FP_D, I1 },
407{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, I3 },
408{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S, I3 },
409{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, I3 },
252b5132 410{"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I1 },
e70f2590 411{"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D|RD_S|FP_S, I1 },
5fce5ddf
GRK		 412{"cvt.s.pl","D,S", 0x46c00028, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
413{"cvt.s.pu","D,S", 0x46c00020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
e70f2590
NC		 414{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S|FP_D, I1 },
415{"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D|RD_S|FP_S, I1 },
1f25f5d3 416{"cvt.ps.pw", "D,S", 0x46800026, 0xffff003f, WR_D|RD_S|FP_S|FP_D, M3D },
e70f2590 417{"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
1f25f5d3 418{"cvt.pw.ps", "D,S", 0x46c00024, 0xffff003f, WR_D|RD_S|FP_S|FP_D, M3D },
e70f2590
NC		 419{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, I3 },
420{"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
421{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, I3 },
422{"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t|RD_s, I3 },
423{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s, I3 },
424{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
425{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, I3 },
0808b8a9
NC		 426{"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t, I64 },
427{"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t, I64 },
252b5132 428/* dctr and dctw are used on the r5000. */
e70f2590
NC		 429{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 },
430{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 },
15305553 431{"deret", "", 0x4200001f, 0xffffffff, 0, I32|G2 },
252b5132 432/* For ddiv, see the comments about div. */
08fe7a7e 433{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
e70f2590
NC		 434{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 },
435{"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, I3 },
252b5132 436/* For ddivu, see the comments about div. */
08fe7a7e 437{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
e70f2590
NC		 438{"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, I3 },
439{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, I3 },
252b5132
RH		 440/* The MIPS assembler treats the div opcode with two operands as
441 though the first operand appeared twice (the first operand is both
442 a source and a destination). To get the div machine instruction,
443 you must use an explicit destination of $0. */
08fe7a7e
NC		 444{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
445{"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HILO, I1 },
e70f2590
NC		 446{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, I1 },
447{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, I1 },
252b5132
RH		 448{"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
449{"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
2228315b 450{"div.ps", "D,V,T", 0x46c00003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, SB1 },
252b5132 451/* For divu, see the comments about div. */
08fe7a7e
NC		 452{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
453{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HILO, I1 },
e70f2590
NC		 454{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
455{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
456{"dla", "t,o(b)", 0x64000000, 0xfc000000, WR_t|RD_s, I3 }, /* daddiu */
457{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, I3 },
458{"dli", "t,j", 0x24000000, 0xffe00000, WR_t, I3 }, /* addiu */
459{"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
460{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, I3 },
252b5132 461
08fe7a7e 462{"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|MOD_LO, V1 },
e70f2590 463{"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, I3 },
0808b8a9 464{"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, I64 },
252b5132 465{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
0808b8a9 466{"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I64 },
252b5132 467{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
0808b8a9 468{"dmfc1", "t,G", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
252b5132 469{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
0808b8a9
NC		 470{"dmtc1", "t,G", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
471{"dmfc2", "t,G", 0x48200000, 0xffe007ff, LCD|WR_t|RD_C2, I3 },
472{"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, I64 },
473{"dmtc2", "t,G", 0x48a00000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I3 },
474{"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I64 },
475{"dmfc3", "t,G", 0x4c200000, 0xffe007ff, LCD|WR_t|RD_C3, I3 },
476{"dmfc3", "t,G,H", 0x4c200000, 0xffe007f8, LCD|WR_t|RD_C3, I64 },
477{"dmtc3", "t,G", 0x4ca00000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I3 },
478{"dmtc3", "t,G,H", 0x4ca00000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, I64 },
e70f2590
NC		 479{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, I3 },
480{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, I3 },
481{"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, I3 },
482{"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, I3 },
483{"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, I3 },
484{"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, I3 },
08fe7a7e
NC		 485{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
486{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
e70f2590
NC		 487{"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t, I3 }, /* dsub 0 */
488{"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t, I3 }, /* dsubu 0*/
08fe7a7e 489{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
e70f2590
NC		 490{"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO, I3 },
491{"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO, I3 },
08fe7a7e 492{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
e70f2590
NC		 493{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
494{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
771c7ce4
TS		 495{"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, I3 },
496{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I3 },
497{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I3 },
498{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I3 },
e70f2590
NC		 499{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
500{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
501{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
502{"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, /* dsll32 */
503{"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d|RD_t, I3 },
504{"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
505{"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 },
506{"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrav */
507{"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 }, /* dsra32 */
508{"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d|RD_t, I3 },
509{"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
510{"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 },
511{"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrlv */
512{"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 }, /* dsrl32 */
513{"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d|RD_t, I3 },
514{"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
515{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, I3 },
516{"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
517{"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, I3 },
15305553 518{"eret", "", 0x42000018, 0xffffffff, 0, I3|I32 },
e70f2590
NC		 519{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3 },
520{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3 },
521{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2 },
522{"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, I2 },
523{"flushi", "", 0xbc010000, 0xffffffff, 0, L1 },
524{"flushd", "", 0xbc020000, 0xffffffff, 0, L1 },
525{"flushid", "", 0xbc030000, 0xffffffff, 0, L1 },
526{"hibernate","", 0x42000023, 0xffffffff, 0, V1 },
527{"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 },
528{"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 }, /* jr */
252b5132
RH		 529/* SVR4 PIC code requires special handling for j, so it must be a
530 macro. */
e70f2590 531{"j", "a", 0, (int) M_J_A, INSN_MACRO, I1 },
252b5132
RH		 532/* This form of j is used by the disassembler and internally by the
533 assembler, but will never match user input (because the line above
534 will match first). */
e70f2590
NC		 535{"j", "a", 0x08000000, 0xfc000000, UBD, I1 },
536{"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, I1 },
537{"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, I1 },
252b5132
RH		 538/* SVR4 PIC code requires special handling for jal, so it must be a
539 macro. */
e70f2590
NC		 540{"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, I1 },
541{"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, I1 },
542{"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, I1 },
252b5132
RH		 543/* This form of jal is used by the disassembler and internally by the
544 assembler, but will never match user input (because the line above
545 will match first). */
e70f2590 546{"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31, I1 },
252b5132
RH		 547 /* jalx really should only be avaliable if mips16 is available,
548 but for now make it I1. */
e70f2590
NC		 549{"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, I1 },
550{"la", "t,o(b)", 0x24000000, 0xfc000000, WR_t|RD_s, I1 }, /* addiu */
551{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, I1 },
552{"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
553{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, I1 },
554{"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
555{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, I1 },
556{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, I3 },
557{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, I1 },
558{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, I1 },
252b5132
RH		 559{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
560{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
e70f2590
NC		 561{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
562{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
252b5132 563{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 }, /* ldc1 */
e70f2590
NC		 564{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, I1 },
565{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, I1 },
566{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
567{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, I2 },
568{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
569{"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, I2 },
570{"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
571{"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, I3 },
572{"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
573{"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, I3 },
252b5132 574{"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
e70f2590
NC		 575{"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
576{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, I1 },
577{"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
578{"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, I1 },
252b5132 579/* li is at the start of the table. */
e70f2590
NC		 580{"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, I1 },
581{"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, I1 },
582{"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, I1 },
583{"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, I1 },
584{"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD|RD_b|WR_t, I2 },
585{"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, I2 },
586{"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
587{"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, I3 },
588{"lui", "t,u", 0x3c000000, 0xffe00000, WR_t, I1 },
5fce5ddf 589{"luxc1", "D,t(b)", 0x4c000005, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I5 },
e70f2590
NC		 590{"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
591{"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, I1 },
592{"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
593{"lwc0", "E,A(b)", 0, (int) M_LWC0_AB, INSN_MACRO, I1 },
252b5132
RH		 594{"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
595{"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
e70f2590
NC		 596{"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
597{"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
252b5132 598{"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 }, /* lwc1 */
e70f2590
NC		 599{"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
600{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
601{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, I1 },
602{"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
603{"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO, I1 },
604{"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
605{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I1 },
606{"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
607{"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I2 }, /* as lwl */
608{"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
609{"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I1 },
610{"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
611{"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I2 }, /* as lwr */
612{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
613{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, I3 },
252b5132 614{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
08fe7a7e
NC		 615{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, P3 },
616{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, P3 },
15305553
NC		 617{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
618{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
619{"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
620{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
621{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32},
622{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, G1 },
623{"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
624{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
625{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32},
626{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, G1 },
627{"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
628{"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|MOD_HILO, V1 },
99c14723
TS		 629{"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, LCD|WR_t|RD_C0, M1 },
630{"mfps", "t,P", 0x4000c800, 0xffe0ffc1, LCD|WR_t|RD_C0, M1 },
e70f2590
NC		 631{"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
632{"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, I32 },
633{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
634{"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
e70f2590
NC		 635{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
636{"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, I32 },
637{"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
638{"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD|WR_t|RD_C3, I32 },
639{"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI, I1 },
640{"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, I1 },
641{"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S|FP_D, I1 },
642{"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D|RD_S|FP_S, I1 },
643{"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_D|RD_S|FP_D, I5 },
15305553
NC		 644{"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, I4|I32},
645{"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|I32 },
646{"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|I32 },
5fce5ddf 647{"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5 },
15305553 648{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4|I32 },
e70f2590 649{"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s, L1 },
15305553
NC		 650{"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|I32 },
651{"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|I32 },
aa084229 652{"movn.ps", "D,S,t", 0x46c00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I5 },
15305553
NC		 653{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC, I4|I32 },
654{"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|I32 },
655{"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|I32 },
e70f2590 656{"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5 },
15305553 657{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4|I32 },
e70f2590 658{"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s, L1 },
15305553
NC		 659{"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|I32 },
660{"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|I32 },
aa084229 661{"movz.ps", "D,S,t", 0x46c00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I5 },
252b5132 662/* move is at the top of the table. */
15305553
NC		 663{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
664{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
665{"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
08fe7a7e
NC		 666{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
667{"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
668{"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
669{"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
99c14723
TS		 670{"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, COD|RD_t|WR_C0, M1 },
671{"mtps", "t,P", 0x4080c800, 0xffe0ffc1, COD|RD_t|WR_C0, M1 },
252b5132 672{"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I1 },
e7af610e 673{"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I32 },
252b5132
RH		 674{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
675{"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
676{"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 },
e7af610e 677{"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I32 },
252b5132 678{"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 },
e7af610e 679{"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, I32 },
e70f2590
NC		 680{"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI, I1 },
681{"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, I1 },
252b5132
RH		 682{"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
683{"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
5fce5ddf 684{"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
08fe7a7e 685{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, I32|P3 },
e70f2590
NC		 686{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 },
687{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 },
688{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, I1 },
689{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, I1 },
690{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, I1 },
691{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, I1 },
1f25f5d3 692{"mulr.ps", "D,S,T", 0x46c0001a, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
08fe7a7e
NC		 693{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1 },
694{"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
695{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1 },
696{"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
e70f2590
NC		 697{"neg", "d,w", 0x00000022, 0xffe007ff, WR_d|RD_t, I1 }, /* sub 0 */
698{"negu", "d,w", 0x00000023, 0xffe007ff, WR_d|RD_t, I1 }, /* subu 0 */
699{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S|FP_D, I1 },
700{"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D|RD_S|FP_S, I1 },
701{"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_D|RD_S|FP_D, I5 },
15305553
NC		 702{"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
703{"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
704{"nmadd.ps","D,R,S,T", 0x4c000036, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
705{"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
706{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
707{"nmsub.ps","D,R,S,T", 0x4c00003e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
252b5132 708/* nop is at the start of the table. */
08fe7a7e
NC		 709{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
710{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, I1 },
711{"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1 },/*nor d,s,0*/
712{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
713{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, I1 },
714{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, I1 },
252b5132 715
e70f2590
NC		 716{"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
717{"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
252b5132 718
564e8ad9 719 /* pref and prefx are at the start of the table. */
252b5132 720
e70f2590
NC		 721{"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
722{"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
252b5132 723
08fe7a7e 724{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4 },
2228315b 725{"recip.ps","D,S", 0x46c00015, 0xffff003f, WR_D|RD_S|FP_D, SB1 },
44426910 726{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4 },
1f25f5d3 727{"recip1.d", "D,S", 0x4620001d, 0xffff003f, WR_D|RD_S|FP_D, M3D },
1f25f5d3 728{"recip1.ps", "D,S", 0x46c0001d, 0xffff003f, WR_D|RD_S|FP_S, M3D },
44426910 729{"recip1.s", "D,S", 0x4600001d, 0xffff003f, WR_D|RD_S|FP_S, M3D },
1f25f5d3 730{"recip2.d", "D,S,T", 0x4620001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
1f25f5d3 731{"recip2.ps", "D,S,T", 0x46c0001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
44426910 732{"recip2.s", "D,S,T", 0x4600001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
08fe7a7e
NC		 733{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
734{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, I1 },
735{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, I1 },
736{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
737{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 },
738{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 },
739{"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 },
740{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
741{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
742{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
743{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
744{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
745{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
746{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
747{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2 },
748{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4 },
2228315b 749{"rsqrt.ps","D,S", 0x46c00016, 0xffff003f, WR_D|RD_S|FP_D, SB1 },
44426910
CD		 750{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4 },
751{"rsqrt1.d", "D,S", 0x4620001e, 0xffff003f, WR_D|RD_S|FP_D, M3D },
1f25f5d3 752{"rsqrt1.ps", "D,S", 0x46c0001e, 0xffff003f, WR_D|RD_S|FP_S, M3D },
44426910 753{"rsqrt1.s", "D,S", 0x4600001e, 0xffff003f, WR_D|RD_S|FP_S, M3D },
1f25f5d3 754{"rsqrt2.d", "D,S,T", 0x4620001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
1f25f5d3 755{"rsqrt2.ps", "D,S,T", 0x46c0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
44426910 756{"rsqrt2.s", "D,S,T", 0x4600001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
08fe7a7e
NC		 757{"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, I1 },
758{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, I1 },
252b5132 759{"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I2 },
08fe7a7e 760{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, I2 },
252b5132 761{"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I3 },
08fe7a7e
NC		 762{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, I3 },
763{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, I3 },
764{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, I1 },
765{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, I1 },
15305553
NC		 766{"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2 },
767{"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, G2 },
768{"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, G2 },
08fe7a7e
NC		 769{"sdbbp", "", 0x7000003f, 0xffffffff, TRAP, I32 },
770{"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP, I32 },
252b5132
RH		 771{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
772{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
08fe7a7e
NC		 773{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
774{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
775{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, I2 },
776{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 },
777{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 },
778{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 },
252b5132 779{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
08fe7a7e
NC		 780{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 },
781{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 },
782{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 },
783{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, I3 },
784{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 },
785{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 },
252b5132 786{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
08fe7a7e
NC		 787{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t, L1 },
788{"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t, L1 },
789{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 },
790{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, I1 },
791{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, I1 },
792{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, I1 },
793{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, I1 },
794{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, I1 },
795{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, I1 },
796{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, I1 },
797{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, I1 },
798{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, I1 },
799{"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM|RD_t|RD_b, I1 },
800{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, I1 },
801{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, I1 },
802{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, I1 },
803{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, I1 },
804{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, I1 },
805{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
806{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* sllv */
807{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t, I1 },
808{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
809{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, I1 },
810{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s, I1 },
811{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s, I1 },
812{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
813{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, I1 },
814{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, I1 },
815{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, I1 },
816{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2 },
817{"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2 },
2228315b 818{"sqrt.ps", "D,S", 0x46c00004, 0xffff003f, WR_D|RD_S|FP_D, SB1 },
08fe7a7e
NC		 819{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
820{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srav */
821{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t, I1 },
822{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
823{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srlv */
824{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t, I1 },
4372b673 825/* ssnop is at the start of the table. */
08fe7a7e
NC		 826{"standby", "", 0x42000021, 0xffffffff, 0, V1 },
827{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
828{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, I1 },
564e8ad9 829{"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
252b5132 830{"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
5fce5ddf 831{"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
08fe7a7e
NC		 832{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
833{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, I1 },
834{"suspend", "", 0x42000022, 0xffffffff, 0, V1 },
5fce5ddf 835{"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I5 },
08fe7a7e
NC		 836{"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, I1 },
837{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, I1 },
838{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, I1 },
839{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, I1 },
252b5132
RH		 840{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
841{"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
08fe7a7e
NC		 842{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
843{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
252b5132 844{"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 }, /* swc1 */
08fe7a7e
NC		 845{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
846{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, I1 },
847{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, I1 },
848{"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, I1 },
849{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, I1 },
850{"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
851{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I1 },
852{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
853{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I2 }, /* as swl */
854{"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
855{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, I1 },
856{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
857{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
252b5132 858{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
08fe7a7e
NC		 859{"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2|G1 },
860{"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, I2 },
861{"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2 },
862{"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
863{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
864{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
865{"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
866{"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
867{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */
868{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 },
869{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 },
870{"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
871{"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
872{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */
873{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 },
874{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 },
875{"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
876{"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
877{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */
878{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 },
15305553
NC		 879{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1 },
880{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1 },
881{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1 },
882{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1 },
08fe7a7e
NC		 883{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 },
884{"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
885{"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
886{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */
887{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 },
888{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 },
889{"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
890{"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
891{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */
892{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 },
893{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 },
894{"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
895{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
896{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */
897{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 },
898{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 },
899{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3 },
900{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
901{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
902{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, I1 },
903{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
904{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
905{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, I1 },
906{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, I3 },
907{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, I3 },
908{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, I1 },
909{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, I1 },
910{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, I1 },
911{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, I1 },
912{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, I1 },
913{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, I1 },
914{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, I3 },
915{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, I3 },
916{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, I1 },
917{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, I1 },
918{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, I1 },
919{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, I1 },
920{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
921{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 },
922{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 },
15305553 923{"wait", "", 0x42000020, 0xffffffff, TRAP, I3|I32 },
08fe7a7e
NC		 924{"wait", "J", 0x42000020, 0xfe00003f, TRAP, I32 },
925{"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 },
926{"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 },
252b5132
RH		 927/* No hazard protection on coprocessor instructions--they shouldn't
928 change the state of the processor and if they do it's up to the
929 user to put in nops as necessary. These are at the end so that the
99c14723 930 disassembler recognizes more specific versions first. */
08fe7a7e
NC		 931{"c0", "C", 0x42000000, 0xfe000000, 0, I1 },
932{"c1", "C", 0x46000000, 0xfe000000, 0, I1 },
933{"c2", "C", 0x4a000000, 0xfe000000, 0, I1 },
934{"c3", "C", 0x4e000000, 0xfe000000, 0, I1 },
935{"cop0", "C", 0, (int) M_COP0, INSN_MACRO, I1 },
936{"cop1", "C", 0, (int) M_COP1, INSN_MACRO, I1 },
937{"cop2", "C", 0, (int) M_COP2, INSN_MACRO, I1 },
938{"cop3", "C", 0, (int) M_COP3, INSN_MACRO, I1 },
252b5132
RH		 939
940 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
941 4010 any more, so move this insn out of the way. If the object
942 format gave us more info, we could do this right. */
08fe7a7e 943{"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t|RD_s, L1 },
252b5132
RH		 944};
945
946#define MIPS_NUM_OPCODES \
947 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
948const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
949
564e8ad9 950/* const removed from the following to allow for dynamic extensions to the
252b5132
RH		 951 * built-in instruction set. */
952struct mips_opcode *mips_opcodes =
953 (struct mips_opcode *) mips_builtin_opcodes;
954int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
955#undef MIPS_NUM_OPCODES
GDB Binutils - Deliverables
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