[deliverable/binutils-gdb.git] / opcodes / ppc-dis.c

/* ppc-dis.c -- Disassemble PowerPC instructions
   Copyright 1994, 1995, 2000, 2001, 2002 Free Software Foundation, Inc.
   Written by Ian Lance Taylor, Cygnus Support

This file is part of GDB, GAS, and the GNU binutils.

GDB, GAS, and the GNU binutils are free software; you can redistribute
them and/or modify them under the terms of the GNU General Public
License as published by the Free Software Foundation; either version
2, or (at your option) any later version.

GDB, GAS, and the GNU binutils are distributed in the hope that they
will be useful, but WITHOUT ANY WARRANTY; without even the implied
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
the GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this file; see the file COPYING.  If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#include <stdio.h>
#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/ppc.h"

/* This file provides several disassembler functions, all of which use
   the disassembler interface defined in dis-asm.h.  Several functions
   are provided because this file handles disassembly for the PowerPC
   in both big and little endian mode and also for the POWER (RS/6000)
   chip.  */

static int print_insn_powerpc PARAMS ((bfd_vma, struct disassemble_info *,
				       int bigendian, int dialect));

static int powerpc_dialect PARAMS ((struct disassemble_info *));

/* Determine which set of machines to disassemble for.  PPC403/601 or
   BookE.  For convenience, also disassemble instructions supported
   by the AltiVec vector unit.  */

int
powerpc_dialect(info)
     struct disassemble_info *info;
{
  int dialect = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;

  if (BFD_DEFAULT_TARGET_SIZE == 64)
    dialect |= PPC_OPCODE_64;

  if (info->disassembler_options
      && (strcmp (info->disassembler_options, "booke") == 0
	  || strcmp (info->disassembler_options, "booke32") == 0
	  || strcmp (info->disassembler_options, "booke64") == 0))
    dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
  else 
    if ((info->mach == bfd_mach_ppc_e500)
        || (info->disassembler_options
	&& (   strcmp (info->disassembler_options, "e500") == 0
	    || strcmp (info->disassembler_options, "e500x2") == 0)))
      {
        dialect |= PPC_OPCODE_BOOKE
	  | PPC_OPCODE_SPE | PPC_OPCODE_ISEL
	  | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
	  | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
	  | PPC_OPCODE_RFMCI;
	/* efs* and AltiVec conflict.  */
	dialect &= ~PPC_OPCODE_ALTIVEC;
      }
  else 
    if (info->disassembler_options
	&& (strcmp (info->disassembler_options, "efs") == 0))
      {
	dialect |= PPC_OPCODE_EFS;
	/* efs* and AltiVec conflict.  */
	dialect &= ~PPC_OPCODE_ALTIVEC;
      }
  else
    dialect |= PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_COMMON;

  if (info->disassembler_options
      && strcmp (info->disassembler_options, "power4") == 0)
    dialect |= PPC_OPCODE_POWER4;

  if (info->disassembler_options)
    {
      if (strstr (info->disassembler_options, "32") != NULL)
	dialect &= ~PPC_OPCODE_64;
      else if (strstr (info->disassembler_options, "64") != NULL)
	dialect |= PPC_OPCODE_64;
    }

  return dialect;
}

/* Print a big endian PowerPC instruction.  */

int
print_insn_big_powerpc (memaddr, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  return print_insn_powerpc (memaddr, info, 1, powerpc_dialect(info));
}

/* Print a little endian PowerPC instruction.  */

int
print_insn_little_powerpc (memaddr, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  return print_insn_powerpc (memaddr, info, 0, powerpc_dialect(info));
}

/* Print a POWER (RS/6000) instruction.  */

int
print_insn_rs6000 (memaddr, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
}

/* Print a PowerPC or POWER instruction.  */

static int
print_insn_powerpc (memaddr, info, bigendian, dialect)
     bfd_vma memaddr;
     struct disassemble_info *info;
     int bigendian;
     int dialect;
{
  bfd_byte buffer[4];
  int status;
  unsigned long insn;
  const struct powerpc_opcode *opcode;
  const struct powerpc_opcode *opcode_end;
  unsigned long op;

  status = (*info->read_memory_func) (memaddr, buffer, 4, info);
  if (status != 0)
    {
      (*info->memory_error_func) (status, memaddr, info);
      return -1;
    }

  if (bigendian)
    insn = bfd_getb32 (buffer);
  else
    insn = bfd_getl32 (buffer);

  /* Get the major opcode of the instruction.  */
  op = PPC_OP (insn);

  /* Find the first match in the opcode table.  We could speed this up
     a bit by doing a binary search on the major opcode.  */
  opcode_end = powerpc_opcodes + powerpc_num_opcodes;
  for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
    {
      unsigned long table_op;
      const unsigned char *opindex;
      const struct powerpc_operand *operand;
      int invalid;
      int need_comma;
      int need_paren;

      table_op = PPC_OP (opcode->opcode);
      if (op < table_op)
	break;
      if (op > table_op)
	continue;

      if ((insn & opcode->mask) != opcode->opcode
	  || (opcode->flags & dialect) == 0)
	continue;

      if ((dialect & PPC_OPCODE_EFS) && (opcode->flags & PPC_OPCODE_ALTIVEC))
        continue;

      /* Make two passes over the operands.  First see if any of them
	 have extraction functions, and, if they do, make sure the
	 instruction is valid.  */
      invalid = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  operand = powerpc_operands + *opindex;
	  if (operand->extract)
	    (*operand->extract) (insn, dialect, &invalid);
	}
      if (invalid)
	continue;

      /* The instruction is valid.  */
      (*info->fprintf_func) (info->stream, "%s", opcode->name);
      if (opcode->operands[0] != 0)
	(*info->fprintf_func) (info->stream, "\t");

      /* Now extract and print the operands.  */
      need_comma = 0;
      need_paren = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  long value;

	  operand = powerpc_operands + *opindex;

	  /* Operands that are marked FAKE are simply ignored.  We
	     already made sure that the extract function considered
	     the instruction to be valid.  */
	  if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	    continue;

	  /* Extract the value from the instruction.  */
	  if (operand->extract)
	    value = (*operand->extract) (insn, dialect, (int *) NULL);
	  else
	    {
	      value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
	      if ((operand->flags & PPC_OPERAND_SIGNED) != 0
		  && (value & (1 << (operand->bits - 1))) != 0)
		value -= 1 << operand->bits;
	    }

	  /* If the operand is optional, and the value is zero, don't
	     print anything.  */
	  if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	      && (operand->flags & PPC_OPERAND_NEXT) == 0
	      && value == 0)
	    continue;

	  if (need_comma)
	    {
	      (*info->fprintf_func) (info->stream, ",");
	      need_comma = 0;
	    }

	  /* Print the operand as directed by the flags.  */
	  if ((operand->flags & PPC_OPERAND_GPR) != 0)
	    (*info->fprintf_func) (info->stream, "r%ld", value);
	  else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	    (*info->fprintf_func) (info->stream, "f%ld", value);
	  else if ((operand->flags & PPC_OPERAND_VR) != 0)
	    (*info->fprintf_func) (info->stream, "v%ld", value);
	  else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	    (*info->print_address_func) (memaddr + value, info);
	  else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	    (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	  else if ((operand->flags & PPC_OPERAND_CR) == 0
		   || (dialect & PPC_OPCODE_PPC) == 0)
	    (*info->fprintf_func) (info->stream, "%ld", value);
	  else
	    {
	      if (operand->bits == 3)
		(*info->fprintf_func) (info->stream, "cr%d", value);
	      else
		{
		  static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
		  int cr;
		  int cc;

		  cr = value >> 2;
		  if (cr != 0)
		    (*info->fprintf_func) (info->stream, "4*cr%d", cr);
		  cc = value & 3;
		  if (cc != 0)
		    {
		      if (cr != 0)
			(*info->fprintf_func) (info->stream, "+");
		      (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
		    }
		}
	    }

	  if (need_paren)
	    {
	      (*info->fprintf_func) (info->stream, ")");
	      need_paren = 0;
	    }

	  if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	    need_comma = 1;
	  else
	    {
	      (*info->fprintf_func) (info->stream, "(");
	      need_paren = 1;
	    }
	}

      /* We have found and printed an instruction; return.  */
      return 4;
    }

  /* We could not find a match.  */
  (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);

  return 4;
}
Commit	Line	Data
252b5132	1	/* ppc-dis.c -- Disassemble PowerPC instructions
94efba12	2	Copyright 1994, 1995, 2000, 2001, 2002 Free Software Foundation, Inc.
252b5132 RH	3	Written by Ian Lance Taylor, Cygnus Support
	4
	5	This file is part of GDB, GAS, and the GNU binutils.
	6
	7	GDB, GAS, and the GNU binutils are free software; you can redistribute
	8	them and/or modify them under the terms of the GNU General Public
	9	License as published by the Free Software Foundation; either version
	10	2, or (at your option) any later version.
	11
	12	GDB, GAS, and the GNU binutils are distributed in the hope that they
	13	will be useful, but WITHOUT ANY WARRANTY; without even the implied
	14	warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
	15	the GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this file; see the file COPYING. If not, write to the Free
	19	Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	20
	21	#include <stdio.h>
252b5132 RH	22	#include "sysdep.h"
	23	#include "dis-asm.h"
	24	#include "opcode/ppc.h"
	25
	26	/* This file provides several disassembler functions, all of which use
	27	the disassembler interface defined in dis-asm.h. Several functions
	28	are provided because this file handles disassembly for the PowerPC
	29	in both big and little endian mode and also for the POWER (RS/6000)
	30	chip. */
	31
	32	static int print_insn_powerpc PARAMS ((bfd_vma, struct disassemble_info *,
	33	int bigendian, int dialect));
	34
418c1742 MG	35	static int powerpc_dialect PARAMS ((struct disassemble_info *));
	36
	37	/* Determine which set of machines to disassemble for. PPC403/601 or
9a0ccb24 MG	38	BookE. For convenience, also disassemble instructions supported
9a0ccb24 MG	39	by the AltiVec vector unit. */
418c1742 MG	40
	41	int
	42	powerpc_dialect(info)
	43	struct disassemble_info *info;
	44	{
	45	int dialect = PPC_OPCODE_PPC \| PPC_OPCODE_ALTIVEC;
	46
802a735e AM	47	if (BFD_DEFAULT_TARGET_SIZE == 64)
	48	dialect \|= PPC_OPCODE_64;
	49
	50	if (info->disassembler_options
	51	&& (strcmp (info->disassembler_options, "booke") == 0
	52	\|\| strcmp (info->disassembler_options, "booke32") == 0
	53	\|\| strcmp (info->disassembler_options, "booke64") == 0))
418c1742 MG	54	dialect \|= PPC_OPCODE_BOOKE \| PPC_OPCODE_BOOKE64;
418c1742 MG	55	else
23976049 EZ	56	if ((info->mach == bfd_mach_ppc_e500)
	57	\|\| (info->disassembler_options
	58	&& ( strcmp (info->disassembler_options, "e500") == 0
	59	\|\| strcmp (info->disassembler_options, "e500x2") == 0)))
	60	{
	61	dialect \|= PPC_OPCODE_BOOKE
	62	\| PPC_OPCODE_SPE \| PPC_OPCODE_ISEL
	63	\| PPC_OPCODE_EFS \| PPC_OPCODE_BRLOCK
	64	\| PPC_OPCODE_PMR \| PPC_OPCODE_CACHELCK
	65	\| PPC_OPCODE_RFMCI;
	66	/* efs* and AltiVec conflict. */
	67	dialect &= ~PPC_OPCODE_ALTIVEC;
	68	}
	69	else
	70	if (info->disassembler_options
	71	&& (strcmp (info->disassembler_options, "efs") == 0))
	72	{
	73	dialect \|= PPC_OPCODE_EFS;
	74	/* efs* and AltiVec conflict. */
	75	dialect &= ~PPC_OPCODE_ALTIVEC;
	76	}
	77	else
	78	dialect \|= PPC_OPCODE_403 \| PPC_OPCODE_601 \| PPC_OPCODE_COMMON;
802a735e	79
94efba12 AM	80	if (info->disassembler_options
	81	&& strcmp (info->disassembler_options, "power4") == 0)
	82	dialect \|= PPC_OPCODE_POWER4;
	83
802a735e AM	84	if (info->disassembler_options)
	85	{
	86	if (strstr (info->disassembler_options, "32") != NULL)
	87	dialect &= ~PPC_OPCODE_64;
	88	else if (strstr (info->disassembler_options, "64") != NULL)
	89	dialect \|= PPC_OPCODE_64;
	90	}
	91
418c1742 MG	92	return dialect;
	93	}
	94
	95	/* Print a big endian PowerPC instruction. */
252b5132 RH	96
	97	int
	98	print_insn_big_powerpc (memaddr, info)
	99	bfd_vma memaddr;
	100	struct disassemble_info *info;
	101	{
418c1742	102	return print_insn_powerpc (memaddr, info, 1, powerpc_dialect(info));
252b5132 RH	103	}
252b5132 RH	104
418c1742	105	/* Print a little endian PowerPC instruction. */
252b5132 RH	106
	107	int
	108	print_insn_little_powerpc (memaddr, info)
	109	bfd_vma memaddr;
	110	struct disassemble_info *info;
	111	{
418c1742	112	return print_insn_powerpc (memaddr, info, 0, powerpc_dialect(info));
252b5132 RH	113	}
	114
	115	/* Print a POWER (RS/6000) instruction. */
	116
	117	int
	118	print_insn_rs6000 (memaddr, info)
	119	bfd_vma memaddr;
	120	struct disassemble_info *info;
	121	{
	122	return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
	123	}
	124
	125	/* Print a PowerPC or POWER instruction. */
	126
	127	static int
	128	print_insn_powerpc (memaddr, info, bigendian, dialect)
	129	bfd_vma memaddr;
	130	struct disassemble_info *info;
	131	int bigendian;
	132	int dialect;
	133	{
	134	bfd_byte buffer[4];
	135	int status;
	136	unsigned long insn;
	137	const struct powerpc_opcode *opcode;
	138	const struct powerpc_opcode *opcode_end;
	139	unsigned long op;
	140
	141	status = (*info->read_memory_func) (memaddr, buffer, 4, info);
	142	if (status != 0)
	143	{
	144	(*info->memory_error_func) (status, memaddr, info);
	145	return -1;
	146	}
	147
	148	if (bigendian)
	149	insn = bfd_getb32 (buffer);
	150	else
	151	insn = bfd_getl32 (buffer);
	152
	153	/* Get the major opcode of the instruction. */
	154	op = PPC_OP (insn);
	155
	156	/* Find the first match in the opcode table. We could speed this up
	157	a bit by doing a binary search on the major opcode. */
	158	opcode_end = powerpc_opcodes + powerpc_num_opcodes;
	159	for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
	160	{
	161	unsigned long table_op;
	162	const unsigned char *opindex;
	163	const struct powerpc_operand *operand;
	164	int invalid;
	165	int need_comma;
	166	int need_paren;
	167
	168	table_op = PPC_OP (opcode->opcode);
	169	if (op < table_op)
	170	break;
	171	if (op > table_op)
	172	continue;
	173
	174	if ((insn & opcode->mask) != opcode->opcode
	175	\|\| (opcode->flags & dialect) == 0)
	176	continue;
177
23976049 EZ	178	if ((dialect & PPC_OPCODE_EFS) && (opcode->flags & PPC_OPCODE_ALTIVEC))
	179	continue;
	180
252b5132 RH	181	/* Make two passes over the operands. First see if any of them
	182	have extraction functions, and, if they do, make sure the
	183	instruction is valid. */
	184	invalid = 0;
	185	for (opindex = opcode->operands; *opindex != 0; opindex++)
	186	{
	187	operand = powerpc_operands + *opindex;
	188	if (operand->extract)
802a735e	189	(*operand->extract) (insn, dialect, &invalid);
252b5132 RH	190	}
	191	if (invalid)
	192	continue;
	193
	194	/* The instruction is valid. */
	195	(*info->fprintf_func) (info->stream, "%s", opcode->name);
	196	if (opcode->operands[0] != 0)
	197	(*info->fprintf_func) (info->stream, "\t");
	198
	199	/* Now extract and print the operands. */
	200	need_comma = 0;
	201	need_paren = 0;
	202	for (opindex = opcode->operands; *opindex != 0; opindex++)
	203	{
	204	long value;
	205
	206	operand = powerpc_operands + *opindex;
	207
	208	/* Operands that are marked FAKE are simply ignored. We
	209	already made sure that the extract function considered
	210	the instruction to be valid. */
	211	if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	212	continue;
	213
	214	/* Extract the value from the instruction. */
	215	if (operand->extract)
802a735e	216	value = (operand->extract) (insn, dialect, (int ) NULL);
252b5132 RH	217	else
	218	{
	219	value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
	220	if ((operand->flags & PPC_OPERAND_SIGNED) != 0
	221	&& (value & (1 << (operand->bits - 1))) != 0)
	222	value -= 1 << operand->bits;
	223	}
	224
	225	/* If the operand is optional, and the value is zero, don't
	226	print anything. */
	227	if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	228	&& (operand->flags & PPC_OPERAND_NEXT) == 0
	229	&& value == 0)
	230	continue;
	231
	232	if (need_comma)
	233	{
	234	(*info->fprintf_func) (info->stream, ",");
	235	need_comma = 0;
	236	}
	237
	238	/* Print the operand as directed by the flags. */
	239	if ((operand->flags & PPC_OPERAND_GPR) != 0)
	240	(*info->fprintf_func) (info->stream, "r%ld", value);
	241	else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	242	(*info->fprintf_func) (info->stream, "f%ld", value);
786e2c0f C	243	else if ((operand->flags & PPC_OPERAND_VR) != 0)
786e2c0f C	244	(*info->fprintf_func) (info->stream, "v%ld", value);
252b5132 RH	245	else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	246	(*info->print_address_func) (memaddr + value, info);
	247	else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	248	(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	249	else if ((operand->flags & PPC_OPERAND_CR) == 0
	250	\|\| (dialect & PPC_OPCODE_PPC) == 0)
	251	(*info->fprintf_func) (info->stream, "%ld", value);
	252	else
	253	{
	254	if (operand->bits == 3)
	255	(*info->fprintf_func) (info->stream, "cr%d", value);
	256	else
	257	{
	258	static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
	259	int cr;
	260	int cc;
	261
	262	cr = value >> 2;
	263	if (cr != 0)
	264	(info->fprintf_func) (info->stream, "4cr%d", cr);
	265	cc = value & 3;
	266	if (cc != 0)
	267	{
	268	if (cr != 0)
	269	(*info->fprintf_func) (info->stream, "+");
	270	(*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
	271	}
	272	}
	273	}
	274
	275	if (need_paren)
	276	{
	277	(*info->fprintf_func) (info->stream, ")");
	278	need_paren = 0;
	279	}
	280
	281	if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	282	need_comma = 1;
	283	else
	284	{
	285	(*info->fprintf_func) (info->stream, "(");
	286	need_paren = 1;
	287	}
	288	}
	289
	290	/* We have found and printed an instruction; return. */
	291	return 4;
	292	}
	293
	294	/* We could not find a match. */
	295	(*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
	296
	297	return 4;
	298	}