* sparc.c (sparc_find_call): Warning fix.
[deliverable/binutils-gdb.git] / opcodes / s390-opc.c
CommitLineData
a85d7ed0 1/* s390-opc.c -- S390 opcode list
060d22b0 2 Copyright 2000, 2001 Free Software Foundation, Inc.
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3 Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
4
5 This file is part of GDB, GAS, and the GNU binutils.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22#include <stdio.h>
23#include "ansidecl.h"
24#include "opcode/s390.h"
25
26/* This file holds the S390 opcode table. The opcode table
27 includes almost all of the extended instruction mnemonics. This
28 permits the disassembler to use them, and simplifies the assembler
29 logic, at the cost of increasing the table size. The table is
30 strictly constant data, so the compiler should be able to put it in
31 the .text section.
32
33 This file also holds the operand table. All knowledge about
34 inserting operands into instructions and vice-versa is kept in this
35 file. */
36
37/* The operands table.
38 The fields are bits, shift, insert, extract, flags. */
39
40const struct s390_operand s390_operands[] =
41{
42#define UNUSED 0
43 { 0, 0, 0 }, /* Indicates the end of the operand list */
44
45#define R_8 1 /* GPR starting at position 8 */
46 { 4, 8, S390_OPERAND_GPR },
47#define R_12 2 /* GPR starting at position 12 */
355d475e 48 { 4, 12, S390_OPERAND_GPR },
a85d7ed0 49#define R_16 3 /* GPR starting at position 16 */
355d475e 50 { 4, 16, S390_OPERAND_GPR },
a85d7ed0 51#define R_20 4 /* GPR starting at position 20 */
355d475e 52 { 4, 20, S390_OPERAND_GPR },
a85d7ed0 53#define R_24 5 /* GPR starting at position 24 */
355d475e 54 { 4, 24, S390_OPERAND_GPR },
a85d7ed0 55#define R_28 6 /* GPR starting at position 28 */
355d475e 56 { 4, 28, S390_OPERAND_GPR },
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57#define R_32 7 /* GPR starting at position 32 */
58 { 4, 32, S390_OPERAND_GPR },
59
60#define F_8 8 /* FPR starting at position 8 */
61 { 4, 8, S390_OPERAND_FPR },
62#define F_12 9 /* FPR starting at position 12 */
63 { 4, 12, S390_OPERAND_FPR },
64#define F_16 10 /* FPR starting at position 16 */
65 { 4, 16, S390_OPERAND_FPR },
66#define F_20 11 /* FPR starting at position 16 */
67 { 4, 16, S390_OPERAND_FPR },
68#define F_24 12 /* FPR starting at position 24 */
69 { 4, 24, S390_OPERAND_FPR },
70#define F_28 13 /* FPR starting at position 28 */
71 { 4, 28, S390_OPERAND_FPR },
72#define F_32 14 /* FPR starting at position 32 */
73 { 4, 32, S390_OPERAND_FPR },
74
75#define A_8 15 /* Access reg. starting at position 8 */
76 { 4, 8, S390_OPERAND_AR },
77#define A_12 16 /* Access reg. starting at position 12 */
78 { 4, 12, S390_OPERAND_AR },
79#define A_24 17 /* Access reg. starting at position 24 */
80 { 4, 24, S390_OPERAND_AR },
81#define A_28 18 /* Access reg. starting at position 28 */
82 { 4, 28, S390_OPERAND_AR },
83
84#define C_8 19 /* Control reg. starting at position 8 */
85 { 4, 8, S390_OPERAND_CR },
86#define C_12 20 /* Control reg. starting at position 12 */
87 { 4, 12, S390_OPERAND_CR },
88
89#define B_16 21 /* Base register starting at position 16 */
355d475e 90 { 4, 16, S390_OPERAND_BASE|S390_OPERAND_GPR },
a85d7ed0 91#define B_32 22 /* Base register starting at position 32 */
355d475e 92 { 4, 32, S390_OPERAND_BASE|S390_OPERAND_GPR },
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93
94#define X_12 23 /* Index register starting at position 12 */
355d475e 95 { 4, 12, S390_OPERAND_INDEX|S390_OPERAND_GPR },
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96
97#define D_20 24 /* Displacement starting at position 20 */
355d475e 98 { 12, 20, S390_OPERAND_DISP },
a85d7ed0 99#define D_36 25 /* Displacement starting at position 36 */
355d475e 100 { 12, 36, S390_OPERAND_DISP },
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101
102#define L4_8 26 /* 4 bit length starting at position 8 */
355d475e 103 { 4, 8, S390_OPERAND_LENGTH },
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104#define L4_12 27 /* 4 bit length starting at position 12 */
105 { 4, 12, S390_OPERAND_LENGTH },
106#define L8_8 28 /* 8 bit length starting at position 8 */
355d475e 107 { 8, 8, S390_OPERAND_LENGTH },
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108
109#define U4_8 29 /* 4 bit unsigned value starting at 8 */
110 { 4, 8, 0 },
111#define U4_12 30 /* 4 bit unsigned value starting at 12 */
112 { 4, 12, 0 },
113#define U4_16 31 /* 4 bit unsigned value starting at 16 */
114 { 4, 16, 0 },
115#define U4_20 32 /* 4 bit unsigned value starting at 20 */
116 { 4, 20, 0 },
117#define U8_8 33 /* 8 bit unsigned value starting at 8 */
355d475e 118 { 8, 8, 0 },
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119#define U8_16 34 /* 8 bit unsigned value starting at 16 */
120 { 8, 16, 0 },
121#define I16_16 35 /* 16 bit signed value starting at 16 */
122 { 16, 16, S390_OPERAND_SIGNED },
123#define U16_16 36 /* 16 bit unsigned value starting at 16 */
355d475e 124 { 16, 16, 0 },
a85d7ed0 125#define J16_16 37 /* PC relative jump offset at 16 */
355d475e 126 { 16, 16, S390_OPERAND_PCREL },
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127#define J32_16 38 /* PC relative long offset at 16 */
128 { 32, 16, S390_OPERAND_PCREL }
129};
130
131
132/* Macros used to form opcodes. */
133
134/* 8/16/48 bit opcodes */
135#define OP8(x) { x, 0x00, 0x00, 0x00, 0x00, 0x00 }
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136#define OP16(x) { x >> 8, x & 255, 0x00, 0x00, 0x00, 0x00 }
137#define OP48(x) { x >> 40, (x >> 32) & 255, (x >> 24) & 255, \
138 (x >> 16) & 255, (x >> 8) & 255, x & 255}
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139
140#define INSTR_E 2, { 0,0,0,0,0,0 } /* e.g. pr */
141#define INSTR_RR 2, { R_8,R_12,0,0,0,0 } /* e.g. lr */
142#define INSTR_RR_M 2, { U4_8,R_12,0,0,0,0 } /* e.g. bcr */
143#define INSTR_RR_B 2, { R_12, 0,0,0,0,0 } /* e.g. br */
144#define INSTR_RR_I 2, { U8_8, 0,0,0,0,0 } /* e.g. svc */
145#define INSTR_RR_R 2, { R_8, 0,0,0,0,0 } /* e.g. spm */
146#define INSTR_RR_E 2, { R_8,R_12,0,0,0,0 } /* e.g. aer */
147#define INSTR_RR_D 2, { F_8,F_12,0,0,0,0 } /* e.g. adr */
148#define INSTR_RR_X 2, { R_8,R_12,0,0,0,0 } /* e.g. mxr */
149#define INSTR_RR_ED 2, { F_8,F_12,0,0,0,0 } /* e.g. mer */
150#define INSTR_RR_DE 2, { F_8,F_12,0,0,0,0 } /* e.g. lrer */
151#define INSTR_RR_DX 2, { F_8,F_12,0,0,0,0 } /* e.g. mxdr */
152#define INSTR_RR_XD 2, { F_8,F_12,0,0,0,0 } /* e.g. lrdr */
153#define INSTR_RRE 4, { R_24,R_28,0,0,0,0 } /* e.g. lura */
154#define INSTR_RRE_A 4, { A_24,A_28,0,0,0,0 } /* e.g. cpya */
155#define INSTR_RRE_F 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */
156#define INSTR_RRE_O 4, { 0,0,0,0,0,0 } /* e.g. palb */
157#define INSTR_RRE_R 4, { R_24,0,0,0,0,0 } /* e.g. ipm */
158#define INSTR_RRE_R2 4, { R_28,0,0,0,0,0 } /* e.g. tb */
159#define INSTR_RRE_E 4, { F_24,0,0,0,0,0 } /* e.g. sqer */
160#define INSTR_RRE_D 4, { F_24,0,0,0,0,0 } /* e.g. sqdr */
161#define INSTR_RRE_X 4, { F_24,0,0,0,0,0 } /* e.g. dxr */
162#define INSTR_RRE_AR 4, { A_24,R_28,0,0,0,0 } /* e.g. sar */
163#define INSTR_RRE_RA 4, { R_24,A_28,0,0,0,0 } /* e.g. ear */
164#define INSTR_RRF_M 4, { R_24,U4_16,R_28,0,0,0 } /* e.g. cfxbr*/
165#define INSTR_RRF_RM 4, { R_24,R_16,R_28,U4_20,0,0 } /* e.g. didbr*/
166#define INSTR_RRF_R 4, { R_16,R_24,R_28,0,0,0 } /* e.g. madbr*/
167#define INSTR_RRF_F 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr*/
168#define INSTR_RS 4, { R_8,R_12,D_20,B_16,0,0 } /* e.g. cs */
169#define INSTR_RS_A 4, { A_8,A_12,D_20,B_16,0,0 } /* e.g. lam */
170#define INSTR_RS_C 4, { C_8,C_12,D_20,B_16,0,0 } /* e.g. lctl */
171#define INSTR_RS_M 4, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icm */
172#define INSTR_RS_S 4, { R_8,D_20,B_16,0,0,0 } /* e.g. sll */
173#define INSTR_RS_D 4, { R_8,D_20,B_16,0,0,0 } /* e.g. sldl */
174#define INSTR_RX 4, { R_8,D_20,X_12,B_16,0,0 } /* e.g. l */
175#define INSTR_RX_M 4, { U4_8,D_20,X_12,B_16,0,0 } /* e.g. bc */
176#define INSTR_RX_B 4, { D_20,X_12,B_16,0,0,0 } /* e.g. b */
177#define INSTR_RX_E 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. ae */
178#define INSTR_RX_D 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. ad */
179#define INSTR_RX_ED 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. me */
180#define INSTR_RX_DX 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. mxd */
181#define INSTR_RXE 6, { R_8,D_20,X_12,B_16,0,0 } /* e.g. agr */
182#define INSTR_RXE_F 6, { F_8,D_20,X_12,B_16,0,0 } /* e.g. axbr */
183#define INSTR_RXF 6, { F_32,D_20,X_12,B_16,F_8,0 } /* e.g. madb */
184#define INSTR_S 4, { D_20,B_16,0,0,0,0 } /* e.g. lpsw */
185#define INSTR_S_O 4, { 0,0,0,0,0,0 } /* e.g. hsch */
186#define INSTR_SI 4, { D_20,B_16,U8_8,0,0,0 } /* e.g. cli */
187#define INSTR_SS_RR 6, { D_20,R_8,B_16,D_36,B_32,R_12 } /* e.g. mvck */
188#define INSTR_SS_LL 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
189#define INSTR_SS_LI 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
190#define INSTR_SS_L 6, { D_20,L8_8,B_16,D_36,B_32,0 } /* e.g. mvc */
191#define INSTR_SS_LMD 6, { R_8,R_12,D_20,B_16,D_36,B_32 } /* e.g. lmd */
192#define INSTR_SS_PLO 6, { R_8,D_20,B_16,R_12,D_36,B_32 } /* e.g. plo */
193#define INSTR_SSE 6, { D_20,B_16,D_36,B_32,0,0 } /* e.g. mvsdk */
194#define INSTR_RI 4, { R_8,I16_16,0,0,0,0 } /* e.g. ahi */
195#define INSTR_RI_U 4, { R_8,U16_16,0,0,0,0 } /* e.g. tml */
196#define INSTR_RI_A 4, { R_8,J16_16,0,0,0,0 } /* e.g. brct */
197#define INSTR_RI_MA 4, { U4_8,J16_16,0,0,0 } /* e.g. brc */
198#define INSTR_RI_B 4, { J16_16,0,0,0,0 } /* e.g. j */
199#define INSTR_RSI_A 4, { R_8,R_12,J16_16,0,0,0 } /* e.g. brxh */
200#define INSTR_RSE 6, { R_8,D_20,B_16,R_12,0,0 } /* e.g. lmg */
201#define INSTR_RSE_M 6, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icmh */
202#define INSTR_RSE_R 6, { R_8,R_12,D_20,B_16,0,0 } /* e.g. lmh */
203#define INSTR_RIE_A 6, { R_8,J16_16,R_12,0,0,0 } /* e.g. brxhg */
204#define INSTR_RIL_A 6, { R_8,J32_16,0,0,0,0 } /* e.g. brasl */
205#define INSTR_RIL_B 6, { J32_16,0,0,0,0,0 } /* e.g. jg */
206#define INSTR_RIL_MA 6, { R_8,J32_16,0,0,0,0 } /* e.g. brcl */
355d475e 207
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208#define MASK_E { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
209#define MASK_RR { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
210#define MASK_RR_M { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
211#define MASK_RR_B { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 }
212#define MASK_RR_I { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
213#define MASK_RR_R { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
214#define MASK_RR_E { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
215#define MASK_RR_D { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
216#define MASK_RR_X { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
217#define MASK_RR_ED { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
218#define MASK_RR_DE { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
219#define MASK_RR_DX { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
220#define MASK_RR_XD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
221#define MASK_RRE { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
222#define MASK_RRE_A { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
223#define MASK_RRE_F { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
224#define MASK_RRE_O { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 }
225#define MASK_RRE_R { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
226#define MASK_RRE_R2 { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
227#define MASK_RRE_E { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
228#define MASK_RRE_D { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
229#define MASK_RRE_X { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
230#define MASK_RRE_AR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
231#define MASK_RRE_RA { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
232#define MASK_RRF_M { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
233#define MASK_RRF_RM { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
234#define MASK_RRF_R { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
235#define MASK_RRF_F { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
236#define MASK_RS { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
237#define MASK_RS_A { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
238#define MASK_RS_C { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
239#define MASK_RS_M { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
240#define MASK_RS_S { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
241#define MASK_RS_D { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
242#define MASK_RX { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
243#define MASK_RX_M { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
244#define MASK_RX_B { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 }
245#define MASK_RX_E { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
246#define MASK_RX_D { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
247#define MASK_RX_ED { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
248#define MASK_RX_DX { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
249#define MASK_RXE { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
250#define MASK_RXE_F { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
251#define MASK_RXF { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
252#define MASK_S { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
253#define MASK_S_O { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 }
254#define MASK_SI { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
255#define MASK_SS_RR { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
256#define MASK_SS_LL { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
257#define MASK_SS_LI { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
258#define MASK_SS_L { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
259#define MASK_SS_LMD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
260#define MASK_SS_PLO { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
261#define MASK_SSE { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
262#define MASK_RI { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
263#define MASK_RI_U { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
264#define MASK_RI_A { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
265#define MASK_RI_MA { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
266#define MASK_RI_B { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
267#define MASK_RSI_A { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
268#define MASK_RSE { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
269#define MASK_RSE_M { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
270#define MASK_RSE_R { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
271#define MASK_RIE_A { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
272#define MASK_RIL_A { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
273#define MASK_RIL_B { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
274#define MASK_RIL_M { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
275#define MASK_RIL_MA { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
355d475e 276
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277/* The opcode formats table (blueprints for .insn pseudo mnemonic). */
278
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279const struct s390_opcode s390_opformats[] =
280 {
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281 { "e", OP8(0x00LL), MASK_E, INSTR_E, 3 },
282 { "ri", OP8(0x00LL), MASK_RI, INSTR_RI, 3 },
283 { "ri_a", OP8(0x00LL), MASK_RI_A, INSTR_RI_A, 3 },
284 { "ri_b", OP8(0x00LL), MASK_RI_B, INSTR_RI_B, 3 },
285 { "ri_ma", OP8(0x00LL), MASK_RI_MA, INSTR_RI_MA, 3 },
286 { "ri_u", OP8(0x00LL), MASK_RI_U, INSTR_RI_U, 3 },
287 { "rie_a", OP8(0x00LL), MASK_RIE_A, INSTR_RIE_A, 3 },
288 { "ril_a", OP8(0x00LL), MASK_RIL_A, INSTR_RIL_A, 3 },
289 { "ril_b", OP8(0x00LL), MASK_RIL_B, INSTR_RIL_B, 3 },
290 { "ril_ma", OP8(0x00LL), MASK_RIL_MA, INSTR_RIL_MA, 3 },
291 { "rr", OP8(0x00LL), MASK_RR, INSTR_RR, 3 },
292 { "rr_b", OP8(0x00LL), MASK_RR_B, INSTR_RR_B, 3 },
293 { "rr_d", OP8(0x00LL), MASK_RR_D, INSTR_RR_D, 3 },
294 { "rr_de", OP8(0x00LL), MASK_RR_DE, INSTR_RR_DE, 3 },
295 { "rr_dx", OP8(0x00LL), MASK_RR_DX, INSTR_RR_DX, 3 },
296 { "rr_e", OP8(0x00LL), MASK_RR_E, INSTR_RR_E, 3 },
297 { "rr_ed", OP8(0x00LL), MASK_RR_ED, INSTR_RR_ED, 3 },
298 { "rr_i", OP8(0x00LL), MASK_RR_I, INSTR_RR_I, 3 },
299 { "rr_m", OP8(0x00LL), MASK_RR_M, INSTR_RR_M, 3 },
300 { "rr_r", OP8(0x00LL), MASK_RR_R, INSTR_RR_R, 3 },
301 { "rr_x", OP8(0x00LL), MASK_RR_X, INSTR_RR_X, 3 },
302 { "rr_xd", OP8(0x00LL), MASK_RR_XD, INSTR_RR_XD, 3 },
303 { "rre", OP8(0x00LL), MASK_RRE, INSTR_RRE, 3 },
304 { "rre_a", OP8(0x00LL), MASK_RRE_A, INSTR_RRE_A, 3 },
305 { "rre_ar", OP8(0x00LL), MASK_RRE_AR, INSTR_RRE_AR, 3 },
306 { "rre_d", OP8(0x00LL), MASK_RRE_D, INSTR_RRE_D, 3 },
307 { "rre_e", OP8(0x00LL), MASK_RRE_E, INSTR_RRE_E, 3 },
308 { "rre_f", OP8(0x00LL), MASK_RRE_F, INSTR_RRE_F, 3 },
309 { "rre_o", OP8(0x00LL), MASK_RRE_O, INSTR_RRE_O, 3 },
310 { "rre_r", OP8(0x00LL), MASK_RRE_R, INSTR_RRE_R, 3 },
311 { "rre_r2", OP8(0x00LL), MASK_RRE_R2, INSTR_RRE_R2, 3 },
312 { "rre_ra", OP8(0x00LL), MASK_RRE_RA, INSTR_RRE_RA, 3 },
313 { "rre_x", OP8(0x00LL), MASK_RRE_X, INSTR_RRE_X, 3 },
314 { "rrf_f", OP8(0x00LL), MASK_RRF_F, INSTR_RRF_F, 3 },
315 { "rrf_m", OP8(0x00LL), MASK_RRF_M, INSTR_RRF_M, 3 },
316 { "rrf_r", OP8(0x00LL), MASK_RRF_R, INSTR_RRF_R, 3 },
317 { "rrf_rm", OP8(0x00LL), MASK_RRF_RM, INSTR_RRF_RM, 3 },
318 { "rs", OP8(0x00LL), MASK_RS, INSTR_RS, 3 },
319 { "rs_a", OP8(0x00LL), MASK_RS_A, INSTR_RS_A, 3 },
320 { "rs_c", OP8(0x00LL), MASK_RS_C, INSTR_RS_C, 3 },
321 { "rs_d", OP8(0x00LL), MASK_RS_D, INSTR_RS_D, 3 },
322 { "rs_m", OP8(0x00LL), MASK_RS_M, INSTR_RS_M, 3 },
323 { "rs_s", OP8(0x00LL), MASK_RS_S, INSTR_RS_S, 3 },
324 { "rse", OP8(0x00LL), MASK_RSE, INSTR_RSE, 3 },
325 { "rse_m", OP8(0x00LL), MASK_RSE_M, INSTR_RSE_M, 3 },
326 { "rse_r", OP8(0x00LL), MASK_RSE_R, INSTR_RSE_R, 3 },
327 { "rsi_a", OP8(0x00LL), MASK_RSI_A, INSTR_RSI_A, 3 },
328 { "rx", OP8(0x00LL), MASK_RX, INSTR_RX, 3 },
329 { "rx_b", OP8(0x00LL), MASK_RX_B, INSTR_RX_B, 3 },
330 { "rx_d", OP8(0x00LL), MASK_RX_D, INSTR_RX_D, 3 },
331 { "rx_dx", OP8(0x00LL), MASK_RX_DX, INSTR_RX_DX, 3 },
332 { "rx_e", OP8(0x00LL), MASK_RX_E, INSTR_RX_E, 3 },
333 { "rx_ed", OP8(0x00LL), MASK_RX_ED, INSTR_RX_ED, 3 },
334 { "rx_m", OP8(0x00LL), MASK_RX_M, INSTR_RX_M, 3 },
335 { "rxe", OP8(0x00LL), MASK_RXE, INSTR_RXE, 3 },
336 { "rxe_f", OP8(0x00LL), MASK_RXE_F, INSTR_RXE_F, 3 },
337 { "rxf", OP8(0x00LL), MASK_RXF, INSTR_RXF, 3 },
338 { "s", OP8(0x00LL), MASK_S, INSTR_S, 3 },
339 { "si", OP8(0x00LL), MASK_SI, INSTR_SI, 3 },
340 { "ss_l", OP8(0x00LL), MASK_SS_L, INSTR_SS_L, 3 },
341 { "ss_li", OP8(0x00LL), MASK_SS_LI, INSTR_SS_LI, 3 },
342 { "ss_ll", OP8(0x00LL), MASK_SS_LL, INSTR_SS_LL, 3 },
343 { "ss_lmd", OP8(0x00LL), MASK_SS_LMD, INSTR_SS_LMD, 3 },
344 { "ss_plo", OP8(0x00LL), MASK_SS_PLO, INSTR_SS_PLO, 3 },
345 { "ss_rr", OP8(0x00LL), MASK_SS_RR, INSTR_SS_RR, 3 },
346 { "sse", OP8(0x00LL), MASK_SSE, INSTR_SSE, 3 },
347};
348
349const int s390_num_opformats =
350 sizeof (s390_opformats) / sizeof (s390_opformats[0]);
351
352/* The opcode table.
353
354 The format of the opcode table is:
355
356 NAME OPCODE MASK OPERANDS
357
358 NAME is the name of the instruction.
359 OPCODE is the instruction opcode.
360 MASK is the opcode mask; this is used to tell the disassembler
361 which bits in the actual opcode must match OPCODE.
362 OPERANDS is the list of operands.
363
364 The disassembler reads the table in order and prints the first
365 instruction which matches. */
366
82b66b23
NC
367const struct s390_opcode s390_opcodes[] =
368 {
369 { "dp", OP8(0xfdLL), MASK_SS_LL, INSTR_SS_LL, 3},
370 { "mp", OP8(0xfcLL), MASK_SS_LL, INSTR_SS_LL, 3},
371 { "sp", OP8(0xfbLL), MASK_SS_LL, INSTR_SS_LL, 3},
372 { "ap", OP8(0xfaLL), MASK_SS_LL, INSTR_SS_LL, 3},
373 { "cp", OP8(0xf9LL), MASK_SS_LL, INSTR_SS_LL, 3},
374 { "zap", OP8(0xf8LL), MASK_SS_LL, INSTR_SS_LL, 3},
375 { "unpk", OP8(0xf3LL), MASK_SS_LL, INSTR_SS_LL, 3},
376 { "pack", OP8(0xf2LL), MASK_SS_LL, INSTR_SS_LL, 3},
377 { "mvo", OP8(0xf1LL), MASK_SS_LL, INSTR_SS_LL, 3},
378 { "srp", OP8(0xf0LL), MASK_SS_LI, INSTR_SS_LI, 3},
379 { "lmd", OP8(0xefLL), MASK_SS_LMD, INSTR_SS_LMD, 2},
380 { "plo", OP8(0xeeLL), MASK_SS_PLO, INSTR_SS_PLO, 3},
381 { "msdb", OP48(0xed000000001fLL), MASK_RXF, INSTR_RXF, 3},
382 { "madb", OP48(0xed000000001eLL), MASK_RXF, INSTR_RXF, 3},
383 { "ddb", OP48(0xed000000001dLL), MASK_RXE_F, INSTR_RXE_F, 3},
384 { "mdb", OP48(0xed000000001cLL), MASK_RXE_F, INSTR_RXE_F, 3},
385 { "sdb", OP48(0xed000000001bLL), MASK_RXE_F, INSTR_RXE_F, 3},
386 { "adb", OP48(0xed000000001aLL), MASK_RXE_F, INSTR_RXE_F, 3},
387 { "cdb", OP48(0xed0000000019LL), MASK_RXE_F, INSTR_RXE_F, 3},
388 { "kdb", OP48(0xed0000000018LL), MASK_RXE_F, INSTR_RXE_F, 3},
389 { "meeb", OP48(0xed0000000017LL), MASK_RXE_F, INSTR_RXE_F, 3},
390 { "sqdb", OP48(0xed0000000015LL), MASK_RXE_F, INSTR_RXE_F, 3},
391 { "sqeb", OP48(0xed0000000014LL), MASK_RXE_F, INSTR_RXE_F, 3},
392 { "tcxb", OP48(0xed0000000012LL), MASK_RXE_F, INSTR_RXE_F, 3},
393 { "tcdb", OP48(0xed0000000011LL), MASK_RXE_F, INSTR_RXE_F, 3},
394 { "tceb", OP48(0xed0000000010LL), MASK_RXE_F, INSTR_RXE_F, 3},
395 { "mseb", OP48(0xed000000000fLL), MASK_RXF, INSTR_RXF, 3},
396 { "maeb", OP48(0xed000000000eLL), MASK_RXF, INSTR_RXF, 3},
397 { "deb", OP48(0xed000000000dLL), MASK_RXE_F, INSTR_RXE_F, 3},
398 { "mdeb", OP48(0xed000000000cLL), MASK_RXE_F, INSTR_RXE_F, 3},
399 { "seb", OP48(0xed000000000bLL), MASK_RXE_F, INSTR_RXE_F, 3},
400 { "aeb", OP48(0xed000000000aLL), MASK_RXE_F, INSTR_RXE_F, 3},
401 { "ceb", OP48(0xed0000000009LL), MASK_RXE_F, INSTR_RXE_F, 3},
402 { "keb", OP48(0xed0000000008LL), MASK_RXE_F, INSTR_RXE_F, 3},
403 { "mxdb", OP48(0xed0000000007LL), MASK_RXE_F, INSTR_RXE_F, 3},
404 { "lxeb", OP48(0xed0000000006LL), MASK_RXE_F, INSTR_RXE_F, 3},
405 { "lxdb", OP48(0xed0000000005LL), MASK_RXE_F, INSTR_RXE_F, 3},
406 { "ldeb", OP48(0xed0000000004LL), MASK_RXE_F, INSTR_RXE_F, 3},
a85d7ed0
NC
407 { "brxlg", OP48(0xec0000000045LL), MASK_RIE_A, INSTR_RIE_A, 2},
408 { "brxhg", OP48(0xec0000000044LL), MASK_RIE_A, INSTR_RIE_A, 2},
82b66b23
NC
409 { "lmh", OP48(0xeb0000000096LL), MASK_RSE_R, INSTR_RSE_R, 2},
410 { "mvclu", OP48(0xeb000000008eLL), MASK_RSE_R, INSTR_RSE_R, 2},
411 { "icmh", OP48(0xeb0000000080LL), MASK_RSE_M, INSTR_RSE_M, 2},
a85d7ed0 412 { "bxleg", OP48(0xeb0000000045LL), MASK_RSE_R, INSTR_RSE_R, 2},
82b66b23
NC
413 { "bxhg", OP48(0xeb0000000044LL), MASK_RSE_R, INSTR_RSE_R, 2},
414 { "cdsg", OP48(0xeb000000003eLL), MASK_RSE_R, INSTR_RSE_R, 2},
415 { "csg", OP48(0xeb0000000030LL), MASK_RSE_R, INSTR_RSE_R, 2},
a85d7ed0
NC
416 { "lctlg", OP48(0xeb000000002fLL), MASK_RSE_R, INSTR_RSE_R, 2},
417 { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_M, INSTR_RSE_M, 2},
82b66b23 418 { "stmh", OP48(0xeb0000000026LL), MASK_RSE_R, INSTR_RSE_R, 2},
a85d7ed0 419 { "stctg", OP48(0xeb0000000025LL), MASK_RSE_R, INSTR_RSE_R, 2},
82b66b23
NC
420 { "stmg", OP48(0xeb0000000024LL), MASK_RSE_R, INSTR_RSE_R, 2},
421 { "clmh", OP48(0xeb0000000020LL), MASK_RSE_M, INSTR_RSE_M, 2},
422 { "rll", OP48(0xeb000000001dLL), MASK_RSE_R, INSTR_RSE_R, 2},
423 { "rllg", OP48(0xeb000000001cLL), MASK_RSE_R, INSTR_RSE_R, 2},
a85d7ed0 424 { "tracg", OP48(0xeb000000000fLL), MASK_RSE_R, INSTR_RSE_R, 2},
82b66b23
NC
425 { "sllg", OP48(0xeb000000000dLL), MASK_RSE_R, INSTR_RSE_R, 2},
426 { "srlg", OP48(0xeb000000000cLL), MASK_RSE_R, INSTR_RSE_R, 2},
427 { "slag", OP48(0xeb000000000bLL), MASK_RSE_R, INSTR_RSE_R, 2},
428 { "srag", OP48(0xeb000000000aLL), MASK_RSE_R, INSTR_RSE_R, 2},
429 { "lmg", OP48(0xeb0000000004LL), MASK_RSE_R, INSTR_RSE_R, 2},
430 { "unpka", OP8(0xeaLL), MASK_SS_L, INSTR_SS_L, 2},
431 { "pka", OP8(0xe9LL), MASK_SS_L, INSTR_SS_L, 2},
432 { "mvcin", OP8(0xe8LL), MASK_SS_L, INSTR_SS_L, 3},
433 { "mvcdk", OP16(0xe50fLL), MASK_SSE, INSTR_SSE, 3},
434 { "mvcsk", OP16(0xe50eLL), MASK_SSE, INSTR_SSE, 3},
435 { "tprot", OP16(0xe501LL), MASK_SSE, INSTR_SSE, 3},
a85d7ed0 436 { "strag", OP48(0xe50000000002LL), MASK_SSE, INSTR_SSE, 2},
82b66b23
NC
437 { "lasp", OP16(0xe500LL), MASK_SSE, INSTR_SSE, 3},
438 { "slb", OP48(0xe30000000099LL), MASK_RXE, INSTR_RXE, 2},
439 { "alc", OP48(0xe30000000098LL), MASK_RXE, INSTR_RXE, 2},
440 { "dl", OP48(0xe30000000097LL), MASK_RXE, INSTR_RXE, 2},
441 { "ml", OP48(0xe30000000096LL), MASK_RXE, INSTR_RXE, 2},
442 { "llgh", OP48(0xe30000000091LL), MASK_RXE, INSTR_RXE, 2},
443 { "llgc", OP48(0xe30000000090LL), MASK_RXE, INSTR_RXE, 2},
444 { "lpq", OP48(0xe3000000008fLL), MASK_RXE, INSTR_RXE, 2},
445 { "stpq", OP48(0xe3000000008eLL), MASK_RXE, INSTR_RXE, 2},
446 { "slbg", OP48(0xe30000000089LL), MASK_RXE, INSTR_RXE, 2},
447 { "alcg", OP48(0xe30000000088LL), MASK_RXE, INSTR_RXE, 2},
448 { "dlg", OP48(0xe30000000087LL), MASK_RXE, INSTR_RXE, 2},
449 { "mlg", OP48(0xe30000000086LL), MASK_RXE, INSTR_RXE, 2},
450 { "xg", OP48(0xe30000000082LL), MASK_RXE, INSTR_RXE, 2},
451 { "og", OP48(0xe30000000081LL), MASK_RXE, INSTR_RXE, 2},
452 { "ng", OP48(0xe30000000080LL), MASK_RXE, INSTR_RXE, 2},
453 { "bctg", OP48(0xe30000000046LL), MASK_RXE, INSTR_RXE, 2},
a85d7ed0 454 { "strvh", OP48(0xe3000000003fLL), MASK_RXE, INSTR_RXE, 2},
82b66b23
NC
455 { "strv", OP48(0xe3000000003eLL), MASK_RXE, INSTR_RXE, 2},
456 { "clgf", OP48(0xe30000000031LL), MASK_RXE, INSTR_RXE, 2},
457 { "cgf", OP48(0xe30000000030LL), MASK_RXE, INSTR_RXE, 2},
a85d7ed0 458 { "strvg", OP48(0xe3000000002fLL), MASK_RXE, INSTR_RXE, 2},
82b66b23
NC
459 { "cvdg", OP48(0xe3000000002eLL), MASK_RXE, INSTR_RXE, 2},
460 { "stg", OP48(0xe30000000024LL), MASK_RXE, INSTR_RXE, 2},
461 { "clg", OP48(0xe30000000021LL), MASK_RXE, INSTR_RXE, 2},
462 { "cg", OP48(0xe30000000020LL), MASK_RXE, INSTR_RXE, 2},
463 { "lrvh", OP48(0xe3000000001fLL), MASK_RXE, INSTR_RXE, 2},
464 { "lrv", OP48(0xe3000000001eLL), MASK_RXE, INSTR_RXE, 2},
465 { "dsgf", OP48(0xe3000000001dLL), MASK_RXE, INSTR_RXE, 2},
466 { "msgf", OP48(0xe3000000001cLL), MASK_RXE, INSTR_RXE, 2},
467 { "slgf", OP48(0xe3000000001bLL), MASK_RXE, INSTR_RXE, 2},
468 { "algf", OP48(0xe3000000001aLL), MASK_RXE, INSTR_RXE, 2},
469 { "sgf", OP48(0xe30000000019LL), MASK_RXE, INSTR_RXE, 2},
470 { "agf", OP48(0xe30000000018LL), MASK_RXE, INSTR_RXE, 2},
471 { "llgt", OP48(0xe30000000017LL), MASK_RXE, INSTR_RXE, 2},
472 { "llgf", OP48(0xe30000000016LL), MASK_RXE, INSTR_RXE, 2},
6fc12824 473 { "lgh", OP48(0xe30000000015LL), MASK_RXE, INSTR_RXE, 2},
82b66b23
NC
474 { "lgf", OP48(0xe30000000014LL), MASK_RXE, INSTR_RXE, 2},
475 { "lrvg", OP48(0xe3000000000fLL), MASK_RXE, INSTR_RXE, 2},
476 { "cvbg", OP48(0xe3000000000eLL), MASK_RXE, INSTR_RXE, 2},
477 { "dsg", OP48(0xe3000000000dLL), MASK_RXE, INSTR_RXE, 2},
478 { "msg", OP48(0xe3000000000cLL), MASK_RXE, INSTR_RXE, 2},
479 { "slg", OP48(0xe3000000000bLL), MASK_RXE, INSTR_RXE, 2},
480 { "alg", OP48(0xe3000000000aLL), MASK_RXE, INSTR_RXE, 2},
481 { "sg", OP48(0xe30000000009LL), MASK_RXE, INSTR_RXE, 2},
482 { "ag", OP48(0xe30000000008LL), MASK_RXE, INSTR_RXE, 2},
483 { "lg", OP48(0xe30000000004LL), MASK_RXE, INSTR_RXE, 2},
484 { "lrag", OP48(0xe30000000003LL), MASK_RXE, INSTR_RXE, 2},
485 { "unpku", OP8(0xe2LL), MASK_SS_L, INSTR_SS_L, 2},
486 { "pku", OP8(0xe1LL), MASK_SS_L, INSTR_SS_L, 2},
487 { "edmk", OP8(0xdfLL), MASK_SS_L, INSTR_SS_L, 3},
488 { "ed", OP8(0xdeLL), MASK_SS_L, INSTR_SS_L, 3},
489 { "trt", OP8(0xddLL), MASK_SS_L, INSTR_SS_L, 3},
490 { "tr", OP8(0xdcLL), MASK_SS_L, INSTR_SS_L, 3},
491 { "mvcs", OP8(0xdbLL), MASK_SS_RR, INSTR_SS_RR, 3},
492 { "mvcp", OP8(0xdaLL), MASK_SS_RR, INSTR_SS_RR, 3},
493 { "mvck", OP8(0xd9LL), MASK_SS_RR, INSTR_SS_RR, 3},
494 { "xc", OP8(0xd7LL), MASK_SS_L, INSTR_SS_L, 3},
495 { "oc", OP8(0xd6LL), MASK_SS_L, INSTR_SS_L, 3},
496 { "clc", OP8(0xd5LL), MASK_SS_L, INSTR_SS_L, 3},
497 { "nc", OP8(0xd4LL), MASK_SS_L, INSTR_SS_L, 3},
498 { "mvz", OP8(0xd3LL), MASK_SS_L, INSTR_SS_L, 3},
499 { "mvc", OP8(0xd2LL), MASK_SS_L, INSTR_SS_L, 3},
500 { "mvn", OP8(0xd1LL), MASK_SS_L, INSTR_SS_L, 3},
501 { "jg", OP16(0xc0f4LL), MASK_RIL_B, INSTR_RIL_B, 2},
502 { "jgno", OP16(0xc0e4LL), MASK_RIL_B, INSTR_RIL_B, 2},
503 { "jgnh", OP16(0xc0d4LL), MASK_RIL_B, INSTR_RIL_B, 2},
504 { "jgnp", OP16(0xc0d4LL), MASK_RIL_B, INSTR_RIL_B, 2},
505 { "jgle", OP16(0xc0c4LL), MASK_RIL_B, INSTR_RIL_B, 2},
506 { "jgnl", OP16(0xc0b4LL), MASK_RIL_B, INSTR_RIL_B, 2},
507 { "jgnm", OP16(0xc0b4LL), MASK_RIL_B, INSTR_RIL_B, 2},
508 { "jghe", OP16(0xc0a4LL), MASK_RIL_B, INSTR_RIL_B, 2},
355d475e 509 { "jgnlh", OP16(0xc094LL), MASK_RIL_B, INSTR_RIL_B, 2},
82b66b23
NC
510 { "jge", OP16(0xc084LL), MASK_RIL_B, INSTR_RIL_B, 2},
511 { "jgz", OP16(0xc084LL), MASK_RIL_B, INSTR_RIL_B, 2},
512 { "jgne", OP16(0xc074LL), MASK_RIL_B, INSTR_RIL_B, 2},
513 { "jgnz", OP16(0xc074LL), MASK_RIL_B, INSTR_RIL_B, 2},
355d475e 514 { "jglh", OP16(0xc064LL), MASK_RIL_B, INSTR_RIL_B, 2},
a85d7ed0 515 { "jgnhe", OP16(0xc054LL), MASK_RIL_B, INSTR_RIL_B, 2},
82b66b23
NC
516 { "jgl", OP16(0xc044LL), MASK_RIL_B, INSTR_RIL_B, 2},
517 { "jgm", OP16(0xc044LL), MASK_RIL_B, INSTR_RIL_B, 2},
a85d7ed0 518 { "jgnle", OP16(0xc034LL), MASK_RIL_B, INSTR_RIL_B, 2},
82b66b23
NC
519 { "jgh", OP16(0xc024LL), MASK_RIL_B, INSTR_RIL_B, 2},
520 { "jgp", OP16(0xc024LL), MASK_RIL_B, INSTR_RIL_B, 2},
521 { "jgo", OP16(0xc014LL), MASK_RIL_B, INSTR_RIL_B, 2},
a85d7ed0 522 { "brasl", OP16(0xc005LL), MASK_RIL_A, INSTR_RIL_A, 2},
82b66b23
NC
523 { "brcl", OP16(0xc004LL), MASK_RIL_MA, INSTR_RIL_MA, 2},
524 { "larl", OP16(0xc000LL), MASK_RIL_A, INSTR_RIL_A, 2},
525 { "icm", OP8(0xbfLL), MASK_RS_M, INSTR_RS_M, 3},
526 { "stcm", OP8(0xbeLL), MASK_RS_M, INSTR_RS_M, 3},
527 { "clm", OP8(0xbdLL), MASK_RS_M, INSTR_RS_M, 3},
528 { "cds", OP8(0xbbLL), MASK_RS, INSTR_RS, 3},
529 { "cs", OP8(0xbaLL), MASK_RS, INSTR_RS, 3},
530 { "esea", OP16(0xb99dLL), MASK_RRE_R, INSTR_RRE_R, 2},
531 { "slbr", OP16(0xb999LL), MASK_RRE, INSTR_RRE, 2},
532 { "alcr", OP16(0xb998LL), MASK_RRE, INSTR_RRE, 2},
533 { "dlr", OP16(0xb997LL), MASK_RRE, INSTR_RRE, 2},
534 { "mlr", OP16(0xb996LL), MASK_RRE, INSTR_RRE, 2},
535 { "epsw", OP16(0xb98dLL), MASK_RRE, INSTR_RRE, 2},
a85d7ed0
NC
536 { "slbgr", OP16(0xb989LL), MASK_RRE, INSTR_RRE, 2},
537 { "alcgr", OP16(0xb988LL), MASK_RRE, INSTR_RRE, 2},
82b66b23
NC
538 { "dlgr", OP16(0xb987LL), MASK_RRE, INSTR_RRE, 2},
539 { "mlgr", OP16(0xb986LL), MASK_RRE, INSTR_RRE, 2},
540 { "troo", OP16(0xb993LL), MASK_RRE, INSTR_RRE, 2},
541 { "trot", OP16(0xb992LL), MASK_RRE, INSTR_RRE, 2},
542 { "trto", OP16(0xb991LL), MASK_RRE, INSTR_RRE, 2},
543 { "trtt", OP16(0xb990LL), MASK_RRE, INSTR_RRE, 2},
544 { "xgr", OP16(0xb982LL), MASK_RRE, INSTR_RRE, 2},
545 { "ogr", OP16(0xb981LL), MASK_RRE, INSTR_RRE, 2},
546 { "ngr", OP16(0xb980LL), MASK_RRE, INSTR_RRE, 2},
a85d7ed0
NC
547 { "bctgr", OP16(0xb946LL), MASK_RRE, INSTR_RRE, 2},
548 { "clgfr", OP16(0xb931LL), MASK_RRE, INSTR_RRE, 2},
82b66b23 549 { "cgfr", OP16(0xb930LL), MASK_RRE, INSTR_RRE, 2},
a85d7ed0 550 { "sturg", OP16(0xb925LL), MASK_RRE, INSTR_RRE, 2},
82b66b23
NC
551 { "clgr", OP16(0xb921LL), MASK_RRE, INSTR_RRE, 2},
552 { "cgr", OP16(0xb920LL), MASK_RRE, INSTR_RRE, 2},
553 { "lrvr", OP16(0xb91fLL), MASK_RRE, INSTR_RRE, 2},
a85d7ed0
NC
554 { "dsgfr", OP16(0xb91dLL), MASK_RRE, INSTR_RRE, 2},
555 { "msgfr", OP16(0xb91cLL), MASK_RRE, INSTR_RRE, 2},
556 { "slgfr", OP16(0xb91bLL), MASK_RRE, INSTR_RRE, 2},
557 { "algfr", OP16(0xb91aLL), MASK_RRE, INSTR_RRE, 2},
82b66b23
NC
558 { "sgfr", OP16(0xb919LL), MASK_RRE, INSTR_RRE, 2},
559 { "agfr", OP16(0xb918LL), MASK_RRE, INSTR_RRE, 2},
a85d7ed0
NC
560 { "llgtr", OP16(0xb917LL), MASK_RRE, INSTR_RRE, 2},
561 { "llgfr", OP16(0xb916LL), MASK_RRE, INSTR_RRE, 2},
82b66b23 562 { "lgfr", OP16(0xb914LL), MASK_RRE, INSTR_RRE, 2},
a85d7ed0
NC
563 { "lcgfr", OP16(0xb913LL), MASK_RRE, INSTR_RRE, 2},
564 { "ltgfr", OP16(0xb912LL), MASK_RRE, INSTR_RRE, 2},
565 { "lngfr", OP16(0xb911LL), MASK_RRE, INSTR_RRE, 2},
566 { "lpgfr", OP16(0xb910LL), MASK_RRE, INSTR_RRE, 2},
567 { "lrvgr", OP16(0xb90fLL), MASK_RRE, INSTR_RRE, 2},
568 { "eregg", OP16(0xb90eLL), MASK_RRE, INSTR_RRE, 2},
82b66b23
NC
569 { "dsgr", OP16(0xb90dLL), MASK_RRE, INSTR_RRE, 2},
570 { "msgr", OP16(0xb90cLL), MASK_RRE, INSTR_RRE, 2},
571 { "slgr", OP16(0xb90bLL), MASK_RRE, INSTR_RRE, 2},
572 { "algr", OP16(0xb90aLL), MASK_RRE, INSTR_RRE, 2},
573 { "sgr", OP16(0xb909LL), MASK_RRE, INSTR_RRE, 2},
574 { "agr", OP16(0xb908LL), MASK_RRE, INSTR_RRE, 2},
a85d7ed0 575 { "lurag", OP16(0xb905LL), MASK_RRE, INSTR_RRE, 2},
82b66b23
NC
576 { "lgr", OP16(0xb904LL), MASK_RRE, INSTR_RRE, 2},
577 { "lcgr", OP16(0xb903LL), MASK_RRE, INSTR_RRE, 2},
578 { "ltgr", OP16(0xb902LL), MASK_RRE, INSTR_RRE, 2},
579 { "lngr", OP16(0xb901LL), MASK_RRE, INSTR_RRE, 2},
580 { "lpgr", OP16(0xb900LL), MASK_RRE, INSTR_RRE, 2},
581 { "lctl", OP8(0xb7LL), MASK_RS_C, INSTR_RS_C, 3},
582 { "stctl", OP8(0xb6LL), MASK_RS_C, INSTR_RS_C, 3},
583 { "cgxr", OP16(0xb3caLL), MASK_RRF_F, INSTR_RRF_F, 2},
584 { "cgdr", OP16(0xb3c9LL), MASK_RRF_F, INSTR_RRF_F, 2},
585 { "cger", OP16(0xb3c8LL), MASK_RRF_F, INSTR_RRF_F, 2},
586 { "cxgr", OP16(0xb3c6LL), MASK_RRE, INSTR_RRE, 2},
587 { "cdgr", OP16(0xb3c5LL), MASK_RRE, INSTR_RRE, 2},
588 { "cegr", OP16(0xb3c4LL), MASK_RRE, INSTR_RRE, 2},
a85d7ed0
NC
589 { "cgxbr", OP16(0xb3aaLL), MASK_RRF_M, INSTR_RRF_M, 2},
590 { "cgdbr", OP16(0xb3a9LL), MASK_RRF_M, INSTR_RRF_M, 2},
591 { "cgebr", OP16(0xb3a8LL), MASK_RRF_M, INSTR_RRF_M, 2},
592 { "cxgbr", OP16(0xb3a6LL), MASK_RRE, INSTR_RRE, 2},
593 { "cdgbr", OP16(0xb3a5LL), MASK_RRE, INSTR_RRE, 2},
594 { "cegbr", OP16(0xb3a4LL), MASK_RRE, INSTR_RRE, 2},
595 { "cfxbr", OP16(0xb39aLL), MASK_RRF_M, INSTR_RRF_M, 3},
596 { "cfdbr", OP16(0xb399LL), MASK_RRF_M, INSTR_RRF_M, 3},
597 { "cfebr", OP16(0xb398LL), MASK_RRF_M, INSTR_RRF_M, 3},
598 { "cxfbr", OP16(0xb396LL), MASK_RRE_F, INSTR_RRE_F, 3},
599 { "cdfbr", OP16(0xb395LL), MASK_RRE_F, INSTR_RRE_F, 3},
600 { "cefbr", OP16(0xb394LL), MASK_RRE_F, INSTR_RRE_F, 3},
82b66b23
NC
601 { "efpc", OP16(0xb38cLL), MASK_RRE, INSTR_RRE, 3},
602 { "sfpc", OP16(0xb384LL), MASK_RRE, INSTR_RRE, 3},
603 { "lzxr", OP16(0xb376LL), MASK_RRE_R, INSTR_RRE_R, 2},
604 { "lzdr", OP16(0xb375LL), MASK_RRE_R, INSTR_RRE_R, 2},
605 { "lzer", OP16(0xb374LL), MASK_RRE_R, INSTR_RRE_R, 2},
a85d7ed0
NC
606 { "fidbr", OP16(0xb35fLL), MASK_RRF_M, INSTR_RRF_M, 3},
607 { "didbr", OP16(0xb35bLL), MASK_RRF_RM, INSTR_RRF_RM, 3},
82b66b23
NC
608 { "thdr", OP16(0xb359LL), MASK_RRE, INSTR_RRE, 2},
609 { "thder", OP16(0xb358LL), MASK_RRE, INSTR_RRE, 2},
a85d7ed0
NC
610 { "fiebr", OP16(0xb357LL), MASK_RRF_M, INSTR_RRF_M, 3},
611 { "diebr", OP16(0xb353LL), MASK_RRF_RM, INSTR_RRF_RM, 3},
82b66b23
NC
612 { "tbdr", OP16(0xb351LL), MASK_RRF_M, INSTR_RRF_M, 2},
613 { "tbedr", OP16(0xb350LL), MASK_RRF_M, INSTR_RRF_M, 2},
614 { "dxbr", OP16(0xb34dLL), MASK_RRE_F, INSTR_RRE_F, 3},
615 { "mxbr", OP16(0xb34cLL), MASK_RRE_F, INSTR_RRE_F, 3},
616 { "sxbr", OP16(0xb34bLL), MASK_RRE_F, INSTR_RRE_F, 3},
617 { "axbr", OP16(0xb34aLL), MASK_RRE_F, INSTR_RRE_F, 3},
618 { "cxbr", OP16(0xb349LL), MASK_RRE_F, INSTR_RRE_F, 3},
619 { "kxbr", OP16(0xb348LL), MASK_RRE_F, INSTR_RRE_F, 3},
a85d7ed0
NC
620 { "fixbr", OP16(0xb347LL), MASK_RRF_M, INSTR_RRF_M, 3},
621 { "lexbr", OP16(0xb346LL), MASK_RRE_F, INSTR_RRE_F, 3},
622 { "ldxbr", OP16(0xb345LL), MASK_RRE_F, INSTR_RRE_F, 3},
623 { "ledbr", OP16(0xb344LL), MASK_RRE_F, INSTR_RRE_F, 3},
624 { "lcxbr", OP16(0xb343LL), MASK_RRE_F, INSTR_RRE_F, 3},
625 { "ltxbr", OP16(0xb342LL), MASK_RRE_F, INSTR_RRE_F, 3},
626 { "lnxbr", OP16(0xb341LL), MASK_RRE_F, INSTR_RRE_F, 3},
627 { "lpxbr", OP16(0xb340LL), MASK_RRE_F, INSTR_RRE_F, 3},
628 { "msdbr", OP16(0xb31fLL), MASK_RRF_R, INSTR_RRF_R, 3},
629 { "madbr", OP16(0xb31eLL), MASK_RRF_R, INSTR_RRF_R, 3},
82b66b23
NC
630 { "ddbr", OP16(0xb31dLL), MASK_RRE_F, INSTR_RRE_F, 3},
631 { "mdbr", OP16(0xb31cLL), MASK_RRE_F, INSTR_RRE_F, 3},
632 { "sdbr", OP16(0xb31bLL), MASK_RRE_F, INSTR_RRE_F, 3},
633 { "adbr", OP16(0xb31aLL), MASK_RRE_F, INSTR_RRE_F, 3},
634 { "cdbr", OP16(0xb319LL), MASK_RRE_F, INSTR_RRE_F, 3},
635 { "kdbr", OP16(0xb318LL), MASK_RRE_F, INSTR_RRE_F, 3},
a85d7ed0
NC
636 { "meebr", OP16(0xb317LL), MASK_RRE_F, INSTR_RRE_F, 3},
637 { "sqxbr", OP16(0xb316LL), MASK_RRE_F, INSTR_RRE_F, 3},
638 { "sqdbr", OP16(0xb315LL), MASK_RRE_F, INSTR_RRE_F, 3},
639 { "sqebr", OP16(0xb314LL), MASK_RRE_F, INSTR_RRE_F, 3},
640 { "lcdbr", OP16(0xb313LL), MASK_RRE_F, INSTR_RRE_F, 3},
641 { "ltdbr", OP16(0xb312LL), MASK_RRE_F, INSTR_RRE_F, 3},
642 { "lndbr", OP16(0xb311LL), MASK_RRE_F, INSTR_RRE_F, 3},
643 { "lpdbr", OP16(0xb310LL), MASK_RRE_F, INSTR_RRE_F, 3},
644 { "msebr", OP16(0xb30fLL), MASK_RRF_R, INSTR_RRF_R, 3},
645 { "maebr", OP16(0xb30eLL), MASK_RRF_R, INSTR_RRF_R, 3},
82b66b23 646 { "debr", OP16(0xb30dLL), MASK_RRE_F, INSTR_RRE_F, 3},
a85d7ed0 647 { "mdebr", OP16(0xb30cLL), MASK_RRE_F, INSTR_RRE_F, 3},
82b66b23
NC
648 { "sebr", OP16(0xb30bLL), MASK_RRE_F, INSTR_RRE_F, 3},
649 { "aebr", OP16(0xb30aLL), MASK_RRE_F, INSTR_RRE_F, 3},
650 { "cebr", OP16(0xb309LL), MASK_RRE_F, INSTR_RRE_F, 3},
651 { "kebr", OP16(0xb308LL), MASK_RRE_F, INSTR_RRE_F, 3},
a85d7ed0
NC
652 { "mxdbr", OP16(0xb307LL), MASK_RRE_F, INSTR_RRE_F, 3},
653 { "lxebr", OP16(0xb306LL), MASK_RRE_F, INSTR_RRE_F, 3},
654 { "lxdbr", OP16(0xb305LL), MASK_RRE_F, INSTR_RRE_F, 3},
655 { "ldebr", OP16(0xb304LL), MASK_RRE_F, INSTR_RRE_F, 3},
656 { "lcebr", OP16(0xb303LL), MASK_RRE_F, INSTR_RRE_F, 3},
657 { "ltebr", OP16(0xb302LL), MASK_RRE_F, INSTR_RRE_F, 3},
658 { "lnebr", OP16(0xb301LL), MASK_RRE_F, INSTR_RRE_F, 3},
659 { "lpebr", OP16(0xb300LL), MASK_RRE_F, INSTR_RRE_F, 3},
660 { "trap4", OP16(0xb2ffLL), MASK_S, INSTR_S, 3},
661 { "lpswe", OP16(0xb2b2LL), MASK_S, INSTR_S, 2},
82b66b23 662 { "stfl", OP16(0xb2b1LL), MASK_S, INSTR_S, 2},
a85d7ed0
NC
663 { "cutfu", OP16(0xb2a7LL), MASK_RRE, INSTR_RRE, 3},
664 { "cuutf", OP16(0xb2a6LL), MASK_RRE, INSTR_RRE, 3},
82b66b23
NC
665 { "tre", OP16(0xb2a5LL), MASK_RRE, INSTR_RRE, 2},
666 { "lfpc", OP16(0xb29dLL), MASK_S, INSTR_S, 3},
a85d7ed0 667 { "stfpc", OP16(0xb29cLL), MASK_S, INSTR_S, 3},
82b66b23
NC
668 { "srnm", OP16(0xb299LL), MASK_S, INSTR_S, 3},
669 { "stsi", OP16(0xb27dLL), MASK_S, INSTR_S, 3},
670 { "sacf", OP16(0xb279LL), MASK_S, INSTR_S, 3},
a85d7ed0 671 { "stcke", OP16(0xb278LL), MASK_S, INSTR_S, 2},
82b66b23
NC
672 { "rp", OP16(0xb277LL), MASK_S, INSTR_S, 3},
673 { "siga", OP16(0xb274LL), MASK_S, INSTR_S, 3},
a85d7ed0 674 { "cmpsc", OP16(0xb263LL), MASK_RRE, INSTR_RRE, 3},
82b66b23
NC
675 { "srst", OP16(0xb25eLL), MASK_RRE, INSTR_RRE, 3},
676 { "clst", OP16(0xb25dLL), MASK_RRE, INSTR_RRE, 3},
677 { "bsa", OP16(0xb25aLL), MASK_RRE, INSTR_RRE, 3},
678 { "bsg", OP16(0xb258LL), MASK_RRE, INSTR_RRE, 3},
679 { "cuse", OP16(0xb257LL), MASK_RRE, INSTR_RRE, 3},
680 { "mvst", OP16(0xb255LL), MASK_RRE, INSTR_RRE, 3},
681 { "mvpg", OP16(0xb254LL), MASK_RRE, INSTR_RRE, 3},
682 { "msr", OP16(0xb252LL), MASK_RRE, INSTR_RRE, 3},
683 { "csp", OP16(0xb250LL), MASK_RRE, INSTR_RRE, 3},
684 { "ear", OP16(0xb24fLL), MASK_RRE_RA, INSTR_RRE_RA, 3},
685 { "sar", OP16(0xb24eLL), MASK_RRE_AR, INSTR_RRE_AR, 3},
686 { "cpya", OP16(0xb24dLL), MASK_RRE_A, INSTR_RRE_A, 3},
687 { "tar", OP16(0xb24cLL), MASK_RRE_AR, INSTR_RRE_AR, 3},
688 { "lura", OP16(0xb24bLL), MASK_RRE, INSTR_RRE, 3},
689 { "esta", OP16(0xb24aLL), MASK_RRE, INSTR_RRE, 3},
690 { "ereg", OP16(0xb249LL), MASK_RRE, INSTR_RRE, 3},
691 { "palb", OP16(0xb248LL), MASK_RRE_O, INSTR_RRE_O, 3},
692 { "msta", OP16(0xb247LL), MASK_RRE_R, INSTR_RRE_R, 3},
a85d7ed0 693 { "stura", OP16(0xb246LL), MASK_RRE, INSTR_RRE, 3},
82b66b23
NC
694 { "sqer", OP16(0xb245LL), MASK_RRE_E, INSTR_RRE_E, 3},
695 { "sqdr", OP16(0xb244LL), MASK_RRE_D, INSTR_RRE_D, 3},
696 { "cksm", OP16(0xb241LL), MASK_RRE, INSTR_RRE, 3},
697 { "bakr", OP16(0xb240LL), MASK_RRE, INSTR_RRE, 3},
698 { "schm", OP16(0xb23cLL), MASK_S_O, INSTR_S_O, 3},
699 { "rchp", OP16(0xb23bLL), MASK_S_O, INSTR_S_O, 3},
a85d7ed0
NC
700 { "stcps", OP16(0xb23aLL), MASK_S, INSTR_S, 3},
701 { "stcrw", OP16(0xb239LL), MASK_S, INSTR_S, 3},
82b66b23
NC
702 { "rsch", OP16(0xb238LL), MASK_S_O, INSTR_S_O, 3},
703 { "sal", OP16(0xb237LL), MASK_S_O, INSTR_S_O, 3},
704 { "tpi", OP16(0xb236LL), MASK_S, INSTR_S, 3},
705 { "tsch", OP16(0xb235LL), MASK_S, INSTR_S, 3},
a85d7ed0 706 { "stsch", OP16(0xb234LL), MASK_S, INSTR_S, 3},
82b66b23
NC
707 { "ssch", OP16(0xb233LL), MASK_S, INSTR_S, 3},
708 { "msch", OP16(0xb232LL), MASK_S, INSTR_S, 3},
709 { "hsch", OP16(0xb231LL), MASK_S_O, INSTR_S_O, 3},
710 { "csch", OP16(0xb230LL), MASK_S_O, INSTR_S_O, 3},
711 { "dxr", OP16(0xb22dLL), MASK_RRE_X, INSTR_RRE_X, 3},
712 { "tb", OP16(0xb22cLL), MASK_RRE_R2, INSTR_RRE_R2, 3},
713 { "sske", OP16(0xb22bLL), MASK_RRE, INSTR_RRE, 3},
714 { "rrbe", OP16(0xb22aLL), MASK_RRE, INSTR_RRE, 3},
715 { "iske", OP16(0xb229LL), MASK_RRE, INSTR_RRE, 3},
716 { "pt", OP16(0xb228LL), MASK_RRE, INSTR_RRE, 3},
717 { "esar", OP16(0xb227LL), MASK_RRE_R, INSTR_RRE_R, 3},
718 { "epar", OP16(0xb226LL), MASK_RRE_R, INSTR_RRE_R, 3},
719 { "ssar", OP16(0xb225LL), MASK_RRE_R, INSTR_RRE_R, 3},
720 { "iac", OP16(0xb224LL), MASK_RRE_R, INSTR_RRE_R, 3},
721 { "ivsk", OP16(0xb223LL), MASK_RRE, INSTR_RRE, 3},
722 { "ipm", OP16(0xb222LL), MASK_RRE_R, INSTR_RRE_R, 3},
723 { "ipte", OP16(0xb221LL), MASK_RRE, INSTR_RRE, 3},
724 { "cfc", OP16(0xb21aLL), MASK_S, INSTR_S, 3},
725 { "sac", OP16(0xb219LL), MASK_S, INSTR_S, 3},
726 { "pc", OP16(0xb218LL), MASK_S, INSTR_S, 3},
727 { "sie", OP16(0xb214LL), MASK_S, INSTR_S, 3},
728 { "stap", OP16(0xb212LL), MASK_S, INSTR_S, 3},
729 { "stpx", OP16(0xb211LL), MASK_S, INSTR_S, 3},
730 { "spx", OP16(0xb210LL), MASK_S, INSTR_S, 3},
731 { "ptlb", OP16(0xb20dLL), MASK_S_O, INSTR_S_O, 3},
732 { "ipk", OP16(0xb20bLL), MASK_S_O, INSTR_S_O, 3},
733 { "spka", OP16(0xb20aLL), MASK_S, INSTR_S, 3},
734 { "stpt", OP16(0xb209LL), MASK_S, INSTR_S, 3},
735 { "spt", OP16(0xb208LL), MASK_S, INSTR_S, 3},
a85d7ed0 736 { "stckc", OP16(0xb207LL), MASK_S, INSTR_S, 3},
82b66b23
NC
737 { "sckc", OP16(0xb206LL), MASK_S, INSTR_S, 3},
738 { "stck", OP16(0xb205LL), MASK_S, INSTR_S, 3},
739 { "sck", OP16(0xb204LL), MASK_S, INSTR_S, 3},
a85d7ed0 740 { "stidp", OP16(0xb202LL), MASK_S, INSTR_S, 3},
82b66b23
NC
741 { "lra", OP8(0xb1LL), MASK_RX, INSTR_RX, 3},
742 { "mc", OP8(0xafLL), MASK_SI, INSTR_SI, 3},
743 { "sigp", OP8(0xaeLL), MASK_RS, INSTR_RS, 3},
744 { "stosm", OP8(0xadLL), MASK_SI, INSTR_SI, 3},
745 { "stnsm", OP8(0xacLL), MASK_SI, INSTR_SI, 3},
746 { "clcle", OP8(0xa9LL), MASK_RS, INSTR_RS, 3},
747 { "mvcle", OP8(0xa8LL), MASK_RS, INSTR_RS, 3},
748 { "j", OP16(0xa7f4LL), MASK_RI_B, INSTR_RI_B, 3},
749 { "jno", OP16(0xa7e4LL), MASK_RI_B, INSTR_RI_B, 3},
750 { "jnh", OP16(0xa7d4LL), MASK_RI_B, INSTR_RI_B, 3},
751 { "jnp", OP16(0xa7d4LL), MASK_RI_B, INSTR_RI_B, 3},
752 { "jle", OP16(0xa7c4LL), MASK_RI_B, INSTR_RI_B, 3},
753 { "jnl", OP16(0xa7b4LL), MASK_RI_B, INSTR_RI_B, 3},
754 { "jnm", OP16(0xa7b4LL), MASK_RI_B, INSTR_RI_B, 3},
755 { "jhe", OP16(0xa7a4LL), MASK_RI_B, INSTR_RI_B, 3},
355d475e 756 { "jnlh", OP16(0xa794LL), MASK_RI_B, INSTR_RI_B, 3},
82b66b23
NC
757 { "je", OP16(0xa784LL), MASK_RI_B, INSTR_RI_B, 3},
758 { "jz", OP16(0xa784LL), MASK_RI_B, INSTR_RI_B, 3},
759 { "jne", OP16(0xa774LL), MASK_RI_B, INSTR_RI_B, 3},
760 { "jnz", OP16(0xa774LL), MASK_RI_B, INSTR_RI_B, 3},
355d475e 761 { "jlh", OP16(0xa764LL), MASK_RI_B, INSTR_RI_B, 3},
82b66b23
NC
762 { "jnhe", OP16(0xa754LL), MASK_RI_B, INSTR_RI_B, 3},
763 { "jl", OP16(0xa744LL), MASK_RI_B, INSTR_RI_B, 3},
764 { "jm", OP16(0xa744LL), MASK_RI_B, INSTR_RI_B, 3},
765 { "jnle", OP16(0xa734LL), MASK_RI_B, INSTR_RI_B, 3},
766 { "jh", OP16(0xa724LL), MASK_RI_B, INSTR_RI_B, 3},
767 { "jp", OP16(0xa724LL), MASK_RI_B, INSTR_RI_B, 3},
768 { "jo", OP16(0xa714LL), MASK_RI_B, INSTR_RI_B, 3},
769 { "cghi", OP16(0xa70fLL), MASK_RI, INSTR_RI, 2},
770 { "chi", OP16(0xa70eLL), MASK_RI, INSTR_RI, 3},
771 { "mghi", OP16(0xa70dLL), MASK_RI, INSTR_RI, 2},
772 { "mhi", OP16(0xa70cLL), MASK_RI, INSTR_RI, 3},
773 { "aghi", OP16(0xa70bLL), MASK_RI, INSTR_RI, 2},
774 { "ahi", OP16(0xa70aLL), MASK_RI, INSTR_RI, 3},
775 { "lghi", OP16(0xa709LL), MASK_RI, INSTR_RI, 2},
776 { "lhi", OP16(0xa708LL), MASK_RI, INSTR_RI, 3},
a85d7ed0 777 { "brctg", OP16(0xa707LL), MASK_RI_A, INSTR_RI_A, 2},
82b66b23
NC
778 { "brct", OP16(0xa706LL), MASK_RI_A, INSTR_RI_A, 3},
779 { "bras", OP16(0xa705LL), MASK_RI_A, INSTR_RI_A, 3},
780 { "brc", OP16(0xa704LL), MASK_RI_MA, INSTR_RI_MA, 3},
781 { "tmhl", OP16(0xa703LL), MASK_RI_U, INSTR_RI_U, 2},
782 { "tmhh", OP16(0xa702LL), MASK_RI_U, INSTR_RI_U, 2},
783 { "tml", OP16(0xa701LL), MASK_RI_U, INSTR_RI_U, 3},
784 { "tmll", OP16(0xa701LL), MASK_RI_U, INSTR_RI_U, 2},
785 { "tmh", OP16(0xa700LL), MASK_RI_U, INSTR_RI_U, 3},
786 { "tmlh", OP16(0xa700LL), MASK_RI_U, INSTR_RI_U, 2},
a85d7ed0
NC
787 { "llill", OP16(0xa50fLL), MASK_RI_U, INSTR_RI_U, 2},
788 { "llilh", OP16(0xa50eLL), MASK_RI_U, INSTR_RI_U, 2},
789 { "llihl", OP16(0xa50dLL), MASK_RI_U, INSTR_RI_U, 2},
790 { "llihh", OP16(0xa50cLL), MASK_RI_U, INSTR_RI_U, 2},
82b66b23
NC
791 { "oill", OP16(0xa50bLL), MASK_RI_U, INSTR_RI_U, 2},
792 { "oilh", OP16(0xa50aLL), MASK_RI_U, INSTR_RI_U, 2},
793 { "oihl", OP16(0xa509LL), MASK_RI_U, INSTR_RI_U, 2},
794 { "oihh", OP16(0xa508LL), MASK_RI_U, INSTR_RI_U, 2},
795 { "nill", OP16(0xa507LL), MASK_RI_U, INSTR_RI_U, 2},
796 { "nilh", OP16(0xa506LL), MASK_RI_U, INSTR_RI_U, 2},
797 { "nihl", OP16(0xa505LL), MASK_RI_U, INSTR_RI_U, 2},
798 { "nihh", OP16(0xa504LL), MASK_RI_U, INSTR_RI_U, 2},
799 { "iill", OP16(0xa503LL), MASK_RI_U, INSTR_RI_U, 2},
800 { "iilh", OP16(0xa502LL), MASK_RI_U, INSTR_RI_U, 2},
801 { "iihl", OP16(0xa501LL), MASK_RI_U, INSTR_RI_U, 2},
802 { "iihh", OP16(0xa500LL), MASK_RI_U, INSTR_RI_U, 2},
803 { "stam", OP8(0x9bLL), MASK_RS_A, INSTR_RS_A, 3},
804 { "lam", OP8(0x9aLL), MASK_RS_A, INSTR_RS_A, 3},
a85d7ed0 805 { "trace", OP8(0x99LL), MASK_RS, INSTR_RS, 3},
82b66b23
NC
806 { "lm", OP8(0x98LL), MASK_RS, INSTR_RS, 3},
807 { "xi", OP8(0x97LL), MASK_SI, INSTR_SI, 3},
808 { "oi", OP8(0x96LL), MASK_SI, INSTR_SI, 3},
809 { "cli", OP8(0x95LL), MASK_SI, INSTR_SI, 3},
810 { "ni", OP8(0x94LL), MASK_SI, INSTR_SI, 3},
811 { "ts", OP8(0x93LL), MASK_S, INSTR_S, 3},
812 { "mvi", OP8(0x92LL), MASK_SI, INSTR_SI, 3},
813 { "tm", OP8(0x91LL), MASK_SI, INSTR_SI, 3},
814 { "stm", OP8(0x90LL), MASK_RS, INSTR_RS, 3},
815 { "slda", OP8(0x8fLL), MASK_RS_D, INSTR_RS_D, 3},
816 { "srda", OP8(0x8eLL), MASK_RS_D, INSTR_RS_D, 3},
817 { "sldl", OP8(0x8dLL), MASK_RS_D, INSTR_RS_D, 3},
818 { "srdl", OP8(0x8cLL), MASK_RS_D, INSTR_RS_D, 3},
819 { "sla", OP8(0x8bLL), MASK_RS_S, INSTR_RS_S, 3},
820 { "sra", OP8(0x8aLL), MASK_RS_S, INSTR_RS_S, 3},
821 { "sll", OP8(0x89LL), MASK_RS_S, INSTR_RS_S, 3},
822 { "srl", OP8(0x88LL), MASK_RS_S, INSTR_RS_S, 3},
823 { "bxle", OP8(0x87LL), MASK_RS, INSTR_RS, 3},
824 { "bxh", OP8(0x86LL), MASK_RS, INSTR_RS, 3},
a85d7ed0 825 { "brxle", OP8(0x85LL), MASK_RSI_A, INSTR_RSI_A, 3},
82b66b23
NC
826 { "brxh", OP8(0x84LL), MASK_RSI_A, INSTR_RSI_A, 3},
827 { "diag", OP8(0x83LL), MASK_RS, INSTR_RS, 3},
828 { "lpsw", OP8(0x82LL), MASK_S, INSTR_S, 3},
829 { "ssm", OP8(0x80LL), MASK_S, INSTR_S, 3},
830 { "su", OP8(0x7fLL), MASK_RX_E, INSTR_RX_E, 3},
831 { "au", OP8(0x7eLL), MASK_RX_E, INSTR_RX_E, 3},
832 { "de", OP8(0x7dLL), MASK_RX_E, INSTR_RX_E, 3},
833 { "me", OP8(0x7cLL), MASK_RX_ED, INSTR_RX_ED, 3},
834 { "se", OP8(0x7bLL), MASK_RX_E, INSTR_RX_E, 3},
835 { "ae", OP8(0x7aLL), MASK_RX_E, INSTR_RX_E, 3},
836 { "ce", OP8(0x79LL), MASK_RX_E, INSTR_RX_E, 3},
837 { "le", OP8(0x78LL), MASK_RX_E, INSTR_RX_E, 3},
838 { "ms", OP8(0x71LL), MASK_RX, INSTR_RX, 3},
839 { "ste", OP8(0x70LL), MASK_RX_E, INSTR_RX_E, 3},
840 { "sw", OP8(0x6fLL), MASK_RX_D, INSTR_RX_D, 3},
841 { "aw", OP8(0x6eLL), MASK_RX_D, INSTR_RX_D, 3},
842 { "dd", OP8(0x6dLL), MASK_RX_D, INSTR_RX_D, 3},
843 { "md", OP8(0x6cLL), MASK_RX_D, INSTR_RX_D, 3},
844 { "sd", OP8(0x6bLL), MASK_RX_D, INSTR_RX_D, 3},
845 { "ad", OP8(0x6aLL), MASK_RX_D, INSTR_RX_D, 3},
846 { "cd", OP8(0x69LL), MASK_RX_D, INSTR_RX_D, 3},
847 { "ld", OP8(0x68LL), MASK_RX_D, INSTR_RX_D, 3},
848 { "mxd", OP8(0x67LL), MASK_RX_DX, INSTR_RX_DX, 3},
849 { "std", OP8(0x60LL), MASK_RX_D, INSTR_RX_D, 3},
850 { "sl", OP8(0x5fLL), MASK_RX, INSTR_RX, 3},
851 { "al", OP8(0x5eLL), MASK_RX, INSTR_RX, 3},
852 { "d", OP8(0x5dLL), MASK_RX, INSTR_RX, 3},
853 { "m", OP8(0x5cLL), MASK_RX, INSTR_RX, 3},
854 { "s", OP8(0x5bLL), MASK_RX, INSTR_RX, 3},
855 { "a", OP8(0x5aLL), MASK_RX, INSTR_RX, 3},
856 { "c", OP8(0x59LL), MASK_RX, INSTR_RX, 3},
857 { "l", OP8(0x58LL), MASK_RX, INSTR_RX, 3},
858 { "x", OP8(0x57LL), MASK_RX, INSTR_RX, 3},
859 { "o", OP8(0x56LL), MASK_RX, INSTR_RX, 3},
860 { "cl", OP8(0x55LL), MASK_RX, INSTR_RX, 3},
861 { "n", OP8(0x54LL), MASK_RX, INSTR_RX, 3},
862 { "lae", OP8(0x51LL), MASK_RX, INSTR_RX, 3},
863 { "st", OP8(0x50LL), MASK_RX, INSTR_RX, 3},
864 { "cvb", OP8(0x4fLL), MASK_RX, INSTR_RX, 3},
865 { "cvd", OP8(0x4eLL), MASK_RX, INSTR_RX, 3},
866 { "bas", OP8(0x4dLL), MASK_RX, INSTR_RX, 3},
867 { "mh", OP8(0x4cLL), MASK_RX, INSTR_RX, 3},
868 { "sh", OP8(0x4bLL), MASK_RX, INSTR_RX, 3},
869 { "ah", OP8(0x4aLL), MASK_RX, INSTR_RX, 3},
870 { "ch", OP8(0x49LL), MASK_RX, INSTR_RX, 3},
871 { "lh", OP8(0x48LL), MASK_RX, INSTR_RX, 3},
872 { "b", OP16(0x47f0LL), MASK_RX_B, INSTR_RX_B, 3},
873 { "bno", OP16(0x47e0LL), MASK_RX_B, INSTR_RX_B, 3},
874 { "bnh", OP16(0x47d0LL), MASK_RX_B, INSTR_RX_B, 3},
875 { "bnp", OP16(0x47d0LL), MASK_RX_B, INSTR_RX_B, 3},
876 { "ble", OP16(0x47c0LL), MASK_RX_B, INSTR_RX_B, 3},
877 { "bnl", OP16(0x47b0LL), MASK_RX_B, INSTR_RX_B, 3},
878 { "bnm", OP16(0x47b0LL), MASK_RX_B, INSTR_RX_B, 3},
879 { "bhe", OP16(0x47a0LL), MASK_RX_B, INSTR_RX_B, 3},
355d475e 880 { "bnlh", OP16(0x4790LL), MASK_RX_B, INSTR_RX_B, 3},
82b66b23
NC
881 { "be", OP16(0x4780LL), MASK_RX_B, INSTR_RX_B, 3},
882 { "bz", OP16(0x4780LL), MASK_RX_B, INSTR_RX_B, 3},
883 { "bne", OP16(0x4770LL), MASK_RX_B, INSTR_RX_B, 3},
884 { "bnz", OP16(0x4770LL), MASK_RX_B, INSTR_RX_B, 3},
355d475e 885 { "blh", OP16(0x4760LL), MASK_RX_B, INSTR_RX_B, 3},
82b66b23
NC
886 { "bnhe", OP16(0x4750LL), MASK_RX_B, INSTR_RX_B, 3},
887 { "bl", OP16(0x4740LL), MASK_RX_B, INSTR_RX_B, 3},
888 { "bm", OP16(0x4740LL), MASK_RX_B, INSTR_RX_B, 3},
889 { "bnle", OP16(0x4730LL), MASK_RX_B, INSTR_RX_B, 3},
890 { "bh", OP16(0x4720LL), MASK_RX_B, INSTR_RX_B, 3},
891 { "bp", OP16(0x4720LL), MASK_RX_B, INSTR_RX_B, 3},
892 { "bo", OP16(0x4710LL), MASK_RX_B, INSTR_RX_B, 3},
893 { "bc", OP8(0x47LL), MASK_RX_M, INSTR_RX_M, 3},
894 { "nop", OP16(0x4700LL), MASK_RX_B, INSTR_RX_B, 3},
895 { "bct", OP8(0x46LL), MASK_RX, INSTR_RX, 3},
896 { "bal", OP8(0x45LL), MASK_RX, INSTR_RX, 3},
897 { "ex", OP8(0x44LL), MASK_RX, INSTR_RX, 3},
898 { "ic", OP8(0x43LL), MASK_RX, INSTR_RX, 3},
899 { "stc", OP8(0x42LL), MASK_RX, INSTR_RX, 3},
900 { "la", OP8(0x41LL), MASK_RX, INSTR_RX, 3},
901 { "sth", OP8(0x40LL), MASK_RX, INSTR_RX, 3},
902 { "sur", OP8(0x3fLL), MASK_RR_E, INSTR_RR_E, 3},
903 { "aur", OP8(0x3eLL), MASK_RR_E, INSTR_RR_E, 3},
904 { "der", OP8(0x3dLL), MASK_RR_E, INSTR_RR_E, 3},
905 { "mer", OP8(0x3cLL), MASK_RR_ED, INSTR_RR_ED, 3},
906 { "ser", OP8(0x3bLL), MASK_RR_E, INSTR_RR_E, 3},
907 { "aer", OP8(0x3aLL), MASK_RR_E, INSTR_RR_E, 3},
908 { "cer", OP8(0x39LL), MASK_RR_E, INSTR_RR_E, 3},
909 { "ler", OP8(0x38LL), MASK_RR_E, INSTR_RR_E, 3},
910 { "sxr", OP8(0x37LL), MASK_RR_X, INSTR_RR_X, 3},
911 { "axr", OP8(0x36LL), MASK_RR, INSTR_RR, 3},
912 { "lrer", OP8(0x35LL), MASK_RR_DE, INSTR_RR_DE, 3},
913 { "her", OP8(0x34LL), MASK_RR_E, INSTR_RR_E, 3},
914 { "lcer", OP8(0x33LL), MASK_RR_E, INSTR_RR_E, 3},
915 { "lter", OP8(0x32LL), MASK_RR_E, INSTR_RR_E, 3},
916 { "lner", OP8(0x31LL), MASK_RR_E, INSTR_RR_E, 3},
917 { "lper", OP8(0x30LL), MASK_RR_E, INSTR_RR_E, 3},
918 { "swr", OP8(0x2fLL), MASK_RR_D, INSTR_RR_D, 3},
919 { "awr", OP8(0x2eLL), MASK_RR_D, INSTR_RR_D, 3},
920 { "ddr", OP8(0x2dLL), MASK_RR_D, INSTR_RR_D, 3},
921 { "mdr", OP8(0x2cLL), MASK_RR_D, INSTR_RR_D, 3},
922 { "sdr", OP8(0x2bLL), MASK_RR_D, INSTR_RR_D, 3},
923 { "adr", OP8(0x2aLL), MASK_RR_D, INSTR_RR_D, 3},
924 { "cdr", OP8(0x29LL), MASK_RR_D, INSTR_RR_D, 3},
925 { "ldr", OP8(0x28LL), MASK_RR_D, INSTR_RR_D, 3},
926 { "mxdr", OP8(0x27LL), MASK_RR_DX, INSTR_RR_DX, 3},
927 { "mxr", OP8(0x26LL), MASK_RR_X, INSTR_RR_X, 3},
928 { "lrdr", OP8(0x25LL), MASK_RR_XD, INSTR_RR_XD, 3},
929 { "hdr", OP8(0x24LL), MASK_RR_D, INSTR_RR_D, 3},
930 { "lcdr", OP8(0x23LL), MASK_RR_D, INSTR_RR_D, 3},
931 { "ltdr", OP8(0x22LL), MASK_RR_D, INSTR_RR_D, 3},
932 { "lndr", OP8(0x21LL), MASK_RR_D, INSTR_RR_D, 3},
933 { "lpdr", OP8(0x20LL), MASK_RR_D, INSTR_RR_D, 3},
934 { "slr", OP8(0x1fLL), MASK_RR, INSTR_RR, 3},
935 { "alr", OP8(0x1eLL), MASK_RR, INSTR_RR, 3},
936 { "dr", OP8(0x1dLL), MASK_RR, INSTR_RR, 3},
937 { "mr", OP8(0x1cLL), MASK_RR, INSTR_RR, 3},
938 { "sr", OP8(0x1bLL), MASK_RR, INSTR_RR, 3},
939 { "ar", OP8(0x1aLL), MASK_RR, INSTR_RR, 3},
940 { "cr", OP8(0x19LL), MASK_RR, INSTR_RR, 3},
941 { "lr", OP8(0x18LL), MASK_RR, INSTR_RR, 3},
942 { "xr", OP8(0x17LL), MASK_RR, INSTR_RR, 3},
943 { "or", OP8(0x16LL), MASK_RR, INSTR_RR, 3},
944 { "clr", OP8(0x15LL), MASK_RR, INSTR_RR, 3},
945 { "nr", OP8(0x14LL), MASK_RR, INSTR_RR, 3},
946 { "lcr", OP8(0x13LL), MASK_RR, INSTR_RR, 3},
947 { "ltr", OP8(0x12LL), MASK_RR, INSTR_RR, 3},
948 { "lnr", OP8(0x11LL), MASK_RR, INSTR_RR, 3},
949 { "lpr", OP8(0x10LL), MASK_RR, INSTR_RR, 3},
950 { "clcl", OP8(0x0fLL), MASK_RR, INSTR_RR, 3},
951 { "mvcl", OP8(0x0eLL), MASK_RR, INSTR_RR, 3},
952 { "basr", OP8(0x0dLL), MASK_RR, INSTR_RR, 3},
a85d7ed0 953 { "bassm", OP8(0x0cLL), MASK_RR, INSTR_RR, 3},
82b66b23
NC
954 { "bsm", OP8(0x0bLL), MASK_RR, INSTR_RR, 3},
955 { "svc", OP8(0x0aLL), MASK_RR_I, INSTR_RR_I, 3},
956 { "br", OP16(0x07f0LL), MASK_RR_B, INSTR_RR_B, 3},
957 { "bnor", OP16(0x07e0LL), MASK_RR_B, INSTR_RR_B, 3},
958 { "bnhr", OP16(0x07d0LL), MASK_RR_B, INSTR_RR_B, 3},
959 { "bnpr", OP16(0x07d0LL), MASK_RR_B, INSTR_RR_B, 3},
960 { "bler", OP16(0x07c0LL), MASK_RR_B, INSTR_RR_B, 3},
961 { "bnlr", OP16(0x07b0LL), MASK_RR_B, INSTR_RR_B, 3},
962 { "bnmr", OP16(0x07b0LL), MASK_RR_B, INSTR_RR_B, 3},
963 { "bher", OP16(0x07a0LL), MASK_RR_B, INSTR_RR_B, 3},
355d475e 964 { "bnlhr", OP16(0x0790LL), MASK_RR_B, INSTR_RR_B, 3},
82b66b23
NC
965 { "ber", OP16(0x0780LL), MASK_RR_B, INSTR_RR_B, 3},
966 { "bzr", OP16(0x0780LL), MASK_RR_B, INSTR_RR_B, 3},
967 { "bner", OP16(0x0770LL), MASK_RR_B, INSTR_RR_B, 3},
968 { "bnzr", OP16(0x0770LL), MASK_RR_B, INSTR_RR_B, 3},
355d475e 969 { "blhr", OP16(0x0760LL), MASK_RR_B, INSTR_RR_B, 3},
a85d7ed0 970 { "bnher", OP16(0x0750LL), MASK_RR_B, INSTR_RR_B, 3},
82b66b23
NC
971 { "blr", OP16(0x0740LL), MASK_RR_B, INSTR_RR_B, 3},
972 { "bmr", OP16(0x0740LL), MASK_RR_B, INSTR_RR_B, 3},
a85d7ed0 973 { "bnler", OP16(0x0730LL), MASK_RR_B, INSTR_RR_B, 3},
82b66b23
NC
974 { "bhr", OP16(0x0720LL), MASK_RR_B, INSTR_RR_B, 3},
975 { "bpr", OP16(0x0720LL), MASK_RR_B, INSTR_RR_B, 3},
976 { "bor", OP16(0x0710LL), MASK_RR_B, INSTR_RR_B, 3},
977 { "bcr", OP8(0x07LL), MASK_RR_M, INSTR_RR_M, 3},
978 { "nopr", OP16(0x0700LL), MASK_RR_B, INSTR_RR_B, 3},
979 { "bctr", OP8(0x06LL), MASK_RR, INSTR_RR, 3},
980 { "balr", OP8(0x05LL), MASK_RR, INSTR_RR, 3},
981 { "spm", OP8(0x04LL), MASK_RR_R, INSTR_RR_R, 3},
a85d7ed0
NC
982 { "trap2", OP16(0x01ffLL), MASK_E, INSTR_E, 3},
983 { "sam64", OP16(0x010eLL), MASK_E, INSTR_E, 2},
984 { "sam31", OP16(0x010dLL), MASK_E, INSTR_E, 2},
985 { "sam24", OP16(0x010cLL), MASK_E, INSTR_E, 2},
82b66b23 986 { "tam", OP16(0x010bLL), MASK_E, INSTR_E, 2},
a85d7ed0 987 { "sckpf", OP16(0x0107LL), MASK_E, INSTR_E, 3},
82b66b23
NC
988 { "upt", OP16(0x0102LL), MASK_E, INSTR_E, 3},
989 { "pr", OP16(0x0101LL), MASK_E, INSTR_E, 3}
a85d7ed0
NC
990};
991
992const int s390_num_opcodes =
993 sizeof (s390_opcodes) / sizeof (s390_opcodes[0]);
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