[deliverable/binutils-gdb.git] / sim / bfin / dv-bfin_nfc.c

/* Blackfin NAND Flash Memory Controller (NFC) model

   Copyright (C) 2010-2021 Free Software Foundation, Inc.
   Contributed by Analog Devices, Inc.

   This file is part of simulators.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

/* This must come before any other includes.  */
#include "defs.h"

#include "sim-main.h"
#include "devices.h"
#include "dv-bfin_nfc.h"

/* XXX: This is merely a stub.  */

struct bfin_nfc
{
  /* This top portion matches common dv_bfin struct.  */
  bu32 base;
  struct hw *dma_master;
  bool acked;

  struct hw_event *handler;
  char saved_byte;
  int saved_count;

  /* Order after here is important -- matches hardware MMR layout.  */
  bu16 BFIN_MMR_16(ctl);
  bu16 BFIN_MMR_16(stat);
  bu16 BFIN_MMR_16(irqstat);
  bu16 BFIN_MMR_16(irqmask);
  bu16 BFIN_MMR_16(ecc0);
  bu16 BFIN_MMR_16(ecc1);
  bu16 BFIN_MMR_16(ecc2);
  bu16 BFIN_MMR_16(ecc3);
  bu16 BFIN_MMR_16(count);
  bu16 BFIN_MMR_16(rst);
  bu16 BFIN_MMR_16(pgctl);
  bu16 BFIN_MMR_16(read);
  bu32 _pad0[4];
  bu16 BFIN_MMR_16(addr);
  bu16 BFIN_MMR_16(cmd);
  bu16 BFIN_MMR_16(data_wr);
  bu16 BFIN_MMR_16(data_rd);
};
#define mmr_base()      offsetof(struct bfin_nfc, ctl)
#define mmr_offset(mmr) (offsetof(struct bfin_nfc, mmr) - mmr_base())
#define mmr_idx(mmr)    (mmr_offset (mmr) / 4)

static const char * const mmr_names[] =
{
  "NFC_CTL", "NFC_STAT", "NFC_IRQSTAT", "NFC_IRQMASK", "NFC_ECC0", "NFC_ECC1",
  "NFC_ECC2", "NFC_ECC3", "NFC_COUNT", "NFC_RST", "NFC_PGCTL", "NFC_READ",
  [mmr_idx (addr)] = "NFC_ADDR", "NFC_CMD", "NFC_DATA_WR", "NFC_DATA_RD",
};
#define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")

static unsigned
bfin_nfc_io_write_buffer (struct hw *me, const void *source, int space,
			  address_word addr, unsigned nr_bytes)
{
  struct bfin_nfc *nfc = hw_data (me);
  bu32 mmr_off;
  bu32 value;
  bu16 *valuep;

  /* Invalid access mode is higher priority than missing register.  */
  if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
    return 0;

  value = dv_load_2 (source);
  mmr_off = addr - nfc->base;
  valuep = (void *)((unsigned long)nfc + mmr_base() + mmr_off);

  HW_TRACE_WRITE ();

  switch (mmr_off)
    {
    case mmr_offset(ctl):
    case mmr_offset(stat):
    case mmr_offset(irqmask):
    case mmr_offset(ecc0):
    case mmr_offset(ecc1):
    case mmr_offset(ecc2):
    case mmr_offset(ecc3):
    case mmr_offset(count):
    case mmr_offset(rst):
    case mmr_offset(pgctl):
    case mmr_offset(read):
    case mmr_offset(addr):
    case mmr_offset(cmd):
    case mmr_offset(data_wr):
      *valuep = value;
      break;
    case mmr_offset(data_rd):
      nfc->irqstat |= RD_RDY;
      *valuep = value;
      break;
    case mmr_offset(irqstat):
      dv_w1c_2 (valuep, value, -1);
      break;
    default:
      dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
      return 0;
    }

  return nr_bytes;
}

static unsigned
bfin_nfc_io_read_buffer (struct hw *me, void *dest, int space,
			 address_word addr, unsigned nr_bytes)
{
  struct bfin_nfc *nfc = hw_data (me);
  bu32 mmr_off;
  bu16 *valuep;

  /* Invalid access mode is higher priority than missing register.  */
  if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false))
    return 0;

  mmr_off = addr - nfc->base;
  valuep = (void *)((unsigned long)nfc + mmr_base() + mmr_off);

  HW_TRACE_READ ();

  switch (mmr_off)
    {
    case mmr_offset(ctl):
    case mmr_offset(stat):
    case mmr_offset(irqstat):
    case mmr_offset(irqmask):
    case mmr_offset(ecc0):
    case mmr_offset(ecc1):
    case mmr_offset(ecc2):
    case mmr_offset(ecc3):
    case mmr_offset(count):
    case mmr_offset(rst):
    case mmr_offset(read):
      dv_store_2 (dest, *valuep);
      break;
    case mmr_offset(pgctl):
    case mmr_offset(addr):
    case mmr_offset(cmd):
    case mmr_offset(data_wr):
    case mmr_offset(data_rd):
      /* These regs are write only.  */
    default:
      dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
      return 0;
    }

  return nr_bytes;
}

static unsigned
bfin_nfc_dma_read_buffer (struct hw *me, void *dest, int space,
			  unsigned_word addr, unsigned nr_bytes)
{
  HW_TRACE_DMA_READ ();
  return 0;
}

static unsigned
bfin_nfc_dma_write_buffer (struct hw *me, const void *source,
			   int space, unsigned_word addr,
			   unsigned nr_bytes,
			   int violate_read_only_section)
{
  HW_TRACE_DMA_WRITE ();
  return nr_bytes;
}

static const struct hw_port_descriptor bfin_nfc_ports[] =
{
  { "stat", 0, 0, output_port, },
  { NULL, 0, 0, 0, },
};

static void
attach_bfin_nfc_regs (struct hw *me, struct bfin_nfc *nfc)
{
  address_word attach_address;
  int attach_space;
  unsigned attach_size;
  reg_property_spec reg;

  if (hw_find_property (me, "reg") == NULL)
    hw_abort (me, "Missing \"reg\" property");

  if (!hw_find_reg_array_property (me, "reg", 0, &reg))
    hw_abort (me, "\"reg\" property must contain three addr/size entries");

  hw_unit_address_to_attach_address (hw_parent (me),
				     &reg.address,
				     &attach_space, &attach_address, me);
  hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);

  if (attach_size != BFIN_MMR_NFC_SIZE)
    hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_NFC_SIZE);

  hw_attach_address (hw_parent (me),
		     0, attach_space, attach_address, attach_size, me);

  nfc->base = attach_address;
}

static void
bfin_nfc_finish (struct hw *me)
{
  struct bfin_nfc *nfc;

  nfc = HW_ZALLOC (me, struct bfin_nfc);

  set_hw_data (me, nfc);
  set_hw_io_read_buffer (me, bfin_nfc_io_read_buffer);
  set_hw_io_write_buffer (me, bfin_nfc_io_write_buffer);
  set_hw_dma_read_buffer (me, bfin_nfc_dma_read_buffer);
  set_hw_dma_write_buffer (me, bfin_nfc_dma_write_buffer);
  set_hw_ports (me, bfin_nfc_ports);

  attach_bfin_nfc_regs (me, nfc);

  /* Initialize the NFC.  */
  nfc->ctl     = 0x0200;
  nfc->stat    = 0x0011;
  nfc->irqstat = 0x0004;
  nfc->irqmask = 0x001F;
}

const struct hw_descriptor dv_bfin_nfc_descriptor[] =
{
  {"bfin_nfc", bfin_nfc_finish,},
  {NULL, NULL},
};
Commit	Line	Data
ef016f83 MF	1	/* Blackfin NAND Flash Memory Controller (NFC) model
ef016f83 MF	2
3666a048	3	Copyright (C) 2010-2021 Free Software Foundation, Inc.
ef016f83 MF	4	Contributed by Analog Devices, Inc.
	5
	6	This file is part of simulators.
	7
	8	This program is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
	10	the Free Software Foundation; either version 3 of the License, or
	11	(at your option) any later version.
	12
	13	This program is distributed in the hope that it will be useful,
	14	but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this program. If not, see <http://www.gnu.org/licenses/>. */
	20
6df01ab8 MF	21	/* This must come before any other includes. */
6df01ab8 MF	22	#include "defs.h"
ef016f83 MF	23
	24	#include "sim-main.h"
	25	#include "devices.h"
	26	#include "dv-bfin_nfc.h"
	27
	28	/* XXX: This is merely a stub. */
	29
	30	struct bfin_nfc
	31	{
	32	/* This top portion matches common dv_bfin struct. */
	33	bu32 base;
	34	struct hw *dma_master;
	35	bool acked;
	36
	37	struct hw_event *handler;
	38	char saved_byte;
	39	int saved_count;
	40
	41	/* Order after here is important -- matches hardware MMR layout. */
	42	bu16 BFIN_MMR_16(ctl);
	43	bu16 BFIN_MMR_16(stat);
	44	bu16 BFIN_MMR_16(irqstat);
	45	bu16 BFIN_MMR_16(irqmask);
	46	bu16 BFIN_MMR_16(ecc0);
	47	bu16 BFIN_MMR_16(ecc1);
	48	bu16 BFIN_MMR_16(ecc2);
	49	bu16 BFIN_MMR_16(ecc3);
	50	bu16 BFIN_MMR_16(count);
	51	bu16 BFIN_MMR_16(rst);
	52	bu16 BFIN_MMR_16(pgctl);
	53	bu16 BFIN_MMR_16(read);
	54	bu32 _pad0[4];
	55	bu16 BFIN_MMR_16(addr);
	56	bu16 BFIN_MMR_16(cmd);
	57	bu16 BFIN_MMR_16(data_wr);
	58	bu16 BFIN_MMR_16(data_rd);
	59	};
	60	#define mmr_base() offsetof(struct bfin_nfc, ctl)
	61	#define mmr_offset(mmr) (offsetof(struct bfin_nfc, mmr) - mmr_base())
	62	#define mmr_idx(mmr) (mmr_offset (mmr) / 4)
	63
990d19fd MF	64	static const char * const mmr_names[] =
990d19fd MF	65	{
ef016f83 MF	66	"NFC_CTL", "NFC_STAT", "NFC_IRQSTAT", "NFC_IRQMASK", "NFC_ECC0", "NFC_ECC1",
	67	"NFC_ECC2", "NFC_ECC3", "NFC_COUNT", "NFC_RST", "NFC_PGCTL", "NFC_READ",
	68	[mmr_idx (addr)] = "NFC_ADDR", "NFC_CMD", "NFC_DATA_WR", "NFC_DATA_RD",
	69	};
	70	#define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")
	71
	72	static unsigned
	73	bfin_nfc_io_write_buffer (struct hw me, const void source, int space,
	74	address_word addr, unsigned nr_bytes)
	75	{
	76	struct bfin_nfc *nfc = hw_data (me);
	77	bu32 mmr_off;
	78	bu32 value;
	79	bu16 *valuep;
	80
466b619e MF	81	/* Invalid access mode is higher priority than missing register. */
	82	if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
	83	return 0;
	84
ef016f83 MF	85	value = dv_load_2 (source);
	86	mmr_off = addr - nfc->base;
	87	valuep = (void *)((unsigned long)nfc + mmr_base() + mmr_off);
	88
	89	HW_TRACE_WRITE ();
	90
ef016f83 MF	91	switch (mmr_off)
	92	{
	93	case mmr_offset(ctl):
	94	case mmr_offset(stat):
	95	case mmr_offset(irqmask):
	96	case mmr_offset(ecc0):
	97	case mmr_offset(ecc1):
	98	case mmr_offset(ecc2):
	99	case mmr_offset(ecc3):
	100	case mmr_offset(count):
	101	case mmr_offset(rst):
	102	case mmr_offset(pgctl):
	103	case mmr_offset(read):
	104	case mmr_offset(addr):
	105	case mmr_offset(cmd):
	106	case mmr_offset(data_wr):
	107	*valuep = value;
	108	break;
	109	case mmr_offset(data_rd):
	110	nfc->irqstat \|= RD_RDY;
	111	*valuep = value;
	112	break;
	113	case mmr_offset(irqstat):
9922f803	114	dv_w1c_2 (valuep, value, -1);
ef016f83 MF	115	break;
	116	default:
	117	dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
466b619e	118	return 0;
ef016f83 MF	119	}
	120
	121	return nr_bytes;
	122	}
	123
	124	static unsigned
	125	bfin_nfc_io_read_buffer (struct hw me, void dest, int space,
	126	address_word addr, unsigned nr_bytes)
	127	{
	128	struct bfin_nfc *nfc = hw_data (me);
	129	bu32 mmr_off;
	130	bu16 *valuep;
	131
466b619e MF	132	/* Invalid access mode is higher priority than missing register. */
	133	if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false))
	134	return 0;
	135
ef016f83 MF	136	mmr_off = addr - nfc->base;
	137	valuep = (void *)((unsigned long)nfc + mmr_base() + mmr_off);
	138
	139	HW_TRACE_READ ();
	140
ef016f83 MF	141	switch (mmr_off)
	142	{
	143	case mmr_offset(ctl):
	144	case mmr_offset(stat):
	145	case mmr_offset(irqstat):
	146	case mmr_offset(irqmask):
	147	case mmr_offset(ecc0):
	148	case mmr_offset(ecc1):
	149	case mmr_offset(ecc2):
	150	case mmr_offset(ecc3):
	151	case mmr_offset(count):
	152	case mmr_offset(rst):
	153	case mmr_offset(read):
	154	dv_store_2 (dest, *valuep);
	155	break;
	156	case mmr_offset(pgctl):
	157	case mmr_offset(addr):
	158	case mmr_offset(cmd):
	159	case mmr_offset(data_wr):
	160	case mmr_offset(data_rd):
	161	/* These regs are write only. */
	162	default:
	163	dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
466b619e	164	return 0;
ef016f83 MF	165	}
	166
	167	return nr_bytes;
	168	}
	169
	170	static unsigned
	171	bfin_nfc_dma_read_buffer (struct hw me, void dest, int space,
	172	unsigned_word addr, unsigned nr_bytes)
	173	{
	174	HW_TRACE_DMA_READ ();
	175	return 0;
	176	}
	177
	178	static unsigned
	179	bfin_nfc_dma_write_buffer (struct hw me, const void source,
	180	int space, unsigned_word addr,
	181	unsigned nr_bytes,
	182	int violate_read_only_section)
	183	{
	184	HW_TRACE_DMA_WRITE ();
	185	return nr_bytes;
	186	}
	187
990d19fd MF	188	static const struct hw_port_descriptor bfin_nfc_ports[] =
990d19fd MF	189	{
ef016f83 MF	190	{ "stat", 0, 0, output_port, },
	191	{ NULL, 0, 0, 0, },
	192	};
	193
	194	static void
	195	attach_bfin_nfc_regs (struct hw me, struct bfin_nfc nfc)
	196	{
	197	address_word attach_address;
	198	int attach_space;
	199	unsigned attach_size;
	200	reg_property_spec reg;
	201
	202	if (hw_find_property (me, "reg") == NULL)
	203	hw_abort (me, "Missing \"reg\" property");
	204
	205	if (!hw_find_reg_array_property (me, "reg", 0, &reg))
	206	hw_abort (me, "\"reg\" property must contain three addr/size entries");
	207
	208	hw_unit_address_to_attach_address (hw_parent (me),
	209	&reg.address,
	210	&attach_space, &attach_address, me);
	211	hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
	212
	213	if (attach_size != BFIN_MMR_NFC_SIZE)
	214	hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_NFC_SIZE);
	215
	216	hw_attach_address (hw_parent (me),
	217	0, attach_space, attach_address, attach_size, me);
	218
	219	nfc->base = attach_address;
	220	}
	221
	222	static void
	223	bfin_nfc_finish (struct hw *me)
	224	{
	225	struct bfin_nfc *nfc;
	226
	227	nfc = HW_ZALLOC (me, struct bfin_nfc);
	228
	229	set_hw_data (me, nfc);
	230	set_hw_io_read_buffer (me, bfin_nfc_io_read_buffer);
	231	set_hw_io_write_buffer (me, bfin_nfc_io_write_buffer);
	232	set_hw_dma_read_buffer (me, bfin_nfc_dma_read_buffer);
	233	set_hw_dma_write_buffer (me, bfin_nfc_dma_write_buffer);
	234	set_hw_ports (me, bfin_nfc_ports);
	235
	236	attach_bfin_nfc_regs (me, nfc);
	237
	238	/* Initialize the NFC. */
	239	nfc->ctl = 0x0200;
	240	nfc->stat = 0x0011;
	241	nfc->irqstat = 0x0004;
	242	nfc->irqmask = 0x001F;
	243	}
	244
81d126c3 MF	245	const struct hw_descriptor dv_bfin_nfc_descriptor[] =
81d126c3 MF	246	{
ef016f83 MF	247	{"bfin_nfc", bfin_nfc_finish,},
	248	{NULL, NULL},
	249	};