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ef016f83 MF |
1 | /* Blackfin Real Time Clock (RTC) model. |
2 | ||
88b9d363 | 3 | Copyright (C) 2010-2022 Free Software Foundation, Inc. |
ef016f83 MF |
4 | Contributed by Analog Devices, Inc. |
5 | ||
6 | This file is part of simulators. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
6df01ab8 MF |
21 | /* This must come before any other includes. */ |
22 | #include "defs.h" | |
ef016f83 MF |
23 | |
24 | #include <time.h> | |
25 | #include "sim-main.h" | |
26 | #include "dv-sockser.h" | |
27 | #include "devices.h" | |
28 | #include "dv-bfin_rtc.h" | |
29 | ||
30 | /* XXX: This read-only stub setup is based on host system clock. */ | |
31 | ||
32 | struct bfin_rtc | |
33 | { | |
34 | bu32 base; | |
35 | bu32 stat_shadow; | |
36 | ||
37 | /* Order after here is important -- matches hardware MMR layout. */ | |
38 | bu32 stat; | |
39 | bu16 BFIN_MMR_16(ictl); | |
40 | bu16 BFIN_MMR_16(istat); | |
41 | bu16 BFIN_MMR_16(swcnt); | |
42 | bu32 alarm; | |
43 | bu16 BFIN_MMR_16(pren); | |
44 | }; | |
45 | #define mmr_base() offsetof(struct bfin_rtc, stat) | |
46 | #define mmr_offset(mmr) (offsetof(struct bfin_rtc, mmr) - mmr_base()) | |
47 | ||
990d19fd MF |
48 | static const char * const mmr_names[] = |
49 | { | |
ef016f83 MF |
50 | "RTC_STAT", "RTC_ICTL", "RTC_ISTAT", "RTC_SWCNT", "RTC_ALARM", "RTC_PREN", |
51 | }; | |
52 | #define mmr_name(off) mmr_names[(off) / 4] | |
53 | ||
54 | static unsigned | |
55 | bfin_rtc_io_write_buffer (struct hw *me, const void *source, | |
56 | int space, address_word addr, unsigned nr_bytes) | |
57 | { | |
58 | struct bfin_rtc *rtc = hw_data (me); | |
59 | bu32 mmr_off; | |
60 | bu32 value; | |
61 | bu16 *value16p; | |
62 | bu32 *value32p; | |
63 | void *valuep; | |
64 | ||
466b619e MF |
65 | /* Invalid access mode is higher priority than missing register. */ |
66 | if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) | |
67 | return 0; | |
68 | ||
ef016f83 MF |
69 | if (nr_bytes == 4) |
70 | value = dv_load_4 (source); | |
71 | else | |
72 | value = dv_load_2 (source); | |
73 | ||
74 | mmr_off = addr - rtc->base; | |
75 | valuep = (void *)((unsigned long)rtc + mmr_base() + mmr_off); | |
76 | value16p = valuep; | |
77 | value32p = valuep; | |
78 | ||
79 | HW_TRACE_WRITE (); | |
80 | ||
81 | /* XXX: These probably need more work. */ | |
82 | switch (mmr_off) | |
83 | { | |
84 | case mmr_offset(stat): | |
85 | /* XXX: Ignore these since we are wired to host. */ | |
86 | break; | |
87 | case mmr_offset(istat): | |
9922f803 | 88 | dv_w1c_2 (value16p, value, ~(1 << 14)); |
ef016f83 MF |
89 | break; |
90 | case mmr_offset(alarm): | |
91 | break; | |
92 | case mmr_offset(ictl): | |
93 | /* XXX: This should schedule an event handler. */ | |
94 | case mmr_offset(swcnt): | |
95 | case mmr_offset(pren): | |
96 | break; | |
97 | } | |
98 | ||
99 | return nr_bytes; | |
100 | } | |
101 | ||
102 | static unsigned | |
103 | bfin_rtc_io_read_buffer (struct hw *me, void *dest, | |
104 | int space, address_word addr, unsigned nr_bytes) | |
105 | { | |
106 | struct bfin_rtc *rtc = hw_data (me); | |
107 | bu32 mmr_off; | |
108 | bu16 *value16p; | |
109 | bu32 *value32p; | |
110 | void *valuep; | |
111 | ||
466b619e MF |
112 | /* Invalid access mode is higher priority than missing register. */ |
113 | if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false)) | |
114 | return 0; | |
115 | ||
ef016f83 MF |
116 | mmr_off = addr - rtc->base; |
117 | valuep = (void *)((unsigned long)rtc + mmr_base() + mmr_off); | |
118 | value16p = valuep; | |
119 | value32p = valuep; | |
120 | ||
121 | HW_TRACE_READ (); | |
122 | ||
123 | switch (mmr_off) | |
124 | { | |
125 | case mmr_offset(stat): | |
126 | { | |
127 | time_t t = time (NULL); | |
128 | struct tm *tm = localtime (&t); | |
129 | bu32 value = | |
130 | (((tm->tm_year - 70) * 365 + tm->tm_yday) << 17) | | |
131 | (tm->tm_hour << 12) | | |
132 | (tm->tm_min << 6) | | |
133 | (tm->tm_sec << 0); | |
134 | dv_store_4 (dest, value); | |
135 | break; | |
136 | } | |
137 | case mmr_offset(alarm): | |
138 | dv_store_4 (dest, *value32p); | |
139 | break; | |
140 | case mmr_offset(istat): | |
141 | case mmr_offset(ictl): | |
142 | case mmr_offset(swcnt): | |
143 | case mmr_offset(pren): | |
144 | dv_store_2 (dest, *value16p); | |
145 | break; | |
146 | } | |
147 | ||
148 | return nr_bytes; | |
149 | } | |
150 | ||
990d19fd MF |
151 | static const struct hw_port_descriptor bfin_rtc_ports[] = |
152 | { | |
ef016f83 MF |
153 | { "rtc", 0, 0, output_port, }, |
154 | { NULL, 0, 0, 0, }, | |
155 | }; | |
156 | ||
157 | static void | |
158 | attach_bfin_rtc_regs (struct hw *me, struct bfin_rtc *rtc) | |
159 | { | |
160 | address_word attach_address; | |
161 | int attach_space; | |
162 | unsigned attach_size; | |
163 | reg_property_spec reg; | |
164 | ||
165 | if (hw_find_property (me, "reg") == NULL) | |
166 | hw_abort (me, "Missing \"reg\" property"); | |
167 | ||
168 | if (!hw_find_reg_array_property (me, "reg", 0, ®)) | |
169 | hw_abort (me, "\"reg\" property must contain three addr/size entries"); | |
170 | ||
171 | hw_unit_address_to_attach_address (hw_parent (me), | |
172 | ®.address, | |
173 | &attach_space, &attach_address, me); | |
174 | hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me); | |
175 | ||
176 | if (attach_size != BFIN_MMR_RTC_SIZE) | |
177 | hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_RTC_SIZE); | |
178 | ||
179 | hw_attach_address (hw_parent (me), | |
180 | 0, attach_space, attach_address, attach_size, me); | |
181 | ||
182 | rtc->base = attach_address; | |
183 | } | |
184 | ||
185 | static void | |
186 | bfin_rtc_finish (struct hw *me) | |
187 | { | |
188 | struct bfin_rtc *rtc; | |
189 | ||
190 | rtc = HW_ZALLOC (me, struct bfin_rtc); | |
191 | ||
192 | set_hw_data (me, rtc); | |
193 | set_hw_io_read_buffer (me, bfin_rtc_io_read_buffer); | |
194 | set_hw_io_write_buffer (me, bfin_rtc_io_write_buffer); | |
195 | set_hw_ports (me, bfin_rtc_ports); | |
196 | ||
197 | attach_bfin_rtc_regs (me, rtc); | |
198 | ||
199 | /* Initialize the RTC. */ | |
200 | } | |
201 | ||
81d126c3 MF |
202 | const struct hw_descriptor dv_bfin_rtc_descriptor[] = |
203 | { | |
ef016f83 MF |
204 | {"bfin_rtc", bfin_rtc_finish,}, |
205 | {NULL, NULL}, | |
206 | }; |