Do not use old-style definitions in sim
[deliverable/binutils-gdb.git] / sim / erc32 / func.c
CommitLineData
296730a5
MF
1/* This file is part of SIS (SPARC instruction simulator)
2
3666a048 3 Copyright (C) 1995-2021 Free Software Foundation, Inc.
296730a5 4 Contributed by Jiri Gaisler, European Space Agency
17d88f73
JB
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c 18
5272643f 19#include "config.h"
c906108c
SS
20#include <signal.h>
21#include <string.h>
22#include <stdio.h>
23#include <stdlib.h>
24#include <ctype.h>
25#include "sis.h"
c906108c
SS
26#include <dis-asm.h>
27#include "sim-config.h"
638fcdad 28#include <inttypes.h>
c906108c 29
c906108c
SS
30#define VAL(x) strtoul(x,(char **)NULL,0)
31
c906108c
SS
32struct disassemble_info dinfo;
33struct pstate sregs;
34extern struct estate ebase;
35int ctrl_c = 0;
36int sis_verbose = 0;
37char *sis_version = "2.7.5";
38int nfp = 0;
39int ift = 0;
40int wrp = 0;
41int rom8 = 0;
42int uben = 0;
43int termsave;
44int sparclite = 0; /* emulating SPARClite instructions? */
45int sparclite_board = 0; /* emulating SPARClite board RAM? */
46char uart_dev1[128] = "";
47char uart_dev2[128] = "";
48extern int ext_irl;
49uint32 last_load_addr = 0;
50
51#ifdef ERRINJ
52uint32 errcnt = 0;
53uint32 errper = 0;
54uint32 errtt = 0;
55uint32 errftt = 0;
56uint32 errmec = 0;
57#endif
58
59/* Forward declarations */
60
bdca5ee4
TT
61static int batch (struct pstate *sregs, char *fname);
62static void set_rega (struct pstate *sregs, char *reg, uint32 rval);
63static void disp_reg (struct pstate *sregs, char *reg);
64static uint32 limcalc (float32 freq);
65static void int_handler (int32 sig);
66static void init_event (void);
67static int disp_fpu (struct pstate *sregs);
68static void disp_regs (struct pstate *sregs, int cwp);
69static void disp_ctrl (struct pstate *sregs);
70static void disp_mem (uint32 addr, uint32 len);
c906108c
SS
71
72static int
81e6e8ae 73batch(struct pstate *sregs, char *fname)
c906108c
SS
74{
75 FILE *fp;
b9f9ea2f
JG
76 char *lbuf = NULL;
77 size_t len = 0;
78 size_t slen;
c906108c
SS
79
80 if ((fp = fopen(fname, "r")) == NULL) {
81 fprintf(stderr, "couldn't open batch file %s\n", fname);
5831e29b 82 return 0;
c906108c 83 }
b9f9ea2f
JG
84 while (getline(&lbuf, &len, fp) > -1) {
85 slen = strlen(lbuf);
86 if (slen && (lbuf[slen - 1] == '\n')) {
87 lbuf[slen - 1] = 0;
88 printf("sis> %s\n", lbuf);
89 exec_cmd(sregs, lbuf);
90 }
c906108c 91 }
b9f9ea2f 92 free(lbuf);
c906108c 93 fclose(fp);
5831e29b 94 return 1;
c906108c
SS
95}
96
97void
81e6e8ae 98set_regi(struct pstate *sregs, int32 reg, uint32 rval)
c906108c
SS
99{
100 uint32 cwp;
101
102 cwp = ((sregs->psr & 0x7) << 4);
103 if ((reg > 0) && (reg < 8)) {
104 sregs->g[reg] = rval;
105 } else if ((reg >= 8) && (reg < 32)) {
106 sregs->r[(cwp + reg) & 0x7f] = rval;
107 } else if ((reg >= 32) && (reg < 64)) {
108 sregs->fsi[reg - 32] = rval;
109 } else {
110 switch (reg) {
111 case 64:
112 sregs->y = rval;
113 break;
114 case 65:
115 sregs->psr = rval;
116 break;
117 case 66:
118 sregs->wim = rval;
119 break;
120 case 67:
121 sregs->tbr = rval;
122 break;
123 case 68:
124 sregs->pc = rval;
125 break;
126 case 69:
127 sregs->npc = rval;
128 break;
129 case 70:
130 sregs->fsr = rval;
131 set_fsr(rval);
132 break;
133 default:break;
134 }
135 }
136}
137
138void
139get_regi(struct pstate * sregs, int32 reg, char *buf)
140{
141 uint32 cwp;
142 uint32 rval = 0;
143
144 cwp = ((sregs->psr & 0x7) << 4);
145 if ((reg >= 0) && (reg < 8)) {
146 rval = sregs->g[reg];
147 } else if ((reg >= 8) && (reg < 32)) {
148 rval = sregs->r[(cwp + reg) & 0x7f];
149 } else if ((reg >= 32) && (reg < 64)) {
150 rval = sregs->fsi[reg - 32];
151 } else {
152 switch (reg) {
153 case 64:
154 rval = sregs->y;
155 break;
156 case 65:
157 rval = sregs->psr;
158 break;
159 case 66:
160 rval = sregs->wim;
161 break;
162 case 67:
163 rval = sregs->tbr;
164 break;
165 case 68:
166 rval = sregs->pc;
167 break;
168 case 69:
169 rval = sregs->npc;
170 break;
171 case 70:
172 rval = sregs->fsr;
173 break;
174 default:break;
175 }
176 }
d3e9b40a
JG
177 buf[0] = (rval >> 24) & 0x0ff;
178 buf[1] = (rval >> 16) & 0x0ff;
179 buf[2] = (rval >> 8) & 0x0ff;
180 buf[3] = rval & 0x0ff;
c906108c
SS
181}
182
183
184static void
81e6e8ae 185set_rega(struct pstate *sregs, char *reg, uint32 rval)
c906108c
SS
186{
187 uint32 cwp;
188 int32 err = 0;
189
190 cwp = ((sregs->psr & 0x7) << 4);
191 if (strcmp(reg, "psr") == 0)
192 sregs->psr = (rval = (rval & 0x00f03fff));
193 else if (strcmp(reg, "tbr") == 0)
194 sregs->tbr = (rval = (rval & 0xfffffff0));
195 else if (strcmp(reg, "wim") == 0)
196 sregs->wim = (rval = (rval & 0x0ff));
197 else if (strcmp(reg, "y") == 0)
198 sregs->y = rval;
199 else if (strcmp(reg, "pc") == 0)
200 sregs->pc = rval;
201 else if (strcmp(reg, "npc") == 0)
202 sregs->npc = rval;
203 else if (strcmp(reg, "fsr") == 0) {
204 sregs->fsr = rval;
205 set_fsr(rval);
206 } else if (strcmp(reg, "g0") == 0)
207 err = 2;
208 else if (strcmp(reg, "g1") == 0)
209 sregs->g[1] = rval;
210 else if (strcmp(reg, "g2") == 0)
211 sregs->g[2] = rval;
212 else if (strcmp(reg, "g3") == 0)
213 sregs->g[3] = rval;
214 else if (strcmp(reg, "g4") == 0)
215 sregs->g[4] = rval;
216 else if (strcmp(reg, "g5") == 0)
217 sregs->g[5] = rval;
218 else if (strcmp(reg, "g6") == 0)
219 sregs->g[6] = rval;
220 else if (strcmp(reg, "g7") == 0)
221 sregs->g[7] = rval;
222 else if (strcmp(reg, "o0") == 0)
223 sregs->r[(cwp + 8) & 0x7f] = rval;
224 else if (strcmp(reg, "o1") == 0)
225 sregs->r[(cwp + 9) & 0x7f] = rval;
226 else if (strcmp(reg, "o2") == 0)
227 sregs->r[(cwp + 10) & 0x7f] = rval;
228 else if (strcmp(reg, "o3") == 0)
229 sregs->r[(cwp + 11) & 0x7f] = rval;
230 else if (strcmp(reg, "o4") == 0)
231 sregs->r[(cwp + 12) & 0x7f] = rval;
232 else if (strcmp(reg, "o5") == 0)
233 sregs->r[(cwp + 13) & 0x7f] = rval;
234 else if (strcmp(reg, "o6") == 0)
235 sregs->r[(cwp + 14) & 0x7f] = rval;
236 else if (strcmp(reg, "o7") == 0)
237 sregs->r[(cwp + 15) & 0x7f] = rval;
238 else if (strcmp(reg, "l0") == 0)
239 sregs->r[(cwp + 16) & 0x7f] = rval;
240 else if (strcmp(reg, "l1") == 0)
241 sregs->r[(cwp + 17) & 0x7f] = rval;
242 else if (strcmp(reg, "l2") == 0)
243 sregs->r[(cwp + 18) & 0x7f] = rval;
244 else if (strcmp(reg, "l3") == 0)
245 sregs->r[(cwp + 19) & 0x7f] = rval;
246 else if (strcmp(reg, "l4") == 0)
247 sregs->r[(cwp + 20) & 0x7f] = rval;
248 else if (strcmp(reg, "l5") == 0)
249 sregs->r[(cwp + 21) & 0x7f] = rval;
250 else if (strcmp(reg, "l6") == 0)
251 sregs->r[(cwp + 22) & 0x7f] = rval;
252 else if (strcmp(reg, "l7") == 0)
253 sregs->r[(cwp + 23) & 0x7f] = rval;
254 else if (strcmp(reg, "i0") == 0)
255 sregs->r[(cwp + 24) & 0x7f] = rval;
256 else if (strcmp(reg, "i1") == 0)
257 sregs->r[(cwp + 25) & 0x7f] = rval;
258 else if (strcmp(reg, "i2") == 0)
259 sregs->r[(cwp + 26) & 0x7f] = rval;
260 else if (strcmp(reg, "i3") == 0)
261 sregs->r[(cwp + 27) & 0x7f] = rval;
262 else if (strcmp(reg, "i4") == 0)
263 sregs->r[(cwp + 28) & 0x7f] = rval;
264 else if (strcmp(reg, "i5") == 0)
265 sregs->r[(cwp + 29) & 0x7f] = rval;
266 else if (strcmp(reg, "i6") == 0)
267 sregs->r[(cwp + 30) & 0x7f] = rval;
268 else if (strcmp(reg, "i7") == 0)
269 sregs->r[(cwp + 31) & 0x7f] = rval;
270 else
271 err = 1;
272 switch (err) {
273 case 0:
274 printf("%s = %d (0x%08x)\n", reg, rval, rval);
275 break;
276 case 1:
277 printf("no such regiser: %s\n", reg);
278 break;
279 case 2:
280 printf("cannot set g0\n");
281 break;
282 default:
283 break;
284 }
285
286}
287
288static void
81e6e8ae 289disp_reg(struct pstate *sregs, char *reg)
c906108c
SS
290{
291 if (strncmp(reg, "w",1) == 0)
292 disp_regs(sregs, VAL(&reg[1]));
293}
294
295#ifdef ERRINJ
296
297void
298errinj()
299{
300 int err;
301
302 switch (err = (random() % 12)) {
303 case 0: errtt = 0x61; break;
304 case 1: errtt = 0x62; break;
305 case 2: errtt = 0x63; break;
306 case 3: errtt = 0x64; break;
307 case 4: errtt = 0x65; break;
308 case 5:
309 case 6:
310 case 7: errftt = err;
311 break;
312 case 8: errmec = 1; break;
313 case 9: errmec = 2; break;
314 case 10: errmec = 5; break;
315 case 11: errmec = 6; break;
316 }
317 errcnt++;
318 if (errper) event(errinj, 0, (random()%errper));
319}
320
321void
322errinjstart()
323{
324 if (errper) event(errinj, 0, (random()%errper));
325}
326
327#endif
328
329static uint32
81e6e8ae 330limcalc (float32 freq)
c906108c
SS
331{
332 uint32 unit, lim;
333 double flim;
334 char *cmd1, *cmd2;
335
336 unit = 1;
337 lim = -1;
338 if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
339 lim = VAL(cmd1);
340 if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
341 if (strcmp(cmd2,"us")==0) unit = 1;
342 if (strcmp(cmd2,"ms")==0) unit = 1000;
343 if (strcmp(cmd2,"s")==0) unit = 1000000;
344 }
345 flim = (double) lim * (double) unit * (double) freq +
346 (double) ebase.simtime;
347 if ((flim > ebase.simtime) && (flim < 4294967296.0)) {
348 lim = (uint32) flim;
349 } else {
350 printf("error in expression\n");
351 lim = -1;
352 }
353 }
5831e29b 354 return lim;
c906108c 355}
510d2751 356
c906108c 357int
510d2751 358exec_cmd(struct pstate *sregs, const char *cmd)
c906108c
SS
359{
360 char *cmd1, *cmd2;
361 int32 stat;
362 uint32 len, i, clen, j;
363 static uint32 daddr = 0;
510d2751 364 char *cmdsave, *cmdsave2 = NULL;
c906108c
SS
365
366 stat = OK;
367 cmdsave = strdup(cmd);
510d2751
JG
368 cmdsave2 = strdup (cmd);
369 if ((cmd1 = strtok (cmdsave2, " \t")) != NULL) {
c906108c
SS
370 clen = strlen(cmd1);
371 if (strncmp(cmd1, "bp", clen) == 0) {
372 for (i = 0; i < sregs->bptnum; i++) {
373 printf(" %d : 0x%08x\n", i + 1, sregs->bpts[i]);
374 }
375 } else if (strncmp(cmd1, "+bp", clen) == 0) {
376 if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
377 sregs->bpts[sregs->bptnum] = VAL(cmd1) & ~0x3;
378 printf("added breakpoint %d at 0x%08x\n",
379 sregs->bptnum + 1, sregs->bpts[sregs->bptnum]);
380 sregs->bptnum += 1;
381 }
382 } else if (strncmp(cmd1, "-bp", clen) == 0) {
383 if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
384 i = VAL(cmd1) - 1;
385 if ((i >= 0) && (i < sregs->bptnum)) {
386 printf("deleted breakpoint %d at 0x%08x\n", i + 1,
387 sregs->bpts[i]);
388 for (; i < sregs->bptnum - 1; i++) {
389 sregs->bpts[i] = sregs->bpts[i + 1];
390 }
391 sregs->bptnum -= 1;
392 }
393 }
394 } else if (strncmp(cmd1, "batch", clen) == 0) {
395 if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
396 printf("no file specified\n");
397 } else {
398 batch(sregs, cmd1);
399 }
400 } else if (strncmp(cmd1, "cont", clen) == 0) {
401 if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
94110024 402 stat = run_sim(sregs, UINT64_MAX, 0);
c906108c
SS
403 } else {
404 stat = run_sim(sregs, VAL(cmd1), 0);
405 }
406 daddr = sregs->pc;
407 sim_halt();
408 } else if (strncmp(cmd1, "debug", clen) == 0) {
409 if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
410 sis_verbose = VAL(cmd1);
411 }
412 printf("Debug level = %d\n",sis_verbose);
413 } else if (strncmp(cmd1, "dis", clen) == 0) {
414 if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
415 daddr = VAL(cmd1);
416 }
417 if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
418 len = VAL(cmd2);
419 } else
420 len = 16;
421 printf("\n");
422 dis_mem(daddr, len, &dinfo);
423 printf("\n");
424 daddr += len * 4;
425 } else if (strncmp(cmd1, "echo", clen) == 0) {
426 if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
427 printf("%s\n", (&cmdsave[clen+1]));
428 }
429#ifdef ERRINJ
430 } else if (strncmp(cmd1, "error", clen) == 0) {
431 if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
432 errper = VAL(cmd1);
433 if (errper) {
434 event(errinj, 0, (len = (random()%errper)));
435 printf("Error injection started with period %d\n",len);
436 }
437 } else printf("Injected errors: %d\n",errcnt);
438#endif
439 } else if (strncmp(cmd1, "float", clen) == 0) {
440 stat = disp_fpu(sregs);
441 } else if (strncmp(cmd1, "go", clen) == 0) {
442 if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
443 len = last_load_addr;
444 } else {
445 len = VAL(cmd1);
446 }
447 sregs->pc = len & ~3;
448 sregs->npc = sregs->pc + 4;
20a0ffe3
JG
449 if ((sregs->pc != 0) && (ebase.simtime == 0))
450 boot_init();
c906108c
SS
451 printf("resuming at 0x%08x\n",sregs->pc);
452 if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
453 stat = run_sim(sregs, VAL(cmd2), 0);
454 } else {
94110024 455 stat = run_sim(sregs, UINT64_MAX, 0);
c906108c
SS
456 }
457 daddr = sregs->pc;
458 sim_halt();
459 } else if (strncmp(cmd1, "help", clen) == 0) {
460 gen_help();
461 } else if (strncmp(cmd1, "history", clen) == 0) {
462 if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
463 sregs->histlen = VAL(cmd1);
464 if (sregs->histbuf != NULL)
465 free(sregs->histbuf);
466 sregs->histbuf = (struct histype *) calloc(sregs->histlen, sizeof(struct histype));
467 printf("trace history length = %d\n\r", sregs->histlen);
468 sregs->histind = 0;
469
470 } else {
471 j = sregs->histind;
472 for (i = 0; i < sregs->histlen; i++) {
473 if (j >= sregs->histlen)
474 j = 0;
475 printf(" %8d ", sregs->histbuf[j].time);
476 dis_mem(sregs->histbuf[j].addr, 1, &dinfo);
477 j++;
478 }
479 }
480
481 } else if (strncmp(cmd1, "load", clen) == 0) {
482 if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
483 last_load_addr = bfd_load(cmd1);
484 while ((cmd1 = strtok(NULL, " \t\n\r")) != NULL)
485 last_load_addr = bfd_load(cmd1);
486 } else {
487 printf("load: no file specified\n");
488 }
489 } else if (strncmp(cmd1, "mem", clen) == 0) {
490 if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL)
491 daddr = VAL(cmd1);
492 if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL)
493 len = VAL(cmd2);
494 else
495 len = 64;
496 disp_mem(daddr, len);
497 daddr += len;
498 } else if (strncmp(cmd1, "perf", clen) == 0) {
499 cmd1 = strtok(NULL, " \t\n\r");
500 if ((cmd1 != NULL) &&
501 (strncmp(cmd1, "reset", strlen(cmd1)) == 0)) {
502 reset_stat(sregs);
503 } else
504 show_stat(sregs);
505 } else if (strncmp(cmd1, "quit", clen) == 0) {
506 exit(0);
507 } else if (strncmp(cmd1, "reg", clen) == 0) {
508 cmd1 = strtok(NULL, " \t\n\r");
509 cmd2 = strtok(NULL, " \t\n\r");
510 if (cmd2 != NULL)
511 set_rega(sregs, cmd1, VAL(cmd2));
512 else if (cmd1 != NULL)
513 disp_reg(sregs, cmd1);
514 else {
515 disp_regs(sregs,sregs->psr);
516 disp_ctrl(sregs);
517 }
518 } else if (strncmp(cmd1, "reset", clen) == 0) {
519 ebase.simtime = 0;
520 reset_all();
521 reset_stat(sregs);
522 } else if (strncmp(cmd1, "run", clen) == 0) {
523 ebase.simtime = 0;
524 reset_all();
525 reset_stat(sregs);
526 if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
94110024 527 stat = run_sim(sregs, UINT64_MAX, 0);
c906108c
SS
528 } else {
529 stat = run_sim(sregs, VAL(cmd1), 0);
530 }
531 daddr = sregs->pc;
532 sim_halt();
533 } else if (strncmp(cmd1, "shell", clen) == 0) {
534 if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
b9f9ea2f
JG
535 if (system(&cmdsave[clen])) {
536 /* Silence unused return value warning. */
537 }
c906108c
SS
538 }
539 } else if (strncmp(cmd1, "step", clen) == 0) {
540 stat = run_sim(sregs, 1, 1);
541 daddr = sregs->pc;
542 sim_halt();
543 } else if (strncmp(cmd1, "tcont", clen) == 0) {
544 sregs->tlimit = limcalc(sregs->freq);
94110024 545 stat = run_sim(sregs, UINT64_MAX, 0);
c906108c
SS
546 daddr = sregs->pc;
547 sim_halt();
548 } else if (strncmp(cmd1, "tgo", clen) == 0) {
549 if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
550 len = last_load_addr;
551 } else {
552 len = VAL(cmd1);
553 sregs->tlimit = limcalc(sregs->freq);
554 }
555 sregs->pc = len & ~3;
556 sregs->npc = sregs->pc + 4;
557 printf("resuming at 0x%08x\n",sregs->pc);
94110024 558 stat = run_sim(sregs, UINT64_MAX, 0);
c906108c
SS
559 daddr = sregs->pc;
560 sim_halt();
561 } else if (strncmp(cmd1, "tlimit", clen) == 0) {
562 sregs->tlimit = limcalc(sregs->freq);
563 if (sregs->tlimit != (uint32) -1)
564 printf("simulation limit = %u (%.3f ms)\n",(uint32) sregs->tlimit,
565 sregs->tlimit / sregs->freq / 1000);
566 } else if (strncmp(cmd1, "tra", clen) == 0) {
567 if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
94110024 568 stat = run_sim(sregs, UINT64_MAX, 1);
c906108c
SS
569 } else {
570 stat = run_sim(sregs, VAL(cmd1), 1);
571 }
572 printf("\n");
573 daddr = sregs->pc;
574 sim_halt();
575 } else if (strncmp(cmd1, "trun", clen) == 0) {
576 ebase.simtime = 0;
577 reset_all();
578 reset_stat(sregs);
579 sregs->tlimit = limcalc(sregs->freq);
94110024 580 stat = run_sim(sregs, UINT64_MAX, 0);
c906108c
SS
581 daddr = sregs->pc;
582 sim_halt();
583 } else
584 printf("syntax error\n");
585 }
510d2751
JG
586 if (cmdsave2 != NULL)
587 free(cmdsave2);
c906108c
SS
588 if (cmdsave != NULL)
589 free(cmdsave);
5831e29b 590 return stat;
c906108c
SS
591}
592
593
594void
81e6e8ae 595reset_stat(struct pstate *sregs)
c906108c 596{
96d67095 597 sregs->tottime = 0.0;
c906108c
SS
598 sregs->pwdtime = 0;
599 sregs->ninst = 0;
600 sregs->fholdt = 0;
601 sregs->holdt = 0;
602 sregs->icntt = 0;
603 sregs->finst = 0;
604 sregs->nstore = 0;
605 sregs->nload = 0;
606 sregs->nbranch = 0;
607 sregs->simstart = ebase.simtime;
608
609}
610
611void
81e6e8ae 612show_stat(struct pstate *sregs)
c906108c
SS
613{
614 uint32 iinst;
96d67095 615 uint32 stime;
c906108c 616
96d67095
JG
617 if (sregs->tottime == 0.0)
618 sregs->tottime += 1E-6;
c906108c
SS
619 stime = ebase.simtime - sregs->simstart; /* Total simulated time */
620#ifdef STAT
621
622 iinst = sregs->ninst - sregs->finst - sregs->nload - sregs->nstore -
623 sregs->nbranch;
624#endif
625
638fcdad
JG
626 printf("\n Cycles : %9" PRIu64 "\n\r", ebase.simtime - sregs->simstart);
627 printf(" Instructions : %9" PRIu64 "\n", sregs->ninst);
c906108c
SS
628
629#ifdef STAT
630 printf(" integer : %9.2f %%\n", 100.0 * (float) iinst / (float) sregs->ninst);
631 printf(" load : %9.2f %%\n",
632 100.0 * (float) sregs->nload / (float) sregs->ninst);
633 printf(" store : %9.2f %%\n",
634 100.0 * (float) sregs->nstore / (float) sregs->ninst);
635 printf(" branch : %9.2f %%\n",
636 100.0 * (float) sregs->nbranch / (float) sregs->ninst);
637 printf(" float : %9.2f %%\n",
638 100.0 * (float) sregs->finst / (float) sregs->ninst);
639 printf(" Integer CPI : %9.2f\n",
640 ((float) (stime - sregs->pwdtime - sregs->fholdt - sregs->finst))
641 /
642 (float) (sregs->ninst - sregs->finst));
643 printf(" Float CPI : %9.2f\n",
644 ((float) sregs->fholdt / (float) sregs->finst) + 1.0);
645#endif
646 printf(" Overall CPI : %9.2f\n",
647 (float) (stime - sregs->pwdtime) / (float) sregs->ninst);
648 printf("\n ERC32 performance (%4.1f MHz): %5.2f MOPS (%5.2f MIPS, %5.2f MFLOPS)\n",
649 sregs->freq, sregs->freq * (float) sregs->ninst / (float) (stime - sregs->pwdtime),
650 sregs->freq * (float) (sregs->ninst - sregs->finst) /
651 (float) (stime - sregs->pwdtime),
652 sregs->freq * (float) sregs->finst / (float) (stime - sregs->pwdtime));
96d67095
JG
653 printf(" Simulated ERC32 time : %.2f s\n",
654 (float) (ebase.simtime - sregs->simstart) / 1000000.0 / sregs->freq);
655 printf(" Processor utilisation : %.2f %%\n",
656 100.0 * (1.0 - ((float) sregs->pwdtime / (float) stime)));
657 printf(" Real-time performance : %.2f %%\n",
658 100.0 / (sregs->tottime / ((double) (stime) / (sregs->freq * 1.0E6))));
659 printf(" Simulator performance : %.2f MIPS\n",
660 (double)(sregs->ninst) / sregs->tottime / 1E6);
661 printf(" Used time (sys + user) : %.2f s\n\n", sregs->tottime);
c906108c
SS
662}
663
664
665
666void
81e6e8ae 667init_bpt(struct pstate *sregs)
c906108c
SS
668{
669 sregs->bptnum = 0;
670 sregs->histlen = 0;
671 sregs->histind = 0;
672 sregs->histbuf = NULL;
673 sregs->tlimit = -1;
674}
675
676static void
81e6e8ae 677int_handler(int32 sig)
c906108c
SS
678{
679 if (sig != 2)
680 printf("\n\n Signal handler error (%d)\n\n", sig);
681 ctrl_c = 1;
682}
683
684void
81e6e8ae 685init_signals(void)
c906108c
SS
686{
687 typedef void (*PFI) ();
688 static PFI int_tab[2];
689
690 int_tab[0] = signal(SIGTERM, int_handler);
691 int_tab[1] = signal(SIGINT, int_handler);
692}
693
694
695extern struct disassemble_info dinfo;
696
697struct estate ebase;
698struct evcell evbuf[EVENT_MAX];
699struct irqcell irqarr[16];
700
701static int
81e6e8ae 702disp_fpu(struct pstate *sregs)
c906108c
SS
703{
704
705 int i;
706 float t;
707
708 printf("\n fsr: %08X\n\n", sregs->fsr);
709
9c5f41df 710#ifdef HOST_LITTLE_ENDIAN
c906108c
SS
711 for (i = 0; i < 32; i++)
712 sregs->fdp[i ^ 1] = sregs->fs[i];
713#endif
714
715 for (i = 0; i < 32; i++) {
716 t = sregs->fs[i];
717 printf(" f%02d %08x %14e ", i, sregs->fsi[i], sregs->fs[i]);
718 if (!(i & 1))
719 printf("%14e\n", sregs->fd[i >> 1]);
720 else
721 printf("\n");
722 }
723 printf("\n");
5831e29b 724 return OK;
c906108c
SS
725}
726
727static void
81e6e8ae 728disp_regs(struct pstate *sregs, int cwp)
c906108c
SS
729{
730
731 int i;
732
733 cwp = ((cwp & 0x7) << 4);
734 printf("\n\t INS LOCALS OUTS GLOBALS\n");
735 for (i = 0; i < 8; i++) {
736 printf(" %d: %08X %08X %08X %08X\n", i,
737 sregs->r[(cwp + i + 24) & 0x7f],
738 sregs->r[(cwp + i + 16) & 0x7f], sregs->r[(cwp + i + 8) & 0x7f],
739 sregs->g[i]);
740 }
741}
742
53b5af48
JG
743static void print_insn_sparc_sis(uint32 addr, struct disassemble_info *info)
744{
745 unsigned char i[4];
746
747 sis_memory_read(addr, i, 4);
748 dinfo.buffer_vma = addr;
749 dinfo.buffer_length = 4;
750 dinfo.buffer = i;
751 print_insn_sparc(addr, info);
752}
753
c906108c 754static void
81e6e8ae 755disp_ctrl(struct pstate *sregs)
c906108c
SS
756{
757
d3e9b40a 758 uint32 i;
c906108c
SS
759
760 printf("\n psr: %08X wim: %08X tbr: %08X y: %08X\n",
761 sregs->psr, sregs->wim, sregs->tbr, sregs->y);
d3e9b40a
JG
762 sis_memory_read (sregs->pc, (char *) &i, 4);
763 printf ("\n pc: %08X = %08X ", sregs->pc, i);
53b5af48 764 print_insn_sparc_sis(sregs->pc, &dinfo);
d3e9b40a
JG
765 sis_memory_read (sregs->npc, (char *) &i, 4);
766 printf ("\n npc: %08X = %08X ", sregs->npc, i);
53b5af48 767 print_insn_sparc_sis(sregs->npc, &dinfo);
c906108c
SS
768 if (sregs->err_mode)
769 printf("\n IU in error mode");
770 printf("\n\n");
771}
772
773static void
81e6e8ae 774disp_mem(uint32 addr, uint32 len)
c906108c
SS
775{
776
777 uint32 i;
d3e9b40a
JG
778 union {
779 unsigned char u8[4];
780 uint32 u32;
781 } data;
c906108c
SS
782 uint32 mem[4], j;
783 char *p;
784
785 for (i = addr & ~3; i < ((addr + len) & ~3); i += 16) {
786 printf("\n %8X ", i);
787 for (j = 0; j < 4; j++) {
d3e9b40a
JG
788 sis_memory_read ((i + (j * 4)), data.u8, 4);
789 printf ("%08x ", data.u32);
790 mem[j] = data.u32;
c906108c
SS
791 }
792 printf(" ");
793 p = (char *) mem;
794 for (j = 0; j < 16; j++) {
d3e9b40a
JG
795 if (isprint (p[j ^ EBT]))
796 putchar (p[j ^ EBT]);
c906108c
SS
797 else
798 putchar('.');
799 }
800 }
801 printf("\n\n");
802}
803
804void
81e6e8ae 805dis_mem(uint32 addr, uint32 len, struct disassemble_info *info)
c906108c
SS
806{
807 uint32 i;
d3e9b40a
JG
808 union {
809 unsigned char u8[4];
810 uint32 u32;
811 } data;
c906108c
SS
812
813 for (i = addr & -3; i < ((addr & -3) + (len << 2)); i += 4) {
d3e9b40a
JG
814 sis_memory_read (i, data.u8, 4);
815 printf (" %08x %08x ", i, data.u32);
53b5af48 816 print_insn_sparc_sis(i, info);
c906108c
SS
817 if (i >= 0xfffffffc) break;
818 printf("\n");
819 }
820}
821
c906108c
SS
822/* Add event to event queue */
823
824void
81e6e8ae 825event(void (*cfunc) (), int32 arg, uint64 delta)
c906108c
SS
826{
827 struct evcell *ev1, *evins;
828
829 if (ebase.freeq == NULL) {
830 printf("Error, too many events in event queue\n");
831 return;
832 }
833 ev1 = &ebase.eq;
834 delta += ebase.simtime;
835 while ((ev1->nxt != NULL) && (ev1->nxt->time <= delta)) {
836 ev1 = ev1->nxt;
837 }
838 if (ev1->nxt == NULL) {
839 ev1->nxt = ebase.freeq;
840 ebase.freeq = ebase.freeq->nxt;
841 ev1->nxt->nxt = NULL;
842 } else {
843 evins = ebase.freeq;
844 ebase.freeq = ebase.freeq->nxt;
845 evins->nxt = ev1->nxt;
846 ev1->nxt = evins;
847 }
848 ev1->nxt->time = delta;
849 ev1->nxt->cfunc = cfunc;
850 ev1->nxt->arg = arg;
851}
852
853#if 0 /* apparently not used */
854void
855stop_event()
856{
857}
858#endif
859
860void
81e6e8ae 861init_event(void)
c906108c
SS
862{
863 int32 i;
864
865 ebase.eq.nxt = NULL;
866 ebase.freeq = evbuf;
867 for (i = 0; i < EVENT_MAX; i++) {
868 evbuf[i].nxt = &evbuf[i + 1];
869 }
870 evbuf[EVENT_MAX - 1].nxt = NULL;
871}
872
873void
81e6e8ae 874set_int(int32 level, void (*callback) (), int32 arg)
c906108c
SS
875{
876 irqarr[level & 0x0f].callback = callback;
877 irqarr[level & 0x0f].arg = arg;
878}
879
880/* Advance simulator time */
881
882void
81e6e8ae 883advance_time(struct pstate *sregs)
c906108c
SS
884{
885
886 struct evcell *evrem;
887 void (*cfunc) ();
94110024
JS
888 uint32 arg;
889 uint64 endtime;
c906108c
SS
890
891#ifdef STAT
892 sregs->fholdt += sregs->fhold;
893 sregs->holdt += sregs->hold;
894 sregs->icntt += sregs->icnt;
895#endif
896
897 endtime = ebase.simtime + sregs->icnt + sregs->hold + sregs->fhold;
898
899 while ((ebase.eq.nxt->time <= (endtime)) && (ebase.eq.nxt != NULL)) {
900 ebase.simtime = ebase.eq.nxt->time;
901 cfunc = ebase.eq.nxt->cfunc;
902 arg = ebase.eq.nxt->arg;
903 evrem = ebase.eq.nxt;
904 ebase.eq.nxt = ebase.eq.nxt->nxt;
905 evrem->nxt = ebase.freeq;
906 ebase.freeq = evrem;
907 cfunc(arg);
908 }
909 ebase.simtime = endtime;
910
911}
912
913uint32
81e6e8ae 914now(void)
c906108c 915{
5831e29b 916 return ebase.simtime;
c906108c
SS
917}
918
919
920/* Advance time until an external interrupt is seen */
921
922int
81e6e8ae 923wait_for_irq(void)
c906108c
SS
924{
925 struct evcell *evrem;
926 void (*cfunc) ();
94110024
JS
927 int32 arg;
928 uint64 endtime;
c906108c
SS
929
930 if (ebase.eq.nxt == NULL)
931 printf("Warning: event queue empty - power-down mode not entered\n");
932 endtime = ebase.simtime;
933 while (!ext_irl && (ebase.eq.nxt != NULL)) {
934 ebase.simtime = ebase.eq.nxt->time;
935 cfunc = ebase.eq.nxt->cfunc;
936 arg = ebase.eq.nxt->arg;
937 evrem = ebase.eq.nxt;
938 ebase.eq.nxt = ebase.eq.nxt->nxt;
939 evrem->nxt = ebase.freeq;
940 ebase.freeq = evrem;
941 cfunc(arg);
942 if (ctrl_c) {
943 printf("\bwarning: power-down mode interrupted\n");
944 break;
945 }
946 }
947 sregs.pwdtime += ebase.simtime - endtime;
5831e29b 948 return ebase.simtime - endtime;
c906108c
SS
949}
950
951int
81e6e8ae 952check_bpt(struct pstate *sregs)
c906108c
SS
953{
954 int32 i;
955
956 if ((sregs->bphit) || (sregs->annul))
5831e29b 957 return 0;
c906108c
SS
958 for (i = 0; i < (int32) sregs->bptnum; i++) {
959 if (sregs->pc == sregs->bpts[i])
5831e29b 960 return BPT_HIT;
c906108c 961 }
5831e29b 962 return 0;
c906108c
SS
963}
964
965void
81e6e8ae 966reset_all(void)
c906108c
SS
967{
968 init_event(); /* Clear event queue */
969 init_regs(&sregs);
970 reset();
971#ifdef ERRINJ
972 errinjstart();
973#endif
974}
975
976void
81e6e8ae 977sys_reset(void)
c906108c
SS
978{
979 reset_all();
980 sregs.trap = 256; /* Force fake reset trap */
981}
982
983void
81e6e8ae 984sys_halt(void)
c906108c
SS
985{
986 sregs.trap = 257; /* Force fake halt trap */
987}
988
989#include "ansidecl.h"
990
c906108c 991#include <stdarg.h>
c906108c
SS
992
993#include "libiberty.h"
994#include "bfd.h"
995
996#define min(A, B) (((A) < (B)) ? (A) : (B))
997#define LOAD_ADDRESS 0
998
999int
510d2751 1000bfd_load (const char *fname)
c906108c
SS
1001{
1002 asection *section;
1003 bfd *pbfd;
1004 const bfd_arch_info_type *arch;
d3e9b40a 1005 int i;
c906108c
SS
1006
1007 pbfd = bfd_openr(fname, 0);
1008
1009 if (pbfd == NULL) {
1010 printf("open of %s failed\n", fname);
5831e29b 1011 return -1;
c906108c
SS
1012 }
1013 if (!bfd_check_format(pbfd, bfd_object)) {
1014 printf("file %s doesn't seem to be an object file\n", fname);
5831e29b 1015 return -1;
c906108c
SS
1016 }
1017
1018 arch = bfd_get_arch_info (pbfd);
c906108c
SS
1019 if (sis_verbose)
1020 printf("loading %s:", fname);
1021 for (section = pbfd->sections; section; section = section->next) {
fd361982 1022 if (bfd_section_flags (section) & SEC_ALLOC) {
c906108c
SS
1023 bfd_vma section_address;
1024 unsigned long section_size;
1025 const char *section_name;
1026
fd361982 1027 section_name = bfd_section_name (section);
c906108c 1028
fd361982 1029 section_address = bfd_section_vma (section);
c906108c
SS
1030 /*
1031 * Adjust sections from a.out files, since they don't carry their
1032 * addresses with.
1033 */
1034 if (bfd_get_flavour(pbfd) == bfd_target_aout_flavour) {
1035 if (strcmp (section_name, ".text") == 0)
1036 section_address = bfd_get_start_address (pbfd);
1037 else if (strcmp (section_name, ".data") == 0) {
1038 /* Read the first 8 bytes of the data section.
1039 There should be the string 'DaTa' followed by
1040 a word containing the actual section address. */
1041 struct data_marker
1042 {
1043 char signature[4]; /* 'DaTa' */
1044 unsigned char sdata[4]; /* &sdata */
1045 } marker;
1046 bfd_get_section_contents (pbfd, section, &marker, 0,
1047 sizeof (marker));
1048 if (strncmp (marker.signature, "DaTa", 4) == 0)
1049 {
d3e9b40a 1050 section_address = bfd_getb32 (marker.sdata);
c906108c
SS
1051 }
1052 }
1053 }
1054
fd361982 1055 section_size = bfd_section_size (section);
c906108c
SS
1056
1057 if (sis_verbose)
1058 printf("\nsection %s at 0x%08lx (0x%lx bytes)",
1059 section_name, section_address, section_size);
1060
1061 /* Text, data or lit */
fd361982 1062 if (bfd_section_flags (section) & SEC_LOAD) {
c906108c
SS
1063 file_ptr fptr;
1064
1065 fptr = 0;
1066
1067 while (section_size > 0) {
1068 char buffer[1024];
1069 int count;
1070
1071 count = min(section_size, 1024);
1072
1073 bfd_get_section_contents(pbfd, section, buffer, fptr, count);
1074
d3e9b40a
JG
1075 for (i = 0; i < count; i++)
1076 sis_memory_write ((section_address + i) ^ EBT, &buffer[i], 1);
c906108c
SS
1077
1078 section_address += count;
1079 fptr += count;
1080 section_size -= count;
1081 }
1082 } else /* BSS */
1083 if (sis_verbose)
1084 printf("(not loaded)");
1085 }
1086 }
1087 if (sis_verbose)
1088 printf("\n");
1089
5831e29b 1090 return bfd_get_start_address (pbfd);
c906108c 1091}
96d67095
JG
1092
1093double get_time (void)
1094{
1095 double usec;
1096
1097 struct timeval tm;
1098
1099 gettimeofday (&tm, NULL);
1100 usec = ((double) tm.tv_sec) * 1E6 + ((double) tm.tv_usec);
5831e29b 1101 return usec / 1E6;
96d67095 1102}
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