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edece237 | 1 | /* Main simulator entry points specific to the IQ2000. |
3666a048 | 2 | Copyright (C) 2000-2021 Free Software Foundation, Inc. |
edece237 CV |
3 | Contributed by Cygnus Solutions. |
4 | ||
5 | This file is part of the GNU simulators. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
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9 | the Free Software Foundation; either version 3 of the License, or |
10 | (at your option) any later version. | |
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11 | |
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
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17 | You should have received a copy of the GNU General Public License |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
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19 | |
20 | #include "sim-main.h" | |
68ed2854 | 21 | |
edece237 | 22 | #include <stdlib.h> |
68ed2854 | 23 | |
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24 | #include "sim-options.h" |
25 | #include "libiberty.h" | |
26 | #include "bfd.h" | |
27 | ||
28 | static void free_state (SIM_DESC); | |
edece237 CV |
29 | \f |
30 | /* Cover function for sim_cgen_disassemble_insn. */ | |
31 | ||
32 | void | |
33 | iq2000bf_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn, | |
34 | const ARGBUF *abuf, IADDR pc, char *buf) | |
35 | { | |
36 | sim_cgen_disassemble_insn(cpu, insn, abuf, pc, buf); | |
37 | } | |
38 | ||
39 | /* Cover function of sim_state_free to free the cpu buffers as well. */ | |
40 | ||
41 | static void | |
42 | free_state (SIM_DESC sd) | |
43 | { | |
44 | if (STATE_MODULES (sd) != NULL) | |
45 | sim_module_uninstall (sd); | |
46 | sim_cpu_free_all (sd); | |
47 | sim_state_free (sd); | |
48 | } | |
49 | ||
50 | /* Create an instance of the simulator. */ | |
51 | ||
52 | SIM_DESC | |
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53 | sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd, |
54 | char * const *argv) | |
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55 | { |
56 | char c; | |
57 | int i; | |
58 | SIM_DESC sd = sim_state_alloc (kind, callback); | |
59 | ||
60 | /* The cpu data is kept in a separately allocated chunk of memory. */ | |
61 | if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK) | |
62 | { | |
63 | free_state (sd); | |
64 | return 0; | |
65 | } | |
66 | ||
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67 | if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) |
68 | { | |
69 | free_state (sd); | |
70 | return 0; | |
71 | } | |
72 | ||
77cf2ef5 | 73 | /* The parser will print an error message for us, so we silently return. */ |
edece237 CV |
74 | if (sim_parse_args (sd, argv) != SIM_RC_OK) |
75 | { | |
76 | free_state (sd); | |
77 | return 0; | |
78 | } | |
79 | ||
80 | /* Allocate core managed memory. */ | |
81 | sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_INSN_VALUE, IQ2000_INSN_MEM_SIZE); | |
82 | sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_DATA_VALUE, IQ2000_DATA_MEM_SIZE); | |
83 | ||
84 | /* check for/establish the reference program image */ | |
85 | if (sim_analyze_program (sd, | |
86 | (STATE_PROG_ARGV (sd) != NULL | |
87 | ? *STATE_PROG_ARGV (sd) | |
88 | : NULL), | |
89 | abfd) != SIM_RC_OK) | |
90 | { | |
91 | free_state (sd); | |
92 | return 0; | |
93 | } | |
94 | ||
95 | /* Establish any remaining configuration options. */ | |
96 | if (sim_config (sd) != SIM_RC_OK) | |
97 | { | |
98 | free_state (sd); | |
99 | return 0; | |
100 | } | |
101 | ||
102 | if (sim_post_argv_init (sd) != SIM_RC_OK) | |
103 | { | |
104 | free_state (sd); | |
105 | return 0; | |
106 | } | |
107 | ||
108 | /* Open a copy of the cpu descriptor table. */ | |
109 | { | |
110 | CGEN_CPU_DESC cd = iq2000_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, | |
111 | CGEN_ENDIAN_BIG); | |
112 | ||
113 | for (i = 0; i < MAX_NR_PROCESSORS; ++i) | |
114 | { | |
115 | SIM_CPU *cpu = STATE_CPU (sd, i); | |
116 | CPU_CPU_DESC (cpu) = cd; | |
117 | CPU_DISASSEMBLER (cpu) = iq2000bf_disassemble_insn; | |
118 | } | |
119 | iq2000_cgen_init_dis (cd); | |
120 | } | |
121 | ||
122 | /* Initialize various cgen things not done by common framework. | |
123 | Must be done after iq2000_cgen_cpu_open. */ | |
124 | cgen_init (sd); | |
125 | ||
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126 | return sd; |
127 | } | |
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128 | \f |
129 | SIM_RC | |
81e6e8ae TT |
130 | sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char * const *argv, |
131 | char * const *envp) | |
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132 | { |
133 | SIM_CPU *current_cpu = STATE_CPU (sd, 0); | |
134 | SIM_ADDR addr; | |
135 | ||
136 | if (abfd != NULL) | |
137 | addr = bfd_get_start_address (abfd); | |
138 | else | |
139 | addr = CPU2INSN(0); | |
140 | sim_pc_set (current_cpu, addr); | |
141 | ||
0e967299 MF |
142 | /* Standalone mode (i.e. `run`) will take care of the argv for us in |
143 | sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim' | |
144 | with `gdb`), we need to handle it because the user can change the | |
145 | argv on the fly via gdb's 'run'. */ | |
146 | if (STATE_PROG_ARGV (sd) != argv) | |
147 | { | |
148 | freeargv (STATE_PROG_ARGV (sd)); | |
149 | STATE_PROG_ARGV (sd) = dupargv (argv); | |
150 | } | |
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151 | |
152 | return SIM_RC_OK; | |
153 | } |